WO2022104961A1 - 压电性能测试方法及结构 - Google Patents

压电性能测试方法及结构 Download PDF

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Publication number
WO2022104961A1
WO2022104961A1 PCT/CN2020/135859 CN2020135859W WO2022104961A1 WO 2022104961 A1 WO2022104961 A1 WO 2022104961A1 CN 2020135859 W CN2020135859 W CN 2020135859W WO 2022104961 A1 WO2022104961 A1 WO 2022104961A1
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piezoelectric
electrode
segment
layer
lower electrode
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PCT/CN2020/135859
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English (en)
French (fr)
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沈宇
占瞻
童贝
石正雨
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瑞声声学科技(深圳)有限公司
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Publication of WO2022104961A1 publication Critical patent/WO2022104961A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/22—Measuring piezoelectric properties

Definitions

  • the invention relates to the technical field of testing, in particular to a piezoelectric performance testing method and a piezoelectric performance testing structure applied to piezoelectric performance testing of piezoelectric materials.
  • Piezoelectric materials have a wide range of applications in various fields, such as piezoelectric transducers, piezoelectric sensors, piezoelectric drivers, filters, resonators, etc.
  • MEMS piezoelectric microphones MEMS piezoelectric speakers
  • SAW SAW
  • FBAR FBAR
  • piezoelectric film layer structure ie, piezoelectric material film
  • the piezoelectric coefficient is an important indicator to measure the performance of the above-mentioned devices. .
  • piezoelectric coefficients are generally tested using commercial equipment.
  • piezoelectric coefficients are tested with commercial professional test equipment.
  • the piezoelectric coefficient test of related technologies generally adopts two methods: the first is to use the "inverse piezoelectric effect", that is, the material is deformed by the power-on signal, and then the size of the deformation amount of the material is measured by optical detection equipment, and the pressure is measured. Electrical coefficients, such as laser interferometry, laser Doppler vibrometers and piezoelectric force microscopy. The second is to use the "positive piezoelectric effect", that is, by applying a force to make a material generate an electric charge, and measuring the piezoelectric coefficient by measuring the magnitude of the electric charge.
  • the test accuracy of the related art is limited by the accuracy of the table top shape and the jig.
  • the detection mostly uses the optical scheme to obtain the amplitude
  • the test system is complex and expensive, and needs to consider reflection, refraction, loss, etc.
  • the test spot size is limited, and the performance related to the ultra-fine film structure cannot be obtained.
  • the purpose of the present invention is to overcome the above technical problems, and to provide a piezoelectric performance testing method and a piezoelectric performance testing structure with a simple structure and easy testing.
  • the present invention provides a piezoelectric performance testing method, which is applied to the piezoelectric performance testing of a sample to be tested, where the sample to be tested includes a piezoelectric film, and the method includes the following steps:
  • Step S1 input the AC signal to the signal input terminal of the sample to be tested
  • Step S2 the sample to be tested is deformed by the inverse piezoelectric effect through the input AC signal, and the sample to be tested converts the deformation into an electrical signal for output;
  • Step S3 acquiring the output electrical signal of the signal output terminal of the sample to be tested, the output electrical signal is generated by the piezoelectric film through the positive piezoelectric effect;
  • Step S4 performing signal amplification or signal processing on the output electrical signal to obtain the piezoelectric coefficient of the piezoelectric film.
  • the sample to be tested is tested in a vacuum state.
  • the sample to be tested further includes a back-end circuit, and in the step S4, the signal amplification or signal processing is implemented by the back-end circuit.
  • the present invention also provides a piezoelectric performance test structure, the piezoelectric performance test structure includes a substrate with a cavity, a piezoelectric layer, and upper electrodes and lower electrodes attached to opposite sides of the piezoelectric layer;
  • the piezoelectric layer, the upper electrode and the lower electrode form an integrated structure, and the integrated structure is connected to the substrate through the lower electrode and suspended above the cavity;
  • the substrate, the The piezoelectric layer, the upper electrode and the lower electrode together form a resonator circuit;
  • the upper electrode includes a first upper electrode and a second upper electrode located at opposite ends of the piezoelectric layer, and the lower electrode includes a first upper electrode and a second upper electrode located at opposite ends of the piezoelectric layer.
  • first lower electrode and a second lower electrode at opposite ends of the piezoelectric layer the first upper electrode is arranged corresponding to the first lower electrode, and the second upper electrode and the second lower electrode are arranged correspondingly;
  • the first upper electrode is used as a signal input terminal
  • the second upper electrode is used as a signal output terminal
  • the first lower electrode and the second lower electrode are grounded, or the first upper electrode and the second lower electrode are grounded Grounding
  • the first lower electrode is used as a signal input terminal
  • the second lower electrode is used as a signal output terminal.
  • the first upper electrode includes a plurality
  • the first lower electrode includes a plurality
  • the second upper electrode includes a plurality
  • the second lower electrode includes a plurality
  • the present invention also provides a piezoelectric performance test structure, the piezoelectric performance test structure includes a substrate with a cavity, a piezoelectric layer, and a plurality of electrode layers spaced on opposite sides of the piezoelectric layer.
  • the electrode layer is three layers and includes an upper electrode layer, a middle electrode layer and a lower electrode layer stacked in sequence, the piezoelectric layer, the upper electrode layer and the lower electrode layer form an integrated structure, and the integrated structure is One end is connected to the substrate through the lower electrode layer, and the other end is suspended above the cavity to form a cantilever beam; the substrate, the piezoelectric layer and the electrode layer together form a resonator circuit;
  • the cantilever beam is a 5-layer stack structure, the piezoelectric layer is two layers and includes a first piezoelectric layer and a second piezoelectric layer; the upper electrode layer an electrode and a third-segment upper electrode; the middle electrode layer includes a first-segment middle electrode, a second-
  • the projections along the thickness direction have overlapping portions ;
  • the piezoelectric performance testing method and piezoelectric performance testing structure of the present invention include steps: step S1, inputting an AC signal to the signal input end of the sample to be tested; step S2, inputting an AC signal The AC signal caused the sample to be tested is deformed by the inverse piezoelectric effect, and the sample to be tested converts the deformation into an electrical signal for output; step S3, obtains the output electrical signal of the signal output end of the sample to be tested , the output electrical signal is generated by the piezoelectric film through the positive piezoelectric effect; in step S4, signal amplification or signal processing is performed on the output electrical signal to obtain the piezoelectric coefficient of the piezoelectric film.
  • the method adopts the coupling of the positive piezoelectric effect and the inverse piezoelectric effect, so as to realize the evaluation and test of the piezoelectric coefficient of the piezoelectric film, and is applied to the piezoelectric performance test method of the piezoelectric film and the piezoelectric performance test structure for direct electric drive , electrical testing, easy to operate, and can be used for wafer-level testing of piezoelectric coefficients, especially to obtain the piezoelectric coefficients of ultra-fine film structures; and the entire testing system uses electrical testing, the testing system has a simple structure and is easy to Operational testing. Especially in the state of device resonance, a larger output voltage can be obtained, which is beneficial to signal detection and reduces power frequency interference. Therefore, the piezoelectric performance test method and the piezoelectric performance test structure of the film-layer piezoelectric material are obtained. The reliability of the piezoelectric coefficient is higher.
  • Fig. 1 is the flow chart of the piezoelectric performance testing method of the present invention
  • Fig. 2 is the partial three-dimensional structure schematic diagram of the piezoelectric performance test structure of the present invention
  • FIG. 3 is a schematic structural diagram of the circuit connection relationship of the piezoelectric performance testing structure of the present invention.
  • Fig. 4 is the relation diagram of the voltage and time of the output electric signal under the situation of different piezoelectric coefficients of piezoelectric film of the present invention
  • FIG. 5 is a schematic partial three-dimensional structure diagram of another piezoelectric performance testing structure of the present invention.
  • FIG. 6 is a schematic structural diagram of the circuit connection relationship of FIG. 5 .
  • the present invention provides a piezoelectric performance testing method.
  • the piezoelectric performance testing method is applied to the piezoelectric performance testing of the sample to be tested.
  • the sample to be tested includes a piezoelectric film.
  • the piezoelectric performance testing method includes the following steps:
  • Step S1 input an AC signal to the signal input terminal of the sample to be tested.
  • Step S2 the sample to be tested is deformed by the inverse piezoelectric effect through the input AC signal, and the sample to be tested converts the deformation into an electrical signal for output.
  • the inverse piezoelectric effect means that when an electric field is applied in the polarization direction of the dielectric of the piezoelectric film, the dielectric of the piezoelectric film will produce mechanical deformation or mechanical pressure in a certain direction. When the applied electric field is removed, these deformations Or the stress also disappears.
  • the positive piezoelectric effect refers to the phenomenon that electric polarization is generated by deformation. When physical pressure is applied to the piezoelectric material, the electric dipole moment in the material body will be shortened due to compression. At this time, the piezoelectric material will generate an equal amount of positive and negative charges on the opposite surfaces of the material to resist this change to maintain undisturbed. This phenomenon of electric polarization through deformation is called "positive piezoelectric effect".
  • Step S3 acquiring the output electrical signal of the signal output terminal of the sample to be tested, where the output electrical signal is generated by the piezoelectric film through the positive piezoelectric effect.
  • Step S4 performing signal amplification or signal processing on the output electrical signal to obtain the piezoelectric coefficient d 31 of the piezoelectric film.
  • the sample to be tested further includes a back-end circuit.
  • the signal amplification or signal processing is implemented by the back-end circuit.
  • the back-end circuit is a circuit commonly used in the field, and the designer selects a specific circuit structure and circuit performance index according to actual product requirements, which will not be described in detail here.
  • the sample to be tested is tested in a vacuum state.
  • the present invention provides a piezoelectric performance testing structure 100 .
  • the piezoelectric performance testing structure 100 is used to realize the coupling of the positive piezoelectric effect and the inverse piezoelectric effect; and by reasonably optimizing the electrodes, the electrical parameters of the piezoelectric material can be obtained without affecting the mechanical properties.
  • This embodiment is the first embodiment. Please also refer to FIGS. 2-3 .
  • the first embodiment provides the piezoelectric performance testing structure 100 .
  • the piezoelectric performance testing structure 100 applies the piezoelectric performance testing method.
  • the piezoelectric performance testing structure 100 includes a substrate 4 having a cavity 40 , a piezoelectric layer 1 , and an upper electrode 2 and a lower electrode 3 attached to opposite sides of the piezoelectric layer 1 .
  • the piezoelectric layer 1 is a piezoelectric thin film.
  • the piezoelectric layer 1 , the upper electrode 2 and the lower electrode 3 form an integrated structure, and the integrated structure is connected to the substrate 4 through the lower electrode 3 and suspended above the cavity 40 . That is, the integrated structure is located on one side of the cavity 40 along the thickness direction of the piezoelectric performance testing structure 100 .
  • the upper electrode 2 and the lower electrode 3 are respectively located at opposite ends of the long axis of the piezoelectric layer 1 .
  • the substrate 4, the piezoelectric layer 1, the upper electrode 2 and the lower electrode 3 together form a resonator circuit, wherein one of the upper electrode 2 or the lower electrode 3 is used as a signal input terminal, and the other is used as a signal input terminal.
  • the upper electrode 2 or the lower electrode 3 is used as a signal output terminal.
  • the upper electrode 2 includes a first upper electrode 21 and a second upper electrode 22 attached to the same side as the piezoelectric layer 1 .
  • the first upper electrode 21 serves as the signal input end
  • the The second upper electrode 22 serves as the signal output terminal.
  • the lower electrode 3 includes a first lower electrode 31 and a second lower electrode 32 attached to the other side of the piezoelectric layer 1 , and the first lower electrode 31 and the second lower electrode 32 are both electrically connected to ground.
  • the piezoelectric layer 1 is rectangular.
  • the first upper electrode 21 and the first lower electrode 31 are arranged facing each other; the second upper electrode 22 and the second lower electrode 32 are arranged facing each other; the first upper electrode 21 and the second The upper electrodes 22 are respectively disposed at opposite ends of the long axis of the piezoelectric layer 1 .
  • This structure is conducive to the conversion of the positive piezoelectric effect and the inverse piezoelectric effect of the AC signal in the piezoelectric performance testing structure 100 , thereby making the evaluation and testing of the piezoelectric coefficient d 31 of the piezoelectric performance testing structure 100 more efficient. Easy and accurate.
  • the first upper electrodes 21 include a plurality; the first lower electrodes 31 include a plurality; the first upper electrodes 21 and the first lower electrodes 31 are in one-to-one correspondence.
  • the second upper electrode 22 includes a plurality of them. This structure makes the AC signal acting on the first upper electrode 21 and the first lower electrode 31 more evenly, so that the inverse piezoelectric effect of the piezoelectric layer 1 is easier to generate.
  • the second lower electrodes 32 include a plurality of; the second upper electrodes 22 and the second lower electrodes 32 are in one-to-one correspondence. This structure makes it easier to obtain the output electrical signal generated by the deformation of the piezoelectric layer 1 , thereby making the evaluation and testing of the piezoelectric coefficient d 31 of the piezoelectric layer 1 easier and more accurate.
  • FIG. 4 is a graph showing the relationship between the voltage and time of the output electrical signal under different piezoelectric coefficients d 31 of the piezoelectric layer 1 of the present invention.
  • W1 , W2 , W3 and W4 are the voltage-time curves of the piezoelectric coefficient d 31 of the piezoelectric layer 1 (ie, the piezoelectric thin film).
  • W1 is 2.0 times d 31
  • W2 is 1.5 times d 31
  • W3 is 1.0 times d 31
  • W4 is 0.5 times d 31
  • the piezoelectric performance testing method and the piezoelectric performance testing structure 100 of the present invention can be used for the wafer-level testing of the piezoelectric coefficient d 31 , in particular, ultra-fine films can be obtained Piezoelectric coefficient d 31 of the layer structure .
  • the piezoelectric performance testing method and the piezoelectric performance testing structure 100 of the present invention adopt the coupling of the positive piezoelectric effect and the inverse piezoelectric effect, so as to realize the evaluation of the piezoelectric coefficient d 31 of the piezoelectric layer 1 and test.
  • the piezoelectric performance testing method and the piezoelectric performance testing structure 100 are directly electrically driven and electrically detected, which is easy to operate, and can be used for wafer-level testing with a piezoelectric coefficient of d 31 , especially to obtain ultra-micro
  • the piezoelectric performance testing method and the piezoelectric performance testing structure 100 obtain the piezoelectric coefficient d 31 higher reliability.
  • the present invention also provides another piezoelectric performance testing structure 200 , and the piezoelectric performance testing method is applied to both the piezoelectric performance testing structure 200 and the piezoelectric performance testing structure 100 . .
  • the piezoelectric performance testing structure 200 is different from the piezoelectric performance testing structure 100 in that the electrodes in the piezoelectric performance testing structure 200 are at the same end of the piezoelectric film axial direction.
  • the piezoelectric performance testing structure 200 includes a substrate 4a having a cavity 40a, a piezoelectric layer b, and a plurality of electrode layers c attached to opposite sides of the piezoelectric layer b at intervals.
  • the electrode layer c has two layers and includes an upper electrode layer 1c, a middle electrode layer 2c and a lower electrode layer 3c.
  • the piezoelectric layer b, the upper electrode layer 1c and the lower electrode layer 3c form an integrated structure, one end of the integrated structure is connected to the substrate 4a through the lower electrode layer 3c, and the other end is suspended A cantilever beam is formed above the cavity 40a.
  • the substrate 4a, the piezoelectric layer b and the electrode layer c together form a resonator circuit, wherein one or more of the electrode layers c serve as signal input terminals, and one or more of the electrode layers c serve as a signal input terminal.
  • the cantilever beam is a 5-layer stack structure.
  • the piezoelectric layer b has two layers and includes a first piezoelectric layer b1 and a second piezoelectric layer b2.
  • the upper electrode layer 1c includes a first-segment upper electrode 1c11 , a second-segment upper electrode 1c22 and a third-segment upper electrode 1c33 that are spaced apart from each other.
  • the intermediate electrode layer 2c includes a first-segment intermediate electrode 2c11, a second-segment intermediate electrode 2c22 and a third-segment intermediate electrode 2c33 spaced apart from each other.
  • the lower electrode layer 3c includes a first-segment lower electrode 3c11, a second-segment lower electrode 3c22 and a third-segment lower electrode 3c33 spaced apart from each other.
  • the first-segment middle electrode 2c11 is a signal input terminal, and the first-segment upper electrode 1c11 , the first-segment lower electrode 3c11 and the second-segment middle electrode 2c22 are all electrically connected to ground.
  • the second-segment upper electrode 1c22, the second-segment lower electrode 3c22, and the third-segment middle electrode 2c33 are all electrically connected and in a suspended state.
  • the third-segment upper electrode 1c33 is electrically connected to the third-segment lower electrode 3c33 and serves as the signal output terminal.
  • the first-segment upper electrode 1c11 , the first-segment middle electrode 2c11 , and the first-segment lower electrode 3c11 are arranged along the thickness of the piezoelectric layer b on opposite sides of the piezoelectric layer b.
  • the projections of the directions have overlapping parts.
  • the second-segment upper electrode 1c22, the second-segment middle electrode 2c22, and the second-segment lower electrode 3c22 are disposed on the surfaces of opposite sides of the piezoelectric layer b, the projections along the thickness direction have overlapping portions. .
  • the projections along the thickness direction have overlapping portions. , so that an electric field can be generated inside the piezoelectric layer b when an electrical signal is applied.
  • the device using the multi-stage resonator can be directly electrically driven and electrically detected, which is convenient to operate, and can be used for the wafer-level test of the piezoelectric coefficient d 31 , especially The piezoelectric coefficient d 31 of the ultra-fine film structure is obtained.
  • the whole test system adopts electrical test, the structure of the test system is simple, and it is also easy to operate and test.
  • a larger output voltage can be obtained, which is beneficial to signal detection and reduces power frequency interference, and the piezoelectric performance testing structure 200 has higher reliability for obtaining the piezoelectric coefficient d 31 .
  • the piezoelectric performance testing method and piezoelectric performance testing structure of the present invention include steps: step S1, inputting an AC signal to the signal input end of the sample to be tested; step S2, inputting an AC signal The AC signal caused the sample to be tested is deformed by the inverse piezoelectric effect, and the sample to be tested converts the deformation into an electrical signal for output; step S3, obtains the output electrical signal of the signal output end of the sample to be tested , the output electrical signal is generated by the piezoelectric film through the positive piezoelectric effect; in step S4, signal amplification or signal processing is performed on the output electrical signal to obtain the piezoelectric coefficient of the piezoelectric film.
  • the method adopts the coupling of the positive piezoelectric effect and the inverse piezoelectric effect, so as to realize the evaluation and test of the piezoelectric coefficient of the piezoelectric film, and is applied to the piezoelectric performance test method of the piezoelectric film and the piezoelectric performance test structure for direct electric drive , electrical testing, easy to operate, and can be used for wafer-level testing of piezoelectric coefficients, especially to obtain the piezoelectric coefficients of ultra-fine film structures; and the entire testing system uses electrical testing, the testing system has a simple structure and is easy to Operational testing. Especially in the state of device resonance, a larger output voltage can be obtained, which is beneficial to signal detection and reduces power frequency interference. Therefore, the piezoelectric performance test method and the piezoelectric performance test structure of the film-layer piezoelectric material are obtained. The reliability of the piezoelectric coefficient is higher.

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Abstract

一种压电性能测试方法及结构（100，200），压电性能测试方法包括如下步骤：步骤S1、将交流信号输入至待测样品的信号输入端；步骤S2、通过输入的交流信号使待测样品通过逆压电效应产生形变，待测样品将形变转换成电信号输出；步骤S3、获取待测样品的信号输出端的输出电信号，输出电信号为压电薄膜通过正压电效应产生；步骤S4、将输出电信号进行信号放大或者信号处理，以获得压电薄膜的压电系数。

Description

压电性能测试方法及结构 技术领域
本发明涉及测试技术领域，尤其涉及应用于压电材料的压电性能测试的一种压电性能测试方法和压电性能测试结构。
 背景技术
压电材料在各种领域均有广泛的应用，如压电换能器，压电传感器，压电驱动器，滤波器，谐振器等。随着半导体加工工艺的发展无线终端的多元化的需求，MEMS压电麦克风，MEMS压电扬声器，SAW，FBAR逐步走向商用产品中。为了满足压电MEMS器件的微型化、低功耗、高性能的需求，上述器件往往采用压电膜层结构（即压电材料薄膜），而压电系数正是衡量上述器件的性能的重要指标。目前，压电系数一般采用通过商业设备进行测试。目前，压电系数通过商业专业测试设备进行测试。
相关技术的压电系数测试一般采用两种方法：第一种是利用“逆压电效应”，即通过加电信号使材料产生形变，再通过光学检测设备测量材料的形变量的大小，测量压电系数，如激光干涉法，激光多普勒测振仪和压电力显微镜。第二种是利用“正压电效应”，即通过施加力使材料产生电荷，通过测量电荷的大小测量压电系数。
然而，相关技术的测试的准确度均受限于台面面型与工装夹具的精度。其中，检测多利用光学方案获取振幅，测试系统复杂且昂贵，需要考虑反射、折射、损耗等。当膜层结构为超微小的膜层结构时，受限测试光斑尺寸，无法获取超微小膜层结构相关性能。
因此，有必要对上述方法进行改进以解决上述问题。
 技术问题
本发明的目的是克服上述技术问题，提供一种结构简单且易于测试的压电性能测试方法和压电性能测试结构。
 技术解决方案
为了实现上述目的，本发明提供一种压电性能测试方法，其应用于待测样品的压电性能测试，所述待测样品包括压电薄膜，该方法包括如下步骤：
步骤S1、将交流信号输入至所述待测样品的信号输入端；
步骤S2、通过输入的所述交流信号使所述待测样品通过逆压电效应产生形变，所述待测样品将所述形变转换成电信号输出；
步骤S3、获取所述待测样品的信号输出端的输出电信号，所述输出电信号为所述压电薄膜通过正压电效应产生；
步骤S4、将所述输出电信号进行信号放大或者信号处理，以获得所述压电薄膜的压电系数。
优选的，所述待测样品处于真空状态下进行测试。
优选的，所述待测样品还包括后端电路，所述步骤S4中，所述信号放大或者信号处理通过所述后端电路实现。
本发明还提供一种压电性能测试结构，所述压电性能测试结构包括具有空腔的衬底、压电层以及贴设于所述压电层相对两侧的上电极和下电极；所述压电层、所述上电极以及所述下电极形成一体结构，所述一体结构通过所述下电极与所述衬底连接并悬置于所述空腔上方；所述衬底、所述压电层、所述上电极以及所述下电极共同形成谐振器电路；所述上电极包括位于所述压电层相对两端的第一上电极和第二上电极，所述下电极包括位于所述压电层相对两端的第一下电极和第二下电极，所述第一上电极与所述第一下电极对应设置，所述第二上电极和所述第二下电极对应设置；所述第一上电极作为信号输入端，所述第二上电极作为信号输出端，所述第一下电极和所述第二下电极接地，或所述第一上电极和所述第二下电极接地，所述第一下电极作为信号输入端，所述第二下电极作为信号输出端。
优选的，所述第一上电极包括多个，所述第一下电极包括多个；所述第二上电极包括多个，所述第二下电极包括多个。
本发明还提供一种压电性能测试结构，所述压电性能测试结构包括具有空腔的衬底、压电层以及间隔贴设于所述压电层相对两侧的多个电极层，所述电极层为三层且包括依次叠设的上电极层、中间电极层和下电极层，所述压电层、所述上电极层与所述下电极层形成一体结构，所述一体结构的一端通过所述下电极层与所述衬底连接，另一端悬置于所述空腔上方形成悬臂梁；所述衬底、所述压电层以及所述电极层共同形成谐振器电路；所述悬臂梁为5层堆叠结构，所述压电层为两层且包括第一压电层和第二压电层；所述上电极层包括相互间隔的第一段上电极、第二段上电极以及第三段上电极；所述中间电极层包括相互间隔的第一段中间电极、第二段中间电极以及第三段中间电极；所述下电极层包括相互间隔的第一段下电极、第二段下电极以及第三段下电极；所述第一段中间电极为信号输入端，所述第一段上电极、所述第一段下电极以及所述第二段中间电极均电连接至接地；所述第二段上电极、所述第二段下电极以及所述第三段中间电极均电连接并处于悬浮状态，所述第三段上电极电连接至所述第三段下电极并作为所述信号输出端。
优选的，所述第一段上电极、所述第一段中间电极、所述第一段下电极在设置于所述压电层的相对两侧的表面时沿着厚度方向的投影有重叠部分；所述第二段上电极、所述第二段中间电极、所述第二段下电极设置于所述压电层的相对两侧的表面时沿着厚度方向的投影有重叠部分，所述第三段上电极、所述第三段中间电极、所述第三段下电极在分布于所述压电层相对两侧的表面时沿着厚度方向的投影有重叠部分，以施加电信号时可在所述压电层内部产生电场。
 有益效果
与现有技术相比，本发明的压电性能测试方法和压电性能测试结构，该方法包括步骤：步骤S1、将交流信号输入至所述待测样品的信号输入端；步骤S2、通过输入的所述交流信号使所述待测样品通过逆压电效应产生形变，所述待测样品将所述形变转换成电信号输出；步骤S3、获取所述待测样品的信号输出端的输出电信号，所述输出电信号为所述压电薄膜通过正压电效应产生；步骤S4、将所述输出电信号进行信号放大或者信号处理，以获得所述压电薄膜的压电系数。该方法采用正压电效应和逆压电效应耦合，从而实现对所述压电薄膜的压电系数评估和测试，应用于压电薄膜的压电性能测试方法和压电性能测试结构直接电驱动、电检测，操作方便，且可用于压电系数的晶圆级别的测试尤其可以获得超微小的膜层结构的压电系数；并且整个测试系统采用电学测试，测试系统结构简单，同时也易于操作测试。尤其在器件谐振的状态下，可以得到更大的输出电压，有利于信号的检测，且减少工频干扰，因此，压电性能测试方法和所述膜层压电材料的压电性能测试结构获得压电系数的可靠性更高。
 附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图，其中：
图1为本发明的压电性能测试方法的流程框图；
图2为本发明的压电性能测试结构的部分立体结构示意图；
图3为本发明的压电性能测试结构的电路连接关系的结构示意图；
图4为本发明在不同的压电薄膜的压电系数情况下的输出电信号的电压与时间的关系图；
图5为本发明另一种的压电性能测试结构的部分立体结构示意图；
图6为图5的电路连接关系的结构示意图。
 本发明的最佳实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。
请参阅图1所示，本发明提供一种压电性能测试方法。
所述压电性能测试方法应用于待测样品的压电性能测试。其中，所述待测样品包括压电薄膜。
所述压电性能测试方法包括如下步骤：
步骤S1、将交流信号输入至所述待测样品的信号输入端。
步骤S2、通过输入的所述交流信号使所述待测样品通过逆压电效应产生形变，所述待测样品将所述形变转换成电信号输出。
逆压电效应是指当在所述压电薄膜的电介质的极化方向施加电场，这些所述压电薄膜的电介质就在一定方向上产生机械变形或机械压力，当外加电场撤去时，这些变形或应力也随之消失。正压电效应是指通过形变而产生电极化的现象。当对压电材料施以物理压力时，材料体内之电偶极矩会因压缩而变短，此时压电材料为抵抗这变化会在材料相对的表面上产生等量正负电荷，以保持原状。这种通过形变而产生电极化的现象称为“正压电效应”。
步骤S3、获取所述待测样品的信号输出端的输出电信号，所述输出电信号为所述压电薄膜通过正压电效应产生。
步骤S4、将所述输出电信号进行信号放大或者信号处理，以获得所述压电薄膜的压电系数d 31。
本实施方式中，所述待测样品还包括后端电路。所述步骤S4中，所述信号放大或者信号处理通过所述后端电路实现。需要指出的是，所述后端电路为本领域常用的电路，设计者根据实际产品需求进行选择具体的电路结构和电路性能指标，在此不作详细描述。
为了更好的实现对压电系数d 31测量，减少外界环境对测量的影响，本实施方式中，所述待测样品处于真空状态下进行测试。
本发明提供一种压电性能测试结构100。所述压电性能测试结构100用以实现正压电效应和逆压电效应耦合；而且通过合理优化电极，可在不影响机械性能前提下，获得所述压电材料的电学参数。
（实施例一）
本实施方式为实施例一，请同时参阅图2-3所示，实施例一提供的是一种所述压电性能测试结构100。所述压电性能测试结构100应用所述压电性能测试方法。
具体的，所述压电性能测试结构100包括具有空腔40的衬底4、压电层1以及贴设于所述压电层1相对两侧的上电极2和下电极3。其中，所述压电层1为压电薄膜。
所述压电层1、所述上电极2以及所述下电极3形成一体结构，所述一体结构通过所述下电极3与所述衬底4连接并悬置于所述空腔40上方。即所述一体结构沿所述压电性能测试结构100的厚度方向位于所述空腔40的一侧。
本实施方式中，所述上电极2和所述下电极3分别位于所述压电层1长轴的相对两端。
所述衬底4、所述压电层1、所述上电极2以及所述下电极3共同形成谐振器电路，其中一个所述上电极2或所述下电极3作为信号输入端，另一个所述上电极2或所述下电极3作为信号输出端。
具体的，所述上电极2包括贴设与所述压电层1的同一侧的第一上电极21和第二上电极22，所述第一上电极21作为所述信号输入端，所述第二上电极22作为所述信号输出端。
所述下电极3包括贴设与所述压电层1的另一侧的第一下电极31和第二下电极32，所述第一下电极31和所述第二下电极32均电连接至接地。
本实施方式中，所述压电层1呈矩形。所述第一上电极21和所述第一下电极31正对设置；所述第二上电极22和所述第二下电极32正对设置；所述第一上电极21和所述第二上电极22分别设置于所述压电层1长轴的相对两端。该结构有利于交流信号在所述压电性能测试结构100中进行正压电效应和逆压电效应的转化，从而使得所述压电性能测试结构100的压电系数d 31评估和测试更为容易和准确性高。
本实施方式中，所述第一上电极21包括多个；所述第一下电极31包括多个；所述第一上电极21和所述第一下电极31一一对应。所述第二上电极22包括多个。该结构使得交流信号作用于所述第一上电极21和所述第一下电极31更为均衡，从而使得压电层1的逆压电效应更易于产生。
本实施方式中，所述第二下电极32包括多个；所述第二上电极22和所述第二下电极32一一对应。该结构使得所述压电层1形变产生所述输出电信号更易于获得，从而使得所述压电层1的压电系数d 31评估和测试更为容易和准确性高。
请参阅图4所示，图4为本发明在不同的所述压电层1的压电系数d 31情况下的输出电信号的电压与时间的关系图。W1、W2、W3及W4为所述压电层1（即压电薄膜）的压电系数d 31的电压-时间曲线。其中，W1、W2、W3及W4的关系如下：W1为2.0倍的d 31，W2为1.5倍的d 31，W3为1.0倍的d 31，W4为0.5倍的d 31，由W1、W2、W3及W4的曲线图可以得出，本发明的所述压电性能测试方法和所述压电性能测试结构100可用于压电系数d 31的晶圆级别的测试尤其可以获得超微小的膜层结构的压电系数d 31 。
综合上述，本发明的所述压电性能测试方法和所述压电性能测试结构100采用正压电效应和逆压电效应耦合，从而实现对所述压电层1的压电系数d 31评估和测试。更优的，所述压电性能测试方法和所述压电性能测试结构100直接电驱动、电检测，操作方便，且可用于压电系数d 31的晶圆级别的测试尤其可以获得超微小的膜层结构的压电系数d 31；并且整个测试系统采用电学测试，测试系统结构简单，同时也易于操作测试。尤其在器件谐振的状态下，可以得到更大的输出电压，有利于信号的检测，且减少工频干扰，所述压电性能测试方法和所述压电性能测试结构100获得压电系数d 31的可靠性更高。
（实施例二）
请同时参阅图5-6所示，本发明还提供另一种压电性能测试结构200，所述压电性能测试结构200与所述压电性能测试结构100均应用所述压电性能测试方法。
所述压电性能测试结构200与所述压电性能测试结构100不同的是：所述压电性能测试结构200中的电极在压电薄膜轴向的同一端。
具体的，所述压电性能测试结构200包括具有空腔40a的衬底4a、压电层b以及间隔贴设于所述压电层b相对两侧的多个电极层c。其中，所述电极层c两层且包括上电极层1c、中间电极层2c和下电极层3c。
所述压电层b、所述上电极层1c与所述下电极层3c形成一体结构，所述一体结构的的一端通过所述下电极层3c与所述衬底4a连接，另一端悬置于所述空腔40a上方形成悬臂梁。
所述衬底4a、所述压电层b以及所述电极层c共同形成谐振器电路，其中一个或多个所述电极层c作为信号输入端，其中一个或者多个所述电极层c作为信号输出端，其中一个或者多个所述电极层c悬浮。
本实施方式中，所述悬臂梁为5层堆叠结构。所述压电层b两层且包括第一压电层b1和第二压电层b2。
具体的，所述上电极层1c包括相互间隔的第一段上电极1c11、第二段上电极1c22以及第三段上电极1c33。所述中间电极层2c包括相互间隔的第一段中间电极2c11、第二段中间电极2c22以及第三段中间电极2c33。所述下电极层3c包括相互间隔的第一段下电极3c11、第二段下电极3c22以及第三段下电极3c33。
其中，各个部件的电路连接关系为：
所述第一段中间电极2c11为信号输入端，所述第一段上电极1c11、所述第一段下电极3c11以及所述第二段中间电极2c22均电连接至接地。所述第二段上电极1c22、所述第二段下电极3c22以及所述第三段中间电极2c33均电连接并处于悬浮状态。所述第三段上电极1c33电连接至所述第三段下电极3c33并作为所述信号输出端。
本实施方式中，所述第一段上电极1c11、所述第一段中间电极2c11、所述第一段下电极3c11在设置于所述压电层b的相对两侧的表面时沿着厚度方向的投影有重叠部分。所述第二段上电极1c22、所述第二段中间电极2c22、所述第二段下电极3c22设置于所述压电层b的相对两侧的表面时沿着厚度方向的投影有重叠部分。所述第三段上电极1c33、所述第三段中间电极2c33、所述第三段下电极3c33在分布于所述压电层b相对两侧的表面时沿着厚度方向的投影有重叠部分，以施加电信号时可在所述压电层b内部产生电场。
通过所述压电性能测试结构200的结构和电路连接关系，采用多级的谐振器的器件直接电驱动、电检测，操作方便，且可用于压电系数d 31的晶圆级别的测试尤其可以获得超微小的膜层结构的压电系数d 31。并且整个测试系统采用电学测试，测试系统结构简单，同时也易于操作测试。尤其在器件谐振的状态下，可以得到更大的输出电压，有利于信号的检测，且减少工频干扰，所述压电性能测试结构200获得压电系数d 31的可靠性更高。
与现有技术相比，本发明的压电性能测试方法和压电性能测试结构，该方法包括步骤：步骤S1、将交流信号输入至所述待测样品的信号输入端；步骤S2、通过输入的所述交流信号使所述待测样品通过逆压电效应产生形变，所述待测样品将所述形变转换成电信号输出；步骤S3、获取所述待测样品的信号输出端的输出电信号，所述输出电信号为所述压电薄膜通过正压电效应产生；步骤S4、将所述输出电信号进行信号放大或者信号处理，以获得所述压电薄膜的压电系数。该方法采用正压电效应和逆压电效应耦合，从而实现对所述压电薄膜的压电系数评估和测试，应用于压电薄膜的压电性能测试方法和压电性能测试结构直接电驱动、电检测，操作方便，且可用于压电系数的晶圆级别的测试尤其可以获得超微小的膜层结构的压电系数；并且整个测试系统采用电学测试，测试系统结构简单，同时也易于操作测试。尤其在器件谐振的状态下，可以得到更大的输出电压，有利于信号的检测，且减少工频干扰，因此，压电性能测试方法和所述膜层压电材料的压电性能测试结构获得压电系数的可靠性更高。
以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其它相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (7)

  1. 一种压电性能测试方法，其应用于待测样品的压电性能测试，所述待测样品包括压电薄膜，其特征在于，该方法包括如下步骤：
    步骤S1、将交流信号输入至所述待测样品的信号输入端；
    步骤S2、通过输入的所述交流信号使所述待测样品通过逆压电效应产生形变，所述待测样品将所述形变转换成电信号输出；
    步骤S3、获取所述待测样品的信号输出端的输出电信号，所述输出电信号为所述压电薄膜通过正压电效应产生；
    步骤S4、将所述输出电信号进行信号放大或者信号处理，以获得所述压电薄膜的压电系数。
  2. 根据权利要求1所述的压电性能测试方法，其特征在于，所述待测样品处于真空状态下进行测试。
  3. 根据权利要求1所述的压电性能测试方法，其特征在于，所述待测样品还包括后端电路，所述步骤S4中，所述信号放大或者信号处理通过所述后端电路实现。
  4. 一种压电性能测试结构，其特征在于，所述压电性能测试结构包括具有空腔的衬底、压电层以及贴设于所述压电层相对两侧的上电极和下电极；所述压电层、所述上电极以及所述下电极形成一体结构，所述一体结构通过所述下电极与所述衬底连接并悬置于所述空腔上方；所述衬底、所述压电层、所述上电极以及所述下电极共同形成谐振器电路；所述上电极包括位于所述压电层相对两端的第一上电极和第二上电极，所述下电极包括位于所述压电层相对两端的第一下电极和第二下电极，所述第一上电极与所述第一下电极对应设置，所述第二上电极和所述第二下电极对应设置；所述第一上电极作为信号输入端，所述第二上电极作为信号输出端，所述第一下电极和所述第二下电极接地，或所述第一上电极和所述第二下电极接地，所述第一下电极作为信号输入端，所述第二下电极作为信号输出端。
  5. 根据权利要求4所述的压电性能测试结构，其特征在于，所述第一上电极包括多个，所述第一下电极包括多个；所述第二上电极包括多个，所述第二下电极包括多个。
  6. 一种压电性能测试结构，其特征在于，所述压电性能测试结构包括具有空腔的衬底、压电层以及间隔贴设于所述压电层相对两侧的多个电极层，所述电极层为三层且包括依次叠设的上电极层、中间电极层和下电极层，所述压电层、所述上电极层与所述下电极层形成一体结构，所述一体结构的一端通过所述下电极层与所述衬底连接，另一端悬置于所述空腔上方形成悬臂梁；所述衬底、所述压电层以及所述电极层共同形成谐振器电路；所述悬臂梁为5层堆叠结构，所述压电层为两层且包括第一压电层和第二压电层；所述上电极层包括相互间隔的第一段上电极、第二段上电极以及第三段上电极；所述中间电极层包括相互间隔的第一段中间电极、第二段中间电极以及第三段中间电极；所述下电极层包括相互间隔的第一段下电极、第二段下电极以及第三段下电极；所述第一段中间电极为信号输入端，所述第一段上电极、所述第一段下电极以及所述第二段中间电极均电连接至接地；所述第二段上电极、所述第二段下电极以及所述第三段中间电极均电连接并处于悬浮状态，所述第三段上电极电连接至所述第三段下电极并作为所述信号输出端。
  7. 根据权利要求6所述的压电性能测试结构，其特征在于，所述第一段上电极、所述第一段中间电极、所述第一段下电极在设置于所述压电层的相对两侧的表面时沿着厚度方向的投影有重叠部分；所述第二段上电极、所述第二段中间电极、所述第二段下电极设置于所述压电层的相对两侧的表面时沿着厚度方向的投影有重叠部分，所述第三段上电极、所述第三段中间电极、所述第三段下电极在分布于所述压电层相对两侧的表面时沿着厚度方向的投影有重叠部分，以施加电信号时可在所述压电层内部产生电场。
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