WO2022089083A1

WO2022089083A1 - Display method for led television wall, and television and computer-readable storage medium

Info

Publication number: WO2022089083A1
Application number: PCT/CN2021/118808
Authority: WO
Inventors: 王洁; 夏大学
Original assignee: 深圳Tcl数字技术有限公司
Priority date: 2020-10-29
Filing date: 2021-09-16
Publication date: 2022-05-05
Also published as: CN112367557A; CN112367557B

Abstract

A display method for an LED television wall, and a television and a computer-readable storage medium. The display method for an LED television wall comprises: receiving data of a first target image, and splicing and encapsulating pixel points of the first target image, so as to form a second target image; and sending image data of the second target image to a receiving end, for display by the receiving end on the basis of the image data. The technical problems of an LED large screen only having a single function as a display and the transmission rate being low are solved.

Description

Display method, television and computer-readable storage medium of LED video wall

This application claims the priority of the Chinese patent application filed on October 29, 2020 with the application number 202011184271.9 and the invention titled "display method for LED video wall, television and computer-readable storage medium", the entire contents of which are Incorporated herein by reference.

technical field

The present application relates to the technical field of smart TVs, and in particular, to a display method for an LED video wall, a TV, and a computer-readable storage medium.

Background technique

Most traditional TVs are composed of LCD panels. Since the display mode of LCD panels is limited by various factors such as size, brightness, and installation, it cannot better meet users' needs for large-screen brightness and color. In addition, the traditional LED control system is mainly used in shopping malls, concerts and other scenes. It is used as a single display function, and is limited by the limitation of the transmission bandwidth of the network cable. The on-site wiring is complicated, and the program update depends on the on-site update of the relevant technicians, which costs a lot of money. Human and material resources. It can be seen that the existing large LED screen only has a single function as a display, and the transmission rate is slow.

technical problem

It can be seen that the existing large LED screen only has a single function as a display, and the transmission rate is slow.

technical solutions

The embodiments of the present application aim to solve the problem that the existing large LED screen only has a single function as a display and has a slow transmission rate by providing a display method for an LED video wall, a TV, and a computer-readable storage medium.

In order to achieve the above object, one aspect of the present application provides a display method for an LED video wall, and the display method for the LED video wall includes the following steps:

receiving data of the first target image, and splicing and encapsulating the pixels of the first target image to form a second target image;

The image data of the second target image is sent to the receiving end, and the receiving end displays the image data based on the image data.

In addition, in order to achieve the above object, another aspect of the present application also provides a TV, the TV includes a memory, a processor, and a display program for an LED video wall stored on the memory and running on the processor, the processor executes The display program of the LED video wall realizes:

The image data of the second target image is sent to the receiving end, and the receiving end displays the image data based on the image data. In addition, in order to achieve the above object, another aspect of the present application further provides a computer-readable storage medium, where a display program of an LED video wall is stored on the computer-readable storage medium, and the display program of the LED video wall is processed by a processor Implemented when executing:

The image data of the second target image is sent to the receiving end, and the receiving end displays the image data based on the image data. beneficial effect

In this embodiment, by receiving the data of the first target image, the pixels of the first target image are spliced and encapsulated to form the second target image, and the image data is sent to the receiving end through the HDMI transmission line, and the receiving end corrects the image data operation, and display the corrected image obtained by the correction operation. The problem that the existing LED large screen only has a single function as a display and the transmission rate is slow is solved, and the effect of improving the transmission rate and enriching functions is achieved.

Description of drawings

FIG. 1 is a schematic diagram of a TV structure of a hardware operating environment involved in a solution according to an embodiment of the present application;

FIG. 2 is a schematic flowchart of a first embodiment of a display method for an LED video wall of the present application;

3 is a schematic flowchart of a second embodiment of a display method for an LED video wall of the present application;

4 is a schematic flowchart of a third embodiment of a display method for an LED video wall of the present application;

5 is a schematic flowchart of a fourth embodiment of a display method for an LED video wall of the present application;

6 is a schematic flowchart of a fifth embodiment of a display method for an LED video wall of the present application;

7 is a schematic flow chart of splicing and packaging the pixels of the first target image to form the second target image in the display method of the LED video wall of the present application;

FIG. 8 is a schematic flowchart after the step of forming the second target image based on all the target pixels in the display method of the LED video wall of the present application;

9 is a schematic flow chart of sending the image data of the second target image to the receiving end in the display method of the LED video wall of the present application;

FIG. 10 is a schematic block diagram of the display device of the LED video wall of the present application.

The realization, functional characteristics and advantages of the purpose of the present application will be further described with reference to the accompanying drawings in conjunction with the embodiments.

Embodiments of the present invention

It should be understood that the specific embodiments described herein are only used to explain the present application, but not to limit the present application.

The main solutions of the embodiments of the present application are: receiving the data of the first target image, splicing and encapsulating the pixels of the first target image to form the second target image; sending the image data of the second target image to the receiving end , which is displayed by the receiving end based on the image data.

Because the traditional LED control large screen is mainly used in shopping malls, concerts and other scenes, it is used as a single display function, and is limited by the transmission bandwidth of the network cable, the on-site wiring is intricate, and the program update depends on the relevant technicians. Human and material resources. In the present application, by receiving the data of the first target image, the pixels of the first target image are spliced and encapsulated to form the second target image, and the image data is sent to the receiving end through the HDMI transmission line, and the receiving end corrects the image data. , and display the correction operation to get the corrected image. The problem that the existing LED large screen only has a single function as a display and the transmission rate is slow is solved, and the effect of improving the transmission rate and enriching functions is achieved.

As shown in FIG. 1 , FIG. 1 is a schematic diagram of a TV structure of a hardware operating environment involved in the solution of an embodiment of the present application.

As shown in FIG. 1 , the television may include: a processor 1001 , such as a CPU, a network interface 1004 , a user interface 1003 , a memory 1005 , and a communication bus 1002 . Among them, the communication bus 1002 is used to realize the connection and communication between these components. The user interface 1003 may include a display screen (Display), an input unit such as a keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface and a wireless interface. Optionally, the network interface 1004 may include a standard wired interface and a wireless interface (eg, a WI-FI interface). The memory 1005 may be high-speed RAM memory, or may be non-volatile memory, such as disk memory. Optionally, the memory 1005 may also be a storage device independent of the aforementioned processor 1001 .

Optionally, the TV may further include a camera, an RF (Radio Frequency, radio frequency) circuit, a sensor, a remote control, an audio circuit, a WiFi module, a detector, and the like. Of course, the TV may also be configured with other sensors such as a gyroscope, a barometer, a hygrometer, and a temperature sensor, which will not be described here.

Those skilled in the art can understand that the TV structure shown in FIG. 1 does not constitute a limitation on the TV device, and may include more or less components than the one shown, or combine some components, or arrange different components.

As shown in FIG. 1 , the memory 1005 as a computer-readable storage medium may include an operating system, a network communication module, a user interface module, and a display program of the LED video wall.

In the TV shown in FIG. 1 , the network interface 1004 is mainly used to connect to the background server and perform data communication with the background server; the user interface 1003 is mainly used to connect the client (client) and perform data communication with the client; and the processor 1001 can be used to call the display program of the LED video wall stored in the memory 1005, and perform the following operations:

Referring to FIG. 2, FIG. 2 is a schematic flowchart of the first embodiment of the display method of the LED video wall of the present application. The display method of the LED video wall includes the following steps:

Step S10, receiving data of the first target image, splicing and encapsulating the pixels of the first target image to form a second target image;

The traditional large LED screen can only be used as a display, resulting in a single function, while the LED video wall of the present application can be used as a TV and has corresponding functions of a TV. Wherein, the LED video wall is composed of a main control board, several receiving boards, and several LED light boards; the main control board and the receiving board are connected by a high-speed cable; the connection between the receiving board and the receiving board is connected by a high-speed connecting line; the receiving board and the light board are connected by a flexible cable. Further, the main control board is composed of SOC, FPGA, DDR3, flash and other hardware architectures; it supports maximum 4K (3840*2160@60HZ) image and video source input; it supports 16 high-speed serial interfaces, and the transmission speed of each channel can reach 3.125G/s , 4 pieces of 4Gbit DDR3, the maximum clock rate of 800M and 128M storage flash, etc. The receiving board is composed of FPGA, DDR3, flash and other hardware architectures; it supports up to 480*540 pixel point loading, gamma conversion; supports chromaticity correction, LED driver chip timing, 4 high-speed serial interfaces, and the transmission speed of each channel can be adjusted. Up to 3.125G/s, 2 pieces of 4Gbit DDR3, maximum clock rate 400M and 128M storage flash, etc. Among them, the receiving board uses the SOC chip and the FPGA chip as the main control combination, which simplifies the connection line and realizes two-level image processing, which makes the picture quality more delicate and the display effect better.

The SOC chip can obtain TV programs, on-demand videos, and control command release from the cloud through wifi, and perform image quality processing operations such as image scaling, gamma conversion, and HDR enhancement on the images corresponding to the obtained TV programs or on-demand videos. For example: The image is zoomed (zoomed in, zoomed in), rotated, translated, etc.; further, in order to save the image brightness information more effectively, a Gamma transformation operation is also required to make the image change from a linear response of exposure intensity to closer to the human eye. The perceived response is to correct images that are bleached (camera exposure) or too dark (underexposed); and HDR image enhancement processing is to achieve the restoration of details in the shadows and highlights of the image. A first target image is obtained by performing a series of image quality processing operations, and the first target image is a 4K@60hz image, where 4K in the 4K@60hz image refers to the resolution of the image; 60hz refers to the refresh frequency of 60hz, the speed at which the image is updated on the screen, that is, the number of times the image on the screen appears per second. The higher the refresh rate, the less flickering of the image on the screen and the higher the stability.

Since the 4K@60hz image still needs to perform image cutting, storage and other operations in the FPGA chip, the SOC chip needs to transmit the 4K@60hz image to the FPGA chip according to the agreed transmission protocol, such as hdmi, vbo and other video transmission protocols; specifically , The image transmitted by the SOC chip is transmitted to the FPGA chip line by line. After the FPGA chip receives one image, it will receive the second image to avoid the phenomenon that the memory is too large due to receiving all the images at the same time. Among them, the FPGA chip is mainly responsible for image reception, storage, cutting, high-speed transmission and other operations, with fast processing speed and good real-time performance.

The FPGA chip decodes the received 4K@60hz image, obtains the pixel points in the 4K@60hz image, and combines and splices the pixel points to form a second target image. Further, referring to FIG. 7 , the step of splicing and encapsulating the pixels of the first target image to form the second target image includes:

Step S11, splicing a set number of pixels of the first target image to form a target pixel;

Step S12, forming the second target image based on all the target pixels.

The FPGA chip splices a set number of pixels of the first target image to form one target pixel, and forms a second target image based on all the target pixels. Specifically, in the FPGA chip, every 4 pixel points in the 4K@60hz image are combined into a new pixel point, and the image composed of all the new pixel points is the second target image. Further schedule the DDR3 bus to store the second target image, where DDR3 is a computer memory specification with a high operating frequency (1600 Mbps), which uses the characteristics of double-speed data transmission. Meanwhile, in order to ensure sufficient time to process the image, the storage method of the second target image is a ping-pong operation.

Further, referring to FIG. 8 , after the step of forming the second target image based on all the target pixels, it includes:

Step S13, calculating the storage location corresponding to each of the target pixels in the second target image;

Step S14, splitting the second target image into a preset number of images according to the storage location.

The image is composed of pixels, and the information stored in each pixel is its corresponding RGB value (red, green, blue, the three primary colors that make up the image, ranging from 0 to 225). Therefore, what is stored in the DDR3 bus is the target pixel point of the second target image, and the target pixel point is stored in the DDR3 according to the row and column arrangement. Further, the FPGA chip calculates the storage location of the target pixel through DDR addressing. Specifically, when addressing, it is necessary to determine which bank (bank) is, and then send the row and column address addressing commands and specific operation commands (read or write) , and perform row and column addressing in the selected bank based on the row and column address addressing commands, thereby obtaining the storage location of the target pixel point.

Divide the second target image into 4 parts based on the storage location of the target pixels, each of which is 1 FHD (Full High Definition, full HD) pixels; read these 4 images from DDR3 in turn, and get 4 FHD pixels. Optionally, if the splitting of the second target image is not performed, the DDR3 bus is scheduled directly based on the storage location of the target pixel, and one copy of the second target image is read.

Step S20: Send the image data of the second target image to the receiving end, and the receiving end displays the image data based on the image data.

The FPGA chip sends the encapsulated image data to the receiving end through the HDMI transmission line. The receiving end is the receiving board in the LED video wall, which is used to receive the image data transmitted by the main control board. After the receiving board receives the image data, the image The data is analyzed and forwarded to each receiving card, and each receiving card displays the image data.

Further, referring to FIG. 9 , the step of sending the image data of the second target image to the receiving end includes:

Step S201, reading the images of the preset number of copies, performing data encapsulation on the images, and generating the image data;

Step S202, determining the number of transmission lines according to the number of copies of the image, wherein the number of the transmission lines is consistent with the number of copies of the image;

Step S203, sending the image data to the receiving end based on the determined number of the transmission lines.

After the FPGA chip reads different images from DDR3, it encapsulates the data to form the graphic data of the second target image; the number of transmission lines is determined according to the number of copies of the read images. 4 different images, the image data of the second target image is sent to the receiving board through the GTP high-speed transmission module and 4 HDMI cables, wherein the speed of each GTP channel can reach 3.125G, including but not limited to this speed level; HDMI cable is a fully digital image and sound transmission line, which can be used to transmit audio and video signals without any compression. Further, if the second target image is not split, and one image is read from DDR3, the image data of the second target image is sent to the receiving board through the GTP high-speed transmission module and one HDMI cable; wherein, each GTP Channel speeds up to 6.250G, including but not limited to this speed class. Because the traditional control system needs at least 16 network cables to transmit 4K images, the wiring is complicated, and it is limited by the transmission bandwidth of network cables; however, this application only needs to use 4 or 1 HDMI cable to transmit 4K images, which reduces the construction cost. wiring, while improving the fast transfer of images.

After receiving the data transmitted from the GTP high-speed interface of the main control end, the receiving end transmits the data to each receiving card; specifically, there are multiple receiving cards in the LED video wall for receiving image data from the GTP high-speed interface. , wherein the receiving cards are connected in series; after the previous receiving card receives the image data, the image data is transmitted to the next receiving card, and so on, until the image data is transmitted to all receiving cards. Further, the front receiving card analyzes the received image data, intercepts the loading area of the card, and schedules the DDR3 bus for storage. The storage space is ping-pong operation according to A and B frames. When an image needs to be displayed, the DDR3 bus is scheduled to read the image, and the image is output to the driver IC on the light board according to a certain timing sequence of the driver IC to complete the LED large-screen display.

Further, when the receiving end receives the image data, the color processing module also needs to process the image corresponding to the image data for brightness and chromaticity. Specifically, the color processing module schedules the DDR3 bus to read the original image storage area. Image, that is, the image switched between A and B frames; after reading the original image, obtain the brightness and chromaticity of each pixel in the image, and then perform gamma point-to-point brightness and chromaticity correction; further, the image obtained by gamma correction is based on a certain Format, and store the corrected image to the designated location by scheduling the DDR3 bus, wherein the storage space is ping-pong operation according to C and D frames. When the image needs to be displayed, the color-corrected image is read by scheduling the DDR3 bus, that is, the C, D frame switching image, and the color-corrected image is output to the driver IC on the lamp board according to a certain timing of the driver IC to complete the LED large screen. show.

In this embodiment, a 4K@60hz image is obtained by acquiring a TV program from the cloud, and performing image processing such as scaling, gamma conversion, and HDR on the TV program; acquiring the pixels in the 4K@60hz image, and splicing every 4 pixels into a new image All new pixel points are combined to form the target image, and the image data of the second target image is further obtained, and the image data is sent to the receiving end through the HDMI transmission line, and the receiving end displays based on the image data. By transferring the TV from the traditional LCD panel to the large LED screen, the problem of insufficient brightness, craftsmanship and size of the LCD is made up, and the traditional LED system can only be used as a single function of the display. Further, the LED TV wall adopts FPGA pure The hardware architecture design enables high integration, high transmission efficiency, large loading area, remarkable color processing effect, support for arbitrary scaling functions, and convenient and fast cluster management. On the other hand, by using a high-speed serial bus for transmission, only 4 or 1 HDMI cable is required for 4K image transmission, which increases the transmission rate.

Further, referring to FIG. 3 , a second embodiment of the display method of the LED video wall of the present application is proposed.

The difference between the second embodiment of the LED video wall display method and the first embodiment of the LED video wall display method is that the step of sending the image data to the receiving end further includes:

Step S21, acquiring the image data of each row in the second target image, and grouping the image data of each row to form a data packet;

Step S22, sending the image data to the receiving end based on the data packet.

When the FPGA chip transmits the image data of the second target image to the receiving end board, it needs to perform a packetizing operation on the data first, and then send the data packets obtained by the packetizing operation to the receiving end; One line of image data, package the image data of each line into a data packet, and set data identification, name, keyword information, ID value and other information for each data packet. The data packet is packaged in the form of: packet header + data + checksum, for example: 55D5 (packet header) + one line of image data + check code (cumulative sum of packet header and image data). The data packet is transmitted to the receiving board through 4 HDMI cables, so that the transmission speed can reach 3.125G/channel; in order to achieve faster data transmission, the data packet can also be transmitted to the receiving board through 1 HDMI cable. , so that the transmission speed can reach 6.250G/channel.

In this embodiment, the image data of each line in the second target image is obtained, and the image data of each line is packaged into a data packet, and then the data packet is transmitted to the receiving board through one or four HDMI cables, so that the construction wiring is reduced. , which increases the data transfer rate.

Further, referring to FIG. 4 , a third embodiment of the display method of the LED video wall of the present application is proposed.

The difference between the third embodiment of the LED video wall display method and the first and second embodiments of the LED video wall display method is that after the step of sending the image data of the second target image to the receiving end ,include:

Step S23, obtaining the correction coefficient corresponding to each pixel in the currently displayed image;

Step S24, sending the correction coefficient to the receiving end, and the receiving end completes the correction operation of the currently displayed image according to the correction coefficient.

In order to ensure the correctness of the displayed image, it is usually necessary to perform image correction. The image correction refers to the restoration processing of the distorted image. There are many reasons for the image distortion. For example, the image may be caused by the imaging system. Image distortion caused by aberration, distortion, limited bandwidth, etc.; image geometric distortion caused by imaging device shooting attitude and scanning nonlinearity; image distortion caused by motion blur, radiation distortion, introduced noise, etc.

Send a shooting command to the calibration camera through the control software of the debugging system. After receiving the shooting command, the calibration camera takes a photo of the currently displayed image and returns the data obtained by taking the photo to the PC. When the PC side receives the data for correcting the rotation of the camera, it corrects and analyzes the data through the correction algorithm to obtain the correction coefficient of each pixel point. The PC terminal obtains the R, G, B mean parameters of the photographed image, further measures the standard color blocks in the image, extracts the R, G, and B values of each pixel in the selected area of each color block, and then The color correction coefficient of each pixel is calculated through a color correction coefficient calculation formula, such as a matrix calculation formula. When the PC side obtains the correction coefficient of each pixel point, it sends a correction command to the main control board; after receiving the correction command of the currently displayed image, the SOC chip of the main control board obtains each pixel point in the currently displayed image according to the correction command The correction coefficient is sent to the FPGA chip, and the FPGA chip further sends the correction coefficient to the receiving end, so that the receiving end completes the correction operation of the currently displayed image according to the correction coefficient of each pixel point.

In this embodiment, the correction operation of the currently displayed image is completed by receiving the correction instruction sent by the PC terminal and the correction coefficient of each pixel point, which solves the problem of image distortion and ensures the accuracy of image display; in addition, the existing correction cameras generally Four times of photographing are required, but only one photographing is required in the present application, and repeated photographing is not required, thereby improving the work efficiency of the calibration camera.

Further, referring to FIG. 5 , a fourth embodiment of the display method of the LED video wall of the present application is proposed.

The difference between the fourth embodiment of the LED video wall display method and the first, second and third embodiments of the LED video wall display method is that the image data of the second target image is sent After the steps to the receiving end, it also includes:

Step S25, receiving an upgrade package, and performing an upgrade operation according to the upgrade package;

Step S26, when the upgrade operation is completed, a startup instruction is generated.

The upgrade of the existing large LED screen requires staff to operate on-site, resulting in cumbersome and complicated upgrade operations. The LED video wall of the present application adopts a control cluster upgrade method, which does not require manual intervention and PC-side intervention. The remote control center sends the updated upgrade package to the cloud, and further, the SOC chip of the main control board reads the upgrade package through the wifi connection, and sends the upgrade package to the FPGA chip through the internal SPI communication protocol. The FPGA chip is upgraded according to the upgrade package, such as upgrading the version, repairing bugs, downloading system patches, etc. After the upgrade is completed, a startup instruction is sent to the system, and the system automatically updates and starts according to the startup instruction, or the program automatically loads a new program when it is turned on next time. Secondly, the system will automatically back up the program. If the upgrade fails, the program can be automatically restored to the backup program to ensure that it does not crash.

In this embodiment, the upgrade program package is obtained from the cloud, and the system upgrade operation is automatically completed according to the upgrade program package, without manual intervention and PC-side intervention, thereby ensuring the convenience of upgrade.

Further, referring to FIG. 6 , a fifth embodiment of the display method of the LED video wall of the present application is proposed.

The difference between the fourth embodiment of the LED video wall display method and the first, second, third and fourth embodiments of the LED video wall display method is that the second target After the step of sending the image data of the image to the receiving end, it further includes:

Step S27, acquiring debugging parameters;

Step S28: Send the debugging parameters to the receiving end, and the receiving end performs debugging according to the debugging parameters.

The debugging system of the LED video wall consists of a PC terminal, a calibration camera and control software. The PC terminal is connected to the main control board through the network/USB, and the command channel data can be transmitted to the main control board through SPI. The command channel data includes Debugging instructions, calibration data, display parameters and other information; the control of the calibration camera is simple to implement, and the box calibration only needs to take a photo once, no need to repeat the photo; the control software does not need to be compatible with other unnecessary settings, and can quickly call and control the calibration camera.

After receiving the command data transmitted by the PC through the SPI, the main control board parses the command data to obtain the corresponding data command; if the data command is a debugging command, obtains the debugging file corresponding to the debugging command, and parses the debugging file to obtain the debugging parameters. The debugging parameters include clock parameters, latch parameters, module size parameters, color parameters, scan parameters, and the like. Further, the FPGA chip of the main control board transmits the acquired debugging parameters to the designated one or more receiving cards through the SPI/high-speed serial bus. If the previous receiving card receives the debugging parameters, it will first determine whether it is the card data; If yes, then debug the LED video wall according to the debug parameters. Specifically, adjust the clock parameters according to the debugging rules to ensure that the display screen of the LED video wall is not spent, and adjust the latch parameters to ensure that the position of the display screen of the LED video wall is correct. In addition, the complete and other parameters have corresponding functions. All the debugging parameters can ensure the normal lighting of the LED video wall when all the debugging parameters meet the debugging rules. If the debugging parameter is non-this card data, it will be transmitted to the next receiving card through SPI, and the next receiving card will automatically judge whether it is the data of this card, and so on, until the adjustment parameters are transmitted to all designated receiving cards.

When receiving the debugging command transmitted by the PC, the main control board of this embodiment obtains the debugging parameters corresponding to the debugging command, and transmits the debugging parameters to each designated receiving card through SPI through the FPGA chip, so that the receiving card can complete the debugging according to the debugging parameters. The debugging operation improves the debugging efficiency; in addition, the internal communication uses the SPI protocol, which ensures the safety, efficiency and stability of the transmitted data.

In addition, with reference to FIG. 10 , the present application also provides a display device for an LED video wall, the device comprising:

The receiving module 10 is used for receiving the data of the first target image, and splicing and encapsulating the pixels of the first target image to form the second target image;

The sending module 20 is configured to send the image data of the second target image to the receiving end, and the receiving end displays the image data based on the image data.

Further, the receiving module 10 includes: a splicing unit and a forming unit;

The splicing unit is used for splicing a set number of pixels of the first target image to form a target pixel;

The forming unit is configured to form the second target image based on all the target pixel points.

Further, the forming unit includes: a calculation subunit and a split subunit;

The calculation subunit is used to calculate the storage location corresponding to each of the target pixels in the second target image;

The splitting subunit is configured to split the second target image into a preset number of images according to the storage location.

Further, the sending module 20 includes: a reading unit, a determining unit and a sending unit;

the reading unit, configured to read the images of the preset number of copies, perform data encapsulation on the images, and generate the image data;

The determining unit is configured to determine the number of transmission lines according to the number of copies of the image, wherein the number of the transmission lines is consistent with the number of copies of the image;

The sending unit is configured to send the image data to the receiving end based on the determined number of the transmission lines.

Further, the sending module 20 also includes an obtaining unit;

The acquiring unit is configured to acquire the image data of each row in the second target image, and package the image data of each row to form a data packet;

The sending unit is further configured to send the image data to the receiving end based on the data packet.

Further, the obtaining unit is also used to obtain the correction coefficient corresponding to each pixel in the currently displayed image;

The sending unit is further configured to send the correction coefficient to the receiving end, and the receiving end completes the correction operation of the currently displayed image according to the correction coefficient.

Further, the sending module 20 also includes an upgrading unit and a generating unit;

the upgrade unit, configured to receive an upgrade package, and perform an upgrade operation according to the upgrade package;

The generating unit is configured to generate a startup instruction when the upgrade operation is completed.

Further, the obtaining unit is also used to obtain debugging parameters;

The sending unit is further configured to send the debugging parameters to the receiving end, and the receiving end performs debugging according to the debugging parameters.

The realization of the functions of each module of the display device of the above-mentioned LED video wall is similar to the process in the above-mentioned method embodiment, which will not be repeated here.

In addition, the present application also provides a TV, the TV includes a memory, a processor and a display program of an LED video wall stored in the memory and running on the processor, and the system hardware of the TV is controlled by PC control software, main control It consists of three parts: board and receiving board. The PC side includes: LED TV parameter configuration, calibration acquisition, etc. The main control board includes: SOC video source generator, video image receiving, video image storage, video image cutting, high-speed serial interface transmission, DDR3 scheduling, etc. The receiving end includes: high-speed serial interface transmission, regional image capture, storage, image GAMMA conversion, point-to-point color correction, LED drive timing output image, DDR3 scheduling, etc. The TV obtains a TV program from the cloud, performs image processing such as scaling, gamma conversion, HDR, etc. on the TV program to obtain a 4K@60hz image; All new pixel points are combined to form a second target image, further acquire the image data of the second target image, and send the image data to the display screen through the HDMI transmission line, so that the display screen displays the image corresponding to the image data. By transferring the TV from the traditional LCD panel to the large LED screen, the problem of insufficient brightness, craftsmanship and size of the LCD is made up, and the traditional LED system can only be used as a single function of the display. Further, the LED TV wall adopts FPGA pure The hardware architecture design enables high integration, high transmission efficiency, large loading area, remarkable color processing effect, support for arbitrary scaling functions, and convenient and fast cluster management. And by using a high-speed serial bus for transmission, only 4 or 1 HDMI cable is required for 4K image transmission, which increases the transmission rate.

In addition, the present application also provides a computer-readable storage medium on which a display program of an LED video wall is stored, and when the display program of the LED video wall is executed by a processor, the above-mentioned LED TV can be realized The steps of the display method of the wall.

As will be appreciated by those skilled in the art, the embodiments of the present application may be provided as a method, a system, or a computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It will be understood that each flow and/or block in the flowcharts and/or block diagrams, and combinations of flows and/or blocks in the flowcharts and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to the processor of a general purpose computer, special purpose computer, embedded processor or other programmable data processing device to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing device produce Means for implementing the functions specified in one or more of the flowcharts and/or one or more blocks of the block diagrams.

These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory result in an article of manufacture comprising instruction means, the instructions An apparatus implements the functions specified in a flow or flows of the flowcharts and/or a block or blocks of the block diagrams.

These computer program instructions can also be loaded on a computer or other programmable data processing device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process such that The instructions provide steps for implementing the functions specified in one or more of the flowcharts and/or one or more blocks of the block diagrams.

It should be noted that, in the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not preclude the presence of a plurality of such elements. The present application may be implemented by means of hardware comprising several different components and by means of a suitably programmed computer. In a unit claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, and third, etc. do not denote any order. These words can be interpreted as names.

While alternative embodiments of the present application have been described, additional changes and modifications to these embodiments may occur to those skilled in the art once the basic inventive concepts are known. Therefore, the appended claims are intended to be construed to include alternative embodiments and all changes and modifications that fall within the scope of the present application.

Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

A display method for an LED video wall, wherein the method comprises:

receiving data of the first target image, and splicing and encapsulating the pixels of the first target image to form a second target image;

The image data of the second target image is sent to the receiving end, and the receiving end displays the image data based on the image data.
The display method of an LED video wall according to claim 1, wherein the step of splicing and packaging the pixels of the first target image to form the second target image comprises:

splicing a set number of pixels of the first target image to form a target pixel;

The second target image is formed based on all the target pixels.
The method for displaying an LED video wall according to claim 2, wherein after the step of forming the second target image based on all the target pixels, the method comprises:

Calculate the storage location corresponding to each of the target pixels in the second target image;

Splitting the second target image into a preset number of images according to the storage location.
The display method of the LED video wall according to claim 1, wherein the step of sending the image data of the second target image to the receiving end comprises:

reading the images of the preset number of copies, performing data encapsulation on the images, and generating the image data;

Determine the number of transmission lines according to the number of copies of the image, wherein the number of the transmission lines is consistent with the number of copies of the image;

The image data is sent to the receiving end based on the determined number of the transmission lines.
The display method of the LED video wall according to claim 1, wherein the step of sending the image data of the second target image to the receiving end further comprises:

Obtain the image data of each row in the second target image, and package the image data of each row to form a data packet;

The image data is sent to the receiving end based on the data packet.
The display method of the LED video wall according to claim 1, wherein after the step of sending the image data of the second target image to the receiving end, the method comprises:

Obtain the correction coefficient corresponding to each pixel in the currently displayed image;

The correction coefficient is sent to the receiving end, and the receiving end completes the correction operation of the currently displayed image according to the correction coefficient.
The method for displaying an LED video wall according to claim 1, wherein after the step of sending the image data of the second target image to the receiving end, the method further comprises:

receiving an upgrade package, and performing an upgrade operation according to the upgrade package;

When the upgrade operation is completed, a startup instruction is generated.
The method for displaying an LED video wall according to claim 1, wherein after the step of sending the image data of the second target image to the receiving end, the method further comprises:

Get debugging parameters;

The debugging parameters are sent to the receiving end, and the receiving end performs debugging according to the debugging parameters.
A television, wherein the television comprises a memory, a processor, and a display program of an LED video wall stored on the memory and running on the processor, and the processor implements when the processor executes the display program of the LED video wall:

receiving data of the first target image, and splicing and encapsulating the pixels of the first target image to form a second target image;

The image data of the second target image is sent to the receiving end, and the receiving end displays the image data based on the image data.
The television of claim 9, wherein the processor is further configured to:

splicing a set number of pixels of the first target image to form a target pixel;

The second target image is formed based on all the target pixels.
The television of claim 10, wherein the processor is further configured to:

Calculate the storage location corresponding to each of the target pixels in the second target image;

Splitting the second target image into a preset number of images according to the storage location.
The television of claim 9, wherein the processor is further configured to:

reading the images of the preset number of copies, performing data encapsulation on the images, and generating the image data;

Determine the number of transmission lines according to the number of copies of the image, wherein the number of the transmission lines is consistent with the number of copies of the image;

The image data is sent to the receiving end based on the determined number of the transmission lines.
The television of claim 9, wherein the processor is further configured to:

Obtain the image data of each row in the second target image, and package the image data of each row to form a data packet;

The image data is sent to the receiving end based on the data packet.
The television of claim 9, wherein the processor is further configured to:

Obtain the correction coefficient corresponding to each pixel in the currently displayed image;

The correction coefficient is sent to the receiving end, and the receiving end completes the correction operation of the currently displayed image according to the correction coefficient.
The television of claim 9, wherein the processor is further configured to:

receiving an upgrade package, and performing an upgrade operation according to the upgrade package;

When the upgrade operation is completed, a startup instruction is generated.
The television of claim 9, wherein the processor is further configured to:

Get debugging parameters;

The debugging parameters are sent to the receiving end, and the receiving end performs debugging according to the debugging parameters.
A computer-readable storage medium, wherein a display program of an LED video wall is stored on the computer-readable storage medium, and the display program of the LED video wall is implemented when executed by a processor:

receiving data of the first target image, and splicing and encapsulating the pixels of the first target image to form a second target image;

The image data of the second target image is sent to the receiving end, and the receiving end displays the image data based on the image data.
The computer-readable storage medium of claim 16, wherein the display program is further configured to:

splicing a set number of pixels of the first target image to form a target pixel;

The second target image is formed based on all the target pixels.
The computer-readable storage medium of claim 17, wherein the display program is further configured to:

Calculate the storage location corresponding to each of the target pixels in the second target image;

Splitting the second target image into a preset number of images according to the storage location.
The computer-readable storage medium of claim 16, wherein the display program is further configured to:

reading the images of the preset number of copies, performing data encapsulation on the images, and generating the image data;

Determine the number of transmission lines according to the number of copies of the image, wherein the number of the transmission lines is consistent with the number of copies of the image;

The image data is sent to the receiving end based on the determined number of the transmission lines.
The computer-readable storage medium of claim 16, wherein the display program is further configured to:

Obtain the image data of each row in the second target image, and package the image data of each row to form a data packet;

The image data is sent to the receiving end based on the data packet.