CN103220478B - A kind of display unit and television set - Google Patents

A kind of display unit and television set Download PDF

Info

Publication number
CN103220478B
CN103220478B CN201310144157.7A CN201310144157A CN103220478B CN 103220478 B CN103220478 B CN 103220478B CN 201310144157 A CN201310144157 A CN 201310144157A CN 103220478 B CN103220478 B CN 103220478B
Authority
CN
China
Prior art keywords
sub
image data
viewing area
drive circuit
data
Prior art date
Application number
CN201310144157.7A
Other languages
Chinese (zh)
Other versions
CN103220478A (en
Inventor
刘文洋
黄顺明
刘子贤
Original Assignee
青岛海信电器股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 青岛海信电器股份有限公司 filed Critical 青岛海信电器股份有限公司
Priority to CN201310144157.7A priority Critical patent/CN103220478B/en
Publication of CN103220478A publication Critical patent/CN103220478A/en
Application granted granted Critical
Publication of CN103220478B publication Critical patent/CN103220478B/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/015High-definition television systems

Abstract

The invention provides a kind of display unit and a kind of television set, wherein, display unit comprises: the first processing unit, for receiving a frame sheet source data, carrying out data transaction, obtain a frame image data to a frame sheet source data; Second processing unit, for receiving a frame image data, according to N number of sub-block viewing area each sub-block viewing area shared by pixel ratio, a frame image data is divided into N number of sub-image data accordingly, exports N number of sub-image data; N number of sequencing control drive circuit, for receiving N number of sub-image data, based on N number of sub-image data corresponding N number of sub-block viewing area driving display screen respectively.The present invention drives the liquid crystal display screen of ultrahigh resolution by multichannel Driving technique.

Description

A kind of display unit and television set
Technical field
The present invention relates to TV technology, in particular to a kind of display unit and television set.
Background technology
In recent years, along with the develop rapidly of Display Technique, from CRT(CathodeRayTube) to LCD(liquidcrystaldisplay) technology, from CCFL backlight to the LED product of energy-conservation slimming, from 2D to 3D technical products, new Display Technique updates all to making Display Technique have more high-performance each time.The application of the display screen of current ultrahigh resolution becomes study hotspot, ultrahigh resolution display screen such as 4K × 2K, reach four times of resolution rates of current full HD pixel 1080p exactly, reach the resolution of 3840 × 2160, calculate from pixel quantity, the picture pixel of 1080p adds up to 1920 × 1080=2073600, and the Pixel Information of " 4K × 2K " is 3840 × 2160=8294400 or 4096 × 2160=8847360.Substantially reach the former 4 times both rear, therefore only from the meaning of picture pixel, possess the content of the display device display 4 times more than the equipment of traditional 1080p pixel of " 4K × 2K " resolution.
For the application of current 4K2K ultrahigh resolution module screen, although liquid crystal technology and the Driving technique of each manufacturer are variant, but substantially, be all adopt high standard TCONIC arrange in pairs or groups FRC(framerateconversion) chip SCALERUP(pixel expansion) function, by full HD for common FHD() film source changes into 4K2K film source and exports display screen to and show, and concrete Organization Chart is as shown in Figure 1.
See Fig. 1, the signal that TVSOC chip (TV Graphics Processing chip 102) produces FHD specification exports FRC chip 104 to, FHD image data is extended to 4K2K image data by built-in SCALERUP algorithm by FRC chip 104, then the special TCON chip (sequencing control drive circuit 106) of 4K2K signal to ultrahigh resolution display 108 end is exported, because special TCON chip needs powerful disposal ability, technological requirement is high, complex structure, therefore difficulty is made, and poor stability, affect display performance, these factors govern the universal rapidly of ultrahigh resolution Display Technique such as 4K2K technology and cost reduces.
Ultrahigh resolution Display Technique is one of Hot spots for development of LCD TV from now on, and it can bring the display effect of shock level and fine and smooth details to show for user, needs a kind of new solution of Driving technique of ultrahigh resolution display screen.
Summary of the invention
Consider above-mentioned background technology, the invention provides a kind of Display Technique, ultrahigh resolution display screen can be driven.
In view of this, according to an aspect of the present invention, provide a kind of display unit, comprising: the first processing unit, the second processing unit, N number of sequencing control drive circuit and display screen, described N number of sequencing control drive circuit drives the N number of sub-block viewing area in the viewing area of described display screen respectively, N be more than or equal to 2 integer, wherein, described first processing unit, for receiving a frame sheet source data, data transaction is carried out to a described frame sheet source data, obtains a frame image data; Described second processing unit, for receiving a described frame image data, according to the display area ratio of described N number of sub-block viewing area, being divided into N number of sub-image data accordingly by a described frame image data, exporting described N number of sub-image data; Described N number of sequencing control drive circuit, for receiving described N number of sub-image data, based on described N number of sub-image data corresponding N number of sub-block viewing area driving described display screen respectively, shows the image that a described frame image data is corresponding on a display screen.
Pass through technique scheme, utilize and N number ofly independently drive N number of sub-block viewing area of display screen as FHD drive circuit, drive ultrahigh resolution display screen, such as 4K2K screen display shows 4K2K picture, N number of if common FHD drive circuit is to drive the display screen of ultrahigh resolution owing to adopting, the display screen solving big screen display screen or ultra high-definition resolution needs to take the sequential control circuit of more high standard to drive the technical problem of display.
According to a further aspect in the invention, additionally provide a kind of display unit, comprise: the first processing unit, second processing unit, N number of sequencing control drive circuit and display screen, described N number of sequencing control drive circuit drives the N number of sub-block viewing area in the viewing area of described display screen respectively, N be more than or equal to 2 integer, wherein, when described first processing unit receives the N frame sheet source data respectively from N road sheet source signal, described first processing unit, for carrying out data transaction to described N frame sheet source data, timesharing exports N frame image data, and to described second processing unit output chip source data switching signal, described second processing unit, for processing respectively described N frame image data according to described film source data exchange signal, exports N road display image data, described N number of sequencing control drive circuit, for driving N number of sub-block viewing area of described display screen based on by the described N road display image data received, or when described first processing unit receives a frame sheet source data of a road sheet source signal, described first processing unit, for carrying out data transaction to a described frame sheet source data, obtains a frame image data, described second processing unit, for receiving a described frame image data, according to described N number of sub-block viewing area each sub-block viewing area shared by pixel ratio, a described frame image data is divided into N number of sub-image data accordingly, exports described N number of sub-image data, described N number of sequencing control drive circuit, for receiving described N number of sub-image data, based on described N number of sub-image data corresponding N number of sub-block viewing area driving described display screen respectively.
This display unit contains two kinds of technical schemes, and when the first processing unit receives a road sheet source data, a two field picture is divided into N number of sub-image data by the second processing unit, is presented on N number of sub-block viewing area by N number of sub-image data correspondence; When the first processing unit receives N road sheet source data, the second processing unit timesharing processes Dyno-tab source data, N road view data correspondence is presented on N number of sub-block viewing area.
According to another aspect of the invention, additionally provide a kind of television set, comprise the display unit as described in above-mentioned arbitrary technical scheme.This television set has the technique effect identical with above-mentioned display unit.
Accompanying drawing explanation
Fig. 1 shows the block diagram of ultrahigh resolution liquid crystal indicator in correlation technique;
Fig. 2 shows the block diagram of display unit according to an embodiment of the invention;
Fig. 3 shows the Organization Chart of display unit according to still another embodiment of the invention;
Fig. 4 shows the schematic diagram of the SOC module in display unit shown in Fig. 3;
Fig. 5 shows the schematic diagram of the FRC chip module in display unit shown in Fig. 3;
Fig. 6 shows the schematic diagram of the TCON drive circuit in display unit shown in Fig. 3;
Fig. 7 shows LVDS signal format schematic diagram according to an embodiment of the invention;
Fig. 8 shows the schematic diagram of film source data exchange signal according to an embodiment of the invention;
The view data that Fig. 9 shows under general mode according to an embodiment of the invention exports schematic diagram;
The view data that Figure 10 shows under multi-screen pattern according to an embodiment of the invention exports schematic diagram;
Figure 11 shows the flow chart of display packing according to an embodiment of the invention;
Figure 12 a shows the schematic diagram dividing sub-block viewing area according to an embodiment of the invention in the row direction;
Figure 12 b shows column direction according to an embodiment of the invention and divides the schematic diagram of sub-block viewing area;
Figure 12 c shows row and column direction according to an embodiment of the invention and divides the schematic diagram of sub-block viewing area.
Embodiment
In order to more clearly understand above-mentioned purpose of the present invention, feature and advantage, below in conjunction with the drawings and specific embodiments, the present invention is further described in detail.It should be noted that, when not conflicting, the feature in the embodiment of the application and embodiment can combine mutually.
Set forth a lot of detail in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from other modes described here and implement, and therefore, the present invention is not limited to the restriction of following public specific embodiment.
Display unit according to the present invention can be applicable to display more high-resolution than 4K2K, when being applied to the more high-resolution display of 4K2K, if what the TV Graphics Processing chip 102 in Fig. 1 exported is FHD signal, because FHD signal is just in time 4K2K 1/4th, therefore, can consider that the viewing area of 4K2K being divided into 4 FHD shows subregion.
Fig. 2 shows the block diagram of display unit according to an embodiment of the invention.
As shown in Figure 2, display unit 200 can comprise according to an embodiment of the invention: the first processing unit 202, second processing unit 204, N number of sequencing control drive circuit 206 and display screen 208, N number of sequencing control drive circuit 206 drives the N number of sub-block viewing area in the viewing area of display screen 208 respectively, N be more than or equal to 2 integer, wherein, first processing unit 202, for receiving a frame sheet source data, carries out data transaction to a described frame sheet source data, obtains a frame image data; One frame image data, for receiving a described frame image data, according to the display area ratio of described N number of sub-block viewing area, is divided into N number of sub-image data, exports N number of sub-image data by the second processing unit 204 accordingly; N number of sequencing control drive circuit 206, for receiving N number of sub-image data, drives N number of sub-block viewing area of display screen 208, the image that a frame image data is corresponding described in described display screen display based on N number of sub-image data difference correspondence.
In this programme, first processing unit 202(and SOC module) only select reception one road sheet source data and outputting video signal, such as: data format 1920 × 1080/60HzFHD signal, if display is 4K2K(3840 × 2160/120Hz) liquid crystal display screen of resolution, then the second processing unit 204(and FRC chip module) FHD signal is carried out to the amplification process of resolution, to export the view data of 4K2K resolution, because the present invention adopts multichannel Driving technique, therefore the view data of 4K2K resolution is divided into many parts, N number of sub-block viewing area of display screen is transferred to respectively via N number of data channel, enable the compatible common full HD film source of ultrahigh resolution LCDs, and utilize common FHD drive circuit can drive ultrahigh resolution display, reduce the cost of display unit.
It will be appreciated by those skilled in the art that; wherein; second processing unit 204 is at the described frame image data of reception; according to the display area ratio of N number of sub-block viewing area; one frame image data is divided into accordingly the step of N number of sub-image data, is make N number of sub-image data of segmentation when correspondence is presented at the display of N number of sub-block viewing area, image can be shown by normal reduction; wherein, display area on a display screen calculates with the quantity of display pixel.
Such as: the viewing area of display screen is divided into up and down and left and right is divided into four regions, between sub-block viewing area, shared pixel quantity ratio is 1:1:1:1, like this, display image data also becomes 4 sub-block view data according to this 1:1:1:1 ratio cut partition; For another example: above-below direction is divided into 2 regions, left and right directions is divided into 3 regions, like this, amount to 6 sub-block viewing areas, its area ratio is 1:1:1:1:1:1, and display image data also becomes 6 sub-block view data by this ratio cut partition, in like manner, can not decile at left and right directions, correspondingly display image data carries out the segmentation of not decile with same ratio.
Based on N number of sub-image data corresponding N number of sub-block viewing area driving display screen respectively, and show image corresponding to an above-mentioned frame image data on a display screen.The division of N number of sub-image data is divided into basis with N number of sub-block viewing area, comprises above-mentioned division area ratio identical, also comprise the position going back original image identical, a frame image data just can be made normally to be shown as a two field picture.
Wherein, second processing unit 204 can comprise: convergent-divergent subelement, for before splitting a frame image data, one frame image data being carried out convergent-divergent is processed into identical with the pixel value of display screen 208, or is processed into identical with the pixel value of corresponding sub-block viewing area for each sub-image data being carried out convergent-divergent; Frequency conversion subelement, for the refreshing frequency according to display screen 208, carries out frequency-conversion processing to the frame frequency of a frame image data or N number of sub-image data.
In this programme, convergent-divergent subelement is according to the needs of display resolution display data, need to carry out convergent-divergent process to display image data, such as: the data format that the first processing unit exports is the viewdata signal of 1280 × 720P/60Hz, it is 960 × 540 sub-block viewing areas that the ultra high-definition display screen of resolution 3840 × 2160/120Hz divides equally 4 pixels, so data format is that the view data of 1280 × 720P carries out the view data that amplification is processed into 3840 × 2160 forms by convergent-divergent subelement, then, again the view data of 3840 × 2160 forms is carried out dividing processing become 4 parts of data formats be 960 × 540 sub-image data, like this, 4 sub-block view data are corresponding with the pixel of 4 sub-block viewing areas, reach and drive display object, or, data format is that the view data of 1280 × 720P is first carried out dividing processing and become 4 data formats to be the view data of 320 × 180 forms by the first processing unit, then, 4 data formats view data that is 320 × 180 is amplified respectively in proportion to be processed into 4 data formats be the view data of 960 × 540, like this, 4 sub-block view data are corresponding with the pixel of 4 sub-block viewing areas, also reach and drive display object.In like manner, if first processing unit export data format for be greater than 3840 × 2160 view data time, in order to the resolution of the view data with display screen that are used in display is equal, convergent-divergent subelement can carry out correspondingly reducing the view data being treated to 1920 × 1080, certainly, when the data format that the first processing unit exports is the view data of 3840 × 2160, like this, image data format is just in time corresponding with pixels of display screen, convergent-divergent subelement adopts direct pass-through mode, does not need to zoom in or out process.
In this programme, frequency conversion subelement is also according to display screen refreshing frequency, carries out frequency-conversion processing to the frame frequency of display image data, and frequency conversion is herein view data interleave or takes out frame process.Also such as, the data frame frequency form that first processing unit exports is 60Hz, the refreshing frequency of display screen 208 is 120Hz and is divided into 4 sub-block viewing areas, so, when 4 sub-block viewing areas take timesharing to refresh display, timesharing is namely: display is refreshed in 2 sub-block viewing areas of upper end simultaneously, and then refresh 2 sub-block viewing areas of display lower end, refreshing 4 sub-block viewing areas consuming time is 1/120s, like this, frequency conversion subelement needs to carry out raising frequency to the view data frame frequency of 60Hz and is treated to 120Hz, when parallel refreshing display is taked in 4 sub-block viewing areas, walk abreast namely: display is refreshed in 4 sub-block viewing areas simultaneously, the situation that corresponding row refresh clock is constant, refresh the two field picture half consuming time by timesharing refresh scheme consuming time, that is: refresh 4 sub-block viewing areas simultaneously and need 1/ (2 × 120) consuming time s, like this, frequency conversion subelement needs to carry out raising frequency to the view data frame frequency of 60Hz and is treated to 240Hz picture frame frequency data, in like manner, according to relation between display screen refreshing frequency and view data frame frequency, frame frequency process or non-frequency-conversion processing can be fallen, do not repeat them here.
Concrete, in this programme embodiment, the division rule of N number of sub-block viewing area is, the viewing area of display screen to be divided into N number of sub-block viewing area on display screen line and/or column direction, line direction comprises at the most a dividing line, column direction comprises one or more dividing line.
Wherein, the sequential control circuit common grid drive circuit of each sub-block viewing area that the same gate line of described display screen passes, controls corresponding source electrode drive circuit in the sequential control circuit of described each sub-block viewing area respectively based on corresponding sub-image data.
What one skilled in the art should appreciate that is, the viewing area that above-mentioned zone is divided in display screen not there is clear and definite line of demarcation to exist, it is the corresponding region controlled by each sequential control circuit that each sub-block viewing area divides, and the boundary line of the sub-block viewing area that each sequential control circuit controls is then dividing line.Compared with adopting polylith liquid crystal display screen to be stitched together to realize the display splicing screen technology of a complete image in prior art, on the one hand unlike, clear and definite line of demarcation is there is not in display screen in this programme, display screen is a full display screen in fact, and display screen gate line in the row direction links together, without splicing vestige on the display screen including sub-block viewing area.On the other hand unlike, with mosaic screen unlike, on line direction, multiple sequential control circuits of multiple sub-block viewing areas that same grid passes share a road gate driver circuit on a display screen, and the size of sub-block viewing area is that the source electrode data wire that controls according to sequential control circuit and gate line quantity determine.
In the present embodiment, the first situation, Figure 12 a shows, such as: only divide four sub-block viewing area a along line direction, b, c and d, wherein, without dividing line on line direction, column direction there are three dividing lines, sequential control circuit A, B, C and D is corresponding respectively controls sub-block viewing area a, b, c and d, sub-block viewing area a, b, c and d can decile, also can not decile, if Deng timesharing, the alignment number that the source electrode drive circuit of each sub-block viewing area drives is equal, if do not wait timesharing, alignment number included by each sub-block viewing area arranges source electrode drive circuit.
The sub-block viewing area that the same grid of display screen passes includes a, b, c and d tetra-sub-block viewing areas, its sequential control circuit A, B, C and D has shared gate driver circuit, i.e. a, b, the gate line of c and d tetra-sub-block viewing areas is opened simultaneously or closes, the sequential control circuit A of four sub-block viewing areas is controlled respectively by the sub-image data of four sub-block viewing areas, B, source electrode drive circuit in C and D, that is: based on the sub-image data that sub-block viewing area a is corresponding, source electrode drive circuit in driver' s timing control circuit A, control the image refreshing of sub-block viewing area a, the like, sequential control circuit B, in C and D, source electrode drive circuit controls sub-block viewing area b respectively, the image refreshing of c and d.
The second situation, Figure 12 b shows, such as: only divide two sub-block viewing area e and f along column direction, wherein, without dividing line on column direction, line direction there is a dividing line, sequential control circuit E and F is corresponding respectively controls sub-block viewing area e and f, sub-block viewing area e and f can decile, also can not decile, if wait timesharing, the gate line number that the gate driver circuit of each sub-block viewing area drives is equal, if do not wait timesharing, the gate line number included by each sub-block viewing area arranges gate driver circuit.Sequential control circuit E drives the image display of sub-block viewing area e, sequential control circuit F drives the image display of sub-block viewing area f, wherein, the gate driver circuit of sequential control circuit E controls the gate line unlatching of sub-block viewing area e or closes, source electrode drive circuit controls the write of its view data, and refreshed image shows, in like manner, the gate driver circuit of sequential control circuit F controls the gate line opening and closing of sub-block viewing area f, and source electrode drive circuit controls the write of its view data.
The third situation, Figure 12 c shows, such as: only divide four sub-block viewing area h along columns and rows direction, i, m and n, respectively there is a dividing line in the row direction with on column direction, sequential control circuit H, I, M and N is corresponding respectively controls sub-block viewing area h, i, m and n, wherein, sub-block viewing area h and i in the row direction, and can be the sub-block viewing area of decile between m and n, also can not decile, h and m in a column direction, and can decile between i and n, also can not decile, so, if sub-block viewing area h and i in the row direction, and between m and n for etc. timesharing, corresponding sequential control circuit H and I, the source electrode line number that M and N controls is equal, if do not wait timesharing, the source electrode number controlled is unequal, according to the source electrode line quantity correspondence that sub-block viewing area comprises, sequential control circuit is set, if h and the m of sub-block viewing area in a column direction, and between i and n for etc. timesharing, corresponding sequential control circuit control gate polar curve number is equal, if do not wait timesharing, the gate line quantity that the gate line number that corresponding sequential control circuit controls comprises with corresponding sub block viewing area is arranged, but, because the position of the gate line comprised of sub-block viewing area on column direction is not identical, that is: h and the m of sub-block viewing area is refreshed, and the time of i and n is unequal, like this, in order to image display integrality, after need completing at four sub-block display image data refresh alls that a two field picture is corresponding, just carry out the refreshing of next frame image, ensure that the display of each two field picture is synchronous.Wherein, sub-block viewing area h and the i that passes of same gate line in the row direction, and m and n, its sequential control circuit H and I, and M and N shares a road gate driver circuit, co-controlling sub-block viewing area h and i, and the gate line of m and n is opened or is closed, simultaneously, based on corresponding to sub-block viewing area h and i, and H and the I of the sub-image data difference Control timing sequence control circuit of m and n, and the source electrode drive circuit of M and N realizes corresponding sub block viewing area h and i, and the image refreshing of m and n.
Concrete, N number of sub-block viewing area of display screen can comprise four the sub-block viewing areas be divided into by line direction and column direction, and drive four sub-block viewing areas (with reference to figure 3) respectively by four sequencing control drive circuits, wherein, four sub-block viewing areas comprise the 4th sub-block viewing area of the first sub-block viewing area of upper left quarter, the second sub-block viewing area of upper right quarter, the 3rd sub-block viewing area of right lower quadrant and lower left quarter; Sequencing control drive circuit corresponding to the first sub-block viewing area and the second sub-block viewing area shares the first grid drive circuit of the display screen on a road, and the sequencing control drive circuit corresponding to the 3rd sub-block viewing area and the 4th sub-block viewing area shares the second grid drive circuit of a road display screen.
In a kind of view data refresh process, first grid drive circuit starts the gate line of the first sub-block viewing area and the second sub-block viewing area (when starting, can line by line or interlacing start gate line, and can sequence starting or inverted order start gate line), simultaneously, first sub-image data of the source electrode drive circuit write correspondence of the first sub-block viewing area, second sub-image data of the source electrode drive circuit write correspondence of the second sub-block viewing area, refresh display first sub-image data and the second sub-image data; Second grid drive circuit is after the first sub-image data and the second sub-image data are refreshed, start the gate line of the 3rd sub-block viewing area and the 4th sub-block viewing area, simultaneously, 3rd sub-image data of the source electrode drive circuit write correspondence of the 3rd sub-block viewing area, 4th sub-image data of the source electrode drive circuit write correspondence of the 4th sub-block viewing area, refresh display the 3rd sub-image data and the 4th sub-image data.Therefore, in this programme, first refresh the view data of the first half of viewing area, then refresh the view data of the latter half of viewing area, thus complete the refreshing of a frame image data.
In another kind of view data refresh process, first grid drive circuit starts the gate line of the first sub-block viewing area and the second sub-block viewing area, simultaneously, first sub-image data of the source electrode drive circuit write correspondence of the first sub-block viewing area, second sub-image data of the source electrode drive circuit write correspondence of the second sub-block viewing area, refresh display first sub-image data and the second sub-image data; Second grid drive circuit is while the first sub-image data and the second sub-image data are refreshed, start the gate line of the 3rd sub-block viewing area and the 4th sub-block viewing area, simultaneously, 3rd sub-image data of the source electrode drive circuit write correspondence of the 3rd sub-block viewing area, 4th sub-image data of the source electrode drive circuit write correspondence of the 4th sub-block viewing area, refresh display the 3rd sub-image data and the 4th sub-image data.Therefore, in this programme, refresh the view data of the view data of the first half of viewing area and the latter half of viewing area simultaneously, thus complete the refreshing of a frame image data.
Above embodiment is the image Graphics Processing process that the first processing unit 202 receives a road sheet source data, will receive the image Graphics Processing process of N road sheet source data below for the first processing unit 202.
In the present embodiment, when the first processing unit 202 receives the N frame sheet source data respectively from N road sheet source signal, carry out data transaction to described N frame sheet source data, timesharing exports N frame image data, and to the second processing unit 204 output chip source data switching signal; Described second processing unit 204 processes described N frame image data respectively according to film source data exchange signal, exports N road display image data; Described N number of sequencing control drive circuit 206 for receiving described N road display image data, and exports described display screen 208 to respectively by described N circuit-switched data passage, based on a display image data driving N sub-block viewing area, described N road.
Now, first processing unit 202 receives N road sheet source data, and timesharing exports N frame sheet source data, second processing unit 204 carries out interleave process (raising frequency process) respectively to this N frame sheet source data, like this, the fluency of video can be increased, and utilize multichannel Driving technique to export the view data after process to display screen 208, like this, just can watch the video of N number of channel simultaneously.Due under multi-screen pattern time, first processing unit 202 is that timesharing exports N road vision signal to the second processing unit 204, therefore the first processing unit 202 also needs the second processing unit output chip source data switching signal, carries out interleave process to make the second processing unit 204 according to film source order switching time to vision signal.
Those skilled in that art should understand, interleave process is carried out not necessarily to vision signal, if the refreshing frequency of display screen is 120HZ, and the frequency of vision signal is 60HZ, then can carry out interleave process to vision signal, if the frequency of vision signal is 120HZ, then without the need to carrying out interleave process to vision signal, therefore whether carrying out interleave process is because the refreshing frequency of display screen and these two factors of frequency of vision signal are determined.
Wherein, the concrete processing procedure of described first processing unit 202 is read multiframe sheet source data successively, is carrying out in the process of data transaction to former frame sheet source data, reads next frame sheet source data, exports described multiple image data with timesharing.The concrete processing procedure of described second processing unit 204 is when reading the N frame sheet source data of the subsequent time that described first processing unit 202 exports, and carried out interleave process and exported the N road display image data after interleave process to the N frame sheet source data in a upper moment of having read.
In above-mentioned arbitrary technical scheme, preferably, a sequencing control drive circuit in described N number of sequencing control drive circuit 206 is main drive circuit, all the other sequencing control drive circuits are from drive circuit, described main drive circuit sends synchronizing signal to described from drive circuit, synchronously drives the described display image data of display to make described N number of sequencing control drive circuit.Sending synchronizing signal by main drive circuit controls from drive circuit, and what make N number of sequencing control drive circuit keep in sequential is synchronous.
Should be appreciated that, when the second processing unit 204 time-division processing N road vision signal, timesharing can export N road display image data, like this, sequencing control drive circuit drives the corresponding display image data of display with regard to timesharing.Such as, first the second processing unit 204 exports A view data, and the sequencing control drive circuit corresponding with A view data drives and show A view data and the a-quadrant being presented at display screen, and the realization corresponding with B view data controls drive circuit and do not work; Second processing unit 204 then exports B view data, the sequencing control drive circuit corresponding with B view data drives and shows B view data and the B region being presented at display screen, now a-quadrant stops and is presented in A view data, and the realization corresponding with A view data controls drive circuit to quit work, and circulates analogize with this.
Meanwhile, the second processing unit 204 also can parallel processing N road vision signal, exports N road display image data simultaneously, and like this, each sequencing control drive circuit drive that walks abreast shows corresponding display image data.Such as: the second processing unit 204 exports A view data, export B view data simultaneously, then, export C picture number data and D view data simultaneously.Also passable, the second processing unit 204 exports A, B, C and D view data simultaneously.
In a typical execution mode, described N number of sequencing control drive circuit 206 can comprise four sequencing control drive circuits, drive first to fourth sub-block viewing area of display screen respectively, sequencing control drive circuit corresponding to the first sub-block viewing area and the second sub-block viewing area shares the first grid drive circuit of the display screen on a road, and the sequencing control drive circuit corresponding to the 3rd sub-block viewing area and the 4th sub-block viewing area shares the second grid drive circuit of a road display screen.First grid drive circuit starts the gate line of the first sub-block viewing area and the second sub-block viewing area, simultaneously, the two-way display image data of the source electrode drive circuit timesharing write correspondence of the first sub-block viewing area and the second sub-block viewing area, refreshes the two-way view data that display is corresponding; Second grid drive circuit is after first via display image data and the second road display image data are refreshed, start the gate line of the 3rd sub-block viewing area and the 4th sub-block viewing area, simultaneously, the two-way display image data of the source electrode drive circuit timesharing write correspondence of the 3rd sub-block viewing area and the 4th sub-block viewing area, refreshes the display image data that display is corresponding.In this programme, the refresh process of view data is the display image data making the source electrode drive circuit timesharing write of viewing area corresponding according to the output time of view data.In this programme, the refresh process of view data is the sub-image data making the source electrode drive circuit timesharing write of viewing area corresponding according to the output time of view data.Now, during owing to refreshing a two field picture, display screen refreshes 2 times from the first row to last column, therefore, image refreshing frequency becomes the half of display screen refreshing frequency, and in the second processing unit, frequency conversion subelement needs according to relation between image refreshing frequency and display screen refreshing frequency, does corresponding frequency-conversion processing to the frame frequency of every road view data, such as: when display screen refreshing frequency is 120Hz, the second processing unit exports the frame frequency of the sub-image data of each data channel is 60Hz.
Also can be, first grid drive circuit starts the gate line of the first sub-block viewing area and the second sub-block viewing area, simultaneously, the source electrode drive circuit of the first sub-block viewing area and the second sub-block viewing area is run simultaneously and is write corresponding two-way view data, refreshes the two-way view data that display is corresponding; Then, second grid drive circuit is after first via view data and the second tunnel view data are refreshed, start the gate line of the 3rd sub-block viewing area and the 4th sub-block viewing area, simultaneously, the source electrode drive circuit of the 3rd sub-block viewing area and the 4th sub-block viewing area is run simultaneously and is write corresponding two-way view data, refreshes the two-way view data that display is corresponding.In this programme, the refresh process of view data is the sub-image viewing area under controlling according to same grid control circuit, realizes being synchronously written corresponding display image data.Now, when display screen refreshes 1 time from the first row to last column, just in time complete and refresh a two field picture in the display image data of Liao Mei road, like this, the frame frequency of each sub-image data is identical with display screen refreshing frequency, frequency conversion subelement in second processing unit, also need according to relation between image refreshing frequency and display screen refreshing frequency, corresponding frequency-conversion processing is done to the frame frequency of sub-block view data, such as: when display screen refreshing frequency is 120Hz, the second processing unit exports the frame frequency of the display image data of each data channel is 120Hz.
Can also be, first grid drive circuit starts the gate line of the first sub-block viewing area and the second sub-block viewing area, simultaneously, the source electrode drive circuit of the first sub-block viewing area and the second sub-block viewing area is run simultaneously and is write corresponding two-way display image data, refreshes the two-way display image data that display is corresponding; But, second grid drive circuit is while first via display image data and the second road display image data are refreshed, the gate line of synchronous averaging the 3rd sub-block viewing area and the 4th sub-block viewing area, simultaneously, the source electrode drive circuit of the 3rd sub-block viewing area and the 4th sub-block viewing area is run simultaneously and is write corresponding two-way display image data, refreshes the two-way display image data that display is corresponding.In this programme, the refresh process of view data is four sub-block image display area, realizes being synchronously written four corresponding road display image datas simultaneously.Now, display screen has refreshed the first sub-block viewing area and the second sub-block viewing area half for former display screen refreshing frequency consuming time simultaneously, meanwhile, 3rd sub-block viewing area and the 4th sub-block viewing area also synchronously complete refreshing, like this, the refreshing frequency refreshing the view data of each sub-block viewing area is 2 times of display screen refreshing frequency, frequency conversion subelement in second processing unit, equally also need according to relation between image refreshing frequency and display screen refreshing frequency, corresponding frequency-conversion processing is done to the frame frequency of every road display image data, such as: when display screen refreshing frequency is 120Hz, the frame frequency that second processing unit 204 exports the display image data of each data channel is 240Hz.
Television set according to an embodiment of the invention, comprises the display unit 200 as described in above-mentioned arbitrary technical scheme.
Below in conjunction with Fig. 3 for 4K2K display as ultrahigh resolution display, further illustrate display unit according to an embodiment of the invention.
Fig. 3 shows the Organization Chart of display unit according to still another embodiment of the invention.
The resolution of 4K2K display is just in time four times of FHD resolution, therefore, under current FHD film source still accounts for the prerequisite of mainstream market, use 4K2K display realizes the selection that the display of 2 × 2FHD multifrequency is a kind of less expensive, can as the auxiliary function of high-end TV, for the special applications scene such as home content of user share, multi-screen e-sports and house security monitoring etc. provide high definition to show service.4K2K multichannel Driving technique principle is exactly the drive circuit utilizing 4 FHD, and collocation FRC circuit, transmits picture (general mode) and the 4 channel pictures (multi-screen pattern) of 4K2K by the FHD signal of 4 passages.
As shown in Figure 3, SOC module 302(i.e. the first processing unit 102) in the normal mode, receive a road sheet source data and export FHD signal (120HZ) to FRC chip module 304(i.e. the second processing unit 104), FHD signal is carried out pixel expansion (scalerup) to 4K2K signal by FRC chip module 304, then exports this 4K2K signal to screen end by N number of sequencing control drive circuit and shows.
Under multi-screen pattern, SOC module 302 needs the FHD signal exporting special standard to FRC chip module 304, export a film source data exchange signal to FRC chip module 304 simultaneously, FRC chip module 304 is after the FHD signal receiving special standard and film source data exchange signal, frequency-conversion processing is carried out to the FHD signal of special standard, be processed into 4 passage FHD signals and export the sequencing control drive circuit (TCON circuit) shielding end to, sequencing control drive circuit is by the cascade synchronizing function between TCONIC, synchronous driving 4 FHD screens, thus realize 4 screen displays and show, display effect as shown in Figure 10.
The realization key of 4K2K multichannel Driving technique is that FRC circuit is to the seamless switching between pixel-expansion (scalerup) function of the frequency-conversion processing of special standard FHD signal and general mode and the raising frequency function of multi-screen pattern.By the realization of this multichannel Driving technique, multihead display auxiliary function can be provided for 4K2K ultra high-definition Display Technique, simultaneously, because adopt 4 FHD to shield Driving technique, can avoid using the special TCONIC of 4K2K, only adopt 4 cascade FHDTCONIC, production cost significantly reduces on the one hand, on the one hand without the need to worrying supply of material quality and the batch reliability of chip.
4K2K multichannel Driving technique is not only the innovation of shielding end Driving technique, needs SOC and FRC chip on image processing algorithm, do corresponding cooperation simultaneously.SOC needs the special standard FHD signal under output multi-screen pattern, and FRC chip needs to do raising frequency image procossing under multi-screen pattern.
Following composition graphs 4 to Figure 10 sub-module describes Graphics Processing process in detail.
In the normal mode, SOC module 302 reads FHD film source A, and exports 60HZ or 120HZFHD signal.This signal is standard LVDS signal (resolution is FHD).Standard LVDS form (for JEIDA) refers to Fig. 7.
Under multi-screen pattern, SOC module 302 reads film source A data in the first moment, and data is stored in high-speed memory A, afterwards, by being built in the computing of the image quality process computing module of SOC module 302, film source A data being processed into the FHD signal of 30HZ and exporting.Do in the process of image quality process, image operation and Signal form translate at SOC module 302 couples of film source A, continue to read film source B data, and film source B data are stored in high-speed memory B, afterwards, by being built in the computing of the image quality process computing module of SOC module 302, export after film source B data being processed into the FHD signal of 30HZ.Do in the process of image quality process, image operation and Signal form translate at SOC module 302 couples of film source B, read film source C data, and film source C data are stored in high-speed memory A, afterwards, by after the computing of image quality process computing module that is built in SOC module 302, film source C data be processed into the FHD signal of 30HZ and export.Carry out at SOC module 302 couples of film source C, in the process of image quality process, image operation and Signal form translate, reading film source D data, and film source D data being stored in high-speed memory B.Cycling is carried out by above-mentioned steps, final treatment effect is, under multi-screen pattern, SOC module 302 timesharing exports the FHD signal of 4 30HZ, amounts to 120HZFHD signal, simultaneously, export the SYNC signal representing the low and high level of film source data exchange, utilize the edging trigger mode of SYNC signal synchrodata between SOC module 302 and FRC chip module 304 to switch, wherein, the specification of SYNC signal as shown in Figure 8.
The following detailed description of the operation principle of FRC chip module.
In the normal mode, such as: FRC chip module 304 reads the FHD signal of 60HZ or 120HZ that SOC module 302 exports, this FHD signal being carried out pixel expansion (scalerup) to 4K2K resolution exports.Because there are 4 Parallel opertation passages, therefore the 4K2K image after process can be divided into 4 subdivisions and parallel output to 4 passage according to impartial up and down by FRC chip module 304, as shown in Figure 9.4K2K image is divided into A, B, C, D4 part, and by these 4 subdivisions respectively by passage A, channel B, channel C and passage D transfer to screen end, display screen is when refreshing, each region of display screen can be refreshed according to respective refreshing direction, the refreshing direction of such as corresponding with part A viewing area can be refresh from top to bottom, the refreshing direction of the viewing area corresponding with part B can be refresh from the bottom up, and the refreshing direction of the viewing area corresponding with C part can be refresh from top to bottom.
FRC chip module also includes the frequency-conversion processing of convergent-divergent process to view data and frame frequency, need according to the view data size received and the data format of the sub-image data that relation adjustment exports and frame frequency between picture frame frequency and the flat refreshing frequency of display, wherein, the frequency conversion of frame frequency is taked interleave or takes out frame technique, convergent-divergent process and frequency conversion can adopt MEMC(Motionestimateandmotioncompensation, Motion estimation and compensation) compute mode processes, and makes the image that processes more smooth and clear.
With reference to figure 6, in the normal mode, in the present embodiment, display screen be divide into four viewing areas (A, B, C, D), each viewing area is driven by a sequencing control drive circuit in four sequencing control drive circuits.Drive the sequencing control drive circuit of a-quadrant and drive the sequencing control drive circuit in B region to share the first grid drive circuit of a road display screen, drive the sequencing control drive circuit in C region and drive the sequencing control drive circuit in D region to share the second grid drive circuit of a road display screen.When refreshing, if A, B region and C, D region are refreshed simultaneously, then when first grid drive circuit starts the gate line in A, B region, the source electrode drive circuit in A, B region writes corresponding sub-image data simultaneously, and while A, B region is refreshed, when second grid drive circuit starts the gate line in C, D region, the source electrode drive circuit in C, D region writes corresponding sub-image data simultaneously.If A, B first refresh in region, C, D refresh behind region, then when first grid drive circuit starts the gate line in A, B region, the source electrode drive circuit in A, B region writes corresponding sub-image data simultaneously, and after A, B region is refreshed, when second grid drive circuit starts the gate line in C, D region, the source electrode drive circuit in C, D region writes corresponding sub-image data simultaneously.
For the image refreshing in each region, can line by line or interlacing control gate polar curve complete the refreshing line by line of pixel, refreshing direction can be from top to bottom, or from the bottom up, or the refreshing direction of viewing area A and B is from top to bottom, and the refreshing direction of viewing area C and D is from the bottom up.
Under multi-screen pattern, as shown in Figure 5, such as: FRC chip module 304 receives FHD signal and the SYNC signal of timesharing 4 × 30HZ that SOC module 302 exports, and by the FHD signal storage of 4 × 30HZ in high-speed memory C, the capacity of high-speed memory C can store the view data of 4K2K resolution.In the first moment, by the FHD signal storage of 4 × 30HZ in high-speed memory C; In the second moment, FRC chip reads the FHD signal of 4 × 30HZ of the subsequent time that SOC module 302 exports, and the movement locus of the front and back 2 frame picture of synchronous compare first moment reading, by being built in the MEMC computing module of FRC chip module 304 inside, calculate 4 FHD view data of intermediate frame.While computing, 4 × 30HZFHD signal of the subsequent time that the SOC module 302 of reading synchronously exports by FRC chip module 304 is sequentially stored in high-speed memory C, meanwhile, 4 frame FHD signals of the first moment 4 frame FHD signals read and intermediate frame calculated sequentially are exported.
In the 3rd moment, repeat the step in above-mentioned second moment.So far, 4 × 30HZFHD signal finally changes 4 × 60HZFHD signal (completing raising frequency processing procedure) into, and each FHD signal (60HZ) occupies a passage, therefore, has 4 channel transfer view data.
FRC module is according to the type of drive of each sub-block viewing area of the driving of sequential control circuit, the frame frequency of each sub-image data shown is determined according to display screen refreshing frequency, in FRC module, frequency-variable module can be processed into 4 tunnel view data of needs, as: 4 × 120HZFHD signal, or 4 × 240HZFHD signal.
Due to the restriction of the disposal ability of FRC chip module 304, therefore when multi-disc source, SOC has carried out down conversion process to vision signal, to ensure that FRC chip module 304 can process these video datas, consider that the refreshing frequency of display screen has carried out raising frequency process to vision signal again, if the disposal ability of FRC chip module promotes, then SOC is just without the need to carrying out down conversion process to vision signal.
In the present embodiment, TCON circuit (sequencing control drive circuit) adopts traditional F HD drive circuit scheme, calculate by resolution, need 4 electronic circuits altogether, the synchronizing function set up in sequential is needed between each electronic circuit, for each electronic circuit is inner, its function such as image procossing, panel driving and traditional F HD show and indifference.Uniquely unlike no matter under multi-screen pattern or in the normal mode, what all need to carry out in sequential between 4 TCON chips is synchronous, to realize complete 4K2K display, keeping the method for timing synchronization to be hypothesis sequencing control drive circuit A is main drive circuit, then send synchronizing signal by sequencing control drive circuit A to other sequencing control drive circuits, make four sequencing control drive circuits keep synchronous.The schematic diagram of TCON drive circuit as shown in Figure 6, after the view data of sequencing control drive circuit A receive path A, drives display screen A to show FHDA view data; After the view data of sequencing control drive circuit B receive path B, display screen B is driven to show FHDB view data; After the view data of sequencing control drive circuit C receive path C, display screen C is driven to show FHDC view data; After the view data of sequencing control drive circuit D receive path D, display screen D is driven to show FHDD view data.Continue with reference to figure 6, under multi-screen pattern, if timesharing shows four sheet source datas, because viewing area B with A is controlled by identical grid, therefore when viewing area B display image data, the source electrode drive circuit of viewing area B is written into corresponding view data, and the source electrode of viewing area A is not written into data; When viewing area A display image data, the source electrode drive circuit of viewing area A is written into corresponding view data, and the source electrode drive circuit of viewing area B is not written into corresponding view data, in like manner, when viewing area C shows corresponding view data, the source electrode drive circuit of viewing area C is written into corresponding view data, and the source electrode drive circuit of viewing area D is not written into corresponding view data.
Those skilled in the art should understand, no matter be multi-screen pattern or general mode, because sequencing control drive circuit controls the source electrode of display screen on an opposite side, the region of grid on another opposite side and on transverse axis shares same gate line (i.e. viewing area A and viewing area B common gate polar curve, when the grid of viewing area A is driven, the grid of viewing area B is also driven), if therefore on the opposite side of the grid of display screen in X direction, then when distributing corresponding viewing area for multiple sequencing control drive circuit, in X direction, display screen can only be divided into more viewing area arranged side by side, and can only be two viewing areas arranged side by side on y direction.
It should be noted that, when the switching between general mode and multi-screen pattern will be carried out, SOC module 302 exports the switching signal of low and high level to FRC chip module 304, FRC chip module 304 is determined to carry out interleave process to vision signal according to this switching signal, and that still carries out resolution zooms in or out process.
Figure 11 shows the flow chart of display packing according to an embodiment of the invention.
As shown in figure 11, display packing according to an embodiment of the invention, comprises the following steps: step 1102, selects receiving sheet source data according to the display mode selected; Step 1104, carries out data transaction to described source data, obtains vision signal; Step 1106, according to the default Processing Algorithm corresponding with the display mode of described selection, processes described vision signal, output display view data; Step 1108, exports N number of viewing area of display screen to by N number of sequencing control drive circuit by described display image data.
By technique scheme, the compatible plurality of display modes of the display unit of ultrahigh resolution can be made, utilize multichannel Driving technique to drive the display screen of ultrahigh resolution, realize the multi-channel image processor of display.Multichannel, namely consider to adopt N number of passage to transmit N number of source signal respectively, each passage respectively corresponding 1 film source, 1 FHD drive circuit, 1 FHD shows subregion, this multichannel Driving technique is divided into 2 kinds of patterns, 1 kind is general mode, in this mode, utilize the cascade synchronizing function between N number of FHD drive circuit, drive 4K2K screen display to show 4K2K picture; Another kind is multi-screen pattern, in this mode, utilize N number of FHD drive circuit respectively driving N FHD show a subregion and show N number of FHD film source, realize multihead display.As can be seen here, for different display modes, corresponding image processing algorithm is not identical, therefore, corresponding image processing algorithm can be determined according to received film source situation, and owing to adopting N number of common FHD drive circuit to drive the display screen of ultrahigh resolution, because this reducing production cost and the development cost of drive circuit.
In technique scheme, preferably, when the display mode selected is the first display mode, receives a road sheet source data and export the vision signal for a described road sheet source data; That carries out resolution to described vision signal zooms in or out process, export described display image data, and the quantity of viewing area controlled according to N number of sequencing control drive circuit and the pixel value of each viewing area, described display image data is processed into many one's shares of expenses for a joint undertaking view data, makes the pixel value of described many one's shares of expenses for a joint undertaking view data identical with the pixel value of corresponding viewing area respectively; Generate many one's shares of expenses for a joint undertaking view data according to described display image data, and export described many one's shares of expenses for a joint undertaking view data N number of viewing area of described display screen to respectively by described N number of sequencing control drive circuit.
First display mode and general mode, now only select reception one road sheet source data and outputting video signal such as FHD signal, if display is the liquid crystal display screen of 4K2K resolution, then FHD signal is carried out to the amplification process of resolution, to export the view data of 4K2K resolution, because the present invention adopts multichannel Driving technique, therefore the view data of 4K2K resolution is divided into many parts, N number of viewing area of display screen is transferred to respectively via N number of data channel, enable the compatible full HD film source of ultrahigh resolution LCDs, and utilize common FHD drive circuit to realize multi-channel image processor, reduce the cost of display unit.
Preferably, four viewing areas of described display screen are driven respectively by four sequencing control drive circuits, make the brush in pixels new direction of described four viewing areas identical, or on one side on the brush in pixels new direction of two viewing areas contrary with the brush in pixels new direction of the viewing area of two on opposite side, when driving described display screen, described four sequencing control drive circuits are that the source electrode of described four viewing areas is powered simultaneously, control the grid voltage of described four viewing areas according to brush in pixels new direction line by line.
In technique scheme, preferably, when the display mode selected is the second display mode, receives N road sheet source data and export N road vision signal according to the sheet source data timesharing of described N road; Respectively interleave process is carried out to described N road vision signal, exports N road display image data; Described N road display image data is exported to N number of viewing area of described display screen respectively by described N number of sequencing control drive circuit.Second display mode and multi-screen pattern, now, receive N road sheet source data and timesharing output N road vision signal, respectively interleave process is carried out to this N road vision signal, like this, the fluency of video can be increased, and utilize multichannel Driving technique to export the view data after process to display screen, like this, just can watch the video of N number of channel simultaneously.
In technique scheme, preferably, when exporting described N road vision signal, going back output chip source data switching signal, carrying out the interleave process of described N road vision signal according to described film source data exchange signal.
In above-mentioned arbitrary technical scheme, preferably, with a sequencing control drive circuit in described N number of sequencing control drive circuit for main drive circuit, all the other sequencing control drive circuits are from drive circuit, described main drive circuit sends synchronizing signal to described from drive circuit, synchronously drives the described display image data of display to make described N number of sequencing control drive circuit.Sending synchronizing signal by main drive circuit controls from drive circuit, and what make N number of sequencing control drive circuit keep in sequential is synchronous.
Preferably, four viewing areas of described display screen are driven respectively by four sequencing control drive circuits, make the brush in pixels new direction of described four viewing areas identical, or on one side on the brush in pixels new direction of two viewing areas contrary with the brush in pixels new direction of the viewing area of two on opposite side, when timesharing drives described four viewing areas, the source current of four viewing areas described in described four sequencing control drive circuit Time-sharing control, and the grid voltage of corresponding viewing area is controlled line by line according to brush in pixels new direction.
More than be described with reference to the accompanying drawings according to technical scheme of the present invention, multichannel Driving technique is utilized to drive ultrahigh resolution liquid crystal display screen, the high-resolution characteristic that can make full use of ultrahigh resolution liquid crystal display screen realizes multi-channel image processor, hold within the family share, there is sufficient using value in multi-screen e-sports and safety and protection monitoring field; And utilize multichannel Driving technique can reduce development cost and the development difficulty of drive circuit, shorten the construction cycle.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (10)

1. a display unit, it is characterized in that, comprise: the first processing unit, the second processing unit, N number of sequencing control drive circuit and display screen, described N number of sequencing control drive circuit drives the N number of sub-block viewing area in the viewing area of described display screen respectively, N be more than or equal to 2 integer, wherein
Described first processing unit, for receiving a frame sheet source data, carrying out data transaction to a described frame sheet source data, obtaining a frame image data;
Described second processing unit, for receiving a described frame image data, according to the display area ratio of described N number of sub-block viewing area, being divided into N number of sub-image data accordingly by a described frame image data, exporting described N number of sub-image data;
Described N number of sequencing control drive circuit, for receiving described N number of sub-image data, based on described N number of sub-image data corresponding N number of sub-block viewing area driving described display screen respectively, the image that a frame image data is corresponding described in described display screen display
Described N number of sub-block viewing area is on described display screen line and/or column direction, carry out division to the viewing area of described display screen form, and line direction comprises at the most a dividing line, column direction comprises one or more dividing line;
Wherein, the same gate line of described display screen through each sub-block viewing area sequential control circuit common grid drive circuit, control corresponding source electrode drive circuit in the sequential control circuit of described each sub-block viewing area respectively based on corresponding sub-image data.
2. display unit according to claim 1, is characterized in that, described second processing unit comprises:
Convergent-divergent subelement, for before splitting a described frame image data, a described frame image data is carried out convergent-divergent to be processed into identical with the pixel value of described display screen, or is processed into identical with the pixel value of corresponding sub-block viewing area for each sub-image data being carried out convergent-divergent;
Frequency conversion subelement, for the refreshing frequency according to described display screen, carries out frequency-conversion processing to the frame frequency of a described frame image data or described N number of sub-image data.
3. display unit according to claim 2, it is characterized in that, described N number of sub-block viewing area comprises four the sub-block viewing areas be divided into by line direction and column direction, and drive described four sub-block viewing areas respectively by four sequencing control drive circuits, wherein, described four sub-block viewing areas comprise the first sub-block viewing area, the second sub-block viewing area, the 3rd sub-block viewing area and the 4th sub-block viewing area;
Sequencing control drive circuit corresponding to described first sub-block viewing area and described second sub-block viewing area shares the first grid drive circuit of the described display screen on a road, and the sequencing control drive circuit corresponding to described 3rd sub-block viewing area and described 4th sub-block viewing area shares the second grid drive circuit of display screen described in a road.
4. display unit according to claim 3, it is characterized in that, described first grid drive circuit starts the gate line of described first sub-block viewing area and described second sub-block viewing area, simultaneously, first sub-image data of the source electrode drive circuit write correspondence of described first sub-block viewing area, second sub-image data of the source electrode drive circuit write correspondence of described second sub-block viewing area, refresh the described first sub-image data of display and described second sub-image data;
Described second grid drive circuit is after described first sub-image data and described second sub-image data are refreshed, start the gate line of described 3rd sub-block viewing area and described 4th sub-block viewing area, simultaneously, 3rd sub-image data of the source electrode drive circuit write correspondence of described 3rd sub-block viewing area, 4th sub-image data of the source electrode drive circuit write correspondence of described 4th sub-block viewing area, refresh the described 3rd sub-image data of display and described 4th sub-image data.
5. display unit according to claim 3, it is characterized in that, described first grid drive circuit starts the gate line of described first sub-block viewing area and described second sub-block viewing area, simultaneously, first sub-image data of the source electrode drive circuit write correspondence of described first sub-block viewing area, second sub-image data of the source electrode drive circuit write correspondence of described second sub-block viewing area, refresh the described first sub-image data of display and described second sub-image data;
Described second grid drive circuit is while described first sub-image data and described second sub-image data are refreshed, start the gate line of described 3rd sub-block viewing area and described 4th sub-block viewing area, simultaneously, 3rd sub-image data of the source electrode drive circuit write correspondence of described 3rd sub-block viewing area, 4th sub-image data of the source electrode drive circuit write correspondence of described 4th sub-block viewing area, refresh the described 3rd sub-image data of display and described 4th sub-image data.
6. display unit according to any one of claim 1 to 5, it is characterized in that, a sequencing control drive circuit in described N number of sequencing control drive circuit is main drive circuit, all the other sequencing control drive circuits are from drive circuit, described main drive circuit sends synchronizing signal to described from drive circuit, synchronously drives the described display image data of display to make described N number of sequencing control drive circuit.
7. a display unit, it is characterized in that, comprise: the first processing unit, the second processing unit, N number of sequencing control drive circuit and display screen, described N number of sequencing control drive circuit drives the N number of sub-block viewing area in the viewing area of described display screen respectively, N be more than or equal to 2 integer, wherein
When described first processing unit receives the N frame sheet source data respectively from N road sheet source signal,
Described first processing unit, for carrying out data transaction to described N frame sheet source data, timesharing exports N frame image data, and to described second processing unit output chip source data switching signal;
Described second processing unit, for processing respectively described N frame image data according to described film source data exchange signal, exports N road display image data;
Described N number of sequencing control drive circuit, for driving N number of sub-block viewing area of described display screen based on the described N road display image data received; Or
When described first processing unit receives a frame sheet source data of a road sheet source signal,
Described first processing unit, for carrying out data transaction to a described frame sheet source data, obtains a frame image data;
Described second processing unit, for receiving a described frame image data, according to described N number of sub-block viewing area each sub-block viewing area shared by pixel ratio, a described frame image data is divided into N number of sub-image data accordingly, exports described N number of sub-image data;
Described N number of sequencing control drive circuit, for receiving described N number of sub-image data, based on described N number of sub-image data corresponding N number of sub-block viewing area driving described display screen respectively,
Described second processing unit, for according to the described view data size received and the data format of the described sub-image data that relation adjustment exports and frame frequency between picture frame frequency and display screen refreshing frequency.
8. display unit according to claim 7, is characterized in that, when described first processing unit receives the N frame sheet source data respectively from N road sheet source signal,
Described first processing unit is used for reading N frame sheet source data successively, is carrying out in the process of data transaction, read next frame sheet source data, export described N frame image data with timesharing former frame sheet source data.
9. display unit according to claim 7, is characterized in that, when described first processing unit receives the N frame sheet source data respectively from N road sheet source signal,
Described second processing unit, when reading the N frame image data of the subsequent time that described first processing unit exports, processed the N frame image data in a upper moment of having read and exported described N road display image data.
10. a television set, is characterized in that, comprises display unit as claimed in any one of claims 1-9 wherein.
CN201310144157.7A 2013-04-24 2013-04-24 A kind of display unit and television set CN103220478B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310144157.7A CN103220478B (en) 2013-04-24 2013-04-24 A kind of display unit and television set

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610087934.2A CN105554423B (en) 2013-04-24 2013-04-24 A kind of display device and television set
CN201310144157.7A CN103220478B (en) 2013-04-24 2013-04-24 A kind of display unit and television set

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN201610087934.2A Division CN105554423B (en) 2013-04-24 2013-04-24 A kind of display device and television set

Publications (2)

Publication Number Publication Date
CN103220478A CN103220478A (en) 2013-07-24
CN103220478B true CN103220478B (en) 2016-03-16

Family

ID=48817907

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201310144157.7A CN103220478B (en) 2013-04-24 2013-04-24 A kind of display unit and television set
CN201610087934.2A Active CN105554423B (en) 2013-04-24 2013-04-24 A kind of display device and television set

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN201610087934.2A Active CN105554423B (en) 2013-04-24 2013-04-24 A kind of display device and television set

Country Status (1)

Country Link
CN (2) CN103220478B (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104580094A (en) * 2013-10-21 2015-04-29 中兴通讯股份有限公司 Image transmission method and device
CN103809855A (en) * 2014-02-21 2014-05-21 联想(北京)有限公司 Data processing method and electronic equipment
CN104766562B (en) * 2015-04-16 2017-06-16 深圳市华星光电技术有限公司 The driving method and drive system of a kind of display panel
CN104810004A (en) * 2015-05-25 2015-07-29 合肥京东方光电科技有限公司 Clock signal generation circuit, grid driving circuit, display panel and display device
CN105786431A (en) 2016-03-04 2016-07-20 京东方科技集团股份有限公司 Jointing screen and method and device for achieving automatic distribution of display content of jointing screen
WO2018006192A1 (en) * 2016-07-02 2018-01-11 Intel Corporation A mechanism for providing multiple screen regions on a high resolution display
CN106484355A (en) * 2016-10-25 2017-03-08 长江龙新媒体有限公司 A kind of one screen multimode display methods of LED screen and system
CN108156409B (en) * 2016-12-06 2020-11-24 杭州海康威视数字技术股份有限公司 Image processing method, device and system
CN109032541A (en) * 2017-06-09 2018-12-18 京东方科技集团股份有限公司 Refresh rate method of adjustment and component, display device, storage medium
CN108040245A (en) * 2017-11-08 2018-05-15 深圳康得新智能显示科技有限公司 Methods of exhibiting, system and the device of 3-D view
CN108320694B (en) * 2018-03-28 2021-03-30 惠科股份有限公司 Display device and driving method
CN109218717A (en) * 2018-10-24 2019-01-15 武汉精立电子技术有限公司 A kind of ultrahigh resolution video play device and method

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3725499B2 (en) * 2002-07-10 2005-12-14 日本電信電話株式会社 Video signal conversion apparatus and method
TWI298470B (en) * 2005-12-16 2008-07-01 Chi Mei Optoelectronics Corp Flat panel display and the image-driving method thereof
CN101359123B (en) * 2007-07-31 2012-02-01 奇美电子股份有限公司 Backlight module, liquid crystal display and control method thereof
US7567228B1 (en) * 2008-09-04 2009-07-28 Au Optronics Corporation Multi switch pixel design using column inversion data driving
CN101382681B (en) * 2008-10-30 2010-12-08 友达光电股份有限公司 LCD and liquid crystal display panel thereof
CN101764982A (en) * 2008-12-23 2010-06-30 康佳集团股份有限公司 Method and device for processing high-definition video image
CN201681587U (en) * 2010-05-24 2010-12-22 北京京东方光电科技有限公司 Double-side liquid crystal display equipment
KR101707101B1 (en) * 2010-09-09 2017-02-28 삼성디스플레이 주식회사 Method of processing image data and display device performing the method
CN102081270B (en) * 2011-02-23 2012-07-18 深超光电(深圳)有限公司 Liquid crystal display device and driving method thereof

Also Published As

Publication number Publication date
CN103220478A (en) 2013-07-24
CN105554423A (en) 2016-05-04
CN105554423B (en) 2019-08-02

Similar Documents

Publication Publication Date Title
US9191655B2 (en) Image processing apparatus, image display apparatus and image display system
US8736533B2 (en) Cost-effective display methods and apparatuses
CN103181174B (en) Utilize 3D display device and the driving method thereof of barrier
CN102338953B (en) Image display device
KR20130133739A (en) Apparatus and method for displaying stereoscopic image
CN102081911B (en) Steroscopic image display device and driving method thereof
CN102378019B (en) Stereoscopic image display device and driving method thereof
JP5527217B2 (en) Image transmission system, image transmission apparatus, and image transmission method
TWI495326B (en) Stereoscopic image display device and driving method thereof
CN105427781B (en) Display device
US9330617B2 (en) Method of driving a display panel and display apparatus for performing the same
CN101866644B (en) Display controller, display device and image processing method
KR101613723B1 (en) Liquid crystal display
US9330592B2 (en) Pixel structure and display device comprising the same
CN102163408B (en) Image display device
KR101224460B1 (en) Stereoscopic image display and driving method thereof
JP5273478B2 (en) Video display device and video display system
EP2541951B1 (en) Three dimensional image display device and driving method thereof
CN102034448B (en) Image display device and method of driving image display device
KR101356321B1 (en) Image display device
Kim et al. 31.1: Invited Paper: World's First 240Hz TFT‐LCD Technology for Full‐HD LCD‐TV and Its Application to 3D Display
US10657861B2 (en) Display panel and its driving method and driving device
US8344979B2 (en) Method and apparatus for over-driving liquid crystal display
JP5367063B2 (en) 3D display device driving method and 3D display device
US6831624B1 (en) Time sequentially scanned display

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP01 Change in the name or title of a patent holder
CP01 Change in the name or title of a patent holder

Address after: 266555 Qingdao economic and Technological Development Zone, Shandong, Hong Kong Road, No. 218

Patentee after: Hisense Video Technology Co.,Ltd.

Address before: 266555 Qingdao economic and Technological Development Zone, Shandong, Hong Kong Road, No. 218

Patentee before: HISENSE ELECTRIC Co.,Ltd.