CN114035758A - Image mosaic display system and image mosaic display method - Google Patents
Image mosaic display system and image mosaic display method Download PDFInfo
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- CN114035758A CN114035758A CN202110851668.7A CN202110851668A CN114035758A CN 114035758 A CN114035758 A CN 114035758A CN 202110851668 A CN202110851668 A CN 202110851668A CN 114035758 A CN114035758 A CN 114035758A
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- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
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Abstract
The invention relates to an image mosaic display system and an image mosaic display method, wherein the image mosaic display system comprises: the image splicing display system provided by the embodiment firstly horizontally segments the original image into horizontal and transverse sub-images and then vertically segments the sub-images into display images, so that the image segmentation is simple and feasible; and the received original image is directly segmented, and the finally obtained display image is directly transmitted to the display module to be displayed without tedious buffer temporary storage, so that image splicing display steps are reduced, the display effect is improved, the image splicing display cost is reduced, and further the user experience is improved.
Description
Technical Field
The invention relates to the technical field of semiconductor display, in particular to an image splicing display system and an image splicing display method.
Background
At present, in an image mosaic display system, a large screen is assembled by a small screen display module, and then the large screen is combined to display a complete image, and the small screen of the block is to be coordinated to display a complete image or video, which generally includes: image buffer, image segmentation, transmission, reception, synchronization and display; the system of lighting a lamp on the present market can both realize the tiled display function, but all are loaded down with trivial details usually, including sending end and receiving terminal in the tiled display system, and wherein the sending end includes: DDR (Double Data Rate SDRAM) buffering (Buffer), dividing, Data string conversion, network transmission and other steps; the receiving end includes: the method comprises the steps of network receiving, data deserializing, image DDR (buffer) storing, synchronization, display and the like, and the conventional image splicing display has a plurality of steps and complicated image segmentation steps, so that the display effect is poor, and the image splicing display cost is high.
Therefore, how to reduce the steps of image mosaic display and improve the display effect is an urgent problem to be solved.
Disclosure of Invention
In view of the foregoing disadvantages of the related art, an object of the present application is to provide an image mosaic display system and an image mosaic display method, which aim to solve the problems of multiple image mosaic display steps and poor display effect in the prior art.
An image stitching display system, comprising: the image receiving module is connected with the M display modules; the image sending module is used for horizontally dividing the received original image into N sub-images and sending the sub-images to the corresponding image receiving modules, wherein one sub-image corresponds to one image receiving module; the image receiving module is used for vertically dividing the received sub-images into M display images and sending the display images to the corresponding display modules, and one display image corresponds to one display module; and the display module is used for displaying according to the received display image.
The image splicing display system comprises an image sending module and N image receiving modules, wherein the image sending module is used for sending a sub-image obtained by horizontally dividing an original image to the corresponding image receiving module, and the image receiving module is used for directly sending a display image to the corresponding display module for displaying after vertically dividing the received sub-image; and the received original image is directly segmented, and the finally obtained display image is directly transmitted to the display module for display without tedious buffer temporary storage, so that image splicing display steps are reduced, the display effect is improved, the image splicing display cost is reduced, and further the user experience is improved.
Optionally, the image mosaic display system further comprises: a calculation module; and the calculating module is used for dividing the display enabling signals of the original image into N display enabling signal effective areas according to the number of the image receiving modules.
Optionally, the image sending module includes: a first control chip; and the first control chip is used for horizontally dividing the original image according to the display enabling signal effective area when receiving the field synchronizing signal to obtain N sub-images and sending the sub-images to the corresponding image receiving module.
Optionally, the first control chip is: a field programmable gate array.
According to the image splicing display system, when the first control chip in the image sending module is the field programmable gate array, the original image is directly segmented based on the FPGA to obtain the sub-images, and the sub-images are transmitted to the image receiving module, tedious Buffer temporary storage is not needed, the image splicing display step is reduced, and meanwhile, the Buffer temporary storage is avoided, so that the image splicing display cost is saved.
Optionally, the calculating module is further configured to divide the pixel clock signal of the sub-image into M pixel clock signal effective areas according to the number of the display modules.
Optionally, the image receiving module comprises: a second control chip; and the second control chip is used for vertically dividing the sub-image according to the pixel clock signal effective area when receiving the line synchronization signal to obtain M display images and sending the display images to the display module.
Optionally, the second control chip is: a field programmable gate array.
According to the image splicing display system, when the second control chip in the image receiving module is the field programmable gate array, the sub-images are directly segmented based on the FPGA to obtain the display image, and the display image is transmitted to the display module, so that tedious Buffer temporary storage is not needed, the image splicing display step is reduced, and meanwhile, the Buffer temporary storage is avoided, and the image splicing display cost is saved.
Optionally, the image mosaic display system further comprises: a first RGB signal transmission line and a second RGB signal transmission line; the image sending module is connected with the image receiving module through the first RGB signal transmission line, and the first RGB signal transmission line is used for transmitting the sub-images to the corresponding image receiving module; the image receiving module is connected with the display module through the second RGB signal transmission line, and the second RGB signal transmission line is used for transmitting the display image to the display module.
In the image splicing display system, the resolution ratio of the sub-image obtained by the image sending module is small, the sub-image can be sent to the corresponding image receiving module directly through the first RGB signal transmission line between the image sending module and the image receiving module, the display image obtained by the image receiving module by segmenting the sub-image can be directly transmitted to the display module through the second RGB signal transmission line, the complex network communication and network hardware are omitted, the steps of network transmission in the image splicing display are reduced, the cost of the image splicing display is saved, meanwhile, the loss of the information source transmission through the RGB signal transmission line is small, and the display effect of the image splicing display is improved.
Based on the same inventive concept, the application also provides an image splicing display method, which comprises the following steps: an image sending module horizontally divides a received original image into N lines of sub-images, and sends the sub-images to corresponding image receiving modules, wherein one sub-image corresponds to one image receiving module; the image receiving module vertically divides the received sub-images into M display images and sends the display images to display modules, wherein one display image corresponds to one display module; and the display module is used for displaying according to the received display image.
According to the image splicing display method, the original image is horizontally segmented through the image sending module to obtain the sub-images, and then the sub-images are sent to the corresponding image receiving modules, the sub-images are vertically segmented through the image receiving modules to obtain the display images, and then the display images are directly sent to the corresponding display modules to be displayed; and the received original image is directly segmented, and the finally obtained display image is directly transmitted to the display module for display without tedious buffer temporary storage, so that image splicing display steps are reduced, the display effect is improved, the image splicing display cost is reduced, and further the user experience is improved.
Optionally, the sending the sub-image to the corresponding image receiving module includes: sending the sub-images to the corresponding image receiving modules through first RGB signal transmission lines between the image sending modules and the image receiving modules; the sending the display image to a display module comprises: and sending the display image to the display module through a second RGB signal transmission line between the image receiving module and the display module.
Drawings
Fig. 1 is a schematic diagram of a basic structure of an image stitching display system according to an embodiment of the present invention;
FIG. 2 is a timing diagram of RGB video signals according to an embodiment of the present invention;
FIG. 3 is a basic diagram of a DEN transverse uniform segmentation of an original image according to an embodiment of the present invention;
fig. 4 is a basic diagram illustrating vertical and uniform partitioning of a PLCK of a sub-image according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a display module according to an embodiment of the present invention;
FIG. 6-1 is a schematic diagram of an image stitching display system according to an embodiment of the present invention;
FIG. 6-2 is a schematic diagram of another image stitching display system according to an embodiment of the present invention;
FIG. 7 is a basic diagram of an actual image corresponding to an RGB time sequence according to an embodiment of the present invention;
FIG. 8 is a basic diagram of a horizontally segmented original image according to an embodiment of the present invention;
fig. 9 is a basic diagram of vertically dividing a sub-image according to an embodiment of the present invention;
fig. 10 is a schematic basic flowchart of an image stitching display method according to another alternative embodiment of the present invention;
description of reference numerals:
the system comprises an image sending module, an image receiving module and a display module, wherein the image sending module, the image receiving module and the display module are arranged in the image sending module 1.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
At present, the image mosaic display comprises a sending end and a receiving end, wherein the sending end comprises: DDR (buffer) image storage, segmentation, data string conversion, network transmission and other steps; the receiving end includes: the method comprises the steps of network receiving, data deserializing, image DDR (buffer) storing, synchronization, display and the like, and the conventional image splicing display has multiple and complex steps, and the transmission speed is limited by a network, so that the display speed is low, the display effect is poor and the cost is high.
Based on this, the present application intends to provide a solution to the above technical problem, the details of which will be explained in the following embodiments.
Examples of the invention
In order to solve the problems of multiple image mosaic display steps and poor display effect in the related art, an embodiment of the present invention provides an image mosaic display system, please refer to fig. 1, which includes but is not limited to: an image transmitting module 1, N (e.g., N >1) image receiving modules 2, one said image receiving module 2 being connected to M (e.g., M >2) display modules 3; the image sending module 1 is configured to horizontally divide a received original image into N sub-images, and send the sub-images to the corresponding image receiving modules 2, where one sub-image corresponds to one image receiving module 2; the image receiving module 2 is configured to vertically divide the received sub-image into M display images, and send the display images to the corresponding display modules 3, where one display image corresponds to one display module 3; and the display module 3 is configured to display according to the received display image.
The image mosaic display system provided by the embodiment comprises an image sending module 1 and N image receiving modules 2, wherein the image sending module 1 is used for horizontally dividing an original image to obtain sub-images and then sending the sub-images to the corresponding image receiving modules 2, and the image receiving modules 2 are used for vertically dividing the sub-images to obtain display images and then directly sending the display images to the corresponding display modules 3 for display; and the received original image is directly segmented, and the finally obtained display image is directly transmitted to the display module 3 for display without tedious buffer temporary storage, so that image splicing display steps are reduced, the display effect is improved, the image splicing display cost is reduced, and further the user experience is improved.
It should be understood that, as shown in fig. 2, fig. 2 is a timing diagram of RGB image signals, and as shown, the image frame of the original image includes a field sync signal (VSYNC), a line sync signal (HSYNC), a display enable signal (DEN), a pixel clock signal (PCLK), and DATA, wherein the field sync signal serves as the start of one frame of image; the line synchronizing signal is used as the start of a line of image, when the DEN signal is effective, the image starts to be transmitted and displayed on a screen, one DEN effective area represents one line of image display, one pixel clock signal corresponds to one pixel, and the DATA is RGB image DATA. It should be understood that the number of image receiving modules 2 is N, which means that there are N rows of display modules 3, and the number of display modules 3 is M, which means that there are M columns of display modules 3.
In some examples of this embodiment, the image mosaic display system further comprises: a calculation module; the calculating module is used for dividing the display enabling signals of the original images into N display enabling signal effective areas according to the number of the image receiving modules 2; for example, taking the original image with 4K (3840 × 2160) pixels (the image has 2160 DEN signals, 3840 PCLK signals, one DEN corresponds to one row pixel, one PCLK corresponds to one column pixel), taking the number of image receiving modules 2 as 8 for illustration, the number of image receiving modules 2 as 8 has 8 display enable signal valid areas (the number of display enable signal valid areas corresponds to the number of image receiving modules 2), as shown in fig. 3, the 2160 display enable signals are evenly divided into 8 display enable signal valid areas, each display enable signal valid area has 270 rows of display enable signals, the first display enable signal valid area includes the display enable signals of 0-270 rows, the second display enable signal valid area includes the display enable signals of 271-th and so on, the eighth display enable signal valid area includes the display enable signals of lines 1891 and 2160, and the 2160 display enable signals of the original image are divided into 8 display enable signal valid areas.
In some examples of the present embodiment, the image transmission module 1 includes: a first control chip; the first control chip is used for horizontally dividing the original image according to the display enabling signal effective area when receiving the field synchronizing signal to obtain N sub-images, and sending the sub-images to the corresponding image receiving module 2; for example, in the above example, the first control chip detects the field sync signal, uses the field sync signal as the start signal, then uses the DEN signal as the number of horizontal divisions, and when detecting the 0-270 th DEN (i.e. 270 lines, the first display enable signal valid area) it will be the 0 th horizontal division sub-image and transmit it out, similarly, when detecting the 271 th and 540 th DEN (i.e. 270 lines, the second display enable signal valid area) it will be the 1 st horizontal division sub-image and transmit it out, and so on, the 1891 st and 2160 th DEN signals will be the 7 th horizontal division and transmit it out, so the original image will be divided into 8 parallel halves, it should be understood that in some examples, the first control chip may divide the original image into one sub-image and transmit it to the corresponding image receiving module 2, the first control chip may also divide the original image into N sub-images, the respective partial images are then synchronously transmitted to the corresponding image reception modules 2.
It should be understood that, in some examples, the image mosaic display system can directly calculate through the image transmission module 1 and then divide the display enable signal of the original image into N display enable signal valid regions, without separately providing a calculation module.
In some examples of this embodiment, the first control chip is: the Field Programmable Gate Array (FPGA) and the image splicing display system provided by the embodiment can directly divide an original image based on the FPGA to obtain sub-images, and transmit the sub-images to the image receiving module 2 without the need of temporary storage of a complicated Buffer, thereby reducing the image splicing display steps, and simultaneously saving the cost of image splicing display due to the fact that the temporary storage of the Buffer is avoided.
In some examples of this embodiment, the calculating module is further configured to divide the pixel clock signal of the sub-image into M pixel clock signal effective areas according to the number of the display modules 3; for example, taking 4K pixels (3840 × 2160) of the original image and 16 display modules 3 as an example, 3840 pixels of the original image indicates that each sub-image has 3840 columns of pixel clock signals (PCLK signals), 16 display modules 3 have 16 pixel clock signal valid areas (corresponding to the number of display modules 3), and as shown in fig. 4, 3840 pixel clock signals are uniformly divided into 16 pixel clock signal valid areas, and each pixel clock signal valid area has 240 pixel clock signals; that is, the first pixel clock signal effective area includes the pixel clock signals of the 0 th to 240 th columns, the second pixel clock signal effective area includes the pixel clock signals of the 241 th and 480 th columns, and so on, the 16 th pixel clock signal effective area includes the pixel clock signals of the 3601 th and 3840 th columns, and then the 3840 th pixel clock signals of the original image are divided into 16 pixel clock signal effective areas.
In some examples of the present embodiment, the image receiving module 2 includes: a second control chip; the second control chip is configured to, when receiving a line synchronization signal, vertically divide the sub-image according to the pixel clock signal effective area to obtain M display images, and send the display images to the display module 3; for example, in the above example, the second control chip detects the horizontal synchronization signal (HSYNC), which is used as the start of a sub-image (a row of images), and uses the HSYNC as the start signal, then uses the PLCK signal as the number of vertical divisions, when detecting the PLCK of the 0-240 rows (i.e. 240 rows, the first effective pixel clock signal area) as the 0 th vertical division display image and transmits it out, and simultaneously generates the RGB control signal of the 0 th display image to drive the display module 3 for display, similarly, when detecting the 241-th 480-th PLCK (i.e. 240 rows, the second effective pixel clock signal area) as the 1 st vertical division display image and transmits it out, and simultaneously generates the RGB control signal of the 1 st display image to drive the second display module 3 for display, and so on, the PLCK of the 1-th 3840-th pixel clock signal is used as the 15 th vertical division display image and transmits it out, and simultaneously generates the RGB control signal of the 15 th display image to drive the RGB control signal of the RGB display module The 16 th display module 3 performs display, so that the sub-image is vertically divided into 16 equal parts; it should be understood that, in some examples, the image receiving module 2 may transmit one display image to the corresponding display module 3 after being divided, and the image receiving module 2 may also transmit each sub-image to the corresponding display module 3 synchronously after dividing the sub-image into M display images.
It should be understood that the processing of the image by the image receiving module 2 is not limited to the vertical halving manner, and may also be a non-halving manner, and is not limited in particular here.
It should be understood that, in some examples, the image mosaic display system directly divides the pixel clock signals of the sub-images into M pixel clock signal effective areas according to the number of the display modules 3 through the image receiving module 2, and does not need to separately provide a calculation module.
In some examples of this embodiment, the second control chip is: the Field Programmable Gate Array (FPGA) directly segments the subimages based on the FPGA to obtain a display image, and transmits the display image to the display module 3 without tedious Buffer temporary storage, thereby reducing the step of image splicing display, and simultaneously saving the cost of image splicing display due to avoiding the temporary storage of the Buffer.
In some examples of this embodiment, the image mosaic display system further comprises: a first RGB signal transmission line and a second RGB signal transmission line; it should be understood that the first RGB signal transmission line and the second RGB signal transmission line are only used to distinguish the signal transmission lines between different modules, and the present embodiment is not limited to the material, specification, and other parameters of the first RGB signal transmission line and the second RGB signal transmission line, that is, other parameters of the first RGB signal transmission line and the second RGB signal transmission line may be the same or different.
In the above example, the image sending module 1 is connected to the image receiving module 2 through the first RGB signal transmission line, and the first RGB signal transmission line is configured to transmit the sub-image to the corresponding image receiving module 2. For example, in the above example, when the image sending module 1 detects the 0 th to 270 th DEN (i.e. 270 th row, the first display enable signal effective area) as the 0 th horizontal division sub-image, and transmits the 0 th horizontal division sub-image to the image receiving module 2 through the first RGB signal transmission line between the image receiving modules 2 corresponding to the sub-image, when the 271 th and 540 th DEN (i.e. 270 th row, the second display enable signal effective area) are detected as the 1 st horizontal division sub-image, and transmits the 1 st horizontal division sub-image to the corresponding image receiving module 2 through the first RGB signal transmission line between the image receiving modules 2 corresponding to the sub-image, and so on, the 1891 st and 2160 th horizontal division sub-image is transmitted to the corresponding image receiving module 2 through the first RGB signal transmission line between the receiving modules corresponding to the sub-image.
In some examples of this embodiment, the sub-image is sent to the corresponding image receiving module 2 through the first RGB signal transmission line between the image sending module 1 and the image receiving module 2, the resolution of the sub-image obtained by segmentation is small, and the sub-image can be directly transmitted through the first RGB signal transmission line, so that cumbersome network communication and network hardware are omitted, the steps of network transmission in image mosaic display are reduced, the cost of image mosaic display is saved, meanwhile, the loss of the transmission source through the first RGB signal transmission line is small, and the display effect of image mosaic display is improved.
In some examples of the present embodiment, the image receiving module 2 is connected to the display module 3 through the second RGB signal transmission line, and the second RGB signal transmission line is used for transmitting the display image to the display module 3. For example, in the above example, when the image receiving module 2 detects that the PLCK in the 0 th to 240 th rows (i.e. the 240 th row, the first pixel clock signal valid area) is used as the 0 th vertical division display image, the PLCK is transmitted to the 3601 th and 3840 th display module 3 … through the second RGB signal transmission line between the display modules 3 corresponding to the 0 th display image and is used as the 15 th horizontal division sub-image, and the PLCK is transmitted to the corresponding display module 3 through the second RGB signal transmission line connected to the 16 th display module 3.
In some examples of this embodiment, through people's RGB signal transmission line between image receiving module 2 and the display module 3 sends the display image for corresponding display module 3, wherein, the display image resolution that image receiving module 2 cut apart and obtains is little, can directly transmit through second RGB signal transmission line, loaded down with trivial details network communication and network hardware have been saved, the step of network transmission in the image mosaic display has been reduced, the cost of image mosaic display has been practiced thrift, simultaneously, it is little to transmit the information source loss through second RGB signal transmission line, the display effect of image mosaic display has been promoted.
In some examples of this embodiment, the display module 3 is configured to perform display according to the received display image, and it should be understood that when the display module 3 receives the display image, it also receives corresponding RGB control signals, and the display module 3 performs display according to the received RGB control signals and the display image, as shown in fig. 5.
For better understanding of the present invention, the present embodiment provides a more specific example to explain the present invention, and referring to fig. 6-1 and 6-2, the present embodiment provides an image mosaic display system, which comprises: the image transmission module 1 is connected with 8 image receiving modules 2 connected with the image transmission module 1, and one image receiving module 2 is connected with 16 display modules 3; the image actually corresponding to the RGB time sequence is shown in fig. 7, and the present invention is described by taking the example of performing mosaic display on a 4K (3840x2160) image;
the image sending module 1 adopts an FPGA, the image sending module 1 detects a field synchronization signal, VSYNC is used as a starting signal, DEN signals are used as transverse division quantity, 270 DEN (270 lines) are used as 0 th horizontal division sub-image and transmitted out through an RGB signal transmission line when detected, and similarly, 271 and 540 DEN (270 lines) are used as 1 st horizontal division sub-image and transmitted out through an RGB signal transmission line and so on, and 1891 and 2160 are used as 8 th horizontal division sub-image and transmitted out through an RGB signal transmission line. Thus, the image was equally divided into 8 in parallel as shown in fig. 8.
The image receiving module 2 adopts an FPGA, the image receiving module 2 detects a line synchronization signal, the HSYNC is used as a starting signal, then PCLK & DEN signals (namely PCLK contained after DEN is effective) are divided as vertical division quantity, namely 0-240 is used as 0 th display image division and is transmitted out through an RGB signal transmission line, and meanwhile RGB control signals of the 0 th image are generated; 241 st plus 480 as the 1 st image is divided and transmitted out through the RGB signal transmission line, and simultaneously generates the RGB control signal of the 1 st image, and so on, 3601 st plus 3840 as the 15 th image is divided and transmitted out through the RGB signal transmission line, and simultaneously generates the RGB control signal of the 15 th image. This vertically divides the horizontal image into equal 16 parts as shown in fig. 9.
As shown in fig. 5, the image receiving module 2 divides the corresponding sub-image into display images with corresponding module resolutions, and then sends the display images to the corresponding display modules 3 through RGB data lines, and simultaneously drives the display modules 3 to display the divided images through the RGB control signals corresponding to the display modules 3.
In the image stitching display system provided by the embodiment, the image is horizontally divided into 8 sub-images by the image sending module, and each corresponding sub-image is sequentially divided into 16 display images by the image receiving module, so that the division is simpler and faster; meanwhile, the image sending module and the image receiving module adopt FPGA to capture VSYNC and HSYNC synchronous signals of an original image, and all the modules are based on the synchronous signals, so that the synchronization is simple, and synchronous software and hardware resources are not required to be added. Meanwhile, the small modules are low in image resolution after being segmented, can be directly transmitted through corresponding RGB signal transmission lines, and then are driven according to control signals, traditional network communication is not needed, the steps of image splicing display are reduced, the cost of image splicing display is reduced, and the display effect of image splicing display is improved.
Another alternative embodiment of the invention:
the embodiment of the present invention further provides an image stitching display method, as shown in fig. 10, which includes, but is not limited to:
s101, an image sending module horizontally divides a received original image into N lines of sub-images and sends the sub-images to a corresponding image receiving module;
it should be understood that one image sending module is connected to N image receiving modules, one image receiving module is connected to M display modules, and one of the sub-images corresponds to one of the image receiving modules;
s102, the image receiving module vertically divides the received sub-images into M display images and sends the display images to a display module;
it should be understood that one of the display images corresponds to one of the display modules;
and S103, the display module displays according to the received display image.
In some examples of this embodiment, the sending the sub-images to the corresponding image receiving modules includes: sending the sub-images to the corresponding image receiving modules through first RGB signal transmission lines between the image sending modules and the image receiving modules; the sending the display image to a display module comprises: and sending the display image to the display module through a second RGB signal transmission line between the image receiving module and the display module.
The image sending module and the image receiving module respectively adopt FPGA, the image sending module captures VSYNC signals of an original image through the FPGA to serve as starting signals for dividing the original image, the received original image is horizontally divided into N lines of sub-images, and the sub-images are sent to the corresponding image receiving modules through the corresponding RGB signal transmission lines; the image receiving module captures HSYNC synchronizing signals of all the sub-images through the FPGA, the sub-images received as starting signals are vertically divided into M display images, and the display images are sent to the display module through corresponding RGB signal transmission lines.
In some examples of this embodiment, the image sending module and the image receiving module use FPGAs to capture VSYNC and HSYNC synchronization signals of an original image, and all modules are based on the synchronization signals, so that synchronization is simple without increasing synchronization software and hardware resources. Meanwhile, the small modules are low in image resolution after being segmented, can be directly transmitted through corresponding RGB signal transmission lines, and then are driven according to control signals, traditional network communication is not needed, the steps of image splicing display are reduced, the cost of image splicing display is reduced, and the display effect of image splicing display is improved.
The present embodiments also provide a computer-readable storage medium including volatile or non-volatile, removable or non-removable media implemented in any method or technology for storage of information such as computer-readable instructions, data structures, computer program modules or other data. Computer-readable storage media include, but are not limited to, RAM (Random Access Memory), ROM (Read-Only Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory), flash Memory or other Memory technology, CD-ROM (Compact disk Read-Only Memory), Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer.
The computer readable storage medium in this embodiment may be used to store one or more computer programs, and the stored one or more computer programs may be executed by a processor to implement at least one step of the image stitching display method in the above-described embodiment.
It will be apparent to those skilled in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software (which may be implemented in computer program code executable by a computing device), firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit.
In addition, communication media typically embodies computer readable instructions, data structures, computer program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to one of ordinary skill in the art. Thus, the present invention is not limited to any specific combination of hardware and software.
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.
Claims (10)
1. An image stitching display system, comprising:
the image receiving module is connected with the M display modules;
the image sending module is used for horizontally dividing the received original image into N sub-images and sending the sub-images to the corresponding image receiving modules, wherein one sub-image corresponds to one image receiving module;
the image receiving module is used for vertically dividing the received sub-images into M display images and sending the display images to the corresponding display modules, and one display image corresponds to one display module;
and the display module is used for displaying according to the received display image.
2. The image-tiled display system of claim 1, wherein the image-tiled display system further comprises: a calculation module;
and the calculating module is used for dividing the display enabling signals of the original image into N display enabling signal effective areas according to the number of the image receiving modules.
3. The image stitching display system of claim 2, wherein the image sending module comprises: a first control chip;
and the first control chip is used for horizontally dividing the original image according to the display enabling signal effective area when receiving the field synchronizing signal to obtain N sub-images and sending the sub-images to the corresponding image receiving module.
4. The image stitching display system of claim 3, wherein the first control chip is: a field programmable gate array.
5. The image stitching display system of claim 2, wherein the computing module is further configured to divide the pixel clock signals of the sub-images into M pixel clock signal active areas according to the number of the display modules.
6. The image stitching display system of claim 5, wherein the image receiving module comprises: a second control chip;
and the second control chip is used for vertically dividing the sub-image according to the pixel clock signal effective area when receiving the line synchronization signal to obtain M display images and sending the display images to the corresponding display modules.
7. The image stitching display system of claim 6, wherein the second control chip is: a field programmable gate array.
8. The image-stitching display system according to any one of claims 1-7, further comprising: a first RGB signal transmission line and a second RGB signal transmission line;
the image sending module is connected with the image receiving module through the first RGB signal transmission line, and the first RGB signal transmission line is used for transmitting the sub-images to the corresponding image receiving module;
the image receiving module is connected with the display module through the second RGB signal transmission line, and the second RGB signal transmission line is used for transmitting the display image to the display module.
9. An image mosaic display method is characterized by comprising the following steps:
an image sending module horizontally divides a received original image into N lines of sub-images, and sends the sub-images to corresponding image receiving modules, wherein one sub-image corresponds to one image receiving module;
the image receiving module vertically divides the received sub-images into M display images and sends the display images to display modules, wherein one display image corresponds to one display module;
and the display module displays according to the received display image.
10. The image mosaic display method of claim 9,
the sending the sub-images to the corresponding image receiving modules comprises: sending the sub-images to the corresponding image receiving modules through first RGB signal transmission lines between the image sending modules and the image receiving modules;
the sending the display image to a display module comprises: and sending the display image to the display module through a second RGB signal transmission line between the image receiving module and the display module.
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