WO2022077941A1 - 套刻精度的控制方法和装置 - Google Patents

套刻精度的控制方法和装置 Download PDF

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Publication number
WO2022077941A1
WO2022077941A1 PCT/CN2021/100189 CN2021100189W WO2022077941A1 WO 2022077941 A1 WO2022077941 A1 WO 2022077941A1 CN 2021100189 W CN2021100189 W CN 2021100189W WO 2022077941 A1 WO2022077941 A1 WO 2022077941A1
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Prior art keywords
layer
wafers
current
batch
overlay error
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English (en)
French (fr)
Inventor
周晓方
章杏
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Changxin Memory Technologies Inc
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Changxin Memory Technologies Inc
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Priority to US17/454,242 priority Critical patent/US11803128B2/en
Publication of WO2022077941A1 publication Critical patent/WO2022077941A1/zh
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605Workpiece metrology
    • G03F7/70616Monitoring the printed patterns
    • G03F7/70633Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically

Definitions

  • a first aspect of the present application provides a method for controlling overlay accuracy, comprising: determining that a similar layer exists in a current layer, wherein the similar layer and the current layer at least satisfy the following conditions: the current layer and the current layer
  • the similar layers are all aligned with respect to the same reference layer, and the overlay accuracy requirements of the current layer and the similar layers are both relative to the reference layer; according to the overlay error of the current batch of wafers on the similar layers value, and/or the overlay error value of the previous batch of wafers in the similar layer, determine the overlay error compensation value of the current batch of wafers in the current layer; use the current batch of wafers in the The overlay error compensation value of the current layer performs a photolithography process on the current layer of the current batch of wafers.
  • a second aspect of the present application provides an apparatus for controlling overlay accuracy, comprising: the similar layer and the current layer satisfy at least the following condition: both the current layer and the similar layer are relative to the same reference layer alignment, the overlay accuracy requirements of the current layer and the similar layer are both relative to the reference layer; the second module is used for the overlay error value of the similar layer according to the current batch of wafers, and /or the overlay error value of the previous batch of wafers in the similar layer, to determine the overlay error compensation value of the current batch of wafers in the current layer; a lithography module for using the current batch of wafers A photolithography process is performed on the current layer of the current batch of wafers with the compensation value of the overlay error of the wafer in the current layer.
  • a third aspect of the present application provides an electronic device, comprising: at least one processor and a memory;
  • the memory stores computer-executable instructions
  • the at least one processor executes computer-executable instructions stored in the memory to cause the at least one processor to perform the method as described in the first aspect of the present application.
  • a fourth aspect of the present application provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and when the computer-executable instructions are executed by a processor, are used to implement The method described in one aspect.
  • a fifth aspect of the present application provides a computer program product, comprising a computer program that, when executed by a processor, implements the method described in the first aspect of the present application.
  • the overlay error compensation value of the current layer before determining the overlay error compensation value of the current layer, it is first determined whether there is a similar layer in the current layer, wherein the current layer and the similar layer are paired with respect to the same reference layer. and the overlay accuracy requirements of both are relative to the reference layer; if there is a similar layer in the current layer, the overlay error value of the current batch of wafers in the similar layer and/or the previous batch of wafers in the similar layer Determine the overlay error compensation value of the current batch of wafers in the current layer; use the overlay error compensation value of the current batch of wafers in the current layer to perform the photolithography process on the current layer of the current batch of wafers .
  • the method can use the overlay error value of the current batch of wafers and/or the previous batch of wafers on similar layers as reference data, thereby enriching the reference data and improving the accuracy of the overlay error compensation value.
  • Embodiment 1 is a flowchart of a method for controlling overlay accuracy provided in Embodiment 1 of the present application;
  • FIG. 3 is a schematic diagram of performing overlay error compensation on layer B and layer C by a method according to an embodiment of the present application;
  • FIG. 4 is a schematic structural diagram of an overlay accuracy control device according to Embodiment 2 of the present application.
  • An embodiment of the present application provides a method for controlling overlay accuracy.
  • the overlay error value of one layer is used as reference data to determine the overlay error compensation value of the other layer, thereby increasing the reference data of the overlay error compensation value, and finally making the overlay error compensation value more accurate.
  • Embodiment 1 is a flowchart of a method for controlling overlay accuracy provided in Embodiment 1 of the present application, and the method in this embodiment includes the following steps:
  • the photolithography process is performed on layer A before layer B, the photolithography process on layer B is performed before layer C, and the alignment mark is located in layer A.
  • the photolithography machine All are aligned using the alignment marks formed on the upper layer A of the wafer. Meanwhile, the overlay accuracy requirements of layer B and layer C are both relative to layer A.
  • the overlay accuracy between layer A, layer B, and layer C includes the overlay accuracy of layer B to layer A, the overlay accuracy of layer C to layer A, and the overlay accuracy of layer C to layer B, and the overlay accuracy of layer B
  • the overlay accuracy requirements of layer C and layer C are both relative to layer A, which means that in the overlay accuracy control, it is necessary to compensate the overlay error of layer B to layer A and the overlay error of layer C to layer A, so that the overlay of layer B to layer A needs to be compensated.
  • the engraving error and the overlay error of layer C to layer A are within the preset range.
  • layer A is the reference layer
  • layer C is the current layer
  • layer B is a similar layer to layer C.
  • similar layers include multiples. For example, layer B' is exposed after layer B and before layer C, and the alignment mark when layer B' is exposed is the alignment mark in layer A, then the overlay accuracy of layer B' to layer A needs to be controlled within the pre-exposed alignment mark. within the setting range. Then layer B and layer B' are similar layers of layer C.
  • whether the overlay accuracy requirements of the current layer and the similar layer are both relative to the reference layer can be judged through the overlay error tree (Overlay tree) of the current layer and the similar layer.
  • the overlay error tree of the current layer is used to describe that the current layer measures and compensates the overlay marks of a certain layer on the wafer; if the overlay error trees of the current layer and the reference layer are the same, it means Both of them perform overlay error control with respect to the same layer, that is, the overlay accuracy requirements of both are relative to the reference layer.
  • the similar layer and the current layer also satisfy the following condition: the current layer and the similar layer use the same lithography machine.
  • S102 Determine the overlay error compensation value of the current batch of wafers at the current layer according to the overlay error value of the current batch of wafers on the similar layer and/or the overlay error value of the previous batch of wafers at the similar layer.
  • the current batch of wafers is the first batch of wafers.
  • the current batch of wafers is the first batch of wafers produced off the production line.
  • the previous batch of wafers does not exist in the current batch of wafers.
  • the overlay error compensation value of the current batch of wafers on the current layer may be determined according to the overlay error value of the current batch of wafers on similar layers. Specifically, the overlay error value of the current batch of wafers in the similar layer to the reference layer can be measured by the overlay error measuring machine, and the overlay error value of the current batch of wafers in the similar layer can be calculated by using the overlay error value. Engraving error compensation value.
  • the compensation value of the overlay error of the current batch of wafers on the current layer to the reference layer may be the same as the compensation value of the overlay error of the current batch of wafers on a similar layer to the reference layer. Since the current batch of wafers is the first batch of wafers, when the photolithography process is performed on the current layer, there is no reference data to provide overlay error compensation.
  • the characteristics of similar layers and the current layer can be used to provide overlay error Compensation, the characteristics of the similar layer and the current layer, that is, the current layer and the similar layer are both aligned with respect to the same reference layer, and the overlay accuracy requirements of the current layer and the similar layer are both relative to the reference layer.
  • the current batch of wafers is not the first batch of wafers, that is, the current batch of wafers has a previous batch of wafers.
  • the engraving error value is used to determine the overlay error compensation value of the current batch of wafers on similar layers.
  • the overlay error measuring machine can be used to measure the overlay error value of the previous batch of wafers in the similar layer to the reference layer and the overlay error value of the current layer to the reference layer.
  • the overlay error value of the circle on the similar layer to the reference layer and the overlay error value of the previous batch of wafers on the current layer to the reference layer are calculated to obtain the compensation value of the overlay error of the previous batch of wafers on the similar layer to the reference layer and Overlay error compensation value for the reference layer in the current layer.
  • x is the compensation value of the overlay error of the previous batch of wafers in the similar layer
  • y is the compensation value of the overlay error of the previous batch of wafers in the current layer
  • A is the overlay error of the previous batch of wafers in the similar layer
  • the overlay error compensation value of the previous batch of wafers on the similar layer is determined according to the overlay error value of the previous batch of wafers on the similar layer, and the overlay error compensation value of the previous batch of wafers on the current layer is based on the previous batch of wafers.
  • the overlay error value of the sub-wafer in the current layer is determined, and the values of A and B can be preset.
  • the amount of data is enriched, so that the calculated overlay error compensation value of the current batch of wafers in the similar layer to the reference layer is more reasonable and accurate.
  • a and B are both 1/2, that is, the average value of the overlay error compensation value of the similar layer to the reference layer of the previous batch of wafers and the overlay error compensation value of the current layer to the reference layer is used as the current batch.
  • the compensation value of the overlay error of the reference layer on the similar layer of the wafer thus simplifying the calculation method of the compensation value of the overlay error.
  • the current batch of wafers is not the first batch of wafers, that is, if the current batch of wafers has previous batches of wafers, then according to the overlay error value of the current batch of wafers in similar layers, Determine the overlay error compensation value of the current batch of wafers in the current layer with the overlay error value of the previous batch of wafers in the similar layer, or, according to the overlay error value of the previous batch of wafers in the similar layer and the current layer, and the overlay error value of the current batch of wafers in similar layers, to determine the overlay error compensation value of the current batch of wafers in the current layer.
  • the overlay error value of the previous batch of wafers on the similar layer to the reference layer, and the overlay error value of the previous batch of wafers on the current layer to the reference layer can be measured by the overlay error measuring machine.
  • the overprinting error value of the current batch of wafers in similar layers to the reference layer can be measured by the overlay error measuring machine.
  • x is the compensation value of the overlay error of the previous batch of wafers in the similar layer
  • y is the compensation value of the overlay error of the previous batch of wafers in the current layer
  • z is the overlay error of the current batch of wafers in the similar layer Compensation value
  • A is the weight of the overlay error compensation value of the previous batch of wafers in the similar layer
  • B is the weight of the overlay error compensation value of the previous batch of wafers in the current layer
  • C is the current batch of wafers in the similar layer.
  • the overlay error compensation value of the previous batch of wafers on the similar layer is determined according to the overlay error value of the previous batch of wafers on the similar layer, and the overlay error compensation value of the previous batch of wafers on the current layer is based on the previous batch of wafers.
  • the overlay error value of the sub-wafer in the current layer is determined.
  • the overlay error compensation value of the current batch of wafers in the similar layer is determined according to the overlay error of the current batch of wafers in the similar layer.
  • A, B, C The value can be preset.
  • A, B, C are all 1/3.
  • B>A and/or B>C eg, B is 3/5, A is 1/5, and C is 1/5.
  • Increasing the weight of the overlay error compensation value of the current layer of the previous batch of wafers to the reference layer can partially compensate the overlay error caused by the photomask of the current layer, so that the calculated current batch of wafers is in the current layer.
  • the overlay error compensation value for the reference layer is more accurate.
  • the previous batch of wafers includes a previous batch of wafers or a plurality of previous batches of wafers.
  • the overlay error compensation value of the current batch of wafers on the current layer can be updated to the delivery value, and the lithography machine uses the updated delivery value to perform a lithography process on the current layer of the current batch of wafers.
  • pilot data is used as reference data to determine Compensation value for overlay error for layer B lithography of batch 1 wafers.
  • pilot data can be preset to 0.
  • the overlay error value of layer B of wafers in batch 1 is used as reference data, and the batch is determined according to the overlay error value of layer B in wafers in batch 1.
  • the overlay error compensation value of layer C of wafer 1 is used to perform the photolithography process using the overlay error compensation value of layer C of wafer batch 1.
  • the overlay error value of the layer B of the batch 1 wafer and the overlay error value of the layer C of the batch 1 wafer are used as reference data.
  • the overlay error value of layer B of wafer 1 and the overlay error value of layer C of wafer batch 1 determine the overlay error compensation value of layer B of wafer batch 2, using the layer of wafer batch 2
  • the lithography process is performed with the overlay error compensation value of B.
  • the overlay error value of layer B of batch 1 wafers, the overlay error value of layer C of batch 1 wafers, and the overlay error value of layer C of batch 1 wafers and the The overlay error value of layer B is used as reference data, according to the overlay error value of layer B of batch 1 wafers, the overlay error value of layer C of batch 1 wafers, and the overlay error value of layer B of batch 2 wafers
  • the engraving error value is determined, the overlay error compensation value of the layer C of the batch 2 wafers is determined, and the photolithography process is performed using the overlay error compensation value of the layer C of the batch 2 wafer.
  • the overlay error value of layer B of batch 2 wafers and the overlay error value of layer C of batch 2 wafers are used as reference data.
  • the overlay error value of layer B of wafer 2 and the overlay error value of layer C of wafer batch 2 determine the overlay error compensation value of layer B of wafer batch 3, using the layer of wafer batch 3
  • the lithography process is performed with the overlay error compensation value of B.
  • the overlay error value of layer B of batch 1 wafers, the overlay error value of layer C of batch 1 wafers, the overlay error value of layer B of batch 2 wafers and The overlay error values for layer C of batch 2 wafers are used as reference data.
  • the overlay error value of layer B of wafers in batch 1 and the overlay error value of layer B of wafers in batch 2 can also be used as reference data, or the layer of wafers in batch 1 can be used as reference data.
  • the overlay error value of C and the overlay error value of layer C of batch 2 wafers are used as reference data.
  • the overlay error value of layer B of batch 2 wafers, the overlay error value of layer C of batch 2 wafers and the The overlay error value of layer B is used as reference data, according to the overlay error value of layer B of batch 2 wafers, the overlay error value of layer C of batch 2 wafers, and the overlay error value of layer B of batch 3 wafers
  • the engraving error value is determined, the overlay error compensation value of the layer C of the batch 3 wafers is determined, and the photolithography process is performed using the overlay error compensation value of the layer C of the batch 3 wafers.
  • the overlay error value of layer B of batch 1 wafers, the overlay error value of layer C of batch 1 wafers, the overlay error value of layer B of batch 2 wafers, the batch The overlay error value of layer C of the second wafer and the overlay error value of layer B of the batch 3 wafer are taken as reference data as reference data.
  • the overlay error values of batch 1 wafers in layer B and layer C, the overlay error values of batch 2 wafers in layer B and layer C, and the overlay error of batch 3 wafers in layer B can be taken Any one, two, three or four of the data are used as reference data.
  • the overlay error value of the circle on a similar layer, and/or the overlay error value of the previous batch of wafers in a similar layer determine the overlay error compensation value of the current batch of wafers in the current layer; using the current batch of wafers in the
  • the overlay error compensation value of the current layer performs the photolithography process on the current layer of the current batch of wafers.
  • the method can use the overlay error value of the current batch of wafers and/or the previous batch of wafers on similar layers as reference data, thereby enriching the reference data and improving the accuracy of the overlay error compensation value.
  • the first module 31 is configured to determine that a similar layer exists in the current layer, wherein the similar layer and the current layer satisfy at least the following conditions: both the current layer and the similar layer are aligned with respect to the same reference layer, the The overlay accuracy requirements of the current layer and the similar layer are both relative to the reference layer;
  • the method further includes: a third module, configured to determine whether the current batch of wafers is in the Compensation value for overlay error of a similar layer; the lithography module is further configured to use the compensation value for overlay error of the current batch of wafers in the similar layer to align the similar layer of the current batch of wafers Perform photolithography.
  • the second module 32 is specifically configured to: according to the overlay error value of the previous batch of wafers in the similar layer and the current layer, and the current batch of wafers in the The overlay error value of the similar layer is determined, and the overlay error compensation value of the current batch of wafers in the current layer is determined.
  • the third module is specifically configured to: calculate the overlay error compensation value M of the current batch of wafers on the similar layer according to the following formula:
  • x is the overlay error compensation value of the previous batch of wafers in the similar layer
  • y is the overlay error compensation value of the previous batch of wafers in the current layer
  • A is the previous batch of wafers.
  • the second module 32 is based on the overlay error value of the previous batch of wafers on the similar layer and the current layer, and the current batch of wafers on the similar layer.
  • the overlay error value determines the overlay error compensation value of the current batch of wafers in the current layer, specifically:
  • x is the overlay error compensation value of the previous batch of wafers in the similar layer
  • y is the overlay error compensation value of the previous batch of wafers in the current layer
  • z is the current batch of wafers.
  • A is the weight of the overlay error compensation value of the previous batch of wafers in the similar layer
  • B is the previous batch of wafers in the
  • the similar layer and the current layer further satisfy the following condition: the current layer and the similar layer use the same model of lithography machine.
  • the similar layers comprise a plurality.
  • control apparatus in this embodiment can be used to execute the method described in the foregoing method embodiment, and the specific implementation manner and technical effect are similar, and details are not repeated here.
  • non-transitory computer-readable storage medium including instructions
  • the non-transitory computer-readable storage medium may be ROM, random access memory (RAM), CD-ROM, Tape, floppy disk, and optical data storage devices, etc.
  • Embodiments of the present application further provide a computer program product, including a computer program.
  • a computer program product including a computer program.
  • the computer program is executed by a processor, the method described in the foregoing method embodiment is implemented.
  • the specific implementation manner and technical effect are similar, and details are not repeated here.

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Abstract

一种套刻精度的控制方法和装置,在确定当前层的套刻误差补偿值之前,先判断当前层是否存在相似层,其中,当前层和相似层均相对于同一基准层对准,且二者的套刻精度要求均相对于基准层(S101);如果当前层存在相似层,则根据当前批次晶圆在相似层的套刻误差值,和/或之前批次晶圆在相似层的套刻误差值,确定当前批次晶圆在当前层的套刻误差补偿值(S102);利用当前批次晶圆在当前层的套刻误差补偿值对当前批次晶圆的当前层进行光刻工艺(S103)。该方法能够将当前批次晶圆,和/或之前批次晶圆在相似层的套刻误差值作为参考数据进而丰富了参考数据,提高了套刻误差补偿值的准确度。

Description

套刻精度的控制方法和装置
本申请要求于2020年10月15日提交中国专利局、申请号为202011101233.2、申请名称为“套刻精度的控制方法和装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及半导体制造技术领域,尤其涉及一种套刻精度的控制方法和装置。
背景技术
光刻工艺是半导体制造过程中的关键步骤,光刻是通过对准、曝光等一系列步骤将光掩模版上的图形转移到晶圆上的工艺过程,光刻的套刻误差(overlay)是衡量光刻工艺的关键参数之一。在光刻工艺中,会采用批次控制(Run to Run,R2R)系统进行光刻的套刻控制,针对产品的第一批次晶圆或前几批次晶圆,由于反馈的套刻误差值的数据较少,使得获得的第一批次晶圆或前几批次晶圆的套刻误差补偿值不够准确,从而导致返工,耗费时间以及增加生产成本。
发明内容
根据一些实施例,本申请第一方面提供一种套刻精度的控制方法,包括:确定当前层存在相似层,其中,所述相似层与所述当前层至少满足以下条件:所述当前层和所述相似层均相对于同一基准层对准,所述当前层和所述相似层的套刻精度要求均相对于所述基准层;根据当前批次晶圆在所述相似层的套刻误差值,和/或之前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值;利用所述当前批次晶圆在所述当前层的套刻误差补偿值对所述当前批次晶圆的所述当前层进行光刻工艺。
根据一些实施例,本申请第二方面提供一种套刻精度的控制装置,包括:所述相似层与所述当前层至少满足以下条件:所述当前层和所述相似层均相对于同一基准层对准,所述当前层和所述相似层的套刻精度要求均相对于所述基准层;第二模块,用于根据当前批次晶圆在所述相似层的套刻误差值,和/或之前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值;光刻模块,用于利用所述当前批次晶圆在所述当前层的套刻误差补偿值对所述当前批次晶圆的所述当前层进行光刻工艺。
根据一些实施例,本申请第三方面提供一种电子设备,包括:至少一个处理器和存储 器;
所述存储器存储计算机执行指令;
所述至少一个处理器执行所述存储器存储的计算机执行指令,使得所述至少一个处理器执行如本申请第一方面所述的方法。
根据一些实施例,本申请第四方面提供一种计算机可读存储介质,所述计算机可读存储介质中存储有计算机执行指令,所述计算机执行指令被处理器执行时用于实现如本申请第一方面所述的方法。
根据一些实施例,本申请第五方面提供一种计算机程序产品,包括计算机程序,所述计算机程序被处理器执行时,实现如本申请第一方面所述的方法。
本申请实施例提供的套刻精度的控制方法和装置,在确定当前层的套刻误差补偿值之前,先判断当前层是否存在相似层,其中,当前层和相似层均相对于同一基准层对准,且二者的套刻精度要求均相对于基准层;如果当前层存在相似层,则根据当前批次晶圆在相似层的套刻误差值,和/或之前批次晶圆在相似层的套刻误差值,确定当前批次晶圆在当前层的套刻误差补偿值;利用当前批次晶圆在当前层的套刻误差补偿值对当前批次晶圆的当前层进行光刻工艺。该方法能够将当前批次晶圆,和/或之前批次晶圆在相似层的套刻误差值作为参考数据进而丰富了参考数据,提高了套刻误差补偿值的准确度。
附图说明
图1为本申请实施例一提供的套刻精度的控制方法的流程图;
图2为晶圆的部分层的示意图;
图3为本申请实施例的方法对层B和层C进行套刻误差补偿的示意图;
图4为本申请实施例二提供的一种套刻精度的控制装置的结构示意图。
通过上述附图,已示出本申请明确的实施例,后文中将有更详细的描述。这些附图和文字描述并不是为了通过任何方式限制本申请构思的范围,而是通过参考实施例为本领域技术人员说明本申请的概念。
具体实施方式
本申请实施例提供一种套刻精度的控制方法,当晶圆的两个不同层都相对于同一基准层对准,且两层的套刻精度要求均相对于同一基准层时,可以将其中一层的套刻误差值作为参考数据用来确定另一层的套刻误差补偿值,从而增加了套刻误差补偿值的参考数据,最终使得套刻误差补偿值更加准确。
图1为本申请实施例一提供的套刻精度的控制方法的流程图,本实施例的方法包括以下步骤:
S101、确定当前层存在相似层,其中,相似层与当前层至少满足以下条件:当前层和相似层均相对于同一基准层对准,当前层和相似层的套刻精度要求均相对于该基准层。
如图2所示,层A先于层B进行光刻工艺,层B先于层C进行光刻工艺,对准标记位于层A中,在对层B和层C进行曝光时,光刻机均是利用晶圆上层A形成的对准标记进行对准。同时,层B和层C的套刻精度要求均相对于层A。具体的,层A、层B和层C之间的套刻精度包括层B对层A的套刻精度,层C对层A的套刻精度以及层C对层B的套刻精度,层B和层C的套刻精度要求均相对于层A意味着在套刻精度控制中需要补偿层B对层A的套刻误差以及层C对层A的套刻误差使得层B对层A的套刻误差和层C对层A的套刻误差在预设范围内。在上述示例中,层A为基准层,层C为当前层,层B为层C的相似层。
在一些实施例中,相似层包括多个。例如,层B’在层B之后且在层C之前曝光,层B’曝光时的对准标记为层A中的对准标记,则层B’对层A的套刻精度需要被控制在预设范围内。则层B,层B’均为层C的相似层。
在一些实施例中,判断当前层和相似层是否对准同一基准层,可以通过二者的对准树(Alignment tree)是否相同判断。以当前层为例,当前层的对准树用于描述当前层曝光时使用的晶圆上的某一层的对准标记,在当前层的对准树和相似层的对准树相同时,说明二者在曝光时对同一层的对准标记进行对准,即二者对准同一基准层。
在一些实施例中,当前层和相似层的套刻精度要求是否均相对于基准层,可以通过当前层和相似层的套刻误差树(Overlay tree)判断。以当前层为例,当前层的套刻误差树用于描述当前层对晶圆上某一层的套刻标记进行量测并反馈补偿;如果当前层和基准层的套刻误差树相同,说明二者均相对于同一层进行套刻误差控制,即二者的套刻精度要求均相对于基准层。
在一些实施例中,相似层与当前层还满足以下条件:当前层和相似层使用的光刻机的型号相同。其中,型号相同可以为光刻机的激光波长相同,例如ArF,KrF和I-line光刻机;也可以为相同激光波长下的不同类型的光刻机,例如ASML的浸没式ArF光刻机1950i,1970i等。
在一些实施例中,相似层与当前层还满足以下条件:当前层和相似层使用同一光刻机。
S102、根据当前批次晶圆在相似层的套刻误差值,和/或之前批次晶圆在相似层的套刻误差值,确定当前批次晶圆在当前层的套刻误差补偿值。
在一些实施例中,当前批次晶圆为第一批次晶圆。当前批次晶圆为制作产品下线的第一个批次晶圆,在光刻机对当前批次晶圆进行光刻时,当前批次晶圆不存在之前批次晶圆,此时,可以根据当前批次晶圆在相似层的套刻误差值确定当前批次晶圆在当前层的套刻误差补偿值。具体的,通过套刻误差量测机台可以测量得到当前批次晶圆在相似层对基准层的套刻误差值,并利用该套刻误差值计算得到当前批次晶圆在相似层的套刻误差补偿值。
当前批次晶圆在当前层对基准层的套刻误差补偿值可以采用与当前批次晶圆在相似层对基准层的套刻误差补偿值相同的补偿值。由于当前批次晶圆为第一批次晶圆,在对当前层进行光刻工艺时,没有参考数据提供套刻误差补偿,本实施例中可以利用相似层和当前层的特性提供套刻误差补偿,相似层和当前层的特性即当前层和相似层均相对于同一基准层对准且当前层和相似层的套刻精度要求均相对于基准层。在对当前层进行光刻工艺时采用与相似层对基准层相同的套刻误差补偿值进行套刻误差的预补偿,可以补偿晶圆本身带来的套刻误差,提高第一批次晶圆在当前层的光刻工艺中对基准层的套刻精度,减少返工风险,降低生产成本。
在一些实施例中,当前批次晶圆为非第一批次晶圆,即当前批次晶圆存在之前批次晶圆,则还可以根据之前批次晶圆在相似层和当前层的套刻误差值,确定当前批次晶圆在相似层的套刻误差补偿值。具体的,通过套刻误差量测机台可以量测得到之前批次晶圆在相似层对基准层的套刻误差值以及在当前层对基准层的套刻误差值,并根据之前批次晶圆在相似层对基准层的套刻误差值以及之前批次晶圆在当前层对基准层的套刻误差值,计算得到之前批次晶圆在相似层对基准层的套刻误差补偿值以及在当前层对基准层的套刻误差补偿值。
示例性的,可以根据以下公式计算当前批次晶圆在相似层的套刻误差补偿值M:M=Ax+By。
其中,x为之前批次晶圆在相似层的套刻误差补偿值,y为之前批次晶圆在当前层的套刻误差补偿值,A为之前批次晶圆在相似层的套刻误差补偿值的权重,B为之前批次晶圆在当前层的套刻误差补偿值的权重,其中,0≤A≤1,0≤B≤1,且A+B=1。之前批次晶圆在相似层的套刻误差补偿值是根据之前批次晶圆在相似层的套刻误差值确定的,之前批次晶圆在当前层的套刻误差补偿值是根据之前批次晶圆在当前层的套刻误差值确定的,A和B的值可以预先设置好。
将之前批次晶圆在相似层对基准层的套刻误差值和当前层对基准层的套刻误差值作为参考数据计算当前批次晶圆在相似层对基准层的套刻误差补偿值,丰富了数据数量,使得计算得到的当前批次晶圆在相似层对基准层的套刻误差补偿值更加合理和准确。
作为示例,A,B均为1/2,即使用之前批次晶圆的相似层对基准层的套刻误差补偿值和当前层对基准层的套刻误差补偿值的平均值作为当前批次晶圆在相似层对基准层的套刻误差补偿值,从而简化了套刻误差补偿值的计算方法。
在另一示例中,A>B,例如A为3/5,B为2/5,或者,A为3/4,B为4/1。将之前批次晶圆的相似层对基准层的套刻误差补偿值的权重调高可以部分补偿相似层的光掩模板带来的套刻误差,使得计算得到的当前批次晶圆在相似层对基准层的套刻误差补偿值更加精确。
在一些实施例中,当前批次晶圆为非第一批次晶圆,即当前批次晶圆存在之前批次晶圆,则可以根据当前批次晶圆在相似层的套刻误差值,和之前批次晶圆在相似层的套刻误差值确定当前批次晶圆在当前层的套刻误差补偿值,或者,根据之前批次晶圆在相似层和当前层的套刻误差值,以及当前批次晶圆在相似层的套刻误差值,确定当前批次晶圆在当前层的套刻误差补偿值。
示例性的,可以通过套刻误差量测机台可以量测得到之前批次晶圆在相似层对基准层的套刻误差值、之前批次晶圆在当前层对基准层的套刻误差值以及当前批次晶圆在相似层对基准层的套刻误差值。
在一些实施例中,可以根据以下公式计算当前批次晶圆在当前层的套刻误差补偿值M:M=Ax+By+Cz。
其中,x为之前批次晶圆在相似层的套刻误差补偿值,y为之前批次晶圆在当前层的套刻误差补偿值,z为当前批次晶圆在相似层的套刻误差补偿值,A为之前批次晶圆在相似层的套刻误差补偿值的权重,B为之前批次晶圆在当前层的套刻误差补偿值的权重,C为当前批次晶圆在相似层的套刻误差补偿值的权重,其中,0≤A≤1,0≤B≤1,0≤C≤1,且A+B+C=1。之前批次晶圆在相似层的套刻误差补偿值是根据之前批次晶圆在相似层的套刻误差值确定的,之前批次晶圆在当前层的套刻误差补偿值是根据之前批次晶圆在当前层的套刻误差值确定的,当前批次晶圆在相似层的套刻误差补偿值是根据当前批次晶圆在相似层的套刻误差确定的,A、B、C的值可以预先设置好。
作为示例,A,B,C均为1/3。在另一示例中,B>A和/或B>C,例如B为3/5,A为1/5,C为1/5。将之前批次晶圆的当前层对基准层的套刻误差补偿值的权重调高可以部分补偿当前层的光掩模版带来的套刻误差,使得计算得到的当前批次晶圆在当前层对基准层的套刻误差补偿值更加精确。
在一些实施例中,之前批次晶圆包括前一批次晶圆或多个前批次晶圆。
S103、利用当前批次晶圆在当前层的套刻误差补偿值对当前批次晶圆的当前层进行光 刻工艺。
具体的,可将当前批次晶圆在当前层的套刻误差补偿值更新到下货值中,光刻机利用更新后的下货值对当前批次晶圆的当前层进行光刻工艺。
图3为本申请实施例的方法对层B和层C进行套刻误差补偿的示意图,参考图3,先对批次1晶圆进行层B和层C的光刻,然后,对批次2晶圆进行层B和层C的光刻,最后,对批次3晶圆进行层B和层C的光刻。其中,层B的光刻流程在层C的光刻流程之前;在对批次1晶圆的层B光刻时,默认对批次1晶圆的层A的光刻已经完成;层B和层C都是相对于层A对准,且二者的套刻精度要求均相对层A。
在对批次1晶圆的层B进行光刻时,由于没有其他批次晶圆的套刻误差值和相似层的套刻误差值作为参考数据,使用试行(pilot)数据作为参考数据,确定对批次1晶圆的层B进行光刻的套刻误差的补偿值。作为示例,pilot数据可以预设为0。
在对批次1晶圆的层C进行光刻时,将批次1晶圆的层B的套刻误差值作为参考数据,根据批次1晶圆的层B的套刻误差值确定批次1晶圆的层C的套刻误差补偿值,利用批次1晶圆的层C的套刻误差补偿值进行光刻工艺。
在对批次2晶圆的层B进行光刻时,将批次1晶圆的层B的套刻误差值和批次1晶圆的层C的套刻误差值作为参考数据,根据批次1晶圆的层B的套刻误差值和批次1晶圆的层C的套刻误差值,确定批次2晶圆的层B的套刻误差补偿值,利用批次2晶圆的层B的套刻误差补偿值进行光刻工艺。
在对批次2晶圆的层C进行光刻时,将批次1晶圆的层B的套刻误差值、批次1晶圆的层C的套刻误差值以及批次2晶圆的层B的套刻误差值作为参考数据,根据批次1晶圆的层B的套刻误差值、批次1晶圆的层C的套刻误差值以及批次2晶圆的层B的套刻误差值,确定批次2晶圆的层C的套刻误差补偿值,利用批次2晶圆的层C的套刻误差补偿值进行光刻工艺。
在对批次3晶圆的层B进行光刻时,将批次2晶圆的层B的套刻误差值和批次2晶圆的层C的套刻误差值作为参考数据,根据批次2晶圆的层B的套刻误差值和批次2晶圆的层C的套刻误差值,确定批次3晶圆的层B的套刻误差补偿值,利用批次3晶圆的层B的套刻误差补偿值进行光刻工艺。
在另一示例中,可以将批次1晶圆的层B的套刻误差值、批次1晶圆的层C的套刻误差值、批次2晶圆的层B的套刻误差值和批次2晶圆的层C的套刻误差值作为参考数据。
在又一示例中,还可以将批次1晶圆的层B的套刻误差值和批次2晶圆的层B的套刻误差值作为参考数据,或者,将批次1晶圆的层C的套刻误差值和批次2晶圆的层C的套 刻误差值作为参考数据。
本实施例不对此进行限制,可以取批次1晶圆和批次2晶圆在层B和层C的套刻误差值中的任意一个、两个或者三个数据作为参考数据。
在对批次3晶圆的层C进行光刻时,将批次2晶圆的层B的套刻误差值、批次2晶圆的层C的套刻误差值和批次3晶圆的层B的套刻误差值作为参考数据,根据批次2晶圆的层B的套刻误差值、批次2晶圆的层C的套刻误差值和批次3晶圆的层B的套刻误差值,确定批次3晶圆的层C的套刻误差补偿值,利用批次3晶圆的层C的套刻误差补偿值进行光刻工艺。
在另一示例中,将批次1晶圆的层B的套刻误差值、批次1晶圆的层C的套刻误差值、批次2晶圆的层B的套刻误差值、批次2晶圆的层C的套刻误差值和批次3晶圆的层B的套刻误差值作为参考数据作为参考数据。
同样,可以取批次1晶圆在层B和层C的套刻误差值、批次2晶圆在层B和层C的套刻误差值以及批次3晶圆在层B的套刻误差中的任意一个、两个、三个或者四个数据作为参考数据。
本实施例中,确定当前层存在相似层,其中,当前层和相似层都相对于同一基准层对准,且当前层和相似层的套刻精度要求均相对于基准层,根据当前批次晶圆在相似层的套刻误差值,和/或之前批次晶圆在相似层的套刻误差值,确定当前批次晶圆在当前层的套刻误差补偿值;利用当前批次晶圆在当前层的套刻误差补偿值对当前批次晶圆的当前层进行光刻工艺。该方法能够将当前批次晶圆,和/或之前批次晶圆在相似层的套刻误差值作为参考数据进而丰富了参考数据,提高了套刻误差补偿值的准确度。
图4为本申请实施例二提供的一种套刻精度的控制装置的结构示意图,包括:
第一模块31,用于确定当前层存在相似层,其中,所述相似层与所述当前层至少满足以下条件:所述当前层和所述相似层均相对于同一基准层对准,所述当前层和所述相似层的套刻精度要求均相对于所述基准层;
第二模块32,用于根据当前批次晶圆在所述相似层的套刻误差值,和/或之前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值;
光刻模块33,用于利用所述当前批次晶圆在所述当前层的套刻误差补偿值对所述当前批次晶圆的所述当前层进行光刻工艺。
在一些实施例中,还包括:第三模块,用于根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,确定所述当前批次晶圆在所述相似层的套刻误差补偿值;所述光刻模块,还用于利用所述当前批次晶圆在所述相似层的套刻误差补偿值对所述当前批次晶 圆的所述相似层进行光刻工艺。
在一些实施例中,所述第二模块32具体用于:根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,以及所述当前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值。
在一些实施例中,所述当前批次晶圆在所述当前层的套刻误差补偿值与所述当前批次晶圆在所述相似层的套刻误差补偿值相同。
在一些实施例中,所述第三模块具体用于:根据以下公式计算所述当前批次晶圆在所述相似层的套刻误差补偿值M:
M=Ax+By;
其中,x为所述之前批次晶圆在所述相似层的套刻误差补偿值,y为所述之前批次晶圆在所述当前层的套刻误差补偿值,A为所述之前批次晶圆在所述相似层的套刻误差补偿值的权重,B为所述之前批次晶圆在所述当前层的套刻误差补偿值的权重,其中,0≤A≤1,0≤B≤1,且A+B=1。
在一些实施例中,所述第二模块32根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,以及所述当前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值,具体为:
根据以下公式计算所述当前批次晶圆在所述当前层的套刻误差补偿值M:
M=Ax+By+Cz;
其中,x为所述之前批次晶圆在所述相似层的套刻误差补偿值,y为所述之前批次晶圆在所述当前层的套刻误差补偿值,z为所述当前批次晶圆在所述相似层的套刻误差补偿值,A为所述之前批次晶圆在所述相似层的套刻误差补偿值的权重,B为所述之前批次晶圆在所述当前层的套刻误差补偿值的权重,C为所述当前批次晶圆在所述相似层的套刻误差补偿值的权重,其中,0≤A≤1,0≤B≤1,0≤C≤1,且A+B+C=1。
在一些实施例中,所述当前批次晶圆为第一批次晶圆或所述当前批次晶圆为非第一次批次晶圆。
在一些实施例中,所述相似层与所述当前层还满足以下条件:所述当前层和所述相似层使用的光刻机型号相同。
在一些实施例中,所述相似层包括多个。
在一些实施例中,所述之前批次晶圆包括前一批次晶圆或多个前批次晶圆。
本实施例的控制装置,可以用于执行上述方法实施例所述的方法,具体实现方式和技术效果类似,这里不再赘述。
在示例性实施例中,还提供了一种包括指令的非临时性计算机可读存储介质,所述非临时性计算机可读存储介质可以是ROM、随机存取存储器(RAM)、CD-ROM、磁带、软盘和光数据存储设备等。当该存储介质中的指令由电子设备的处理器执行时,使得电子设备能够执行上述方法实施例所述的方法。
本申请实施例还提供一种计算机程序产品,包括计算机程序,所述计算机程序被处理器执行时,实现如上述方法实施例所述的方法,具体实现方式和技术效果类似,这里不再赘述。

Claims (18)

  1. 一种套刻精度的控制方法,其中,所述控制方法包括:
    确定当前层存在相似层,其中,所述相似层与所述当前层至少满足以下条件:所述当前层和所述相似层均相对于同一基准层对准,所述当前层和所述相似层的套刻精度要求均相对于所述基准层;
    根据当前批次晶圆在所述相似层的套刻误差值,和/或之前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值;
    利用所述当前批次晶圆在所述当前层的套刻误差补偿值对所述当前批次晶圆的所述当前层进行光刻工艺。
  2. 根据权利要求1所述的控制方法,其中,还包括:
    根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,确定所述当前批次晶圆在所述相似层的套刻误差补偿值;
    利用所述当前批次晶圆在所述相似层的套刻误差补偿值对所述当前批次晶圆的所述相似层进行光刻工艺。
  3. 根据权利要求1所述的控制方法,其中,所述根据当前批次晶圆在所述相似层的套刻误差值,和/或之前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值,包括:
    根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,以及所述当前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值。
  4. 根据权利要求1所述的控制方法,其中,所述当前批次晶圆在所述当前层的套刻误差补偿值与所述当前批次晶圆在所述相似层的套刻误差补偿值相同。
  5. 根据权利要求2所述的控制方法,其中,所述根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,确定所述当前批次晶圆在所述相似层的套刻误差补偿值,包括:
    根据以下公式计算所述当前批次晶圆在所述相似层的套刻误差补偿值M:
    M=Ax+By;
    其中,x为所述之前批次晶圆在所述相似层的套刻误差补偿值,y为所述之前批次晶圆在所述当前层的套刻误差补偿值,A为所述之前批次晶圆在所述相似层的套刻误差补偿值的权重,B为所述之前批次晶圆在所述当前层的套刻误差补偿值的权重,其中,0≤A≤1,0≤B≤1,且A+B=1。
  6. 根据权利要求5所述的控制方法,其中,A和B均为1/2,或者,A>B。
  7. 根据权利要求3所述的控制方法,其中,所述根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,以及所述当前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值,包括:
    根据以下公式计算所述当前批次晶圆在所述当前层的套刻误差补偿值M:
    M=Ax+By+Cz;
    其中,x为所述之前批次晶圆在所述相似层的套刻误差补偿值,y为所述之前批次晶圆在所述当前层的套刻误差补偿值,z为所述当前批次晶圆在所述相似层的套刻误差补偿值,A为所述之前批次晶圆在所述相似层的套刻误差补偿值的权重,B为所述之前批次晶圆在所述当前层的套刻误差补偿值的权重,C为所述当前批次晶圆在所述相似层的套刻误差补偿值的权重,其中,0≤A≤1,0≤B≤1,0≤C≤1,且A+B+C=1。
  8. 根据权利要求7所述的控制方法,其中,A、B和C的取值均为1/3,或者,B>A和/或B>C。
  9. 根据权利要求1-8任一项所述的控制方法,其中,所述当前批次晶圆为第一批次晶圆或所述当前批次晶圆为非第一次批次晶圆。
  10. 根据权利要求1-8任一项所述的控制方法,其中,所述相似层与所述当前层还满足以下条件:所述当前层和所述相似层使用的光刻机型号相同。
  11. 根据权利要求1-8任一项所述的控制方法,其中,所述相似层包括多个。
  12. 根据权利要求1-8任一项所述的控制方法,其中,所述之前批次晶圆包括前一批次晶圆或多个前批次晶圆。
  13. 一种套刻精度的控制装置,其中,所述控制装置包括:
    第一模块,用于确定当前层存在相似层,其中,所述相似层与所述当前层至少满足以下条件:所述当前层和所述相似层均相对于同一基准层对准,所述当前层和所述相似层的套刻精度要求均相对于所述基准层;
    第二模块,用于根据当前批次晶圆在所述相似层的套刻误差值,和/或之前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值;
    光刻模块,用于利用所述当前批次晶圆在所述当前层的套刻误差补偿值对所述当前批次晶圆的所述当前层进行光刻工艺。
  14. 根据权利要求13所述的控制装置,其中,还包括:
    第三模块,根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,确定所述当前批次晶圆在所述相似层的套刻误差补偿值;
    所述光刻模块,还用于
    利用所述当前批次晶圆在所述相似层的套刻误差补偿值对所述当前批次晶圆的所述相似层进行光刻工艺。
  15. 根据权利要求13所述的控制装置,其中,所述第二模块具体用于:
    根据所述之前批次晶圆在所述相似层和所述当前层的套刻误差值,以及所述当前批次晶圆在所述相似层的套刻误差值,确定所述当前批次晶圆在所述当前层的套刻误差补偿值。
  16. 一种电子设备,其中,包括处理器和存储器;其中,
    所述存储器,用于存储程序代码;
    所述处理器,用于调用所述存储器中所存储的程度代码,执行权利要求1~12中任一项所述的方法。
  17. 一种计算机可读存储介质,其中,所述计算机可读存储介质中存储有指令,当该指令在计算机上运行时,使得计算机执行权利要求1~12中任一项所述的方法。
  18. 一种计算机程序,其中,包括程序代码,当计算机运行所述计算机程序时,所述程序代码执行如权利要求1~12任一项所述的方法。
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