WO2022044805A1

WO2022044805A1 - Imaging device, imaging method, and electronic apparatus

Info

Publication number: WO2022044805A1
Application number: PCT/JP2021/029624
Authority: WO
Inventors: 有輝森川
Original assignee: ソニーセミコンダクタソリューションズ株式会社
Priority date: 2020-08-24
Filing date: 2021-08-11
Publication date: 2022-03-03

Abstract

The present technology relates to an imaging device, an imaging method, and an electronic apparatus that make it possible to reduce power consumption. The present technology comprises: a pixel array unit in which pixels are arrayed in matrix form, the pixels including a photodiode, a first transfer transistor for transferring electric charges generated by the photodiode to a first electric charge accumulation unit, and a second transfer transistor for transferring electric charges generated by the photodiode to a second electric charge accumulation unit; a switch arranged at a position that connects the first and second transfer transistors; and a control unit for controlling the switch to be turned on for a prescribed time from when the first or the second transfer transistor is instructed to start electric charge transfer. The control unit is provided with a time control unit for controlling the prescribed time. The present technology can be applied to, for example, captured images for performing distance measurement.

Description

Imaging device, imaging method, electronic equipment

The present technology relates to an image pickup device, an image pickup method, and an electronic device, for example, an image pickup device, an image pickup method, and an electronic device capable of performing charging with reduced power consumption.

The method for measuring the distance is a stereo sensor that uses triangular distance measurement by pattern matching as a basic technology, or the distance is measured by irradiating active light and measuring the time until the reflected light returns. There is a ToF (Time of Flight) method for measuring (see, for example, Patent Document 1).

In addition, there are direct ToF method and indirect ToF method in ToF method. In the indirect ToF method, the distance is indirectly measured by performing photoelectric conversion in the sensor, distributing the charges between two or more existing electrodes, and taking the difference between the charges.

Japanese Unexamined Patent Publication No. 2016-090268

In the indirect ToF method, it is necessary to distribute the charge photoelectrically converted in the sensor to two or more electrodes at high speed and transfer it. In recent years, it has been desired to increase the number of pixels and the accuracy of distance measuring devices, but it is desired to reduce the power consumption because the power consumption tends to increase by increasing the number of pixels and the accuracy. It is rare.

This technology was made in view of such a situation, and makes it possible to reduce power consumption.

The image pickup device on one aspect of the present technology is generated by the photodiode, the first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and the photodiode. The pixels including the second transfer transistor for transferring the charged charge to the second charge storage unit include the pixel array unit arranged in a matrix, the first transfer transistor, and the second transfer transistor. A control that controls the switch to be turned on for a predetermined time from the time when the switch arranged at the connection position and the start of the charge transfer are instructed to the first transfer transistor or the second transfer transistor. The control unit is an imaging device including a time control unit that controls a predetermined time.

The imaging method of one aspect of the present technology includes a photodiode, a first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and the photodiode. The pixels including the second transfer transistor for transferring the charged charge to the second charge storage unit include the pixel array unit arranged in a matrix, the first transfer transistor, and the second transfer transistor. The switch is operated for a predetermined time from the time when the image pickup apparatus including the switch arranged at the connecting position instructs the first transfer transistor or the second transfer transistor to start the transfer of the electric charge. This is an imaging method in which the control unit is turned on and the predetermined time is controlled by the time control unit included in the control unit.

The electronic device of one aspect of the present technology includes a photodiode, a first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and the photodiode. The pixels including the second transfer transistor for transferring the charged charge to the second charge storage unit include the pixel array unit arranged in a matrix, the first transfer transistor, and the second transfer transistor. A control that controls the switch to be turned on for a predetermined time from the time when the switch arranged at the connection position and the start of the charge transfer are instructed to the first transfer transistor or the second transfer transistor. The control unit controls an image pickup device including a time control unit that controls a predetermined time, a light source that irradiates irradiation light whose brightness changes periodically, and an irradiation timing of the irradiation light. It is an electronic device provided with a light emission control unit.

In the image pickup device, the image pickup method, and the electronic device of one aspect of the present technology, a photodiode, a first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and the like. The pixel array unit in which the pixels including the second transfer transistor that transfers the electric charge generated by the photodiode to the second charge storage unit are arranged in a matrix, and the first transfer transistor The switch arranged at a position for connecting the second transfer transistor and the charge transfer start are instructed to the first transfer transistor or the second transfer transistor for a predetermined time. It is equipped with a control unit that controls the switch on. The control unit includes a time control unit that controls the predetermined time.

It is a figure which shows the structure of one Embodiment of the distance measuring apparatus to which this technique is applied. It is a figure which shows the structural example of the light receiving part. It is a figure which shows the structural example of a pixel. It is a figure explaining the distribution of electric charge in a pixel. It is a figure which shows the structure of an example of a gate voltage control part. It is a figure which shows the structure of one Embodiment of the gate voltage control part which applied this technique. It is a figure for demonstrating the operation of a gate voltage control part. It is a figure for demonstrating the generation of noise. It is a figure which shows the structural example of DLL. It is a figure which shows the structural example of the delay part. It is a figure which shows the other structural example of a gate voltage control part. It is a figure which shows the other structural example of a gate voltage control part. It is a figure which shows the other structural example of a gate voltage control part. It is a figure which shows the other structural example of a gate voltage control part. It is a figure which shows the other structural example of a gate voltage control part. It is a figure for demonstrating reduction of influence by process variation. It is a figure for demonstrating the effect by using a gate voltage control part. It is a figure which shows the other structural example of a gate voltage control part. It is a figure which shows the structural example of the electronic device. It is a block diagram which shows an example of the schematic structure of a vehicle control system. It is explanatory drawing which shows an example of the installation position of the vehicle outside information detection unit and the image pickup unit.

The embodiment for implementing the present technology (hereinafter referred to as the embodiment) will be described below.

This technology can be applied to, for example, a light receiving element constituting a distance measuring system that measures a distance by an indirect TOF method, an image pickup device having such a light receiving element, and the like.

For example, a distance measuring system is an in-vehicle system that is mounted on a vehicle and measures the distance to an object outside the vehicle, or measures the distance to an object such as a user's hand and is based on the measurement result. It can be applied to a gesture recognition system that recognizes a user's gesture. In this case, the result of gesture recognition can be used, for example, for operating a car navigation system.

<Configuration example of ranging device>
FIG. 1 shows a configuration example of an embodiment of a ranging device to which the present technology is applied.

The distance measuring device 10 includes a lens 11, a light receiving unit 12, a signal processing unit 13, a light emitting unit 14, a light emitting control unit 15, and a filter unit 16. The distance measuring device 10 of FIG. 1 irradiates an object with light, and the light (irradiation light) receives the light reflected by the object (reflected light) to measure the distance to the object.

The light emitting system of the distance measuring device 10 includes a light emitting unit 14 and a light emitting control unit 15. In the light emitting system, the light emitting control unit 15 irradiates infrared light (IR) with the light emitting unit 14 according to the control from the signal processing unit 13. An IR band filter may be provided between the lens 11 and the light receiving unit 12, and the light emitting unit 14 may emit infrared light corresponding to the transmission wavelength band of the IR bandpass filter.

The light emitting unit 14 may be arranged inside the housing of the distance measuring device 10 or may be arranged outside the housing of the distance measuring device 10. The light emission control unit 15 causes the light emission unit 14 to emit light at a predetermined frequency.

The signal processing unit 13 functions as a calculation unit that calculates the distance (depth value) from the distance measuring device 10 to the object based on the detection signal (pixel data) supplied from the light receiving unit 12, for example. The signal processing unit 13 generates a depth map in which the depth value (depth information) is stored as the pixel value of each pixel 50 (FIG. 2) of the light receiving unit 12, and outputs the depth map to the filter unit 16. Further, the signal processing unit 13 also calculates the reliability of the calculated depth value for each pixel 50 of the light receiving unit 12, and stores the reliability (luminance information) as the pixel value of each pixel 50 of the light receiving unit 12. A map is generated and output to the filter unit 16.

<Structure of image sensor>
FIG. 2 is a block diagram showing a configuration example of the light receiving unit 12. The light receiving unit 12 can be a CMOS (Complementary Metal Oxide Semiconductor) image sensor.

The light receiving unit 12 includes a pixel array unit 41, a vertical drive unit 42, a column processing unit 43, a horizontal drive unit 44, and a system control unit 45. The pixel array unit 41, the vertical drive unit 42, the column processing unit 43, the horizontal drive unit 44, the system control unit 45, and the gate voltage control unit 46 are formed on a semiconductor substrate (chip) (not shown). The light receiving unit 12 functions as a photographing device that captures an image, and can generate a distance image by analyzing the image captured by the photographing device.

In the pixel array unit 41, unit pixels (for example, pixel 50 in FIG. 3) having a photoelectric conversion element that generates an electric charge of an amount corresponding to the amount of incident light and accumulates it inside are two-dimensionally arranged in a matrix. There is. In the following, the light charge of the amount of charge corresponding to the amount of incident light may be simply described as "charge", and the unit pixel may be simply described as "pixel".

Further, in the pixel array unit 41, a pixel drive line 47 is formed row by row with respect to a matrix-shaped pixel array along the left-right direction (arrangement direction of pixels in the pixel row) in the figure, and a vertical signal line 48 is formed for each column. Is formed along the vertical direction of the figure (the arrangement direction of the pixels of the pixel array). One end of the pixel drive line 47 is connected to the output end corresponding to each line of the vertical drive unit 42.

The vertical drive unit 42 is composed of a shift register, an address recorder, and the like, and is a pixel drive unit that drives each pixel of the pixel array unit 41 simultaneously for all pixels or in line units. The pixel signal output from each unit pixel of the pixel row selectively scanned by the vertical drive unit 42 is supplied to the column processing unit 43 through each of the vertical signal lines 48. The column processing unit 43 performs predetermined signal processing on the pixel signal output from each unit pixel of the selected row through the vertical signal line 48 for each pixel column of the pixel array unit 41, and also performs predetermined signal processing on the pixel signal after signal processing. Temporarily hold.

Specifically, the column processing unit 43 performs at least noise reduction processing, for example, CDS (Correlated Double Sampling) processing as signal processing. By the correlated double sampling by the column processing unit 43, the fixed pattern noise peculiar to the pixel such as the reset noise and the threshold variation of the amplification transistor is removed. In addition to the noise reduction processing, the column processing unit 43 can be provided with, for example, an AD (analog-digital) conversion function, and the signal level can be output as a digital signal.

The horizontal drive unit 44 is composed of a shift register, an address recorder, and the like, and sequentially selects unit circuits corresponding to the pixel strings of the column processing unit 43. By the selective scanning by the horizontal drive unit 44, the pixel signals signal-processed by the column processing unit 43 are sequentially output to the signal processing unit (not shown).

The system control unit 45 is composed of a timing generator or the like that generates various timing signals, and is a vertical drive unit 42, a column processing unit 43, and a horizontal drive based on various timing signals generated by the timing generator. Drive control of the unit 44 and the like is performed.

The gate voltage control unit 46 controls the supply of the transfer control signal TRT instructing the start of transfer in the transfer transistor (details will be described later).

In the pixel array unit 41, the pixel drive line 47 is wired along the row direction for each pixel row with respect to the matrix-shaped pixel array, and two vertical signal lines 48 are wired along the column direction in each pixel row. ing. For example, the pixel drive line 47 transmits a drive signal for driving when reading a signal from a pixel. In FIG. 2, the pixel drive line 47 is shown as one wiring, but the wiring is not limited to one. One end of the pixel drive line 47 is connected to the output end corresponding to each line of the vertical drive unit 42.

<Structure of unit pixel>
Next, a specific structure of the unit pixels 50 arranged in a matrix in the pixel array unit 41 will be described.

The pixel 50 includes a photodiode 61 (hereinafter referred to as PD61) which is a photoelectric conversion element, and is configured so that the electric charge generated by the PD 61 is distributed to the tap 51-1 and the tap 51-2. Then, among the charges generated by the PD 61, the charges distributed to the taps 51-1 are read out from the vertical signal line 48-1 and output as the detection signal SIG1. Further, the electric charge distributed to the tap 51-2 is read out from the vertical signal line 48-2 and output as a detection signal SIG2.

The tap 51-1 is composed of a transfer transistor 62-1, an FD (Floating Diffusion) 63-1, a reset transistor 64, an amplification transistor 65-1, and a selection transistor 66-1. Similarly, the tap 51-2 is composed of a transfer transistor 62-2, an FD63-2, a reset transistor 64, an amplification transistor 65-2, and a selection transistor 66-2.

As shown in FIG. 3, the reset transistor 64 may be shared by the FD63-1 and the FD63-2, or may be provided in each of the FD63-1 and the FD63-2.

When the reset transistor 64 is provided in each of the FD63-1 and the FD63-2, the reset timing can be controlled individually for the FD63-1 and the FD63-2, so that fine control can be performed. .. When the reset transistor 64 common to the FD63-1 and the FD63-2 is provided, the reset timing can be made the same for the FD63-1 and the FD63-2, the control becomes simple, and the circuit configuration is also simple. Can be reset.

In the following description, the description will be continued by taking as an example the case where the reset transistor 64 common to the FD63-1 and the FD63-2 is provided.

With reference to FIG. 4, the distribution of electric charges in the pixel 50 will be described. Here, the distribution means that the electric charges accumulated in the pixel 50 (PD61) are read out at different timings, so that the electric charges are read out for each tap.

As shown in FIG. 4, the irradiation light modulated (1 cycle = Tp) so as to repeat the irradiation on / off within the irradiation time is output from the light emitting unit 14, and only the delay time Td according to the distance to the object is obtained. With a delay, the reflected light is received by the PD61.

The transfer control signal TRT_A controls the on / off of the transfer transistor 62-1, and the transfer control signal TRT_B controls the on / off of the transfer transistor 62-2. As shown in the figure, the transfer control signal TRT_A has the same phase as the irradiation light, while the transfer control signal TRT_B has the phase in which the transfer control signal TRT_A is inverted.

Therefore, the electric charge generated by the photodiode 61 receiving the reflected light is transferred to the FD63-1 while the transfer transistor 62-1 is on according to the transfer control signal TRT_A. Further, it is transferred to the FD 63-2 while the transfer transistor 62-2 is turned on according to the transfer control signal TRT_B. As a result, the charges transferred via the transfer transistor 62-1 are sequentially accumulated in the FD63-1 during a predetermined period in which the irradiation of the irradiation light having the irradiation time T is periodically performed, and the charges are sequentially accumulated in the FD63-1 and via the transfer transistor 62-2. The transferred charges are sequentially accumulated in the FD63-2.

Then, when the selection transistor 66-1 is turned on according to the selection signal SELm1 after the end of the charge storage period, the charge stored in the FD63-1 is read out via the vertical signal line 48-1, and the charge is read out. The detection signal A corresponding to the amount is output from the light receiving unit 12. Similarly, when the selection transistor 66-2 is turned on according to the selection signal SELm2, the electric charge stored in the FD63-2 is read out via the vertical signal line 48-2, and the detection signal B corresponding to the amount of the electric charge is generated. It is output from the light receiving unit 12.

The electric charge stored in the FD63-1 is discharged when the reset transistor 64 is turned on according to the reset signal RST. Similarly, the charge stored in the FD63-2 is discharged when the reset transistor 64 is turned on according to the reset signal RST.

As described above, the pixel 50 distributes the electric charge generated by the reflected light received by the photodiode 61 to the taps 51-1 and the taps 51-2 according to the delay time Td, and the detection signal A and the detection signal B. Can be output. The delay time Td corresponds to the time during which the light emitted by the light emitting unit 14 flies to the object, is reflected by the object, and then flies to the light receiving unit 12, that is, according to the distance to the object. Therefore, the distance measuring device 10 can obtain the distance (depth) to the object according to the delay time Td based on the detection signal A and the detection signal B.

<Structure of gate voltage control unit>
The configuration of the gate voltage control unit 46 will be described. By applying this technology, it is possible to suppress a large IR drop of the power supply and reduce power consumption. In order to clarify the effect obtained by applying this technique, it is compared with the conventional gate voltage control unit.

FIG. 5 is a diagram showing the configuration of a conventional gate voltage control unit. Hereinafter, the conventional gate voltage control unit will be referred to as a gate voltage control unit 46'. The gate voltage control unit 46'is provided, for example, for each row of the pixel array unit 41 or for each row of a plurality of rows. FIG. 6 illustrates a predetermined row and a gate voltage control unit 46'provided in the row.

The gate voltage control unit 46'is provided with two drivers. The pixel 50 includes two taps, a tap 51-1 and a tap 51-2, as described with reference to FIG. The tap 51-1 includes a transfer transistor 62-1, and the tap 51-2 includes a transfer transistor 62-2. The gate voltage control unit 46'controls the transfer control signal TRT_A and the transfer control signal TRT_B supplied to the transfer transistor 62-1 and the transfer transistor 62-2.

The transfer control signal TRG is a High (1) signal when the transfer transistor 62 is on, and a Low (0) signal when the transfer transistor 62 is off. As shown in FIG. 3, the transfer control signal TRT_A is supplied to the transfer transistor 62-1 via the pixel drive line 47-1, and the transfer control signal TRT_B is transferred via the pixel drive line 47.2. It is supplied to the transistor 62-2.

The driver 101a for controlling the transfer control signal TRT_A and the driver 101b for controlling the transfer control signal TRT_B are included in the gate voltage control unit 46'. FIG. 5 shows a gate voltage control unit 46'that controls the gate voltage of a plurality of pixels 50 arranged in the vertical direction of the pixel array unit 41. For example, when N pixels 50 are arranged in the vertical direction of the pixel array unit 41, two drivers 101 are provided for the N pixels 50.

Since the driver 101a and the driver 101b basically have the same configuration, the explanation will be added by taking the driver 101a as an example. The driver 101a is configured to include the MIMO 121a and the MIMO 122a. The source side of the photoresist121a is connected to the power supply line on the high potential side of the potential Vdd, and the drain side is connected to the drain side of the MIMO 122a. The source side of the nanotube 122a is connected to a power line on the low potential side of the potential Vss such as GND. Here, the explanation is continued assuming that the potential Vss is grounded.

The gate of MIMO121a and the gate of MIMO122a are connected to the signal line that supplies the control signal CLK_A. A pixel drive line 47-1 is connected to the line connecting the PMS 121a and the MIMO 122a. The pixel drive line 47-1 is connected to the gate side of the transfer transistor 62-1 of the pixel 50. The gates of the transfer transistors 62-1-1 to 62-1-N of the plurality of pixels 50 arranged in a predetermined direction, for example, in the column direction of the pixel array unit 41, are connected to the pixel drive line 47-1. Has been

Although not shown in FIG. 5, there is a wiring load in the wiring such as the pixel drive line 47.

In FIG. 5, the gate of each transfer transistor 62 is represented by the capacitance C. When the voltage applied to the gate becomes the voltage Vdd, in other words, when the voltage of the capacitance C becomes the voltage Vdd, the transfer transistor 62 starts the transfer of the charge from the PD 61 to the FD 63.

The driver 101b also has the same configuration as the driver 101a, and the gates of the transfer transistors 62-2-1 to 62-2N are connected to the pixel drive line 47-2 connected to the driver 101b.

Driver 101a and driver 101b operate differentially. When the transfer control signal TRT_A output from the driver 101a is High, the transfer control signal TRT_B output from the driver 101b is set to Low. When the transfer control signal TRT_A issued by the driver 101a is High and the transfer control signal TRT_B issued by the driver 101b is Low, the transfer transistor 62-1 connected to the pixel drive line 47-1- 1 to 62-1-N are charged until the voltage becomes Vdd. On the other hand, the transfer transistors 62-2-1 to 62-2-N connected to the pixel drive line 47-2 are discharged until the voltage Vss is reached.

In this way, the gate voltage is controlled by charging and discharging the gate of the transfer transistor of the pixel 50. The power consumption P in this case is represented by P = fCV ² . f is the frequency, C is the capacitance, and V is the voltage. In recent years, it has been desired to increase the number of pixels and the accuracy of distance measuring devices. By increasing the number of pixels, the capacity C and the voltage V increase, and by increasing the accuracy, the frequency increases. Therefore, the power consumption P becomes large.

Since the gate wiring of the pixel 50 is charged at the same time for all the pixels arranged in the pixel array unit 41, a large peak current flows when the gate wiring of the pixel 50 is charged, the power supply has a large IR drop, and a pulse is generated. There is a possibility that the rising time of the waveform will be significantly deteriorated.

According to the gate voltage control unit 46 to which the present technology described below is applied, power consumption can be reduced and IR drop can be suppressed.

<Structure of gate voltage control unit>
FIG. 6 is a diagram showing a configuration of an embodiment of the gate voltage control unit 46 to which the present technology is applied. The parts having the same functions as the gate voltage control unit 46 shown in FIG. 5 are designated by the same reference numerals, and the description thereof will be omitted as appropriate.

The gate voltage control unit 46 is configured to include a driver 201a, a driver 201b, a DLL (DelayLockedLoop) 203, a delay unit 205, an XOR circuit 207, and a NOT circuit 209. The driver 201a is configured to include the MIMO 121a, the MIMO 122a, the EN switch 221a, the EN switch 222a, the XEN switch 223a, and the XEN switch 224a. The driver 201b is configured to include the MIMO 121b, the MIMO 122b, the EN switch 221b, the EN switch 222b, the XEN switch 223b, and the XEN switch 224b.

Since the driver 201a and the driver 201b have the same configuration, the driver 201a will be described as an example. The driver 201a shown in FIG. 6 and the driver 101a shown in FIG. 5 are compared. The driver 201a shown in FIG. 6 is different in that the driver 101a shown in FIG. 5 is configured by adding the EN switch 221a, the EN switch 222a, the XEN switch 223a, and the XEN switch 224a, except that the other points are the same. Is.

The driver 201a is a driver that controls the transfer control signal TRT_A supplied to the transfer transistor 62-1. When the transfer control signal TRT_A is High, the power of the voltage Vdd from the power supply (not shown) is the transfer transistor 62-1. Control so that it is supplied to the gate of. When the transfer control signal TRT_A is High, an EN switch 221a, an EN switch 222a, an XEN switch 223a, and a XEN switch 224a are provided to provide a period in which power is supplied from the power source and a period in which power is not supplied.

The EN switch 221a and the EN switch 222a are turned on during the period during which the power from the power supply is not supplied, and turned off during the period during which the power from the power supply is supplied. The XEN switch 223a and the XEN switch 224a operate in the opposite manner to the EN switch 221a and the EN switch 222a. When the EN switch 221a and the EN switch 222a are on, the EN switch 221a and the EN switch 222a are turned off, and when the EN switch 221a and the EN switch 222a are off, the EN switch 221a and the EN switch 222a are turned on.

The EN switch is also provided at a position where the pixel drive line 47-1 and the pixel drive line 47.2 are connected. In FIG. 6, the EN switch 231 is provided in the wiring connecting the pixel drive line 47-1 and the pixel drive line 47-2. This EN switch 231 also operates in the same manner as the EN switch 221a and the EN switch 222a.

Further, the EN switch 221b, EN switch 222b, XEN switch 223b, and XEN switch 224b of the driver 201b also operate in the same manner as the EN switch 221a, EN switch 222a, XEN switch 223a, and XEN switch 224a of the driver 201a, respectively.

The control signal EN that controls the ON / OFF of the EN switch 221a, EN switch 222a, EN switch 221b, EN switch 222b, and EN switch 331 is output from the XOR circuit 207. The control signal XEN that controls the on / off of the XEN switch 223a, the XEN switch 224a, the XEN switch 223b, and the XEN switch 224b is an output from the NOT circuit 209.

The operation of the gate voltage control unit 46 will be described with reference to FIG. 7. At time t1, the control signal CLK_A to the driver 201a becomes a signal from High to Low, and the control signal CLK_B to the driver 201b becomes a signal from Low to High. When the control signal CLK_A to the driver 201a is Low, the transfer control signal TRT_A output from the driver 201a is a High signal, so that the gates of the transfer transistors 62-1-1 to 62-1-N are charged. It will be started. When the control signal CLK_B to the driver 201b is High, the transfer control signal TRT_B output from the driver 201b is a Low signal, so that the gates of the transfer transistors 62-2-1 to 62-2-N are charged. It will be started.

The control signal CLK_B is also supplied to the delay unit 205 and the XOR circuit 207. Note that FIG. 6 shows a configuration in which the control signal CLK_B is supplied to the delay unit 205 and the XOR circuit 207 as an example, but the control signal CLK_A is supplied to the delay unit 205 and the XOR circuit 207. You can also.

The delay unit 205 delays the control signal CLK_B input for a predetermined time, and supplies the control signal CLK_B to the XOR circuit 207. Here, the delay unit 205 will continue the description assuming that the signal input for the time D1 is delayed and output. The XOR circuit 207 calculates the exclusive OR of the control signal CLK_B and the control signal CLK_B delayed by the predetermined delay time D1 by the delay unit 205. At the time t1, the low control signal CLK_B and the high signal are supplied from the delay unit 205 to the XOR circuit 207, so that the calculation result of the XOR circuit 207, that is, the control signal EN becomes a high signal. ..

The output from the XOR circuit 207 is supplied to the NOT circuit 209. The NOT circuit 209 inverts the input result from the XOR circuit 207 and outputs the inverted result. At the time t1, the NOT circuit 209 is supplied with the High signal from the XOR circuit 207, so that the output from the NOT circuit 209, that is, the control signal XOR becomes a Low signal.

The control signal EN from the XOR circuit 207 is supplied to the EN switch 221a and the EN switch 222a of the driver 201a, the EN switch 221b and the EN switch 222b of the driver 201b, and the EN switch 231. Since these EN switches are supplied with a High signal as the control signal EN at time t1, they are turned on.

The control signal XEN from the NOT circuit 209 is supplied to the XEN switch 223a and the XEN switch 224a of the driver 201a, and the XEN switch 223b and the XEN switch 224b of the driver 201b. Since these XEN switches are supplied with a Low signal as the control signal XEN at time t1, they are turned off.

At time t2, when the delay time D1 has elapsed from time t1, the signal from the delay unit 205 changes from Low to High, the control signal EN from the XOR circuit 207 changes from High to Low, and the control from the NOT circuit 209. The signal XEN changes from Low to High. By changing the control signal in this way, the EN switch 221a, EN switch 222a, EN switch 221b, EN switch 222b, and EN switch 231 are turned off, and the XEN switch 223a, XEN switch 224a, and XEN switch 223b, And the XEN switch 224b is turned on.

As described above, the control signal EN is a signal that is set to High during the delay time D1 of the delay unit 205. When the control signal EN is High, the EN switch is turned on. The EN switch will be on during the delay time D1. The time this EN switch is on is the period during which the charge is being reused.

At time t1, the driver 201a is in a state of outputting a High signal as the transfer control signal TRT_A, so that the gates of the transfer transistors 62-1-1 to 62-1-N are in a state of being charged, respectively. On the other hand, at time t1, since the driver 201b outputs a low signal as the transfer control signal TRT_B, the gates of the transfer transistors 62-2-1 to 62-2-N are in a state of being discharged, respectively.

When the EN switch 231 is turned on (closed) in such a state where charging and discharging are performed, the electric charge charged in the transfer transistors 62-2-1 to 62-2-N is EN. It moves to the transfer transistors 62-1-1 to 62-1-N side via the switch 231 and charges the gates of the transfer transistors 62-1-1 to 62-1-N.

At time t1, the transfer transistors 62-2-1 to 62-2-N have a voltage Vdd, and the transfer transistors 62-1-1 to 62-1-N have a voltage Vss (0V). Therefore, if the EN switch 231 is closed for a sufficient time, the voltages of the transfer transistors 62-1-1 to 62-1-N and the transfer transistors 62-2-1 to 62-2-N become equal, and the voltage is intermediate. The voltage is Vdd / 2, which is the potential.

Since the XEN switch is open between time t1 and time t2, there is no current flowing from the driver 102a (power supply (not shown)) to the transfer transistors 62-1-1 to 62-1-N. be. Therefore, the current flowing between the time t1 and the time t2 can be reduced, and the power consumption can be reduced.

From time t1 to time t2, the driver 102b is in the grounded state (potential Vss), but the XEN switch is open, so the transfer transistors 62-2-1 to 62-2-N There is no current flowing through the driver 102b. Therefore, from time t1 to time t2, a current can be passed from the transfer transistors 62-2-1 to 62-2-N to the transfer transistors 62-1-1 to 62-1-N via the EN switch 231. can.

The delay time D1 of the delay unit 205 is set so that the signal from the delay unit 205 changes from Low to High at the timing when each of the transfer transistors 62 reaches the intermediate potential. At time t2, the control signal EN from the XOR circuit 207 becomes Low, so that the EN switch is opened and the XEN switch is closed.

When the EN switch is open and the XEN switch is closed, the voltage from the power supply is applied to the transfer transistor 62 side from the driver 201. At time t2, a voltage from a power source is applied to the transfer transistors 62-1-1 to 62-1-N from the driver 201a, and charging is performed until the voltage reaches Vdd. The driver 201b side is in a grounded state, and the transfer transistors 62-2-1 to 62-2-N are discharged until the voltage Vss is reached.

In this way, charging and discharging are performed. When paying attention to the transfer transistor 62-1, charging is performed from the potential Vss (0V) to the potential Vdd between the time t1 and the time t3, but the half voltage Vdd / 2 is the transfer transistor 62-2. Is charged by accumulating the discharged charge, and the remaining voltage Vdd / 2 is charged by being supplied from the power source.

For example, in the case of the gate voltage control unit 46'shown in FIG. 5, charging is performed by supply from a power source from the potential Vss to the potential Vdd, but according to the gate voltage control unit 46 shown in FIG. Charging is performed by supplying from a power source from the potential Vdd / 2 to the potential Vdd. Therefore, the power consumption is reduced.

From time t3 to time t4, the transfer transistor 62-1 side maintains the state of the potential Vdd, so that the electric charge is transferred from PD61 to FD63.

At time t4, the control signal CLK_A changes from High to Low, the control signal CLK_B changes from Low to High, the control signal EN changes from Low to High, and the control signal XOR changes from High to Low. At time t5, when the delay time D1 has elapsed from time t4, the control signal EN changes from High to Low, and the control signal XOR changes from Low to High.

From time t4, discharging is started on the transfer transistor 62-1 side, and charging is started on the transfer transistor 62-2 side. From time t4 to time t5, the electric charge charged on the transfer transistor 62-1 side moves to the transfer transistor 62-2 side, and the transfer transistor 62-2 is charged.

From time t5 to time t6, the transfer transistor 62-2 is in a state where the voltage Vdd from the power supply is applied via the driver 201b, and the transfer transistor 62-2 is charged by the voltage Vdd from the power supply. From time t5 to time t6, the driver 201a is in a state of being grounded, and the transfer transistor 62-1 is in a state of being discharged.

As described above, when one transfer transistor 62 is charged, in the case of the pixel 50 including the transfer transistor 62 having a relationship with the other transfer transistor 62 being discharged, the charge charged in the discharging transfer transistor 62 is charged. By providing a period for moving to the transfer transistor 62 to be charged, the power consumption can be reduced. Control of such a period can be performed by providing an EN switch or a XEN switch and controlling the opening / closing of the EN switch or the XEN switch.

The period during which the control signal EN is turned on is substantially the same as the delay time D1 of the delay unit 205. If this delay time D1 is not properly set, the voltage may not be charged up to the voltage Vdd / 2, or the voltage Vdd / 2 may be maintained for a long time after reaching the voltage Vdd / 2. This will be described with reference to FIG.

The upper part of FIG. 8 shows the pulse of the control signal EN. The pulse width of the control signal EN becomes the delay time D1. The second stage of FIG. 8 shows the change in the potential of the gate of the transfer transistor 62 when the pulse width of the control signal EN is short, in other words, when the delay time is short. The short delay time is referred to as a delay time D11. In the case of the delay time D11, charging by reusing the electric charge is completed and charging from the power source is started before the voltage becomes Vdd / 2. The period of charging from this power source is defined as the power supply charging period C11.

If the delay time D11 is insufficient, the electric charge cannot be reused up to the voltage Vdd / 2, and the power supply charging period C11 becomes long, so that the effect of reducing power consumption diminishes.

The third stage of FIG. 8 shows the change in the potential of the gate of the transfer transistor 62 when the pulse width of the control signal EN is appropriate, in other words, when the delay time is appropriate. The appropriate delay time is represented by the delay time D12. In the case of the delay time D12, when the voltage reaches Vdd / 2, charging by reusing the electric charge is completed, and charging from the power source is started. The period of charging from this power source is defined as the power supply charging period C12.

If the delay time D12 is appropriate, the electric charge can be reused up to the voltage Vdd / 2, and the power supply charging period C12 can also be shortened, so that the effect of reducing power consumption can be obtained most.

The fourth stage of FIG. 8 shows the change in the potential of the gate of the transfer transistor 62 when the pulse width of the control signal EN is large, in other words, when the delay time is long. The long delay time is referred to as a delay time D13. In the case of the delay time D13, even after the voltage becomes Vdd / 2, there is a time in which the charge remains in the charged state due to the reuse of the electric charge, and then the charge from the power source is started. The period of charging from this power source is defined as the power supply charging period C13.

If the delay time D13 is long, the charge can be reused up to the voltage Vdd / 2, but even after the voltage reaches Vdd / 2, there is a possibility that wasteful time will occur without shifting to charging from the power supply. be. Since the power supply charging period C13 is the same as the power supply charging period C12, the effect of reducing power consumption can be obtained. The total charging period of the delay time D13 and the power supply charging period C13 may be long.

For this reason, the delay time D1 should be set to an appropriate time. The appropriate time is the time during which charging is performed by reusing the electric charge until the potential on the side to be charged reaches the intermediate potential, and when the potential reaches the intermediate potential, the charging can be switched to the charging from the power supply. be.

The delay time D1 is the delay time of the delay unit 205. Therefore, it is desirable that the delay time of the delay unit 205 is set to an appropriate delay time, and the delay time is controlled so as not to be deviated by a change in temperature or voltage. The gate voltage control unit 46 shown in FIG. 6 is provided with a PLL 203 in order to control the delay time of the delay unit 205 so that the delay time does not change due to changes in temperature or voltage. That is, the PLL 203 functions as a time control unit that controls the delay time of the delay unit 205.

DLL203 has, for example, a configuration as shown in FIG. The PLL 203 is configured to include a phase detection unit 321, a charge pump 322, and a delay unit 323. The charge pump 322 may be configured to include an LPF (Low Pass Filter) for smoothing. An input signal is input to the phase detection unit 321 and the delay unit 323 of the PLL 203. The input signal is, for example, a 1 GHz clock signal.

The delay unit 323 delays the input signal for a predetermined time, and returns the delayed input signal to the phase detection unit 321. The phase detection unit 321 detects the phase difference between the input signal and the delayed input signal, and outputs the phase difference to the charge pump 322. The charge pump 322 outputs a voltage at a level corresponding to the phase difference to the delay unit 323 and the delay unit 205 (FIG. 6) (not shown in FIG. 9) as a bias voltage. The output from the charge pump 322 may be the output from which the high frequency component has been removed by the LPF.

The output from the charge pump 322 is supplied to the delay unit 205 as a delay control signal (bias voltage) based on the voltage corresponding to the phase difference at that time. The delay unit 323 included in the PLL 203 can be configured in the same manner as the delay unit 205 (FIG. 6). The delay unit 323 has the same configuration as the delay unit 205 shown in FIG.

FIG. 10 is a diagram showing the configuration of an example of the delay portion 205. The delay unit 205 is configured to include a NOT circuit 351-1, a NOT circuit 351-2, a current source 352-1 and a current source 352-2. The delay section 323 of the PLL 203 shown in FIG. 9 also includes a NOT circuit 333-1, a NOT circuit 333.2, a current source 334-1 and a current source 334-2, and has the same configuration as the delay section 205.

The configuration of the delay unit 205 is an example, and is not limited to a configuration including two NOT circuits 351. For example, it may be configured to include two or more NOT circuits 351.

When the delay amount of the delay unit 205 is 1 ns, the delay amount of the delay unit 323 of the DDL 203 is also set to 1 ns. In the DDL 203, when the delay amount of the delay unit 323 becomes a delay amount other than 1 ns, the difference from 1 ns is detected as the phase difference by the phase detection unit 321 and the bias voltage for eliminating the phase difference is the char. It is output from the dipump 322.

The bias voltage from the charge pump 322 is supplied to the current source 334 of the delay unit 323. By adjusting the current source 324 by the bias voltage, the delay amount of the delay unit 323 is adjusted. By adjusting the delay amount, when it becomes 1 ns, the phase is not detected by the phase detection unit 321. In this way, a bias voltage is generated in the PLL 203 so that the delay portion 323 can obtain a delay amount of 1 ns.

The bias voltage generated by the PLL 203 is also supplied to the current source 352 of the delay portion 205 (FIG. 10). Similarly to the delay unit 323, the delay unit 205 also adjusts the delay amount as the delay unit 205 by adjusting the current source 352 by the bias voltage.

By providing the PLL 203 and adjusting the delay amount of the delay unit 205 with the bias voltage from the DL 203, the delay amount can be maintained at a constant value even if the temperature or voltage changes.

By keeping the delay amount of the delay unit 205 at the desired delay amount, it is possible to always perform the charging period in which the electric charge is reused for an appropriate period. Therefore, the power consumption can be reduced and the time required for charging / discharging can be set to an appropriate time.

<Other configurations of gate voltage control unit>
The gate voltage control unit 46 shown in FIG. 6 is configured to provide one EN switch 231 for a plurality of pixels 50 arranged in a predetermined row of the pixel array unit 41 and control the EN switch 231. Indicated.

A plurality of EN switches 231 provided in the pixel array unit 41 may be provided in one row. For example, as shown in FIG. 11, EN switches 231 may be provided at both ends of the pixels 50 arranged in a predetermined row of the pixel array unit 41.

In the configuration including the gate voltage control unit 46 shown in FIG. 7, the EN switch 231-1 is provided on the side of the pixels 50 arranged in a predetermined row of the pixel array unit 41 near the driver 201, and the EN switch 231-1 is provided from the driver 201. An EN switch 231-2 is provided on the far side. In other words, an EN switch 231-1 is provided at a position between the driver 201 and the transfer transistor 62-1-1 (transfer transistor 62-1-2), and the transfer transistor 62-1-N (transfer transistor 62) is provided. An EN switch 231-2 is provided on the outside of −2-N) (the side where the column processing unit 43 is located).

The EN switches 231 provided in the pixel array unit 41 are not only provided at both ends (two are provided), but a plurality of EN switches 231 may be further provided. One EN switch 231 may be provided for each of the plurality of transfer transistors 62. For example, an EN switch 231 may be provided for every five transfer transistors 62. Further, for example, an EN switch 231 may be provided for each transfer transistor 62.

By providing a plurality of EN switches 231, it is possible to shorten the time for reusing the electric charge and performing charging.

Although FIG. 6 shows an example in which the driver 201 is provided at one end of a predetermined row of the pixel array unit 41, it may be provided at both ends as shown in FIG. In the configuration shown in FIG. 12, the driver 201a-1 is provided on the transfer transistor 62-1-1 side, and the driver 201b-1 is provided on the transfer transistor 62-2-1 side. The driver 201a-2 is provided on the transfer transistor 62-1-1N side, and the driver 201b-2 is provided on the transfer transistor 62-2-N side.

By providing the driver 201 at both ends of the pixel array unit 41 in the column direction in this way, the time required for charging and discharging can be shortened.

<About the horizontal connection configuration of the gate voltage control unit>
FIG. 6 shows a gate voltage control unit 46 for pixels 50 arranged in a predetermined row of the pixel array unit 41, but the pixel array unit 41 has a plurality of rows of pixels 50. One gate voltage control unit 46 may be provided for all the pixels 50 arranged in the pixel array unit 41. In this case, wiring is provided so that the transfer control signal TRT_A and the transfer control signal TRT_B can be supplied not only in the column direction but also in the row direction.

A gate voltage control unit 46 may be provided for each of a plurality of rows. For example, one gate voltage control unit 46 that outputs a transfer control signal TRT_A or a transfer control signal TRT_B for the pixels 50 arranged in the five columns may be provided for every five columns.

A gate voltage control unit 46 may be provided for each row. A description will be given of the configuration when the gate voltage control unit 46 is provided for each of a plurality of columns or for each column.

FIG. 13 shows a configuration when a gate voltage control unit 46 is provided for each row. Even when the gate voltage control unit 46 is provided for each row, one DLL 203 can be provided and a bias voltage can be supplied in common to a plurality of gate voltage control units 46.

In order to supply the bias voltage from the PLL 203, the wiring 261 connecting the PLL 203 and the delay portions 205-1 to 205-M is provided.

The pixels 50 arranged in the first row of the pixel array unit 41 are provided with the driver 201a-1 and the driver 201b-1 shared by the pixels 50 arranged in the first row, and these drivers 201 provide. A shared delay section 205-1 and an XOR circuit 207-1 are provided. An EN switch 231-1 is provided in the wiring connecting the driver 201a-1 and the driver 201b-2.

Although not shown, a NOT circuit 209 is also provided for each row, and is configured to control the driver 201 provided for each row. As described with reference to FIG. 11, a plurality of EN switches 231 may be provided in one row. This also applies to the following description.

Similarly, the pixels 50 arranged in the second row of the pixel array unit 41 are provided with the driver 201a-2 and the driver 201b-2 shared by the pixels 50 arranged in the second row, and these are provided. A delay section 205-2 and an XOR circuit 207-2 shared by the driver 201 are provided. An EN switch 231-2 is provided in the wiring connecting the driver 201a-1 and the driver 201b-2.

Similarly, the pixels 50 arranged in the M-th row of the pixel array unit 41 are provided with the drivers 201a-M and the drivers 201b-M shared by the pixels 50 arranged in the M-th row, and these are provided. A delay section 205-M and an XOR circuit 207-M shared by the driver 201 are provided. An EN switch 231-M is provided in the wiring connecting the driver 201a-M and the driver 201b-M.

In this way, the gate voltage control unit 46 may be provided for each row. When a plurality of gate voltage control units 46 are provided in this way, if there are variations in the individual gate voltage control units 46, the delay time of the delay unit 205 may differ among the individual gate voltage control units 46. there is a possibility. With reference to FIG. 8 again, the noise generated when the delay time of the delay unit 205 is different will be described.

Temporarily, the delay time of the delay unit 205-1 is the delay time D11, the delay time of the delay unit 205-2 is the delay time D12, and the delay time of the delay unit 205-M is the delay time D13. In this case, the on and off timings of the transfer transistor 62 will be different. Such a timing shift is a timing shift in which the electric charge is transferred from the PD 61 to the FD 63 (FIG. 3). If such a deviation occurs, the transfer will be performed at different timings for each column. Such deviation may affect the distance measurement performance as distance noise.

Therefore, it is desirable that the delay time in each delay unit 205 is configured so as not to be deviated. In FIG. 13, the delay portion 205 is shorted for each column to average the process variation. Referring to FIG. 13, the input side of the delay portions 205-1 to 205-M is short-circuited by being connected by the wiring 251-1. The output sides of the delay portions 205-1 to 205-M are short-circuited by being connected by the wiring 252-1.

In the example shown in FIG. 13, both the input side and the output side of the delay unit 205 are shorted for each column, but as shown in FIG. 14, only the input side of the delay unit 205 is shown. May be shorted. In the configuration shown in FIG. 14, the input side of the delay portions 205-1 to 205-M is shorted by the wiring 251-1.

As shown in FIG. 15, a configuration in which only the output side of the delay unit 205 is shorted may be used. In the configuration shown in FIG. 15, the output side of the delay portions 205-1 to 205-M is shorted by the wiring 251-2.

In this way, the process variation can be averaged by setting at least one of the input side and the output side of the delay unit 205 as short. For example, as shown in FIG. 16, consider a case where there is process variation in the delay unit 205-1 and the delay unit 205-2, and the delay time is different. If the delay time of the delay section 205-2 is longer than the delay time of the delay section 205-1, the output of the delay section 205-1 helps the delay section 205-2 to charge the delay section 205-2. The delay of -2 is shortened, and as a result, the difference in delay can be reduced.

That is, the delay portion 205 having the smaller delay assists in charging the delay portion 205 having the larger delay, so that the delays are averaged as a whole. Therefore, even if there is an individual difference in the delay portion 205, the processing that absorbs the difference can be performed by averaging. Therefore, it is possible to suppress the generation of ranging noise and suppress the deterioration of ranging performance.

With reference to FIG. 17, the effect when this technology is applied will be described. FIG. 17 is a graph showing a case where charging / discharging is performed by the gate voltage control unit 46'shown in FIG. 5 and a case where charging / discharging is performed by the gate voltage control unit 46 shown in FIG. 6 (FIG. 13). Is. The upper part of FIG. 17 shows the pulse of the control signal EN when the gate voltage control unit 46 shown in FIG. 6 is used.

The second-stage graph in FIG. 17 is a change in voltage applied to the pixel drive line 47, and is a graph corresponding to, for example, the third-stage waveform in FIG. 7.

Of the graphs shown in the second, third, and fourth paragraphs of FIG. 17, the graph shown by the dotted line represents the case where the gate voltage control unit 46'shown in FIG. 5 is used, and the graph shown by the solid line is The case where the gate voltage control unit 46 shown in FIG. 6 is used is shown. Further, the graph shown in FIG. 17 is an example of the result obtained by the applicant performing the simulation.

The third-stage graph in FIG. 17 is a graph showing changes in the charging current flowing through the pixel drive line 47. The graph shown by the dotted line is shown by the solid line, whereas there is one peak through which current flows in one section (from the time when the EN signal is turned on to the time when it is turned on next). The graph differs in two points. The graph shown by the dotted line is a graph in which one peak for charging from the power source appears in one section because the gate voltage control unit 46'shown in FIG. 5 charges only from the power source.

The solid line graph shows the peak in which the gate voltage control unit 46 shown in FIG. 6 performs charging by reusing the electric charge and charging from the power source, so that charging by reusing is performed in one section. The graph shows two peaks that are charged from the power source.

In the graph relating to the gate voltage control unit 46'shown in FIG. 5 shown by the dotted line, one peak appears in one section during the discharge as in the case of charging, whereas it is shown in FIG. 6 shown by the solid line. The graph relating to the gate voltage control unit 46 is a graph in which two peaks appear in one section.

The fourth graph in FIG. 17 is a graph showing changes in the voltage of the power supply. When the gate voltage control unit 46'shown by the dotted line is used, the drop amount of the power supply voltage is about 340 mVpp. On the other hand, when the gate voltage control unit 46 shown by the solid line is used, the drop amount of the power supply voltage is about 200 mVpp. By reusing the electric charge, the drop amount of 340 mVpp can be reduced to 200 mVpp.

Although not shown, by using the gate voltage control unit 46 shown in FIG. 6 for charging by reusing the electric charge, the power consumption is about 1/1 as compared with the charging without reusing the electric charge. It has also been confirmed by the applicant that it can be set to 2.

As described above, according to this technology, it is possible to reduce the power consumption for driving the pixels. Even when there is a change in temperature or voltage, it is possible to prevent the charge reuse period from changing. It is possible to reduce, for example, the occurrence of ranging noise due to process variation. The drop in power supply voltage can be reduced.

<Other configurations of the gate voltage control unit>
In the above-described embodiment, the case where the PLL 203 is used has been described as an example, but the bias voltage may be controlled by using a circuit other than the PLL 203. FIG. 18 is a diagram showing a configuration of an example of a gate voltage control unit 46 in which a bias voltage is controlled by using a circuit other than the DLL 203.

The gate voltage control unit 46 shown in FIG. 18 has a configuration in which a thermometer 401 and a DAC (Digital Analog Converter) 402 are used instead of the PLL 203. The thermometer 401 measures the temperature of, for example, the light receiving unit 12 (FIG. 1) provided with the gate voltage control unit 46, and supplies the measurement result (temperature information) to the DAC 402. The DAC 402 converts the temperature information of the digital signal into an analog signal, and uses the temperature information of the analog signal as a signal for setting the value of the bias voltage. According to this configuration, it is possible to generate a bias voltage according to the amount of change in temperature and control the delay unit 205.

Compared to DLL203, the thermometer 401 and DAC402 have the advantages of a smaller installation area and easier design. On the other hand, the PLL 203 can cope with not only the temperature change but also the fluctuation of the power supply, but when the thermometer 401 or the DAC 402 is used, there is a possibility that the fluctuation of the power supply cannot be sufficiently suppressed. At the time of design, in consideration of such a thing, it may be decided whether to configure with the PLL 203 or to use the thermometer 401 and the DAC 402.

<When applied to split drive>
As described with reference to FIG. 17, by applying the present technology, it is possible to reduce the instantaneous drop amount of the power supply voltage. Further, by adapting to the split drive, it is possible to suppress the steady drop of the power supply voltage, which may be a problem in the split drive, by half.

Refer to FIG. 13 again. As described with reference to FIG. 13, the gate voltage control unit 46 (a part constituting the gate voltage control unit 46) is provided for each row of the pixel array unit 41. Referring to FIG. 2 again, in the pixel array unit 41, the pixels 50 are arranged in the matrix direction, and one delay unit 205 (including the gate voltage control unit 46) is arranged per row. Further, the columns of the column processing unit 43 are connected to each column.

Driving at different drive timings for each column is referred to as split drive here. In the case of the split drive, since it is driven for each column, the peak current can be reduced as compared with the case where all the pixels 50 of the pixel array unit 41 are driven at once, and the momentary power drop can be reduced. .. However, the divided power supply currents overlap to form a steady current. This steady-state current causes an IR drop, which can be a problem for a steady power supply voltage drop. This problem can be improved by combining the present technology with the split drive.

When this technology and split drive are combined, the above-mentioned steady current can be halved because the electric charge can be reused by this technology. As a result, it is possible to suppress the steady drop of the power supply voltage, which may be a problem in the divided drive, to about half.

The applicant has a steady drop in the power supply voltage when the gate voltage control unit of the conventional method shown in FIG. 5 is used for the divided drive and when the gate voltage control unit 46 shown in FIG. 13 is used for the divided drive. The amount was measured.

As a result, the steady power supply voltage drop amount in the conventional gate voltage control unit shown in FIG. 5 when not divided drive was 310 mV, whereas the gate voltage control unit 46 shown in FIG. 13 The amount of steady power supply voltage drop in the split drive was 190 mV. From this result, it was confirmed that the steady drop amount can be reduced by using the gate voltage control unit 46 and driving by split drive.

Although the above-described embodiment has been described by taking an image pickup device that performs distance measurement as an example, the present technology can also be applied to a device that performs processing other than distance measurement.

<Example of electronic device configuration>
The distance measuring device 10 may be configured as a distance measuring module. The range-finding device 10 can be applied to a range-finding module, and is also applicable to various electronic devices such as an image pickup device such as a digital still camera and a digital video camera having a range-finding function, and a smartphone having a range-finding function. Can be applied.

FIG. 19 is a block diagram showing a configuration example of a smart phone as an electronic device to which the present technology is applied.

As shown in FIG. 19, the smart phone 601 includes a distance measuring module 602, an image pickup device 603, a display 604, a speaker 605, a microphone 606, a communication module 607, a sensor unit 608, a touch panel 609, and a touch panel 609. The control unit 610 is connected and configured via the bus 611. Further, the control unit 610 has functions as an application processing unit 621 and an operation system processing unit 622 by executing a program by the CPU.

The distance measuring device 10 of FIG. 1 is applied to the distance measuring module 602. For example, the distance measuring module 602 is arranged in front of the smart phone 601 and performs distance measurement for the user of the smart phone 601 such as the face, hands, and fingers of the user. The depth value of the surface shape of can be output as a distance measurement result.

The image pickup device 603 is arranged in front of the smartphone 601 and acquires an image of the user by taking an image of the user of the smartphone 601 as a subject. Although not shown, the image pickup device 603 may be arranged on the back surface of the smart phone 601.

The display 604 displays an operation screen for processing by the application processing unit 621 and the operation system processing unit 622, an image captured by the image pickup device 603, and the like. The speaker 605 and the microphone 606, for example, output the voice of the other party and collect the voice of the user when making a call by the smartphone 601.

The communication module 607 is an internet, a public telephone network, a wide area communication network for wireless mobiles such as so-called 4G lines and 5G lines, and a communication network such as WAN (Wide Area Network) and LAN (Local Area Network). Performs short-range wireless communication such as network communication, Bluetooth (registered trademark), and NFC (Near Field Communication). The sensor unit 608 senses speed, acceleration, proximity, etc., and the touch panel 609 acquires a touch operation by the user on the operation screen displayed on the display 604.

The application processing unit 621 performs processing for providing various services by the smart phone 601. For example, the application processing unit 621 creates a face with computer graphics that virtually reproduces the facial expression of the user based on the depth value supplied from the distance measuring module 602, and displays the face. The process of displaying on 604 can be performed. Further, the application processing unit 621 can perform a process of creating, for example, three-dimensional shape data of an arbitrary three-dimensional object based on the depth value supplied from the ranging module 602. ..

The operation system processing unit 622 performs processing for realizing the basic functions and operations of the smartphone 601. For example, the operation system processing unit 622 may perform a process of authenticating the user's face and unlocking the smart phone 601 based on the depth value supplied from the ranging module 602. can. Further, the operation system processing unit 622 performs a process of recognizing, for example, a gesture of the user based on the depth value supplied from the ranging module 602, and performs various operations according to the gesture. You can perform input processing.

In the smart phone 601 configured in this way, by applying the distance measuring device 10 as the distance measuring module 602, for example, the distance to a predetermined object can be measured and displayed, or a predetermined object can be measured. It is possible to perform processing such as creating and displaying three-dimensional shape data of.

<Application example to mobile>
The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure is mounted on a moving body of any kind such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot. It may be realized as a device.

FIG. 20 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile control system to which the technique according to the present disclosure can be applied.

The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in FIG. 20, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. Further, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio image output unit 12052, and an in-vehicle network I / F (Interface) 12053 are shown.

The drive system control unit 12010 controls the operation of the device related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 includes a drive force generator for generating a drive force of a vehicle such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, and a steering wheel of the vehicle. It functions as a control device such as a steering mechanism that adjusts the angle and a braking device that generates braking force of the vehicle.

The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 is used as a keyless entry system, a smart key system, a power window device, or a control device for various lamps such as headlamps, back lamps, brake lamps, winkers, or fog lamps. Function. In this case, the body system control unit 12020 may be input with radio waves transmitted from a portable device that substitutes for the key or signals of various switches. The body system control unit 12020 receives inputs of these radio waves or signals and controls a vehicle door lock device, a power window device, a lamp, and the like.

The vehicle outside information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, the image pickup unit 12031 is connected to the vehicle outside information detection unit 12030. The vehicle outside information detection unit 12030 causes the image pickup unit 12031 to capture an image of the outside of the vehicle and receives the captured image. The out-of-vehicle information detection unit 12030 may perform object detection processing or distance detection processing such as a person, a vehicle, an obstacle, a sign, or a character on the road surface based on the received image.

The image pickup unit 12031 is an optical sensor that receives light and outputs an electric signal according to the amount of the light received. The image pickup unit 12031 can output an electric signal as an image or can output it as distance measurement information. Further, the light received by the image pickup unit 12031 may be visible light or invisible light such as infrared light.

The in-vehicle information detection unit 12040 detects the in-vehicle information. For example, a driver state detection unit 12041 that detects the driver's state is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that images the driver, and the in-vehicle information detection unit 12040 determines the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041. It may be calculated, or it may be determined whether or not the driver has fallen asleep.

The microcomputer 12051 calculates the control target value of the driving force generator, the steering mechanism or the braking device based on the information inside and outside the vehicle acquired by the information detection unit 12030 outside the vehicle or the information inside the vehicle 12040, and the drive system. A control command can be output to the control unit 12010. For example, the microcomputer 12051 is an ADAS (Advanced Driver Assistance System) including vehicle collision avoidance or impact mitigation, follow-up driving based on inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane deviation warning, and the like. ) Can be coordinated for the purpose of realizing the function.

Further, the microcomputer 12051 operates by controlling a driving force generating device, a steering mechanism, a braking device, or the like based on the information around the vehicle acquired by the outside information detection unit 12030 or the inside information detection unit 12040. It is possible to perform coordinated control for the purpose of automatic driving, etc., which runs autonomously without relying on the operation of a person.

Further, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the vehicle exterior information detection unit 12030. For example, the microcomputer 12051 controls the headlamps according to the position of the preceding vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030 to prevent glare such as switching the high beam to the low beam. Coordinated control can be performed for the purpose of this.

The audio image output unit 12052 transmits an output signal of at least one of audio and image to an output device capable of visually or audibly notifying information to the passenger or the outside of the vehicle. In the example of FIG. 20, as an output device, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified. The display unit 12062 may include, for example, at least one of an onboard display and a head-up display.

FIG. 21 is a diagram showing an example of the installation position of the image pickup unit 12031.

In FIG. 21, the image pickup unit 12031 has

image pickup units

12101, 12102, 12103, 12104, and 12105.

The

image pickup units

12101, 12102, 12103, 12104, 12105 are provided at positions such as, for example, the front nose, side mirror, rear bumper, back door, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The image pickup unit 12101 provided in the front nose and the image pickup unit 12105 provided in the upper part of the windshield in the vehicle interior mainly acquire an image in front of the vehicle 12100. The

image pickup units

12102 and 12103 provided in the side mirror mainly acquire images of the side of the vehicle 12100. The image pickup unit 12104 provided in the rear bumper or the back door mainly acquires an image of the rear of the vehicle 12100. The image pickup unit 12105 provided on the upper part of the windshield in the vehicle interior is mainly used for detecting a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

Note that FIG. 21 shows an example of the shooting range of the imaging units 12101 to 12104. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, and the imaging ranges 12112 and 12113 indicate the imaging range of the

imaging units

12102 and 12103 provided on the side mirrors, respectively, and the imaging range 12114. Indicates the imaging range of the imaging unit 12104 provided on the rear bumper or the back door. For example, by superimposing the image data captured by the image pickup units 12101 to 12104, a bird's-eye view image of the vehicle 12100 as viewed from above can be obtained.

At least one of the image pickup units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image pickup units 12101 to 12104 may be a stereo camera including a plurality of image pickup elements, or may be an image pickup element having pixels for phase difference detection.

For example, the microcomputer 12051 has a distance to each three-dimensional object within the imaging range 12111 to 12114 based on the distance information obtained from the imaging unit 12101 to 12104, and a temporal change of this distance (relative to the vehicle 12100). By obtaining the speed), a three-dimensional object that is the closest three-dimensional object on the traveling path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in substantially the same direction as the vehicle 12100 is extracted as a preceding vehicle. be able to. Further, the microcomputer 12051 sets an inter-vehicle distance to be secured in advance in front of the preceding vehicle, and performs automatic brake control (including follow-up stop control), automatic acceleration control (including follow-up start control), and the like. be able to. In this way, it is possible to perform coordinated control for the purpose of automatic driving or the like in which the vehicle travels autonomously without depending on the operation of the driver.

For example, the microcomputer 12051 uses the distance information obtained from the image pickup units 12101 to 12104 to obtain three-dimensional object data related to a three-dimensional object, such as a two-wheeled vehicle, an ordinary vehicle, a large vehicle, a pedestrian, a utility pole, and the like. It can be classified into three-dimensional objects and extracted, and used for automatic avoidance of obstacles. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or higher than the set value and there is a possibility of collision, the audio speaker 12061 or the like. By outputting an alarm to the driver via the display unit 12062 and performing forced deceleration and avoidance steering via the drive system control unit 12010, it is possible to provide driving support for collision avoidance.

At least one of the image pickup units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured image of the imaging unit 12101 to 12104. Such recognition of a pedestrian is, for example, a procedure for extracting feature points in an image captured by an image pickup unit 12101 to 12104 as an infrared camera, and a pattern matching process for a series of feature points indicating the outline of an object to determine whether the pedestrian is a pedestrian. It is done by the procedure of determining whether or not. When the microcomputer 12051 determines that a pedestrian is present in the captured image of the image pickup unit 12101 to 12104 and recognizes the pedestrian, the audio image output unit 12052 is a square for emphasizing the recognized pedestrian. The display unit 12062 is controlled so that the contour lines are superimposed and displayed. Further, the audio image output unit 12052 may control the display unit 12062 so as to display an icon or the like indicating a pedestrian at a desired position.

In the present specification, the system represents the entire device composed of a plurality of devices.

It should be noted that the effects described in the present specification are merely examples and are not limited, and other effects may be obtained.

The embodiment of the present technology is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present technology.

The present technology can also have the following configurations.
(1)
Photodiode and
A first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and
A pixel array unit in which pixels including a second transfer transistor that transfers the electric charge generated by the photodiode to a second charge storage unit are arranged in a matrix are used.
A switch arranged at a position connecting the first transfer transistor and the second transfer transistor, and
A control unit for controlling the switch to be turned on for a predetermined time from the time when the first transfer transistor or the second transfer transistor is instructed to start the transfer of electric charges is provided.
The control unit is an image pickup apparatus including a time control unit that controls the predetermined time.
(2)
The imaging device according to (1) above, wherein the time control unit is a DLL (Delay Locked Loop).
(3)
The image pickup apparatus according to (1) or (2), wherein the control unit includes a delay unit, and the time control unit controls the delay time of the delay unit.
(4)
The image pickup apparatus according to (3), wherein the control unit controls the delay time of the delay unit to be a time during which the switch is turned on.
(5)
The image pickup apparatus according to any one of (1) to (4), wherein one or a plurality of the switches are arranged with respect to the plurality of pixels arranged in the column direction of the pixel array unit.
(6)
The image pickup apparatus according to any one of (1) to (4), wherein the switches are arranged at both ends of the row with respect to a plurality of pixels arranged in the row direction of the pixel array unit.
(7)
The image pickup apparatus according to any one of (1) to (4), wherein the switch is arranged for each pixel arranged in the column direction of the pixel array unit.
(8)
The image pickup apparatus according to any one of (1) to (7), wherein the control unit is provided for each of the plurality of pixels arranged in the row direction of the pixel array unit.
(9)
The image pickup apparatus according to any one of (1) to (7), wherein the control unit is provided for each of a predetermined number of the rows of a plurality of pixels arranged in the column direction of the pixel array unit. ..
(10)
The time control unit measures the temperature, generates a bias voltage according to the measured temperature, and supplies the bias voltage to the control unit. Any one of (1), (3), and (9). The imaging device according to.
(11)
The control unit includes a first driver that controls charging / discharging of the first transfer transistor and a second driver that controls charging / discharging of the second transfer transistor.
The first driver and the second driver control so that charging / discharging is not performed via the first driver and the second driver when the switch is on (1) to (1). The image pickup apparatus according to any one of 10).
(12)
The first driver and the second driver have a MIMO connected to a high potential and an MIMO connected to a low potential, respectively.
When the switch is controlled to be on, the first switch that is turned on and
The imaging apparatus according to (11) above, which includes a second switch that is turned on when the switch is controlled to be off.
(13)
The result of the exclusive OR of the first signal input to the first driver or the second driver and the second signal in which the first signal is delayed by a predetermined delay time by the delay unit. The image pickup apparatus according to (12) above, wherein the image is used as a signal for controlling the opening and closing of the first switch.
(14)
The image pickup apparatus according to (13), wherein the result of inverting the result of the exclusive OR is used as a signal for controlling the opening and closing of the first switch.
(15)
Photodiode and
A first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and
A pixel array unit in which pixels including a second transfer transistor that transfers the electric charge generated by the photodiode to a second charge storage unit are arranged in a matrix are used.
An image pickup device including a switch arranged at a position connecting the first transfer transistor and the second transfer transistor is provided.
From the time when the first transfer transistor or the second transfer transistor is instructed to start the transfer of the electric charge, the switch is controlled to be turned on for a predetermined time.
An imaging method in which a predetermined time is controlled by a time control unit included in the control unit.
(16)
Photodiode and
A first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and
A pixel array unit in which pixels including a second transfer transistor that transfers the electric charge generated by the photodiode to a second charge storage unit are arranged in a matrix are used.
A switch arranged at a position connecting the first transfer transistor and the second transfer transistor, and
A control unit for controlling the switch to be turned on for a predetermined time from the time when the first transfer transistor or the second transfer transistor is instructed to start the transfer of electric charges is provided.
The control unit includes an image pickup device including a time control unit that controls the predetermined time, and an image pickup device.
A light source that irradiates irradiation light whose brightness fluctuates periodically,
An electronic device including a light emission control unit that controls the irradiation timing of the irradiation light.

10 ranging device, 11 lens, 12 light receiving unit, 13 signal processing unit, 14 light emitting unit, 15 light emitting control unit, 16 filter unit, 41 pixel array unit, 42 vertical drive unit, 43 column processing unit, 44 horizontal drive unit, 45 system control unit, 46 gate voltage control unit, 47 pixel drive line, 48 vertical signal line, 50 pixels, 51 taps, 61 photodiode, 62 transfer transistor, 63 FD, 64 reset transistor, 65 amplification transistor, 66 selection Transistor, 201 driver, 203 DLL, 205 delay part, 207 XOR circuit, 209 NOT circuit, 221 EN switch, 222 EN switch, 223 XEN switch, 224 XEN switch, 231 EN switch, 251 wiring, 321 phase detector, 322 cha -The pump, 323 delay part, 324 current source, 331 EN switch, 333 NOT circuit, 334 current source, 351 NOT circuit, 352 current source, 401 thermometer, 402 DAC

Claims

Photodiode and
A first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and
A pixel array unit in which pixels including a second transfer transistor that transfers the electric charge generated by the photodiode to a second charge storage unit are arranged in a matrix are used.
A switch arranged at a position connecting the first transfer transistor and the second transfer transistor, and
A control unit for controlling the switch to be turned on for a predetermined time from the time when the first transfer transistor or the second transfer transistor is instructed to start the transfer of electric charges is provided.
The control unit is an image pickup apparatus including a time control unit that controls the predetermined time.
The imaging device according to claim 1, wherein the time control unit is a DLL (Delay Locked Loop).
The imaging device according to claim 1, wherein the control unit includes a delay unit, and the time control unit controls the delay time of the delay unit.
The imaging device according to claim 3, wherein the control unit controls the delay time of the delay unit to be a time during which the switch is turned on.
The image pickup apparatus according to claim 1, wherein one or a plurality of the switches are arranged with respect to the plurality of pixels arranged in the column direction of the pixel array unit.
The image pickup apparatus according to claim 1, wherein switches are arranged at both ends of the row with respect to a plurality of pixels arranged in the row direction of the pixel array unit.
The image pickup apparatus according to claim 1, wherein the switch is arranged for each pixel arranged in the column direction of the pixel array unit.
The image pickup apparatus according to claim 1, wherein the control unit is provided for each of the plurality of pixels arranged in the column direction of the pixel array unit.
The image pickup apparatus according to claim 1, wherein the control unit is provided for each of a predetermined number of the rows of a plurality of pixels arranged in the column direction of the pixel array unit.
The imaging device according to claim 1, wherein the time control unit measures a temperature, generates a bias voltage according to the measured temperature, and supplies the bias voltage to the control unit.
The control unit includes a first driver that controls charging / discharging of the first transfer transistor and a second driver that controls charging / discharging of the second transfer transistor.
The first driver and the second driver are according to claim 1, wherein when the switch is turned on, the first driver and the second driver are controlled so that charging / discharging is not performed via the first driver and the second driver. Imaging device.
The first driver and the second driver have a MIMO connected to a high potential and an MIMO connected to a low potential, respectively.
When the switch is controlled to be on, the first switch that is turned on and
The imaging apparatus according to claim 11, further comprising a second switch that is turned on when the switch is controlled to be off.
The result of the exclusive OR of the first signal input to the first driver or the second driver and the second signal in which the first signal is delayed by a predetermined delay time by the delay unit. 12. The image pickup apparatus according to claim 12, wherein the image is used as a signal for controlling the opening and closing of the first switch.
The image pickup apparatus according to claim 13, wherein the result of inverting the result of the exclusive OR is used as a signal for controlling the opening and closing of the first switch.
Photodiode and
A first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and
A pixel array unit in which pixels including a second transfer transistor that transfers the electric charge generated by the photodiode to a second charge storage unit are arranged in a matrix are used.
An image pickup device including a switch arranged at a position connecting the first transfer transistor and the second transfer transistor is provided.
From the time when the first transfer transistor or the second transfer transistor is instructed to start the transfer of the electric charge, the switch is controlled to be turned on for a predetermined time.
An imaging method in which a predetermined time is controlled by a time control unit included in the control unit.
Photodiode and
A first transfer transistor that transfers the charge generated by the photodiode to the first charge storage unit, and
A pixel array unit in which pixels including a second transfer transistor that transfers the electric charge generated by the photodiode to a second charge storage unit are arranged in a matrix are used.
A switch arranged at a position connecting the first transfer transistor and the second transfer transistor, and
A control unit for controlling the switch to be turned on for a predetermined time from the time when the first transfer transistor or the second transfer transistor is instructed to start the transfer of electric charges is provided.
The control unit includes an image pickup device including a time control unit that controls the predetermined time, and an image pickup device.
A light source that irradiates irradiation light whose brightness fluctuates periodically,
An electronic device including a light emission control unit that controls the irradiation timing of the irradiation light.