WO2022012007A1 - 电路板以及服务器 - Google Patents

电路板以及服务器 Download PDF

Info

Publication number
WO2022012007A1
WO2022012007A1 PCT/CN2021/071203 CN2021071203W WO2022012007A1 WO 2022012007 A1 WO2022012007 A1 WO 2022012007A1 CN 2021071203 W CN2021071203 W CN 2021071203W WO 2022012007 A1 WO2022012007 A1 WO 2022012007A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
circuit board
prepreg
signal line
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2021/071203
Other languages
English (en)
French (fr)
Inventor
刘法志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Wave Intelligent Technology Co Ltd
Original Assignee
Suzhou Wave Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Wave Intelligent Technology Co Ltd filed Critical Suzhou Wave Intelligent Technology Co Ltd
Publication of WO2022012007A1 publication Critical patent/WO2022012007A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching

Definitions

  • the present invention relates to the technical field of electronic devices, in particular to a circuit board and a server.
  • the server provides computing, storage, data exchange and other services for Internet users, and is an important node in the Internet era.
  • the server has the characteristics of high computing speed, long running time and large data throughput, and the hardware composition of the server mainly includes circuit boards and mechanical devices. Among them, the circuit board is responsible for transmitting, converting electric energy, transmitting and processing signals. There are thousands of signal lines on the circuit board. These lines need to run for a long time, so the role of the signal is also extremely important. It ensures the efficient and stable operation of the server, and on the other hand, it can also greatly reduce the operating cost of the data center.
  • the signal line in the circuit board needs to transmit the power of the electrical signal from the sending end to the receiving end without distortion within the required time, and the reasons for destroying the integrity of the electrical signal may include reflection, ringing, ground bounce, crosstalk, etc. .
  • the problem of signal integrity has become the focus of attention in the field of high-speed signals.
  • signal lines in circuit boards such as high-speed lines, are usually composed of two parallel signal lines, and the two signal lines are located in a prepreg layer (PP for short).
  • the circuit board also includes Multiple layer structures such as reference layer, etching layer, insulating layer, etc.
  • the parallel routing method of two signal lines is easy to generate energy coupling, and the electric field of the electrical signal will diverge in the reference layer and the prepreg layer, increasing the transmission loss and causing the technical problem of electrical signal distortion.
  • the purpose of the present invention is to provide a circuit board and a server, so as to solve the technical problem of easily causing electrical signal distortion in the prior art.
  • an embodiment of the present invention provides a circuit board, comprising a prepreg layer and a first reference layer, and a first insulating layer located between the prepreg layer and the first reference layer;
  • a signal line is formed in the prepreg layer, and the signal line includes two parallel wirings;
  • Two sides of the signal line are provided with via holes penetrating the first insulating layer, inner walls of the via holes are formed with conductor materials, and the prepreg layer is electrically connected to the first reference layer through the conductor materials.
  • the via holes are symmetrically arranged on both sides of the signal line.
  • the shortest distance between the via hole and the trace is 0.3 to 0.7 times the distance between the two traces.
  • a plurality of via holes are respectively provided on both sides of the signal line.
  • the spacing of the via holes is 200 to 400 mils.
  • At least one conductor layer is further included on the side of the semi-cured layer away from the first reference layer.
  • circuit board further includes via stubs penetrating each of the conductor layers;
  • An isolation disk surrounding the via stub is formed in at least one of the conductor layers.
  • the minimum distance between the via hole and the conductor layer is greater than the radius of the isolation disk.
  • the at least one conductor layer includes a second reference layer, and a second insulating layer is disposed between the prepreg layer and the second reference layer.
  • an embodiment of the present invention further provides a server, including the circuit board provided in the first aspect.
  • the circuit board provided by the embodiment of the present invention includes a prepreg layer, a first reference layer, and components such as a first insulating layer located between the prepreg layer and the first reference layer.
  • a signal line is formed in the prepreg layer, and the signal line includes two parallel wirings for transmitting various electrical signals.
  • Two sides of the signal line are provided with via holes penetrating the first insulating layer, the inner walls of the via holes are formed with conductor materials, and the prepreg layer is electrically connected to the first reference layer through the conductor materials.
  • the conductor material electrically connected to the first reference layer in the via hole can increase the stability of the plane voltage and the return path, effectively weaken the energy coupling around the signal line, thereby reducing the attenuation of the electrical signal and transmission loss, so that the transmission of the electrical signal is more stable, the signal quality is more reliable, and the technical problem that the electrical signal is easily distorted in the prior art is solved.
  • FIG. 1 is a schematic plan view of a circuit board provided in Embodiment 1 of the present invention.
  • FIG. 2 is a three-dimensional schematic diagram of a circuit board provided by Embodiment 1 of the present invention.
  • 3a and 3b are schematic diagrams of comparison between the circuit board provided by the embodiment of the present invention and the prepreg layer of the prior art;
  • 4a and 4b are schematic diagrams of comparison between the circuit board provided by the embodiment of the present invention and the first reference layer of the prior art;
  • FIG. 5 is a schematic perspective view of a circuit board according to Embodiment 2 of the present invention.
  • FIG. 6 is a schematic plan view of a circuit board according to Embodiment 3 of the present invention.
  • signal lines in circuit boards are usually composed of two parallel signal lines, and the two signal lines are located in a prepreg layer.
  • the circuit board also includes a reference layer, an etching layer, Insulating layers and other multi-layer structures.
  • the parallel routing method of two signal lines is easy to generate energy coupling, and the electric field of the electrical signal will diverge in the reference layer and the prepreg layer, increasing the transmission loss and causing the technical problem of electrical signal distortion.
  • a circuit board provided by an embodiment of the present invention can reduce the attenuation and transmission loss of an electrical signal, so that the transmission of the electrical signal is more stable and the signal quality is more reliable.
  • the circuit board includes a prepreg layer 10 and a first reference layer 20 , and a first insulating layer (not shown in the figure) located between the prepreg layer 10 and the first reference layer 20 .
  • Signal lines are formed in the prepreg layer 10 , and the signal lines include two parallel lines 11 .
  • the high-speed line is a signal line with an electrical signal frequency higher than 50 MHz.
  • the prepreg layer 10 is mainly made of prepreg sheet, also known as PP sheet, which is a common material in the production of multi-layer boards. It is mainly composed of resin and reinforcing materials.
  • the reinforcing materials can be selected from glass fiber cloth, paper base, composite materials Most of the prepregs (adhesive sheets) used in the production of multilayer printed circuit boards are made of glass fiber cloth as reinforcing materials.
  • Both sides of the high-speed line are provided with vias 12 penetrating the first insulating layer.
  • one via 12 is provided on each of the upper and lower sides of the high-speed line.
  • a conductor material is formed on the inner wall of the via hole 12 , and the prepreg layer 10 is electrically connected to the first reference layer 20 through the conductor material.
  • the conductor material electrically connected to the first reference layer 20 in the via hole 12 can increase the stability of the plane voltage and the return path, effectively weaken the energy coupling around the high-speed line, thereby reducing the electrical signal
  • the attenuation and transmission loss of the electric signal are more stable, the signal quality is more reliable, and the technical problem that the electric signal is easily distorted in the prior art is solved.
  • the method of arranging the via holes 12 is to process the circuit board to a small extent, which realizes a solution of obtaining high-quality electrical signals at a lower cost, and can make the transmission of the high-speed line more stable and the signal quality more reliable.
  • the via holes 12 are symmetrically arranged on both sides of the signal line.
  • the two wirings 11 of the high-speed line are symmetrically arranged, and the axis of symmetry is a virtual line in the middle of the two wirings 11 .
  • the vias 12 are also arranged symmetrically about the symmetry axis, so that the distances from the vias 12 to the nearest trace 11 are equal, so that during electrical signal transmission, the vias 12 on both sides have the same inhibitory effect on high-speed line energy coupling, The attenuation degree of the energy on the two traces 11 is also the same, which ensures the symmetry and consistency of the electrical signal transmission.
  • the shortest distance between the via hole 12 and the trace 11 is 0.3 to 0.7 times the distance between the two traces 11 .
  • the widths of the two traces 11 are both w
  • the distance between the two traces 11 is s
  • the distance k from the via hole 12 to the nearest trace 11 may be between 0.3s and 0.7s. It has been verified by experiments that the minimum distance k from the via 12 to the trace 11 can obtain the best energy coupling suppression effect within this range.
  • the value of k can also be set between 0.45s and 0.55s to obtain a better effect of suppressing energy coupling.
  • the high-speed line is located in the center and is arranged longitudinally. The lighter the color in the figure, the stronger the electric field distribution. high.
  • the electric field distribution of the prepreg layer is more divergent; as shown in Figure 3b, in the circuit board provided by the embodiment of the present invention, the electric field distribution of the prepreg layer around the high-speed line is more convergent.
  • the electric field distribution of the first reference layer is consistent with the electric field distribution of the prepreg layer. As shown in FIG. 4a, the electric field distribution of the first reference layer is more divergent in the prior art; as shown in FIG. 4b, the embodiment of the present invention provides In the circuit board, the electric field distribution of the first reference layer around the high-speed line is more convergent.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • the embodiment of the present invention provides a circuit board, which is basically the same as the circuit board provided in the first embodiment. The difference is that, as shown in FIG. 5 , on the basis of Embodiment 1, in this embodiment, the side of the prepreg layer 10 away from the first reference layer 20 further includes at least one conductor layer.
  • the at least one conductor layer may include a second reference layer 30. Because the second reference layer 30 is the conductor layer closest to the prepreg layer 10, a second insulating layer is disposed between the prepreg layer 10 and the second reference layer. (not shown in the figure). Of course, every two adjacent conductor layers are also directly provided with insulating layers.
  • the manufacturing process of the prepreg may be as follows: firstly, the treated glass fiber cloth is impregnated with resin glue, and then the sheet material made of resin is formed into a prepreg by heat treatment (pre-baking).
  • the prepreg will soften under heat and pressure, and will react and solidify after cooling. Since the number of yarn strands per unit length of the glass fiber cloth is different in the warp and weft directions, attention should be paid to the warp and weft directions of the prepreg when cutting. It is the long side direction of the production board to ensure the flatness of the board surface and prevent the board from being distorted and deformed after being heated.
  • the circuit board further includes via stubs penetrating each conductor layer, and at least one conductor layer is formed with an isolation pad (that is, an anti-pad) surrounding the via stubs.
  • the via stub 13 penetrates the second reference layer 30 and the second insulating layer, and an isolation disk 31 surrounding the via stub 13 is formed in the second reference layer 30 . If more conductor layers are formed below the second reference layer 30 , isolation disks surrounding the via stubs may also be formed in these conductor layers.
  • the minimum distance between the via hole 12 and the conductor layer is greater than the radius of the isolation disk 31 , that is, the distance from the via hole 12 to the nearest conductor layer is greater than the radius of the isolation disk 31 .
  • the distance between the via hole 12 and the second reference layer 30 is greater than the radius of the isolation disk 31 .
  • the distance between the via hole 12 and the second reference layer 30 may be 100% to 110% of the radius of the isolation disk 31 . %, which can ensure that the via hole 12 is not broken, thereby reducing the influence of the isolation disk 31 of the via hole 12 on the high-speed line.
  • the circuit board can also include more conductor layers and insulating layers, such as a top etching layer and a bottom etching layer, the pad 121 of the via hole 12 can be formed on the top etching layer, and the pad 131 of the via stub 13 can be formed on the top etching layer.
  • the etch layer can be formed at the bottom.
  • the embodiment of the present invention provides a circuit board, which is basically the same as the circuit board provided in the first embodiment. The difference is that, as shown in FIG. 6 , a plurality of vias 12 are respectively provided on both sides of the signal line. For example, when the length of the high-speed line is relatively large (over 3 inches), one via can be provided at a certain distance. 12, so that the electric field of each section of the high-speed line can obtain a better convergence effect.
  • a via hole 12 is arranged on each side of the signal line at an interval of 300 mils, and such a density can control the overall transmission loss of the high-speed line to a low level.
  • Embodiment 4 is a diagrammatic representation of Embodiment 4:
  • An embodiment of the present invention further provides a server, including the circuit board provided in the first aspect, and mechanical devices such as a power supply mechanism and a shielding mechanism.
  • the server provided by the embodiments of the present invention and the circuit boards provided by the above embodiments have the same technical features, so they can also solve the same technical problems and achieve the same technical effects.
  • the terms “arranged”, “installed”, “connected” and “connected” should be understood in a broad sense, for example, it may be a fixed connection, It can also be a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or the internal communication between the two components.
  • the specific meanings of the above terms in the present invention can be understood in specific situations.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

一种电路板以及服务器，涉及电子器件的技术领域。该电路板包括半固化层和第一参考层，以及位于所述半固化层和所述第一参考层之间的第一绝缘层；所述半固化层内形成有信号线，所述信号线包括并列的两条走线；所述信号线的两侧设置有贯穿所述第一绝缘层的过孔，所述过孔内壁形成有导体材料，所述半固化层通过所述导体材料与所述第一参考层电连接，解决了现有技术中容易造成电信号失真的技术问题。

Description

电路板以及服务器
本申请要求于2020年7月17日提交中国专利局、申请号为202010694524.0、发明名称为“电路板以及服务器”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电子器件技术领域，尤其是涉及一种电路板以及服务器。
背景技术
服务器作为计算机的一种，为互联网用户提供计算、存储、数据交换等服务，是互联网时代的重要组成节点。服务器具有运算速率高、运行时间长、数据吞吐量大等特点，而服务器的硬件组成主要包括电路板和机构器件。其中，电路板承担着传输、转换电能以及传递、处理信号的作用，电路板上存在着成千上万的信号线路，这些线路需要长时间的运行，因此信号的作用也极其重要，一方面保证了服务器高效稳定的运行，另一方面也可以极大减少数据中心的运营成本。
电路板中的信号线需要将电信号的电能在要求的时间内，不失真的下从发送端传输到接收端，而破坏电信号完整性的原因可包括反射、振铃、地弹、串扰等。随着电信号工作频率的不断提高，信号完整性问题已经成为高速信号领域关注的焦点。目前，电路板中的信号线，例如高速线通常是由并列的两条信号线组成，且两条信号线位于一个半固化层(Prepreg，简称PP)，除半固化层外，电路板还包括参考层、蚀刻层、绝缘层等多个层结构。但是，两条信号线并列的走线方式很容易产生能量耦合，电信号的电场会在参考层和半固化层发生发散，增加传输损耗，造成电信号失真的技术问题。
发明内容
本发明的目的在于提供一种电路板以及服务器，以解决了现有技术中容易造成电信号失真的技术问题。
第一方面，本发明实施例提供的一种电路板，包括半固化层和第一参考层，以及位于所述半固化层和所述第一参考层之间的第一绝缘层；
所述半固化层内形成有信号线，所述信号线包括并列的两条走线；
所述信号线的两侧设置有贯穿所述第一绝缘层的过孔，所述过孔内壁形成有导体材料，所述半固化层通过所述导体材料与所述第一参考层电连接。
进一步的，所述过孔在所述信号线的两侧对称设置。
进一步的，所述过孔与所述走线的最短距离为，所述两条走线间距的0.3至0.7倍。
进一步的，所述信号线的两侧分别设置有多个过孔。
进一步的，在所述信号线的一侧，所述过孔的间距为200至400mil。
进一步的，在所述半固化层远离所述第一参考层的一侧还包括至少一层导体层。
进一步的，所述电路板还包括贯穿每层所述导体层的过孔残桩；
至少一层所述导体层内形成有包围所述过孔残桩的隔离盘。
进一步的，所述过孔与所述导体层之间的最小距离大于所述隔离盘的半径。
进一步的，所述至少一层导体层中包括第二参考层，所述半固化层与所述第二参考层之间设置有第二绝缘层。
第二方面，本发明实施例还提供一种服务器，包括上述第一方面提供的电路板。
本发明实施例提供的电路板，包括半固化层和第一参考层，以及位于半固化层和第一参考层之间的第一绝缘层等部件。其中，半固化层内形成有信号线，信号线包括并列的两条走线，用于传输各种电信号。在信号线的两侧设置有贯穿第一绝缘层的过孔，过孔内壁形成有导体材料，半固化层通过导体材料与第一参考层电连接。在信号线传输电信号的过程中，过孔内与第一参考层电连接的导体材料能够增加平面电压的稳定性以及返回路径，有效减弱信号线周围的能量耦合，从而减小电信号的衰减和传输损耗，使得电信号的传输更加稳定，信号质量更加可靠，解决了现有技术中 容易造成电信号失真的技术问题。
附图说明
为了更清楚地说明本发明具体实施方式或现有技术中的技术方案，下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施方式，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例一提供的电路板的平面示意图；
图2为本发明实施例一提供的电路板的立体示意图；
图3a和图3b为本发明实施例提供的电路板与现有技术半固化层的对比示意图；
图4a和图4b为本发明实施例提供的电路板与现有技术第一参考层的对比示意图；
图5为本发明实施例二提供的电路板的立体示意图；
图6为本发明实施例三提供的电路板的平面示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合附图对本发明的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
目前，电路板中的信号线，例如高速线通常是由并列的两条信号线组成，且两条信号线位于一个半固化层，除半固化层外，电路板还包括参考层、蚀刻层、绝缘层等多个层结构。但是，两条信号线并列的走线方式很容易产生能量耦合，电信号的电场会在参考层和半固化层发生发散，增加传输损耗，造成电信号失真的技术问题。
针对以上问题，本发明实施例提供的一种电路板，能够减小电信号的 衰减和传输损耗，使得电信号的传输更加稳定，信号质量更加可靠。
实施例一：
如图1和图2所示，该电路板包括半固化层10和第一参考层20，以及位于半固化层10和第一参考层20之间的第一绝缘层(图中未示出)。半固化层10内形成有信号线，信号线包括并列的两条走线11，本实施例以高速线为例进行说明，高速线即所传输的电信号频率高于50MHz的信号线。
半固化层10主要以半固化片作为原材料，半固化片又称为PP片，是多层板生产中的一种常用材料，主要由树脂和增强材料组成，增强材料可选用玻纤布、纸基、复合材料等几种类型，而制作多层印刷电路板所使用的半固化片(黏结片)大多是采用玻纤布做增强材料。
高速线的两侧设置有贯穿第一绝缘层的过孔12，从图1中可以看出，在高速线的上下两侧各设置有一个过孔12。过孔12内壁形成有导体材料，半固化层10通过导体材料与第一参考层20电连接。在高速线传输电信号的过程中，过孔12内与第一参考层20电连接的导体材料能够增加平面电压的稳定性以及返回路径，有效减弱高速线周围的能量耦合，从而减小电信号的衰减和传输损耗，使得电信号的传输更加稳定，信号质量更加可靠，解决了现有技术中容易造成电信号失真的技术问题。并且，设置过孔12的方式是对电路板进行的很小程度的加工，实现了较小成本获得高质量的电信号的解决方案，能够使得高速线的传输更加稳定，信号质量更加可靠。
在一种可能的实施方式中，过孔12在信号线的两侧对称设置。高速线的两条走线11本身就是对称设置的，对称轴即是两条走线11正中一条虚拟的线。将过孔12也关于该对称轴对称设置，使得过孔12到最近一条走线11的距离相等，这样在电信号传输时，两侧的过孔12对高速线能量耦合的抑制作用也相同，两条走线11上能量的衰减程度也相同，保证电信号传输的对称性和一致性。
在一种可能的实施方式中，过孔12与走线11的最短距离为，两条走线11间距的0.3至0.7倍。如图1所示，两条走线11的宽度均为w，两条走线11的间距为s，过孔12到最近一条走线11的距离k可以在0.3s至0.7s 之间。经过实验验证，过孔12到走线11的最小距离k在这一范围内能够获得最好的能量耦合抑制效果。在其他实施方式中，也可以将k值设置在0.45s至0.55s之间，以获得更好的能量耦合抑制效果。
以下展示本发明实施例与现有技术相较之下的电场分布效果，如图3a、3b、4a、4b所示，高速线位于正中沿纵向设置，图中颜色越浅表示电场分布的强度越高。
如图3a所示，在现有技术中，半固化层的电场分布更加发散；如图3b所示，本发明实施例提供的电路板中，高速线周边半固化层的电场分布的更加收敛。
在第一参考层的电场分布与半固化层的电场分布情况一致，如图4a所示，在现有技术中第一参考层的电场分布更加发散；如图4b所示，本发明实施例提供的电路板中，高速线周边第一参考层的电场分布的更加收敛。
通过上述对比可以看出，本发明实施例通过设置过孔，能够降低高速线中电路的返回路径的电感和阻抗，从而使得高速信号减少损耗。
实施例二：
本发明实施例提供一种电路板，与实施例一提供的电路板基本相同。其不同点在于，如图5所示，在实施例一的基础上，本实施例中在半固化层10远离第一参考层20的一侧还包括至少一层导体层。该至少一层导体层中可以包括第二参考层30，因为第二参考层30作为距离半固化层10最近的导体层，所以半固化层10与第二参考层之间设置有第二绝缘层(图中未示出)。当然，每相邻的两层导体层直接也都设置有绝缘层。
其中，半固化片的制作过程可以为，先将经过处理的玻纤布浸渍上树脂胶液，再经热处理(预烘)使树脂制成的薄片材料形成半固化片。半固化片在加热加压下会软化，冷却后会反应固化。由于玻璃纤维布在经向、纬向单位长度的纱股数不同，剪切时需注意半固化片的经纬向，一般选取经向(玻璃纤维布卷曲的方向)为生产板的短边方向，纬向为生产板的长边方向，以确保板面的平整，防止板材受热后扭曲变形。
在一种可能的实施方式中，该电路板还包括贯穿每层导体层的过孔残 桩，至少一层层导体层内形成有包围过孔残桩的隔离盘(即反焊盘)。例如，过孔残桩13贯穿第二参考层30和第二绝缘层，第二参考层30内形成有包围过孔残桩13的隔离盘31。如果在第二参考层30以下还形成有更多的导体层，则这些导体层中也可以形成有包围过孔残桩的隔离盘。
进一步的，过孔12与导体层之间的最小距离大于隔离盘31的半径，也就是过孔12到最近的导体层的距离大于隔离盘31的半径。本实施例中，过孔12与第二参考层30之间的距离大于隔离盘31的半径，比如过孔12与第二参考层30之间的距离可以在隔离盘31半径的100％至110％以内，这样能够保证过孔12不破洞，从而减少过孔12的隔离盘31对高速线的影响。
此外，该电路板还可以包括更多的导体层和绝缘层，例如顶部蚀刻层和底部蚀刻层，过孔12的焊盘121就可以在顶部蚀刻层形成，过孔残桩13的焊盘131可以在底部蚀刻层形成。
实施例三：
本发明实施例提供一种电路板，与实施例一提供的电路板基本相同。其不同点在于，如图6所示，信号线的两侧分别设置有多个过孔12，例如高速线的长度较大(超过3inch)的情况下，可以每间隔一定距离就设置一个过孔12，以使高速线各个区段的电场都能得到较好的收敛效果。
在一种可能的实施方式中，在信号线的每一侧，过孔12的间距可以设置为200至400mil(1mil＝1/1000inch＝0.0254mm)。例如，在信号线的每一侧每间隔300mil设置一个过孔12，这样的密集度就可以将高速线整体的传输损耗控制在较低的程度。
实施例四：
本发明实施例还提供一种服务器，包括上述第一方面提供的电路板，以及电源机构、屏蔽机构等机构器件。
本发明实施例提供的服务器与上述各个实施例提供的电路板，具有相同的技术特征，所以也能解决相同的技术问题，达到相同的技术效果。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步定义和解释。
在本发明的描述中，需要说明的是，术语“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，或者是该发明产品使用时惯常摆放的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”、“第三”等仅用于区分描述，而不能理解为指示或暗示相对重要性。
在本发明的描述中，还需要说明的是，除非另有明确的规定和限定，术语“设置”、“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本发明中的具体含义。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (10)

  1. 一种电路板，其特征在于，包括半固化层和第一参考层，以及位于所述半固化层和所述第一参考层之间的第一绝缘层；
    所述半固化层内形成有信号线，所述信号线包括并列的两条走线；
    所述信号线的两侧设置有贯穿所述第一绝缘层的过孔，所述过孔内壁形成有导体材料，所述半固化层通过所述导体材料与所述第一参考层电连接。
  2. 根据权利要求1所述的电路板，其特征在于，所述过孔在所述信号线的两侧对称设置。
  3. 根据权利要求1所述的电路板，其特征在于，所述过孔与所述走线的最短距离为，所述两条走线间距的0.3至0.7倍。
  4. 根据权利要求1所述的电路板，其特征在于，所述信号线的两侧分别设置有多个过孔。
  5. 根据权利要求4所述的电路板，其特征在于，在所述信号线的一侧，所述过孔的间距为200至400mil。
  6. 根据权利要求1所述的电路板，其特征在于，在所述半固化层远离所述第一参考层的一侧还包括至少一层导体层。
  7. 根据权利要求6所述的电路板，其特征在于，还包括贯穿每层所述导体层的过孔残桩；
    至少一层所述导体层内形成有包围所述过孔残桩的隔离盘。
  8. 根据权利要求7所述的电路板，其特征在于，所述过孔与所述导体层之间的最小距离大于所述隔离盘的半径。
  9. 根据权利要求6所述的电路板，其特征在于，所述至少一层导体层中包括第二参考层，所述半固化层与所述第二参考层之间设置有第二绝缘层。
  10. 一种服务器，其特征在于，包括如权利要求1至9任一项所述的电路板。
PCT/CN2021/071203 2020-07-17 2021-01-12 电路板以及服务器 Ceased WO2022012007A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010694524.0 2020-07-17
CN202010694524.0A CN111970823A (zh) 2020-07-17 2020-07-17 电路板以及服务器

Publications (1)

Publication Number Publication Date
WO2022012007A1 true WO2022012007A1 (zh) 2022-01-20

Family

ID=73361489

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/071203 Ceased WO2022012007A1 (zh) 2020-07-17 2021-01-12 电路板以及服务器

Country Status (2)

Country Link
CN (1) CN111970823A (zh)
WO (1) WO2022012007A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111970823A (zh) * 2020-07-17 2020-11-20 苏州浪潮智能科技有限公司 电路板以及服务器

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1758828A (zh) * 2004-10-09 2006-04-12 鸿富锦精密工业（深圳）有限公司 适用于高速信号的印刷电路板结构
CN2886982Y (zh) * 2006-04-26 2007-04-04 华为技术有限公司 印刷电路板
CN102811549A (zh) * 2011-06-03 2012-12-05 鸿富锦精密工业（深圳）有限公司 电路板
CN103379729A (zh) * 2012-04-28 2013-10-30 鸿富锦精密工业（深圳）有限公司 印刷电路板
CN107623989A (zh) * 2017-10-24 2018-01-23 广东欧珀移动通信有限公司 印刷电路板及移动终端
CN111295039A (zh) * 2020-02-26 2020-06-16 安捷利电子科技（苏州）有限公司 一种线路板及电子设备
CN111970823A (zh) * 2020-07-17 2020-11-20 苏州浪潮智能科技有限公司 电路板以及服务器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010147707A (ja) * 2008-12-17 2010-07-01 Mitsubishi Electric Corp 伝送線路
JP5041108B2 (ja) * 2010-12-03 2012-10-03 株式会社村田製作所 高周波信号線路
CN208190997U (zh) * 2018-04-03 2018-12-04 深圳市明晶达电路科技有限公司 一种优化信号线参考层的pcb结构

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1758828A (zh) * 2004-10-09 2006-04-12 鸿富锦精密工业（深圳）有限公司 适用于高速信号的印刷电路板结构
CN2886982Y (zh) * 2006-04-26 2007-04-04 华为技术有限公司 印刷电路板
CN102811549A (zh) * 2011-06-03 2012-12-05 鸿富锦精密工业（深圳）有限公司 电路板
CN103379729A (zh) * 2012-04-28 2013-10-30 鸿富锦精密工业（深圳）有限公司 印刷电路板
CN107623989A (zh) * 2017-10-24 2018-01-23 广东欧珀移动通信有限公司 印刷电路板及移动终端
CN111295039A (zh) * 2020-02-26 2020-06-16 安捷利电子科技（苏州）有限公司 一种线路板及电子设备
CN111970823A (zh) * 2020-07-17 2020-11-20 苏州浪潮智能科技有限公司 电路板以及服务器

Also Published As

Publication number Publication date
CN111970823A (zh) 2020-11-20

Similar Documents

Publication Publication Date Title
JP6885800B2 (ja) 配線基板およびその製造方法
US9907156B1 (en) Cross-talk reduction for high speed signaling at ball grid array region and connector region
US20200389969A1 (en) Wiring substrate and method for manufacturing wiring substrate
JP2014027212A (ja) プリント配線板
JP2009141233A (ja) プリント基板とその製造方法
TW201711534A (zh) 柔性線路板及其製作方法
CN106470523A (zh) 柔性电路板及其制作方法
JP2010212439A (ja) 回路基板
JP5445011B2 (ja) 回路基板
TWI590518B (zh) 帶線中之串音消除
WO2022012007A1 (zh) 电路板以及服务器
CN207969077U (zh) 一种印制电路板
JP6368078B2 (ja) プリント配線板
JP2011061126A (ja) 回路基板
WO2025208945A1 (zh) 用于印刷电路板的层叠单元及印刷电路板
JPH09321433A (ja) 多層プリント配線板のバイアホール
JP2011023547A (ja) 回路基板
JP5617374B2 (ja) プリント配線基板
CN111712034A (zh) 一种减小局部无参考层带状线串扰的装置
JP2000261150A (ja) 多層プリント配線板及び多層プリント配線板の製造方法
US6515236B2 (en) Printed wiring board and manufacturing method of the printed wiring board
JP2006080162A (ja) プリント配線基板
CN206977794U (zh) 多层阻抗电路板
CN205921814U (zh) 一种电路板装置及电子设备
JP2023111364A (ja) 伝送構造体および伝送構造体を備える配線基板

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21842259

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21842259

Country of ref document: EP

Kind code of ref document: A1