WO2022001470A1 - 发光二极管器件及其制备方法、显示面板 - Google Patents

发光二极管器件及其制备方法、显示面板 Download PDF

Info

Publication number
WO2022001470A1
WO2022001470A1 PCT/CN2021/095172 CN2021095172W WO2022001470A1 WO 2022001470 A1 WO2022001470 A1 WO 2022001470A1 CN 2021095172 W CN2021095172 W CN 2021095172W WO 2022001470 A1 WO2022001470 A1 WO 2022001470A1
Authority
WO
WIPO (PCT)
Prior art keywords
electron transport
electrode layer
sub
layer
substrate
Prior art date
Application number
PCT/CN2021/095172
Other languages
English (en)
French (fr)
Inventor
李东
克里斯塔尔鲍里斯
Original Assignee
京东方科技集团股份有限公司
北京京东方技术开发有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 北京京东方技术开发有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/802,564 priority Critical patent/US20230078114A1/en
Publication of WO2022001470A1 publication Critical patent/WO2022001470A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H10K50/115—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising active inorganic nanostructures, e.g. luminescent quantum dots
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/16—Electron transporting layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/16—Electron transporting layers
    • H10K50/166—Electron transporting layers comprising a multilayered structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/813—Anodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition

Definitions

  • Embodiments of the present disclosure relate to a light emitting diode device, a method for fabricating the same, and a display panel.
  • LED Light Emitting Diode
  • LED Light Emitting Diode
  • the light-emitting diode display device does not need an additional backlight module, it has a lighter weight, which is beneficial to the lightening and thinning of the display device, and thus has a better market prospect.
  • Quantum dots are solution-processable semiconductor nanocrystals with the advantages of narrow emission spectrum, adjustable emission wavelength, and high spectral purity. They are most promising to become the core part of next-generation light-emitting devices.
  • Quantum Dot Light Emitting Diodes uses quantum dots as the preparation material of the light-emitting layer, and applies a voltage difference between the electrodes on both sides of the light-emitting layer to make the light-emitting layer emit light, thereby obtaining light of the desired wavelength. Therefore, the quantum dot light-emitting diode (Quantum Dot Light Emitting Diode, QLED) with quantum dot material as the light-emitting layer has become one of the main directions of research on new display devices.
  • QLED Quantum Dot Light Emitting Diode
  • Embodiments of the present disclosure provide a light emitting diode device, a method for manufacturing the same, and a display panel.
  • the structure of the light-emitting diode device includes: a substrate, a first electrode layer stacked on the substrate, an electron transport layer stacked on the first electrode layer, a quantum dot light-emitting layer stacked on the electron transport layer, a stack of The second electrode layer is arranged on the quantum dot light-emitting layer, wherein the surface of the electron transport layer in contact with the quantum dot light-emitting layer is a concave-convex surface.
  • At least one embodiment of the present disclosure provides a light emitting diode device, which includes: a substrate; a first electrode layer stacked on the substrate; an electron transport layer stacked on a surface of the first electrode layer away from the substrate; quantum The dot light-emitting layer is stacked on the surface of the electron transport layer away from the first electrode layer; and the second electrode layer is stacked on the surface of the quantum dot light-emitting layer away from the electron transport layer; wherein the electron transport layer is away from the first electrode layer.
  • the surface of the electrode layer is a first uneven surface including a plurality of protrusions.
  • the root mean square surface roughness of the first concave-convex surface ranges from 5 nanometers to 10 nanometers.
  • the height of the plurality of protrusions included in the first concave-convex surface in a direction perpendicular to the substrate ranges from 1 nanometer to 10 nanometers.
  • a surface of the first electrode layer away from the substrate is a second concave-convex surface including a plurality of protrusions.
  • the first electrode layer includes a first sub-electrode layer and conductive nanoparticles disposed on the first sub-electrode layer, and the conductive nanoparticles constitute the second concave-convex surface. Multiple bumps.
  • the plurality of protrusions included in the second concave-convex surface and the plurality of protrusions included in the first concave-convex surface have the same shape, and are perpendicular to the substrate In the direction of the bottom, the plurality of protrusions included in the second concave-convex surface and the plurality of protrusions included in the first concave-convex surface have the same height.
  • the electron transport layer includes a doped zinc oxide film doped with magnesium ions and trivalent metal ions.
  • the trivalent metal ions are aluminum ions
  • the doping mass percentage of magnesium ions in the doped zinc oxide film is 0.5% to 20%
  • the doping mass percentage of aluminum ions is 0.5% to 20%.
  • the percentage of impurities is 0.5% to 10%.
  • the electron transport layer includes N+1 sub-electron transport layers and N sub-electron blocking layers, and the N sub-electron blocking layers are respectively sandwiched between the N+1 sub-electron transport layers In between, N is a positive integer greater than or equal to 2, the surface farthest from the substrate of the sub-electron transport layer in the N+1 sub-electron transport layers is the first concave-convex surface, and N+1 sub-electron transport layers The materials of the N sub-electron blocking layers are different from those of the N+1 sub-electron transport layers.
  • At least one embodiment of the present disclosure further provides a display panel, including: a base substrate; and a plurality of sub-pixels arranged in an array on the base substrate, each of the plurality of sub-pixels includes a light emitting diode device using any one of the above , the display panel further includes a pixel-defining layer, wherein the pixel-defining layer is disposed on the surface of the electron transport layer away from the base substrate, the pixel-defining layer includes a plurality of openings, the pixel-defining layer at least partially covers the edge of the electron transport layer, and the The plurality of openings respectively expose the middle portion of the electron transport layer, and the quantum dot light-emitting layer is disposed at least in the plurality of openings.
  • At least one embodiment of the present disclosure also provides a method for fabricating a light emitting diode device, including: providing a substrate; forming a first electrode layer on the substrate; forming an electron transport layer on a surface of the first electrode layer away from the substrate; A quantum dot light-emitting layer is formed on the surface of the electron transport layer away from the first electrode layer; and a second electrode layer is formed on the surface of the quantum dot light-emitting layer away from the electron transport layer, wherein forming the electron transport layer comprises: moving the electron transport layer away from the first electrode layer; The surface of an electrode layer is formed as a first concave-convex surface including a plurality of protrusions.
  • forming the surface of the electron transport layer away from the first electrode layer into a first concave-convex surface including a plurality of protrusions includes: forming a surface including a plurality of protrusions on the substrate The first sub-electrode layer and the first electrode layer of the second sub-electrode layer are sequentially stacked, and the surface of the second sub-electrode layer away from the substrate is formed into a second concave-convex surface including a plurality of protrusions; using a sputtering process or The spin coating process forms an electron transport layer by sputtering or spin coating on the second concavo-convex surface, so that the surface of the electron transport layer away from the first electrode layer is formed as a first concavo-convex surface including a plurality of protrusions.
  • forming the surface of the second sub-electrode layer away from the substrate into a second concave-convex surface including a plurality of protrusions includes: when the first sub-electrode layer is away from the substrate forming nanoparticles on the surface of the substrate; forming a second sub-electrode layer with a thickness smaller than the nanoparticles on the surface of the first sub-electrode layer away from the substrate; and etching and removing the nanoparticles in the second sub-electrode layer to form a layer comprising A plurality of raised second concave-convex surfaces, wherein the thickness of the second sub-electrode layer is 5 nanometers to 10 nanometers.
  • forming the surface of the second sub-electrode layer away from the substrate into a second concave-convex surface including a plurality of protrusions includes: adopting an evaporation process on the first A conductive thin film is formed on the surface of the sub-electrode layer away from the substrate, and the thickness of the conductive thin film is 1 nanometer to 5 nanometers so that the conductive thin film exposes part of the first sub-electrode layer, thereby forming a second concave-convex surface including a plurality of protrusions .
  • forming the surface of the second sub-electrode layer away from the substrate into a second concave-convex surface including a plurality of protrusions includes: when the first sub-electrode layer is away from the substrate Conductive nanoparticles are formed on the surface of the substrate to form a second concave-convex surface including a plurality of protrusions, and the conductive nanoparticles have a thickness of 1 nm to 10 nm.
  • forming an electron transport layer on the second concave-convex surface by a sputtering process or a spin coating process includes: using a sputtering process on the second concave-convex surface A doped zinc oxide film doped with magnesium ions and trivalent metal ions is formed as an electron transport layer.
  • the trivalent metal ions are aluminum ions
  • the doping mass percentage of magnesium ions in the doped zinc oxide film is 0.5% to 20%
  • the aluminum The doping mass percentage of ions is 0.5%-10%
  • the doped zinc oxide film is formed by one of ZnMgAlO sputtering, or ZnMgO and Al 2 O 3 co-sputtering, or ZnAlO and MgO co-sputtering.
  • At least one embodiment of the present disclosure further provides a method for fabricating a light emitting diode device, including: providing a substrate; forming a first electrode on the substrate; forming an electron transport layer on a surface of the first electrode away from the substrate; A quantum dot light-emitting layer is formed on the surface away from the first electrode layer; and a second electrode layer is formed on the surface of the quantum dot light-emitting layer far away from the electron transport layer; wherein, forming the electron transport layer includes: using a sputtering process to form doped magnesium ions and A zinc oxide film doped with trivalent metal ions serves as the electron transport layer.
  • the trivalent metal ion is aluminum ion
  • the doping mass percentage of magnesium ions in the doped zinc oxide film is 0.5%-20%
  • the doped mass percentage of aluminum ions is 0.5% to 10%
  • one of ZnMgAlO sputtering, or ZnMgO and Al 2 O 3 co-sputtering, or ZnAlO and MgO co-sputtering is used to form the doped zinc oxide film.
  • plasma etching or sandblasting is used to roughen the surface of the electron transport layer away from the first electrode layer, so that the electron transport layer is far away from the first electrode layer.
  • the root mean square surface roughness of the surface of an electrode layer is in the range of 5 nanometers to 10 nanometers.
  • FIG. 1A is a schematic cross-sectional structure diagram of a light emitting diode device according to at least one embodiment of the present disclosure
  • FIG. 1B is a schematic cross-sectional structural diagram of an electron transport layer of a light emitting diode device according to at least one embodiment of the present disclosure
  • FIG. 2A and FIG. 2B are respectively comparative diagrams of the current density and current efficiency of the light emitting diode device according to at least one embodiment of the present disclosure as a function of voltage under different electron transport layer materials;
  • 3A is a schematic cross-sectional structural diagram of another light emitting diode device according to at least one embodiment of the present disclosure.
  • 3B is a schematic cross-sectional structural diagram of an electron transport layer of another light emitting diode device according to at least one embodiment of the present disclosure
  • FIG. 4 is a schematic cross-sectional view of a display panel provided by at least one embodiment of the present disclosure.
  • FIG. 5 is a flowchart of a method for fabricating a light emitting diode device provided by at least one embodiment of the present disclosure
  • FIG. 6 is a flowchart of another method for fabricating a light emitting diode device provided by at least one embodiment of the present disclosure
  • FIG. 7A is a flowchart of a method of forming the surface of the second sub-electrode layer away from the substrate in FIG. 6 into a second uneven surface including a plurality of protrusions;
  • Fig. 7B shows a schematic structural diagram of the light emitting diode device in the manufacturing process corresponding to the steps in the method of Fig. 7A;
  • FIG. 8A is a flowchart of another method of forming the surface of the second sub-electrode layer away from the substrate in FIG. 6 into a second uneven surface including a plurality of protrusions;
  • Fig. 8B shows a schematic structural diagram of the light emitting diode device in the manufacturing process corresponding to the steps in the method of Fig. 8A;
  • 9A is a flowchart of another method of forming the surface of the second sub-electrode layer away from the substrate in FIG. 6 into a second uneven surface including a plurality of protrusions;
  • FIG. 9B shows a schematic structural diagram of the light emitting diode device in the manufacturing process corresponding to the steps in the method of FIG. 9A one-to-one;
  • FIG. 10 is a flowchart of another method for fabricating a light emitting diode device according to at least one embodiment of the present disclosure.
  • AMQLED active matrix quantum dot light-emitting diode
  • electron transport layers in quantum dot light-emitting diodes can be formed in two ways: one is to spin-coat electron-transport materials, such as zinc oxide nanoparticles, using a spin-coating process.
  • the electron transport layer and the other is to use a sputtering process to sputter an electron transport material, such as a zinc oxide target, to form a sputtered zinc oxide film as the electron transport layer.
  • the spin-coated zinc oxide film formed by the spin coating process usually has impurities (impurities are organic ligands, etc.), and its surface has accumulated zinc oxide nanoparticles, so it is not flat; the sputtered zinc oxide film formed by the sputtering process It is an amorphous or polycrystalline film, which has no impurities, so the surface is relatively flat. Therefore, when the QLED adopts an inverted structure, if the spin-coated zinc oxide film is used as the electron transport layer, since the zinc oxide nanoparticles are directly spin-coated on the flat cathode, the contact area between the zinc oxide nanoparticles and the cathode is small, and the electron injection is less.
  • impurities are organic ligands, etc.
  • the sputtered zinc oxide film is used as the electron transport layer, since the sputtered zinc oxide film is relatively flat, the nano-particle quantum dots in the quantum luminescent dot layer are directly formed on the flat sputtered zinc oxide film, and the quantum dots and the sputtered zinc oxide film are directly formed.
  • the contact area of the sputtered zinc oxide film is small, and the electron injection is less, and since the nanoparticle-like quantum dots are directly formed on the flat sputtered zinc oxide film, it may also cause the part of the sputtered zinc oxide film to be in direct contact with the subsequent hole transport layer. cause leakage.
  • the carriers in the quantum dot light-emitting layer are very unbalanced. Due to the charge accumulation in the light-emitting layer of the quantum dot due to the imbalance of carriers, Auger recombination (that is, when an electron and a hole recombine, the energy or momentum is transferred to another electron or another hole through collision, causing the electron or hole to recombine). The recombination process of hole transition) is serious, and the yield of quantum dots is reduced, thus limiting the further improvement of the luminous efficiency and stability of QLEDs.
  • inventions of the present disclosure provide a light emitting diode device, a method for manufacturing the same, and a display panel.
  • the light emitting diode device includes a substrate, a first electrode layer, an electron transport layer, and a second electrode layer.
  • the first electrode layer is stacked on the substrate; the electron transport layer is stacked on the surface of the first electrode layer away from the substrate; the quantum dot light-emitting layer is stacked on the surface of the electron transport layer away from the first electrode layer; the second electrode
  • the layers are stacked on the surface of the quantum dot light-emitting layer away from the electron transport layer; the surface of the electron transport layer away from the first electrode layer is a first concave-convex surface including a plurality of protrusions.
  • the contact area between the electron transport layer and the quantum dot light-emitting layer can be increased by making the surface of the electron transport layer in contact with the quantum dot light-emitting layer to be the first concave-convex surface including a plurality of protrusions. , thereby improving the problem of carrier imbalance in the light-emitting layer of quantum dots caused by less electron injection, and simultaneously improving the problem of Auger recombination of excitons in the light-emitting layer of quantum dots.
  • QLED is generally prepared by printing technology or printing method, which can improve the material utilization rate and become an effective way for large-area preparation.
  • both the hole injection layer and the hole transport layer under the quantum dot light-emitting layer have non-uniformity problems, so the non-uniformity from the hole injection layer to the quantum dot light-emitting layer is accumulated layer by layer, which is serious It affects the uniformity of the quantum dot light-emitting layer and the final formed QLED.
  • the QLED adopts the inverted structure
  • the quantum dot light-emitting layer is under the hole injection layer and the hole transport layer
  • the non-uniformity of the quantum dot light-emitting layer is alleviated compared with the upright structure.
  • the sputtered zinc oxide film is used as the electron transport layer by the sputtering process, it is difficult for electrons to be injected into the quantum dots from the sputtered zinc oxide film due to the large mobility of the sputtered zinc oxide film and the deeper energy level than that of the quantum dot light-emitting layer.
  • the light-emitting layer which in turn affects the luminous efficiency of quantum dots.
  • the LUMO energy level of ordinary zinc oxide nanoparticles is about -4.2eV to -4.0eV, while the LUMO energy level of sputtered zinc oxide films is about -4.8eV to -4.6eV. It can be seen that the LUMO energy level of the sputtered zinc oxide film is deeper, which is quite different from the LUMO energy level of the quantum dot light-emitting layer.
  • another embodiment of the present disclosure further provides a method for fabricating a light emitting diode.
  • the preparation method includes: providing a substrate; forming a first electrode on the substrate; forming an electron transport layer on the surface of the first electrode away from the substrate; forming a quantum dot light-emitting layer on the surface of the electron transport layer away from the first electrode layer; and A second electrode layer is formed on the surface of the quantum dot light-emitting layer away from the electron transport layer; wherein, forming the electron transport layer includes: using a sputtering process to form a doped zinc oxide film doped with magnesium ions and trivalent metal ions as the electrons transport layer.
  • the electron transport layer can be made to have a better quality than the quantum dot light-emitting layer. Matched energy levels, more suitable conductivity, and better stability.
  • FIG. 1A is a schematic cross-sectional structure diagram of a light emitting diode device according to an embodiment of the present disclosure.
  • the light emitting diode device 100 includes a substrate 110 , a first electrode layer 120 , an electron transport layer 130 , a quantum dot light emitting layer 140 and a second electrode layer 150 .
  • the first electrode layer 120 is stacked on the substrate 110; the electron transport layer 130 is stacked on the surface of the first electrode layer 120 away from the substrate; the quantum dot light-emitting layer 140 is stacked on the electron transport layer 130 away from the first electrode layer.
  • the surface of the electron transport layer 130 away from the first electrode layer 120 is a first uneven surface including a plurality of protrusions.
  • the plurality of protrusions included in the first uneven surface makes the root mean square surface roughness (RMS) of the first uneven surface
  • RMS root mean square surface roughness
  • the range is about 5nm-10nm. It should be noted that "about 5 nanometers to 10 nanometers" here means that the lower limit of the range of the root mean square surface roughness is within the error range of 10% of 5 nanometers. The upper end of the range is within 10% error of 10 nanometers.
  • the roughness of the contact surface between the electron transport layer 130 and the quantum dot light-emitting layer 140 is relatively high, and the contact area between the electron transport layer and the quantum dot light-emitting layer is relatively large, so that when the electron transport layer 130 is formed by sputtering
  • the problems such as less electron injection and carrier imbalance caused by the accumulation of nano-particle quantum dots on the surface of the flat sputtered zinc oxide film can be avoided.
  • the height H1 of the plurality of protrusions included in the first concave-convex surface in the direction perpendicular to the substrate 110 ranges from 1 nm to 10 nm, such as 3 nm, 5 nm , 8 nm, etc. It should be noted that the height H1 refers to the distance between the peaks and valleys of these protrusions in a direction perpendicular to the substrate 110 .
  • the shapes of the plurality of protrusions included in the first concavo-convex surface may be various.
  • the shape of the protrusion is shown as a protrusion having a plurality of arc-shaped notches arranged in an array in FIG. 1A , embodiments of the present disclosure are not limited thereto.
  • the shape of the protrusions may include column-shaped protrusions, spherical protrusions, island-shaped protrusions, arc-shaped protrusions, wave-shaped protrusions, etc., which may be regular or irregular, and the shape of the protrusions is the same as the The specific process for preparing the first relief surface is related.
  • the distribution of the plurality of protrusions included in the first concave-convex surface may be uniform distribution or non-uniform distribution.
  • the distribution spacing between adjacent protrusions may be, for example, 5 nanometers to 10 nanometers, such as 6 nanometers, 8 nanometers, and the like.
  • the protrusions are shown as uniformly distributed in FIG. 1A , embodiments of the present disclosure are not so limited. Whether the protrusions are uniformly distributed is related to the specific process for preparing the first uneven surface.
  • the light emitting diode device provided in this embodiment may further include a hole transport layer and a hole injection layer (not shown in the figure). At this time, the hole transport layer and the hole injection layer are sequentially stacked on the quantum dot light-emitting layer 140, and the second electrode 150 is stacked on the hole injection layer.
  • the first electrode 110 is a cathode
  • the material of the first electrode 110 may be a material with a low work function, such as magnesium (Mg), calcium (Ca), indium (In), lithium (Li), aluminum (Al), silver (Ag) or its alloys or fluorides, such as magnesium (Mg)-silver (Ag) alloys, lithium (Li)-fluorine compounds, lithium (Li)-oxygen (O) compounds, etc.
  • a low work function such as magnesium (Mg), calcium (Ca), indium (In), lithium (Li), aluminum (Al), silver (Ag) or its alloys or fluorides, such as magnesium (Mg)-silver (Ag) alloys, lithium (Li)-fluorine compounds, lithium (Li)-oxygen (O) compounds, etc.
  • Mg magnesium
  • Ca calcium
  • In indium
  • Li lithium
  • Al aluminum
  • silver (Ag) or its alloys or fluorides
  • the quantum dot light-emitting layer 140 includes silicon quantum dots, germanium quantum dots, cadmium sulfide quantum dots, cadmium selenide quantum dots, cadmium telluride quantum dots, zinc selenide quantum dots, lead sulfide quantum dots, lead selenide quantum dots, Indium phosphide quantum dots and indium arsenide quantum dots, etc., and the shape of the quantum dots can be spherical or quasi-spherical, and the particle size is between 2 nanometers and 20 nanometers, which is not limited in the embodiments of the present disclosure.
  • the material of the hole injection layer may include: star-shaped triphenylamine compound, metal complex, polyaniline, fluorohydrocarbon, porphyrin derivative, P-Doped amine derivative compound, poly(3,4-ethylenedioxythiophene)-polystyrenesulfonic acid (PEDOT/PSS), polythiophene or polyaniline, which is not limited in the embodiments of the present disclosure.
  • the second electrode 150 is an anode.
  • the material of the second electrode 150 can be a metal, an alloy, or a combination of a metal, an alloy and a metal oxide with good electrical conductivity, such as Ag, Au, Pd, Pt, Ag : Au (ie alloy of Ag and Au), Ag:Pd, Ag:Pt, Al:Au, Al:Pd, Al:Pt, Ag:Au, Ag/Pd (ie stack of Ag and Pd), Ag/ Pt, Ag/ITO, Ag/IZO, Al/Au, Al/Pd, Al/Pt, Al/ITO, Al/IZO, Ag:Pd/ITO, Ag:Pt/ITO, Al:Au/ITO, Al: Pd/ITO, Al:Pt/ITO, Ag:Au/ITO, Al: Pd/ITO, Al:Pt/ITO, Ag:Au/ITO, Ag:Pd/IZO, Ag:Pt/IZO, Al:Au/IZO
  • the electron transport layer 130 ′ may include N+1 sub-electron transport layers 1301 and N sub-electron blocking layers 1302 (two sub-electron transport layers 1301 and one sub-electron blocking layer 1302 are shown in FIG.
  • the electron blocking layer 1302 is used as an example), the N sub-electron blocking layers 1302 are respectively sandwiched between the N+1 sub-electron transport layers 1301, N is a positive integer greater than or equal to 2, and the N+1 sub-electron transport layers 1301 are ionized
  • the surface of the farthest sub-electron transport layer of the substrate 110 away from the substrate 110 is used as the first concave-convex surface including a plurality of protrusions as described above, and the materials of the N+1 sub-electron transport layers are the same, and the N sub-electron transport layers are made of the same material.
  • the material of the electron blocking layer is different from that of the N+1 sub-electron transport layer.
  • the electrons injected into the electron transport layer from the first electrode can be reduced when the electron transport layer has high mobility, thereby balancing the electrons in the quantum dot light-emitting layer.
  • the carrier concentration can improve the luminous efficiency of QLED.
  • the electron blocking layer is arranged in the electron transport layer, the turn-on voltage can also be effectively reduced.
  • the electron transport layer 130 in FIG. 1A can be replaced by the electron transport layer 130 ′ shown in FIG. 1B , the electron transport layer 130 includes two sub-electron transport layers 1301 and one sub-electron blocking layer 1302 sandwiched by the sub-electron blocking layers 1302 between the two sub electron transport layers 1301 .
  • the surface of the electron transport sub-layer farthest from the substrate 110 among the two electron transport sub-layers 1301 that is in contact with the quantum dot transport layer 140 is a first concave-convex surface including a plurality of protrusions.
  • the material of the two sub electron transport layers 1301 is the same, for example, at least one of ZnO, ZnMgO, ZnAlO, and ZnMgAlO.
  • the material of the sub-electron blocking layer 1302 is different from that of the sub-electron transport layer 1301 .
  • the material of the sub-electron blocking layer 1302 includes at least one of aluminum oxide (Al 2 O 3 ), tantalum oxide (TaOx), and hafnium oxide (HfO 2 ).
  • the sub-electron blocking layer 1302 may also use other suitable materials, which are not limited in the embodiments of the present disclosure.
  • each sub-electron blocking layer 1302 there is more than one sub-electron blocking layer 1302, and the materials of each sub-electron blocking layer 1302 may be the same or different.
  • one of the sub-electron blocking layers 1302 can be made of aluminum oxide, and the other sub-electron-blocking layer can be made of tantalum oxide.
  • the N sub-electron blocking layers are made of the same material, the complexity of the preparation process can be reduced, and the control and implementation can be facilitated.
  • the electron transport layer 130 in order to improve the energy level matching and mobility of the electron transport layer and the quantum dot light-emitting layer, the electron transport layer 130 (or the sub-electron transport layer 1301 ) may use doped magnesium ions and trivalent metal ions doped zinc oxide films.
  • the above trivalent metal ions are aluminum ions
  • the doping mass percentage of magnesium ions in the doped zinc oxide film is 0.5% to 20%, such as 5%, 10% or 15%, etc.
  • the doping mass percentage of ions is 0.5% to 10%, for example, 2%, 5%, or 7%.
  • FIG. 2A and 2B are respectively comparative graphs of current density and current efficiency of a light emitting diode device according to at least one embodiment of the present disclosure as a function of voltage under different electron transport layer materials.
  • FIG. 2A shows the current density of the light emitting diode device as a function of voltage when the materials of the electron transport layer are ZnO thin film, ZnMgO thin film, ZnAlO thin film, and ZnMgAlO thin film, respectively.
  • FIG. 2B shows the current efficiency of the light emitting diode device as a function of voltage when the material of the electron transport layer is ZnO thin film, ZnMgO thin film, ZnAlO thin film, and ZnMgAlO thin film, respectively.
  • the light-emitting diode device provided by Example 1 includes: a silver (Ag) electrode (as a cathode), an electron transport layer (ET), a quantum dot light-emitting layer (QD), a hole transport layer and a layered layer in sequence. (HT), hole injection layer (HI) and ITO electrode (as anode).
  • the thickness of the ITO electrode is about 70 nanometers.
  • the ITO electrode can be prepared by sputtering. The sputtering can use an ITO target.
  • the flow rate of argon is about 40sccm, the power is about 100W, and the sputtering time is about 20 minutes.
  • the electron transport layer is made of Zinc oxide film (ZnO film) without any element doping, the thickness of zinc oxide film is about 100 nanometers, the ZnO film is prepared by sputtering process, and ZnO target can be used for sputtering, the argon flow rate is about 40sccm, and the power is about 100W, the sputtering time is about 25 minutes; the material of the quantum dot light-emitting layer is cadmium selenide (CdSe), the thickness of the quantum dot light-emitting layer is about 30 nanometers, and the quantum dot light-emitting layer is prepared by a spin coating process; the hole transport layer includes The first sub-hole transport layer and the second sub-hole transport layer, the first sub-hole transport layer is located on the side of the second sub-hole transport layer close to the quantum dot light-emitting layer, and the thickness of the first sub-hole transport layer is about is 10 nanometers, the thickness of the second sub-hole transport layer is about 30 nano
  • the light-emitting diode device provided in Example 2 is different from Example 1 in that the electron transport layer uses a doped zinc oxide film (ZnMgO film) doped with magnesium element, and the ZnMgO film is The mass fraction of magnesium is about 2%, and the film thickness is about 100 nanometers.
  • the ZnMgO film is prepared by sputtering process, which can be sputtered with ZnO:MgO target or co-sputtered with ZnO target and MgO target, argon flow rate is 40sccm, the power is 100W, and the sputtering time is 25 minutes.
  • the light-emitting diode device provided in Example 3 is different from that in Example 1 in that the electron transport layer adopts a doped zinc oxide film (ZnAlO film) doped with aluminum element, and the ZnAlO film is The mass fraction of Al is about 2%, and the film thickness is about 100 nanometers.
  • the ZnAlO film is prepared by sputtering process, which can be sputtered with a ZnO:Al 2 O 3 target or a ZnO target and an Al 2 O 3 target.
  • the argon flow rate was 40 sccm
  • the power was 100 W
  • the sputtering time was 25 minutes.
  • the light-emitting diode device provided by Example 4 is different from that of Example 1 in that the electron transport layer adopts a doped zinc oxide film (ZnMgAlO film) co-doped with magnesium and aluminum elements, And the mass fraction of Mg in the ZnMgAlO film is about 2%, the mass fraction of Al is about 2%, and the thickness of the ZnMgAlO film is about 100 nanometers.
  • the ZnMgAlO film is prepared by the sputtering process, which can be sputtered with a ZnMgAl target or a ZnMgO target. Co-sputtering with Al 2 O 3 target, the argon flow rate is 40sccm, the power is 100W, and the sputtering time is 25 minutes.
  • the current density of the light-emitting diode device provided in Example 2 is reduced, thereby reducing the conductivity, and the current efficiency is increased, thereby increasing the luminous efficiency;
  • the current density of the diode device is greatly increased, so that the conductivity is greatly increased, the current efficiency is greatly reduced, and the luminous efficiency is greatly reduced;
  • the current density of the light-emitting diode device provided in Example 4 is reduced, but is higher than that of the light-emitting diode device provided in Example 2, so that the conductivity is moderate, and its current efficiency is higher than that of the light-emitting diode devices provided in Example 1 to Example 3, so that the luminous efficiency Highest.
  • doped zinc oxide films doped with magnesium ions and aluminum ions can not only adjust the energy level of the electron transport layer to a level matching that of the quantum dot light-emitting layer, but also provide moderate conductivity and better luminous efficiency.
  • the mass fraction of aluminum and magnesium in the above examples 2 to 4 is only about 2% for reference to the value set in the experiment.
  • the doping quality of magnesium ions is The above-described effects can be obtained when the percentage is in the range of 0.5% to 20% and the doping mass percentage of aluminum ions is in the range of 0.5% to 10%.
  • trivalent metal ions eg, indium (In) ions, gallium (Ga) ions
  • indium (In) ions, gallium (Ga) ions can be used to replace the aluminum ions in the above examples 2 to 4.
  • the embodiments of the present disclosure do not use these ions. Repeat.
  • FIG. 3A is a schematic cross-sectional structure diagram of a light emitting diode device according to another embodiment of the present disclosure. As shown in FIG. 3A , the difference from the structure shown in FIG. 1A is that, in the light emitting diode device provided in this embodiment, the surface except the electron transport layer 130 in contact with the quantum dot light emitting layer 140 includes a plurality of protrusions In addition to the first concave-convex surface, the surface of the first electrode layer 120 away from the substrate 110 is also a second concave-convex surface including a plurality of protrusions.
  • the second uneven surface (ie, the surface where the first electrode 120 contacts the electron transport layer 130 ) includes a plurality of protrusions such that the second uneven surface has a range of root mean square surface roughness (RMS) About 5nm-10nm.
  • RMS root mean square surface roughness
  • about 5 nanometers to 10 nanometers here means that the lower limit of the range of the root mean square surface roughness is within the error range of 10% of 5 nanometers. The upper end of the range is within 10% error of 10 nanometers.
  • the contact area between the first electrode layer 120 and the electron transport layer 130 can be increased by making the surface of the first electrode layer 120 in contact with the electron transport layer 130 to include a plurality of protrusions, so that when the spin coating process is used to form the spin coating
  • the spin-coated zinc oxide nanoparticles can be prevented from accumulating on the flat first electrode layer 120 , resulting in a small contact area and less electron injection, resulting in carrier imbalance and other problems.
  • the height H2 of the plurality of protrusions included in the second concave-convex surface in a direction perpendicular to the substrate 110 ranges from 1 nanometer to 10 nanometers, such as 2 nanometers, 5 nanometers, or 7 nanometers. It should be noted that the height H2 refers to the distance between the peaks and valleys of these protrusions in a direction perpendicular to the substrate 110 .
  • the first electrode layer 120 includes a first sub-electrode layer and conductive nanoparticles disposed on the first sub-electrode layer (eg, the first sub-electrode layer 1201 and the conductive nanoparticles thereon in FIG. 9B ) ), the conductive nanoparticles constitute a plurality of protrusions on the second concave-convex surface.
  • the shapes of the plurality of protrusions included in the second concavo-convex surface may be various.
  • the distribution of the plurality of protrusions included in the second concave-convex surface may be uniform distribution or non-uniform distribution.
  • the distribution spacing of adjacent protrusions may be, for example, 5 nanometers to 10 nanometers. To avoid repetition, details are not repeated here.
  • a plurality of protrusions included in the second uneven surface are in contact with the first uneven surface (ie, the electron transport layer 130 is in contact with the quantum dot light-emitting layer 140 ).
  • the plurality of protrusions included in the second uneven surface have the same shape, and in the direction perpendicular to the substrate 110, the plurality of protrusions included in the second uneven surface and the plurality of protrusions included in the first uneven surface have the same shape. the same height.
  • the surface of the first electrode 120 in contact with the electron transport layer 130 is first prepared to include a plurality of protrusions on the second concave-convex surface, and then the electron transport layer 130 is formed on the second concave-convex surface with the same thickness.
  • the layer 130 naturally forms a first uneven surface including a plurality of protrusions.
  • the electron transport layer 130 including the first concave-convex surface with a plurality of protrusions can be formed with the same thickness regardless of the spin coating process or the sputtering process.
  • the light emitting diode device may further include a hole transport layer and a hole injection layer (not shown).
  • the hole transport layer and the hole injection layer are sequentially stacked on the quantum dot light-emitting layer 140, and the second electrode 150 is stacked on the hole injection layer.
  • the materials of the hole transport layer and the hole injection layer are the same as those previously described in conjunction with FIG. 1A , and to avoid repetition, they will not be repeated here.
  • the electron transport layer 130 in FIG. 3A may be replaced by the electron transport layer 130 ′ shown in FIG. 3B , the electron transport layer 130 ′ includes two sub-electron transport layers 1301 and one sub-electron blocking layer 1302 , The sub-electron blocking layer 1302 is sandwiched between the two sub-electron transport layers 1301 .
  • the surface of the electron transport sub-layer farthest from the substrate 110 among the two electron transport sub-layers 1301 that is in contact with the quantum dot transport layer 140 is a first concave-convex surface including a plurality of protrusions.
  • the materials of the sub-electron transport layer 1301 and the sub-electron blocking layer 1302 are similar to those previously described in conjunction with FIG. 1A , and are not repeated here to avoid repetition.
  • the electron transport layer 130 (or sub electron transport layer 1301 ) shown in FIG. 3A may also use a doped zinc oxide film doped with magnesium ions and trivalent metal ions.
  • the above trivalent metal ions can be aluminum ions, and the doping mass percentage of magnesium ions in the doped zinc oxide film is 0.5% to 20%, such as 5%, 10% or 15%, etc.
  • the doping mass percentage of aluminum ions It is 0.5% to 10%, for example, 2%, 5% or 7%. To avoid repetition, details are not repeated here.
  • the display panel 200 includes a base substrate 210 and a plurality of sub-pixels 220 arranged in an array on the base substrate 210 , and each sub-pixel of the plurality of sub-pixels 220 includes the above-mentioned light emitting diode device 100 .
  • the display panel 200 further includes a pixel defining layer 230 disposed on the surface of the electron transport layer 130 away from the base substrate 200, the pixel defining layer 230 includes a plurality of openings 2301, and the pixel defining layer 230 at least partially covers the electron transport layer The edge of the layer 130, and the plurality of openings 2301 respectively expose the middle portion of the electron transport layer 130, and the quantum dot light-emitting layer 140 is disposed at least in the plurality of openings.
  • the display panel 200 further includes a pixel circuit layer 211 disposed between the base substrate 210 and the light emitting diode device 100 .
  • Each sub-pixel 220 further includes a pixel driving circuit disposed in the pixel circuit layer 211 for driving the light-emitting state of the light-emitting diode device 100 .
  • a pixel defining layer 220 is formed on the surface of the electrode layer 120, so that the scope of the subsequent preparation of the quantum dot light-emitting layer 140 can be better defined.
  • the pixel defining layer 220 can not only provide openings for forming the quantum dot light-emitting layer 140, but also shield defects (such as burrs) in the edge portion of the electron transport layer 130 that have been formed, so that the subsequently formed film can be blocked. The uniformity of the layer is better.
  • the width W of the overlapping portion of the orthographic projection of the pixel defining layer 220 on the base substrate 210 and the orthographic projection of the electron transport layer 120 of each light-emitting element 210 on the base substrate 110 may be in the range of 1 ⁇ m to 5 ⁇ m, for example The width is 2 microns or 3 microns, etc.
  • the base substrate 210 may be a rigid substrate or a flexible substrate
  • the rigid substrate may be a glass substrate, a ceramic substrate, a plastic substrate, etc.
  • the flexible substrate may be a plastic substrate (eg, a polyimide substrate), a resin substrate, etc.
  • a plastic substrate eg, a polyimide substrate
  • the disclosed embodiments do not limit this.
  • the display panel has all the features and advantages of the aforementioned QLED devices and will not be described in detail here.
  • Embodiments of the present disclosure also provide a display device.
  • the display device includes the display panel 200 as above.
  • the display device 200 may further include necessary packaging components and control circuits, which are not limited by the embodiments of the present disclosure.
  • the display device can be implemented as any product or component with a display function, such as a mobile phone, a tablet computer, a TV, a monitor, a notebook computer, a digital photo frame, and a navigator.
  • the display device has all the features and advantages of the aforementioned QLED devices and will not be described in detail here.
  • FIG. 5 is a flowchart of a method of fabricating a light emitting diode device according to at least one embodiment of the present disclosure. Referring to FIG. 5 , the preparation method includes steps S110 to S150.
  • Step S110 providing a substrate.
  • the substrate may be a glass substrate, a quartz substrate, or a flexible PET (polyethylene terephthalate) substrate, etc.
  • the specific form of the substrate is not limited in the embodiments of the present disclosure.
  • Step S120 forming a first electrode layer on the substrate.
  • the first electrode layer can be a transparent electrode, and its material is, for example, ITO (indium tin oxide), FTO (fluorine-doped tin oxide), or conductive polymer, or the like, or the first electrode layer can also be an opaque electrode , such as metal electrodes, such as aluminum or silver electrodes, etc.
  • ITO indium tin oxide
  • FTO fluorine-doped tin oxide
  • conductive polymer or the like
  • the first electrode layer can also be an opaque electrode , such as metal electrodes, such as aluminum or silver electrodes, etc.
  • Step S130 forming an electron transport layer on the surface of the first electrode layer away from the substrate, wherein forming the electron transport layer includes: forming the surface of the electron transport layer away from the first electrode layer into a first concavo-convex including a plurality of protrusions surface.
  • Step S140 forming a quantum dot light-emitting layer on the surface of the electron transport layer away from the first electrode layer.
  • the quantum dot light-emitting layer can use silicon quantum dots, germanium quantum dots, cadmium sulfide quantum dots, cadmium selenide quantum dots, cadmium telluride quantum dots, zinc selenide quantum dots, lead sulfide quantum dots, lead selenide quantum dots , indium phosphide quantum dots and indium arsenide quantum dots and other quantum dot materials.
  • Step S150 forming a second electrode layer on the surface of the quantum dot light-emitting layer away from the electron transport layer.
  • the second electrode layer may be a metal, an alloy, or a combination of a metal, an alloy and a metal oxide with good electrical conductivity.
  • the light emitting diode device prepared by this method can have the structure shown in FIG. 1A .
  • the contact area between the electron transport layer and the quantum dot light-emitting layer is larger, so that when the electron transport layer adopts sputtering
  • the problems such as less electron injection and carrier imbalance caused by the accumulation of nano-particle quantum dots on the surface of the flat sputtered zinc oxide film can be avoided.
  • forming the surface of the electron transport layer away from the first electrode layer in step S130 into a first concave-convex surface including a plurality of protrusions can be implemented in various ways.
  • plasma etching or sandblasting can be used to roughen the surface of the electron transport layer away from the first electrode layer, for example, to make the surface of the electron transport layer away from the first electrode layer in the range of root mean square surface roughness 5nm-10nm.
  • Plasma etching can use dry etching, such as reactive plasma etching (Reactive Ion Etching, RIE) and inductively coupled plasma (Inductively Coupled Plasma, ICP) etching, using argon or oxygen plasma as the etching reactive gas.
  • Sand blasting can be performed with ceramic sand, quartz sand, and other materials.
  • FIG. 6 is a flowchart of a method for fabricating a light emitting diode device according to another embodiment of the present disclosure.
  • the surface of the first electrode layer in contact with the electron transport layer is first prepared into a second concave-convex surface including a plurality of protrusions, and then the electron transport layer is formed on the second concave-convex surface. , so that the electron transport layer forms a first concave-convex surface including a plurality of protrusions.
  • steps S210, S240, and S250 in the preparation method are the same as steps S110, S140, and S150 in FIG. a sub-electrode layer and the first electrode layer of the second sub-electrode layer, and the surface of the second sub-electrode layer away from the substrate is formed into a second concave-convex surface including a plurality of protrusions; in step S230, a sputtering process is used Or the spin coating process performs sputtering or spin coating on the second concavo-convex surface to form the electron transport layer, so that the surface of the electron transport layer away from the first electrode layer is formed into a first concavo-convex surface including a plurality of protrusions.
  • Sputtering or spin coating can be performed with equal thickness or non-equal thickness.
  • the plurality of protrusions included in the subsequently formed first concave-convex surface will have the same thickness as the second concave-convex surface.
  • the plurality of protrusions are the same shape and size (eg, the same shape and height).
  • the light emitting diode device prepared by this method may have the structure shown in FIG. 3A , and wherein the first electrode layer 120 will include a first sub-electrode layer 1201 and a second sub-electrode layer 1202 (as shown in FIG. 7B ).
  • Forming the surface of the second sub-electrode layer away from the substrate in the above step S220 into a second concave-convex surface including a plurality of protrusions can be implemented in various ways, which will be described below with reference to FIGS. 7A-9B .
  • FIG. 7A is a flowchart of one method of forming the surface of the second sub-electrode layer remote from the substrate into a second uneven surface including a plurality of protrusions.
  • the above step S220 can be implemented through steps S2201-S2204.
  • FIG. 7B shows the structure of the light emitting diode device in the manufacturing process corresponding to steps S2201-S2204 one-to-one.
  • Step S2201 forming a first sub-electrode layer on the substrate.
  • a first sub-electrode layer 1201 is formed on the substrate.
  • Step S2202 forming nanoparticles on the surface of the first sub-electrode layer away from the substrate.
  • nanoparticles are formed on the surface of the first sub-electrode layer 1201 away from the substrate.
  • the nanoparticles can be made of polystyrene or silicon.
  • polystyrene spheres ie, PS spheres
  • silicon spheres can be coated on the first electrode layer 110 using a coating process.
  • Step S2203 forming a second sub-electrode layer on the surface of the first sub-electrode layer away from the substrate with a thickness smaller than that of nanoparticles.
  • the second sub-electrode layer 1202 is formed on the surface of the first sub-electrode layer 1201 away from the substrate with a thickness smaller than that of nanoparticles.
  • the thickness of the second sub-electrode layer is 5 nanometers to 10 nanometers, such as 7 nanometers or 8 nanometers.
  • Step S2204 Etching and removing nanoparticles in the second sub-electrode layer to form the second concave-convex surface including a plurality of protrusions.
  • the nanoparticles are etched and removed in the second sub-electrode layer 1202 .
  • a solution that can dissolve the nanoparticles but not the second sub-electrode layer 1202 can be used to remove the nanoparticles (for example, tetrahydrofuran, dimethylformamide or acetone can be used to remove polystyrene by etching, and silicon spheres can be removed by etching hydrofluoric acid, sodium hydroxide, borohydride, toluene, dichloromethane, etc.).
  • the surface plasmon effect is generated in the local area of the surface of the second sub-electrode layer 1202 in contact with the quantum transport layer 130, which causes the enhancement of the local electromagnetic field, shortens the radiation lifetime of the excitons in the quantum dot light-emitting layer, and thus avoids Auger complex.
  • the second sub-electrode layer 1202 may be made of the same or different materials as the first sub-electrode layer 1201 .
  • the second sub-electrode layer 1202 may be prepared using an alloy material including two metals (eg, Au-Ag alloy) to obtain stronger resonance, resulting in a shorter exciton radiation lifetime.
  • the step of applying to the first sub-electrode layer 1201 in the method shown in FIG. 7A can also be adaptively applied to the contact between the electron transport layer 130 and the quantum dot light-emitting layer 140 in the structure shown in FIG. 1A .
  • surface For example, by forming nanoparticles on the surface of the electron transport layer 130 remote from the substrate, forming a metal layer with a thickness less than the nanoparticles on the surface of the electron transport layer 130 remote from the substrate, and etching away the nanoparticles in the electron transport layer 130 Step S130 in the method shown in FIG. 5 is implemented.
  • FIG. 8A is a flowchart of another method of forming the surface of the second sub-electrode layer away from the substrate in FIG. 6 as a second uneven surface including a plurality of protrusions.
  • the above-mentioned step S220 is realized through steps S2201'-S2202'.
  • FIG. 8B shows the structure of the light emitting diode device in the manufacturing process corresponding to steps S2201'-S2202' one-to-one.
  • Step S2201' forming a first sub-electrode layer on the substrate.
  • a first sub-electrode layer 1201 is formed on the substrate.
  • Step S2202' A conductive film is formed on the surface of the first sub-electrode layer away from the substrate, and the thickness of the conductive film is 1 nanometer to 5 nanometers.
  • an evaporation process can be used to form a conductive thin film on the surface of the first sub-electrode layer away from the substrate.
  • a plurality of raised second uneven surfaces can be used to form a conductive thin film on the surface of the first sub-electrode layer away from the substrate.
  • the material of the conductive thin film may be gold (Au), silver (Ag), or the like.
  • An extremely thin (eg, 1 nm-5 nm) conductive film may be formed using an evaporation process such that the conductive film does not completely cover the surface of the first sub-electrode layer away from the substrate to expose portions of the first sub-electrode layer.
  • the island-like structures on the first sub-electrode layer as shown in FIG. 8B are the aforementioned plurality of protrusions.
  • the step of applying to the first sub-electrode layer 1201 in the method shown in FIG. 8A can also be adaptively applied to the contact between the electron transport layer 130 and the quantum dot light-emitting layer 140 in the structure shown in FIG. 1A . surface.
  • the method shown in FIG. 5 is achieved by forming a conductive thin film having a thickness of 1 nm to 5 nm and exposing a portion of the electron transport layer 130 on the surface of the electron transport layer 130 in contact with the quantum dot light-emitting layer 140 using an evaporation process. step S130.
  • FIG. 9A is a flowchart of another method of forming the surface of the second sub-electrode layer away from the substrate in FIG. 6 as a second uneven surface including a plurality of protrusions.
  • the above-mentioned step S220 is implemented through steps S2201"-S2202".
  • FIG. 9B shows the structure of the light emitting diode device in the manufacturing process corresponding to steps S2201"-S2202" one-to-one.
  • Step S2201" forming a first sub-electrode layer on the substrate.
  • a first sub-electrode layer 1201 is formed on the substrate.
  • Step S2202" forming conductive nanoparticles on the surface of the first sub-electrode layer away from the substrate to form a second concave-convex surface including a plurality of protrusions.
  • conductive nanoparticles are formed on the surface of the first sub-electrode layer 1201 away from the substrate.
  • the conductive nanoparticles may be formed with a thickness of 1 nanometer to 10 nanometers, that is, the diameter of the conductive nanoparticles may be 1 nanometer to 10 nanometers.
  • the material of the conductive nanoparticles may be gold (Au), silver (Ag), or the like.
  • the conductive nanoparticles may be coated on the first electrode layer 110 using a coating process.
  • the second concave-convex surface can be formed to have a root-mean-square surface roughness in the range of 5 nanometers to 10 nanometers.
  • the plurality of protrusions on the second concave-convex surface may be formed with a height ranging from 1 nm to 10 nm.
  • step of applying to the first sub-electrode layer 1201 in the method shown in FIG. 9A can also be adaptively applied to the contact between the electron transport layer 130 and the quantum dot light-emitting layer 140 in the structure shown in FIG. 1A . surface.
  • step S130 in the method shown in FIG. 5 is realized by forming conductive nanoparticles on the surface of the electron transport layer 130 away from the substrate.
  • an electron transport layer may be formed by sputtering or spin coating on the second concave-convex surface by using a sputtering process or a spin coating process. If a sputtering process is selected in this step, a doped zinc oxide film doped with magnesium ions and trivalent metal ions can be formed as an electron transport layer using the sputtering process, and the trivalent metal ions can be aluminum ions.
  • the doping mass percentage of magnesium ions is controlled to be 0.5%-20%, such as 5%, 10% or 15%, etc.
  • the doping mass percentage of aluminum ions is controlled to 0.5%-10%, such as 2%, 5% Or 7%, etc.
  • one of ZnMgAlO sputtering, or ZnMgO and Al2O3 co-sputtering, or ZnAlO and MgO co-sputtering can be used to form the doped zinc oxide thin film.
  • FIG. 10 is a flowchart of another method for fabricating a light emitting diode device according to an embodiment of the present disclosure. As shown in FIG. 10 , the preparation method includes steps S310-S350.
  • Step S310 Provide a substrate.
  • the substrate may be a glass substrate, a quartz substrate, or a flexible PET (polyethylene terephthalate) substrate.
  • Step S320 forming a first electrode layer on the substrate.
  • the first electrode layer can be a transparent electrode, and the material of the transparent electrode is, for example, ITO (indium tin oxide), FTO (fluorine-doped tin oxide) or conductive polymer, or the first electrode layer can also be opaque Electrodes, such as metal electrodes, such as aluminum electrodes or silver electrodes, etc.
  • Step S330 forming an electron transport layer on the surface of the first electrode away from the substrate, wherein forming the electron transport layer includes: using a sputtering process to form a doped zinc oxide film doped with magnesium ions and trivalent metal ions as the electron transport layer transport layer.
  • Step S340 forming a quantum dot light-emitting layer on the surface of the electron transport layer away from the first electrode layer.
  • Step S350 forming a second electrode layer on the surface of the quantum dot light-emitting layer away from the electron transport layer.
  • the electron transport layer has a more matching energy level with the quantum dot light-emitting layer, more suitable conductivity and better stability.
  • the trivalent metal ions used in step S330 are aluminum ions
  • the doping mass percentage of magnesium ions in the doped zinc oxide film is 0.5%-20%
  • the doping mass percentage of aluminum ions is
  • the doped zinc oxide film can be formed by one of ZnMgAlO sputtering, or ZnMgO and Al2O3 co-sputtering, or ZnAlO and MgO co-sputtering.
  • the manufacturing method of the light emitting diode device further includes: roughening the surface of the electron transport layer away from the first electrode layer by plasma etching or sandblasting, so that the electron transport layer is away from the first electrode
  • the root mean square surface roughness of the surface of the layer is in the range of 5 nanometers to 10 nanometers.
  • plasma etching can use dry etching, such as reactive plasma etching (Reactive Ion Etching, RIE) and inductively coupled plasma (Inductively Coupled Plasma, ICP) etching, using argon or oxygen plasma as the etching reaction gas.
  • RIE reactive Ion Etching
  • ICP Inductively Coupled Plasma
  • Sand blasting can be performed with ceramic sand, quartz sand, and other materials.
  • the roughness of the surface of the electron transport layer in contact with the quantum dot light-emitting layer 120 is relatively high, and the contact area between the electron transport layer and the quantum dot light-emitting layer is relatively large, so that the The problems of less electron injection and carrier imbalance caused by the accumulation of dots on the flat sputtered ZnO film surface can also be avoided. Leakage caused by direct contact between the transport layer and the hole transport layer.

Landscapes

  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Nanotechnology (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Led Devices (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

一种发光二极管器件及其制备方法、显示面板。该发光二极管器件包括衬底(110)、第一电极层(120)、电子传输层(130)、量子点发光层(140)以及第二电极层(150)。第一电极层(120)层叠设置在衬底(110)上；电子传输层(130)层叠设置在第一电极层(120)远离衬底(110)的表面上；量子点发光层(140)层叠设置在电子传输层(130)远离第一电极层(120)的表面上；第二电极层(150)层叠设置在量子点发光层(140)远离电子传输层(130)的表面上；其中，电子传输层(130)远离第一电极层(120)的表面为包括多个凸起的第一凹凸表面。由此，通过使电子传输层(130)与量子点发光层(140)接触的表面为包括多个凸起的第一凹凸表面，可以增加电子传输层(130)与量子点发光层(140)的接触面积，从而改善由于电子注入少而引起的量子点发光层(140)中载流子不平衡的问题，同时改善量子点发光层激子俄歇复合的问题。

Description

发光二极管器件及其制备方法、显示面板
本申请要求于2020年6月30日递交的中国专利申请第202010619865.1号的优先权，出于所有目的，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开的实施例涉及一种发光二极管器件及其制备方法、显示面板。
背景技术
随着显示技术的不断发展，显示装置的种类也越来越多。发光二极管(Light Emitting Diode，LED)显示装置由于其具有自发光、亮度高、工作电压低、功耗小、寿命长、耐冲击和性能稳定等优点受到业界广泛的关注。并且，由于发光二极管显示装置不需要额外设置背光模组，具有较轻的重量，从而利于显示装置的轻薄化，因此具有较好的市场前景。
量子点是一种溶液可加工的半导体纳米晶体，具有发光光谱窄、发光波长可调控、光谱纯度高等优点，最有希望成为下一代发光器件的核心部分。量子点发光二极管(Quantum Dot Light Emitting Diodes，简称QLED)将量子点作为发光层的制备材料，在发光层两侧的电极之间施加电压差，使得发光层发光，从而得到所需要波长的光。因此，以量子点材料作为发光层的量子点发光二极管(Quantum Dot Light Emitting Diode，QLED)成为了目前新型显示器件研究的主要方向之一。
发明内容
本公开实施例提供一种发光二极管器件及其制备方法、显示面板。该发光二极管器件的结构包括：衬底、层叠设置在衬底上的第一电极层、层叠设置在第一电极层上的电子传输层、层叠设置在电子传输层上的量子点发光层、层叠设置在量子点发光层上的第二电极层，其中电子传输层与量子点发光层接触的表面为凹凸表面。由此，通过增加电子传输层与量子点发光层的接触面积，可以改善由于电子注入少而引起的量子点发光层中载流子注入不平衡的问题，同时改善量子点发光层激子俄歇(Auger)复合的问题。
本公开至少一实施例提供一种发光二极管器件，其包括：衬底；第一电极层，层叠设置在衬底上；电子传输层，层叠设置在第一电极层远离衬底的表面上；量子点发光层，层叠设置在电子传输层远离第一电极层的表面上；以及第二电极层，层叠设置在量子点发光层远离电子传输层的表面上；其中，电子传输层远离所述第一电极层的表面为包括多个凸起的第一凹凸表面。
例如，在本公开至少一实施例提供的发光二极管器件中，第一凹凸表面的均方根表 面粗糙度的范围为5纳米-10纳米。
例如，在本公开至少一实施例提供的发光二极管器件中，第一凹凸表面所包括多个凸起在垂直于衬底的方向上的高度的范围为1纳米-10纳米。
例如，在本公开至少一实施例提供的发光二极管器件中，第一电极层远离衬底的表面为包括多个凸起的第二凹凸表面。
例如，在本公开至少一实施例提供的发光二极管器件中，第一电极层包括第一子电极层和设置在第一子电极层上的导电纳米颗粒，该导电纳米颗粒构成第二凹凸表面的多个凸起。
例如，在本公开至少一实施例提供的发光二极管器件中，第二凹凸表面所包括的多个凸起与第一凹凸表面所包括的多个凸起具有相同的形状，并且在垂于在衬底的方向上，第二凹凸表面所包括的多个凸起与第一凹凸表面所包括的多个凸起具有相同的高度。
例如，在本公开至少一实施例提供的发光二极管器件中，电子传输层包括掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜。
例如，在本公开至少一实施例提供的发光二极管器件中，三价金属离子为铝离子，并且掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，铝离子的掺杂质量百分数为0.5％～10％。
例如，在本公开至少一实施例提供的发光二极管器件中，电子传输层包括N+1个子电子传输层和N个子电子阻挡层，N个子电子阻挡层分别夹设在N+1个子电子传输层之间，N为大于等于2的正整数，N+1个子电子传输层中离衬底最远的子电子传输层的远离衬底的表面为第一凹凸表面，并且N+1个子电子传输层的材料相同，N个子电子阻挡层与N+1个子电子传输层的材料不同。
本公开至少一实施例还提供一种显示面板，包括：衬底基板；和阵列排布在衬底基板上的多个子像素，多个子像素中的每个包括采用上述任一项的发光二极管器件，该显示面板还包括像素限定层，其中，像素限定层设置在电子传输层远离衬底基板的表面上，像素限定层包括多个开口，像素限定层至少部分覆盖电子传输层的边缘，并且该多个开口分别暴露电子传输层的中间部分，量子点发光层至少设置在多个开口中。
本公开至少一实施例还提供一种发光二极管器件的制备方法，包括：提供衬底；在衬底上形成第一电极层；在第一电极层远离衬底的表面上形成电子传输层；在电子传输层远离第一电极层的表面上形成量子点发光层；以及在量子点发光层远离电子传输层的表面上形成第二电极层，其中，形成电子传输层包括：将电子传输层远离第一电极层的表面形成为包括多个凸起的第一凹凸表面。
例如，在本公开至少一实施例提供的发光二极管器件的制备方法中，将电子传输层远离第一电极层的表面形成为包括多个凸起的第一凹凸表面包括：在衬底上形成包括依次层叠的第一子电极层和第二子电极层的第一电极层，并将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面；采用溅射工艺或旋涂工艺在所述第二凹凸表面上进行溅射或旋涂而形成电子传输层，以使电子传输层远离第一电极层的表面形成为包 括多个凸起的第一凹凸表面。
例如，在本公开一实施例提供的发光二极管器件的制备方法中，将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面包括：在第一子电极层远离衬底的表面形成纳米颗粒；在第一子电极层远离衬底的表面以小于纳米颗粒的厚度形成第二子电极层；以及在第二子电极层中刻蚀去除该纳米颗粒，以形成包括多个凸起的第二凹凸表面，其中，第二子电极层的厚度为5纳米-10纳米。
例如，在本公开一实施例提供的发光二极管器件的制备方法中，将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面包括：采用蒸镀工艺在第一子电极层远离衬底的表面上形成导电薄膜，该导电薄膜的厚度为1纳米-5纳米以使该导电薄膜暴露第一子电极层的部分，从而形成包括多个凸起的第二凹凸表面。
例如，在本公开一实施例提供的发光二极管器件的制备方法中，将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面包括：在第一子电极层远离衬底的表面形成导电纳米颗粒以形成包括多个凸起的第二凹凸表面，该导电纳米颗粒的厚度为1纳米-10纳米。
例如，在本公开一实施例提供的发光二极管器件的制备方法中，用溅射工艺或旋涂工艺在第二凹凸表面上形成电子传输层包括：用溅射工艺在所述第二凹凸表面上形成掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为电子传输层。
例如，在本公开一实施例提供的发光二极管器件的制备方法中，该三价金属离子为铝离子，并且掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，铝离子的掺杂质量百分数为0.5％～10％，并且采用ZnMgAlO溅射、或者ZnMgO与Al 2O 3共溅射、或者ZnAlO与MgO共溅射中的一种形成该掺杂氧化锌薄膜。
本公开至少一实施例还提供一种发光二极管器件的制备方法，包括：提供衬底；在衬底上形成第一电极；在第一电极远离衬底的表面形成电子传输层；在电子传输层远离第一电极层的表面形成量子点发光层；以及在量子点发光层远离电子传输层的表面形成第二电极层；其中，形成电子传输层包括：使用溅射工艺形成掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为所述电子传输层。
例如，在本公开一实施例提供的发光二极管器件的制备方法中，该三价金属离子为铝离子，其中，该掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，铝离子的掺杂质量百分数为0.5％～10％，并且采用ZnMgAlO溅射、或者ZnMgO与Al 2O 3共溅射、或者ZnAlO与MgO共溅射中的一种形成所述掺杂氧化锌薄膜。
例如，在本公开一实施例提供的发光二极管器件的制备方法中，采用等离子刻蚀或者喷砂处理方式对电子传输层远离第一电极层的表面进行粗糙化处理，以使电子传输层远离第一电极层的表面的均方根表面粗糙度的范围为5纳米-10纳米。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍， 显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为本公开至少一实施例提供的一种发光二极管器件的截面结构示意图；
图1B为本公开至少一实施例提供的一种发光二极管器件的电子传输层的截面结构示意图；
图2A和图2B分别为本公开至少一实施例提供的发光二极管器件的电流密度和电流效率在不同的电子传输层材料下随电压的变化的对比图；
图3A为本公开至少一实施例提供的另一发光二极管器件的截面结构示意图；
图3B为本公开至少一实施例提供的另一发光二极管器件的电子传输层的截面结构示意图；
图4为本公开至少一实施例提供的显示面板的截面示意图；
图5为本公开至少一实施例提供的发光二极管器件的制备方法的流程图；
图6为本公开至少一实施例提供的另一发光二极管器件的制备方法的流程图；
图7A为图6中的将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面的一种方法的流程图；
图7B示出了与图7A的方法中的步骤一一对应的发光二极管器件在制备过程中的结构示意图；
图8A为图6中的将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面的另一种方法的流程图；
图8B示出了与图8A的方法中的步骤一一对应的发光二极管器件在制备过程中的结构示意图；
图9A为图6中的将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面的另一种方法的流程图；
图9B示出了与图9A的方法中的步骤一一对应的发光二极管器件在制备过程中的结构示意图；以及
图10为本公开至少一实施例提供的另一种发光二极管器件的制备方法的流程图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物 件及其等同，而不排除其他元件或者物件。
目前，有源矩阵量子点发光二极管(AMQLED)显示装置因其在宽色域、高寿命等方面的潜在优势得到了越来越广泛的关注。并且，随着对AMQLED显示装置的研究日益深入，AMQLED显示产品的量子效率不断提升，基本达到产业化的水平。
在一些产品中，量子点发光二极管(QLED)中的电子传输层可以有两种形成方式：一种是使用旋涂工艺旋涂电子传输材料，例如氧化锌纳米颗粒形成的旋涂氧化锌薄膜作为电子传输层，另一种是使用溅射工艺溅射电子传输材料，例如氧化锌靶材形成的溅射氧化锌薄膜作为电子传输层。采用旋涂工艺形成的旋涂氧化锌薄膜通常具有杂质(杂质是有机配体等)，其表面有堆积的氧化锌纳米颗粒，因此是不平坦的；采用溅射工艺形成的溅射氧化锌薄膜是无定型态或者多晶态的薄膜，其没有杂质，因此表面是比较平坦的。因此，当QLED采用倒置结构时，若使用旋涂氧化锌薄膜作为电子传输层，则由于氧化锌纳米颗粒直接旋涂在平坦的阴极上，氧化锌纳米颗粒与阴极的接触面积小，电子注入少；若使用溅射氧化锌薄膜作为电子传输层，则由于溅射氧化锌薄膜较为平坦，量子发光点层中的纳米颗粒状量子点直接形成在平坦的溅射氧化锌薄膜上，量子点与溅射氧化锌薄膜接触面积小，电子注入少，并且由于纳米颗粒状量子点直接形成在平坦的溅射氧化锌薄膜上，还可能造成溅射氧化锌薄膜的部分与后续的空穴传输层直接接触而造成漏电。同时，由于倒置结构中电子注入量子点发光层要难于空穴注入量子点发光层，因此量子点发光层中的载流子十分不平衡。由于载流子不平衡造成量子点发光层中电荷积累，俄歇(Auger)复合(即电子与空穴复合时，通过碰撞把能量或动量转移给另一电子或者另一空穴而造成该电子或空穴跃迁的复合过程)严重，量子点产率降低，从而限制了QLED的发光效率和稳定性进一步提高。
对此，本公开实施例提供一种发光二极管器件及其制备方法、显示面板。该发光二极管器件包括衬底、第一电极层、电子传输层以及第二电极层。第一电极层层叠设置在衬底上；电子传输层层叠设置在第一电极层远离衬底的表面上；量子点发光层层叠设置在电子传输层远离第一电极层的表面上；第二电极层层叠设置在量子点发光层远离电子传输层的表面上；电子传输层远离第一电极层的表面为包括多个凸起的第一凹凸表面。
由此，上述实施例的发光二极管器件中，通过使电子传输层与量子点发光层接触的表面为包括多个凸起的第一凹凸表面，可以增加电子传输层与量子点发光层的接触面积，从而改善由于电子注入少而引起的量子点发光层中载流子不平衡的问题，同时改善量子点发光层激子俄歇(Auger)复合的问题。
此外，由于量子点材料本身的特性，QLED一般采用印刷技术或者打印的方法制备，这样可以提高材料利用率，并成为大面积制备的有效途径。当QLED采用正置结构时，量子点发光层下方的空穴注入层和空穴传输层都存在不均匀的问题，因此从空穴注入层到量子点发光层不均匀程度逐层累加，这严重影响量子点发光层以及最终形成的QLED的均匀性。当QLED采用倒置结构时，由于量子点发光层在空穴注入层和空穴传输层之下，因此量子点发光层的不均匀性与正置结构相比有所缓解。但当采用溅射工艺形成溅 射氧化锌薄膜作为电子传输层时，由于溅射氧化锌薄膜迁移率较大，能级比量子点发光层更深，电子很难由溅射氧化锌薄膜注入量子点发光层，进而影响量子点发光效率。例如，普通的氧化锌纳米颗粒的LUMO能级约为-4.2eV到-4.0eV之间，而溅射氧化锌薄膜的LUMO能级约为-4.8eV到-4.6eV。可见，采用溅射氧化锌薄膜的LUMO能级更深，与量子点发光层的LUMO能级相差较大。
对此，本公开另一实施例还提供一种发光二极管的制备方法。该制备方法包括：提供衬底；在衬底上形成第一电极；在第一电极远离衬底的表面形成电子传输层；在电子传输层远离第一电极层的表面形成量子点发光层；以及在量子点发光层远离电子传输层的表面形成第二电极层；其中，形成电子传输层包括：使用溅射工艺形成掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为所述电子传输层。
由此，上述实施例的发光二极管器件的制备方法中，通过使用掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为电子传输层，可以使电子传输层具有与量子点发光层更匹配的能级、更合适的导电性以及更好的稳定性。
下面，结合附图对本公开实施例提供的一种发光二极管器件及其制备方法、一种显示面板、另一种发光二极管器件的制备方法进行详细的说明。
本公开至少一实施例提供一种发光二极管器件。图1A是根据本公开一实施例的一种发光二极管器件的截面结构示意图。如图1A所示，发光二极管器件100包括衬底110、第一电极层120、电子传输层130、量子点发光层140以及第二电极层150。第一电极层120层叠设置在衬底110上；电子传输层130层叠设置在第一电极层120远离衬底的表面上；量子点发光层140层叠设置在电子传输层130远离第一电极层的表面上；以及第二电极层150层叠设置在量子点发光层140远离电子传输层130的表面上。电子传输层130远离第一电极层120的表面为包括多个凸起的第一凹凸表面。
例如，在一些示例中，第一凹凸表面(即电子传输层130与量子点发光层120接触的表面)所包括的多个凸起使得第一凹凸表面的均方根表面粗糙度(RMS)的范围约为5纳米-10纳米。需要说明的是，此处的“约为5纳米-10纳米”是指均方根表面粗糙度的范围的下限值在5纳米的10％的误差范围之内，均方根表面粗糙度的范围的上限值在10纳米的10％的误差范围之内。
由此，电子传输层130与量子点发光层140接触的表面的粗糙度较高，电子传输层与量子点发光层的接触面积较大，使得当电子传输层130采用溅射工艺形成的溅射氧化锌薄膜时，可以避免由于纳米颗粒状的量子点堆积在平坦的溅射氧化锌薄膜表面而导致的例如电子注入少、载流子不平衡等问题。
例如，在一些示例中，如图1A所示，第一凹凸表面所包括多个凸起在垂直于衬底110的方向上的高度H1的范围为1纳米-10纳米，例如3纳米、5纳米、8纳米等。需要注意的是，高度H1指的是这些凸起的波峰与波谷在垂直于衬底110的方向上的距离。
此外，第一凹凸表面所包括的多个凸起的形状可以是多种多样的。虽然图1A中将凸起的形状示出为具有阵列排布的多个弧状缺口的凸起，但本公开的实施例不限制于此。 在其他实施例中，凸起的形状可以包括柱状凸起、球状凸起、岛状凸起、弧状凸起、波浪状凸起等，可以是规则的也可以是非规则的，凸起的形状与制备该第一凹凸表面的特定工艺有关。
此外，第一凹凸表面所包括的多个凸起的分布情况可以是均匀分布或非均匀分布。当凸起是均匀分布时，相邻凸起的分布间距例如可以为5纳米-10纳米，例如6纳米、8纳米等。虽然图1A中将凸起示出为均匀分布，但本公开的实施例不限制于此。凸起是否均匀分布与制备该第一凹凸表面的特定工艺有关。
此外，本实施例提供的发光二极管器件还可以包括空穴传输层和空穴注入层(图中未示出)。此时，空穴传输层和空穴注入层依次叠层设置在量子点发光层140上，第二电极150叠层在空穴注入层上。
例如，第一电极110为阴极，此时，第一电极110的材料可以为具有低功函数的材料，例如，镁(Mg)、钙(Ca)、铟(In)、锂(Li)，铝(Al)、银(Ag)或其合金或氟化物，例如镁(Mg)－银(Ag)合金、锂(Li)-氟化合物、锂(Li)－氧(O)化合物等，本公开的实施例对此不做限定。
例如，量子点发光层140包括硅量子点、锗量子点、硫化镉量子点、硒化镉量子点、碲化镉量子点、硒化锌量子点、硫化铅量子点、硒化铅量子点、磷化铟量子点和砷化铟量子点等，并且量子点的形状可以为球形或类球形，粒径在2纳米-20纳米之间，本公开的实施例对此不做限定。
例如，空穴注入层的材料可以包括：星形的三苯胺化合物、金属配合物、聚苯胺、氟碳氢化合物、卟啉(Porphyrin)衍生物、P型掺杂(P-Doped)胺类衍生物、聚(3,4-乙烯二氧噻吩)-聚苯乙烯磺酸(PEDOT/PSS)、聚噻吩或聚苯胺，本公开的实施例对此不做限定。
例如，第二电极150为阳极，此时，第二电极150的材料可以为金属、合金、或者金属、合金与有良好导电功能的金属氧化物的组合，例如Ag、Au、Pd、Pt、Ag:Au(即Ag和Au的合金)、Ag:Pd、Ag:Pt、Al:Au、Al:Pd、Al:Pt、Ag:Au、Ag/Pd(即Ag和Pd的叠层)、Ag/Pt、Ag/ITO、Ag/IZO、Al/Au、Al/Pd、Al/Pt、Al/ITO、Al/IZO、Ag:Pd/ITO、Ag:Pt/ITO、Al:Au/ITO、Al:Pd/ITO、Al:Pt/ITO、Ag:Au/ITO、Ag:Pd/IZO、Ag:Pt/IZO、Al:Au/IZO、Al:Pd/IZO、Al:Pt/IZO、Ag:Au/IZO等，本公开的实施例对此不做限定。
例如，在一些示例中，如图1B所示，电子传输层130’可以包括N+1个子电子传输层1301和N个子电子阻挡层1302(图1B中示出两个子电子传输层1301和一个子电子阻挡层1302作为示例)，该N个子电子阻挡层1302分别夹设在该N+1个子电子传输层1301之间，N为大于等于2的正整数，N+1个子电子传输层1301中离衬底110最远的子电子传输层的远离衬底110的表面作为如前所述的包括多个凸起的第一凹凸表面，并且该N+1个子电子传输层的材料相同，该N个子电子阻挡层与N+1个子电子传输层的材料不同。
由此，通过在电子传输层中另外增加子电子阻挡层，可以在电子传输层具有较高的 迁移率时减少从第一电极注入电子传输层中的电子，进而可平衡量子点发光层中的载流子浓度，提高QLED的发光效率。并且，当将电子阻挡层设置在电子传输层之中，还可有效降低启亮电压。
例如，图1A中的电子传输层130可以由图1B所示的电子传输层130’代替，电子传输层130包括两个子电子传输层1301和一个子电子阻挡层1302，子电子阻挡层1302夹设在两个子电子传输层1301之间。两个子电子传输层1301中离衬底110最远的那个子电子传输层与量子点传输层140接触的表面为包括多个凸起的第一凹凸表面。
例如，两个子电子传输层1301的材料是相同的，例如为ZnO、ZnMgO、ZnAlO和ZnMgAlO中的至少之一。子电子阻挡层1302与子电子传输层1301的材料不同。例如，子电子阻挡层1302的材料包括氧化铝(Al 2O 3)、氧化钽(TaOx)和氧化铪(HfO 2)中的至少之一。当然，子电子阻挡层1302也可以使用其他合适的材料，本公开的实施例对此不作限定。
需要注意的是，当N>1时，子电子阻挡层1302不止一个，各子电子阻挡层1302的材料可以相同或不同。例如，当具有两个子电子阻挡层1302时，其中一个子电子阻挡层1302的材料可以为氧化铝，另一个子电子阻挡层的材料可以为氧化钽。当N个子电子阻挡层为采用相同材料时，可以降低制备工艺的复杂度，并且便于控制和实现。
例如，在一些示例中，为改善电子传输层与量子点发光层的能级匹配及其迁移率，电子传输层130(或者子电子传输层1301)可以使用掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜。
例如，在一些示例中，上述三价金属离子为铝离子，并且掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，例如5％、10％或者15％等，铝离子的掺杂质量百分数为0.5％～10％，例如2％、5％或者7％等。
图2A和图2B分别是根据本公开至少一实施例的发光二极管器件的电流密度和电流效率在不同的电子传输层材料下随电压的变化的对比图。图2A示出当电子传输层的材料分别为ZnO薄膜、ZnMgO薄膜、ZnAlO薄膜、ZnMgAlO薄膜时，发光二极管器件的电流密度随电压的变化。图2B示出当电子传输层的材料分别为ZnO薄膜、ZnMgO薄膜、ZnAlO薄膜、ZnMgAlO薄膜时，发光二极管器件的电流效率随电压的变化。
在图2A和图2B中，示例一提供的发光二极管器件包括：依次层叠设置的银(Ag)电极(作为阴极)、电子传输层(ET)、量子点发光层(QD)、空穴传输层(HT)、空穴注入层(HI)和ITO电极(作为阳极)。ITO电极的厚度约为70纳米，ITO电极可采用溅射工艺制备，溅射可采用ITO靶材，氩气流量约为40sccm，功率约为100W，溅射时间约为20分钟；电子传输层采用没有掺杂任何元素的氧化锌薄膜(ZnO薄膜)，氧化锌薄膜厚度约为100纳米，使用溅射工艺制备ZnO薄膜，可以使用ZnO靶材进行溅射，氩气流量约为40sccm，功率约为100W，溅射时间约为25分钟；量子点发光层的材料为硒化镉(CdSe)，量子点发光层的厚度约为30纳米，量子点发光层采用旋涂工艺制备；空穴传输层包括第一子空穴传输层和第二子空穴传输层，第一子空穴传输层位于第二子空 穴传输层靠近量子点发光层的一侧，第一子空穴传输层的厚度约为10纳米，第二子空穴传输层的厚度约为30纳米；空穴注入层的厚度约为5纳米，空穴注入层的材料的HAT-CN(2,3,6,7,10,11-六氰基-1,4,5,8,9,12-六氮杂苯并菲)薄膜；银电极的厚度约为150纳米。上述银电极、空穴注入层和空穴传输层均可采用蒸镀工艺制备。
在图2A和图2B中，示例二提供的发光二极管器件与示例一相比，不同之处在于，电子传输层采用掺杂了镁元素的掺杂氧化锌薄膜(ZnMgO薄膜)，并且ZnMgO薄膜中的镁的质量分数约为2％，薄膜厚度约为100纳米，使用溅射工艺制备ZnMgO薄膜，可以使用ZnO:MgO靶材溅射或使用ZnO靶材与MgO靶材共溅射，氩气流量为40sccm，功率为100W，溅射时间为25分钟。
在图2A和图2B中，示例三提供的发光二极管器件与示例一相比，不同之处在于，电子传输层采用掺杂了铝元素的掺杂氧化锌薄膜(ZnAlO薄膜)，并且ZnAlO薄膜中的Al的质量分数约为2％，薄膜厚度约为100纳米，使用溅射工艺制备ZnAlO薄膜，可以使用ZnO:Al 2O 3的靶材溅射或者采用ZnO靶材与Al 2O 3靶材共溅射，氩气流量为40sccm，功率为100W，溅射时间为25分钟。
在图2A和图2B中，示例四提供的发光二极管器件与示例一相比，不同之处在于，电子传输层采用共同掺杂了镁元素和铝元素的掺杂氧化锌薄膜(ZnMgAlO薄膜)，并且ZnMgAlO薄膜中的Mg的质量分数约为2％，Al的质量分数约为2％，ZnMgAlO薄膜厚度约为100纳米，使用溅射工艺制备ZnMgAlO薄膜，可以使用ZnMgAl靶材溅射或者ZnMgO靶材与Al 2O 3靶材共溅射，氩气流量为40sccm，功率为100W，溅射时间为25分钟。
参考图2A和图2B，在同一电压下，与示例一提供的使用没有掺杂任何元素的ZnO薄膜作为电子传输层的发光二极管器件相比：通过采用掺杂了镁元素的ZnMgO薄膜作为电子传输层，示例二提供的发光二极管器件的电流密度降低，从而导电性降低，电流效率升高，从而发光效率升高；通过采用掺杂了铝元素的ZnAlO薄膜作为电子传输层，示例三提供的发光二极管器件的电流密度大幅度升高，从而导电性大幅度升高，电流效率大幅度降低，从而发光效率大幅度降低；通过采用共同掺杂了镁元素和铝元素ZnMgAlO薄膜作为电子传输层，示例四提供的发光二极管器件的电流密度降低，但比示例二提供的发光二极管器件的电流密度高，从而导电性适中，并且其电流效率比示例一至示例三提供的发光二极管器件都高，从而发光效率最高。
由此，使用掺杂了镁离子和铝离子的掺杂氧化锌薄膜不仅可以将电子传输层的能级调节至与量子点发光层匹配的水平，同时还能提供比较适中的导电性以及更好的发光效率。
需要说明的是，以上示例二至示例四中铝元素和镁元素的质量分数约为2％仅仅是为了参照实验设置的值，事实上，经发明人多次实验，当镁离子的掺杂质量百分数在0.5％～20％的范围内且铝离子的掺杂质量百分数在0.5％～10％的范围内时均可以获得以上描述的效果。
此外，以上示例二至示例四中的铝离子也可以使用其它三价金属离子(例如，铟(In)离子、镓(Ga)离子)代替，为简便起见，本公开实施例对此不一一赘述。
图3A是根据本公开另一实施例的发光二极管器件的截面结构示意图。如图3A所示，与图1A所示的结构的不同之处在于，在本实施例提供的发光二极管器件中，除了电子传输层130与量子点发光层140接触的表面为包括多个凸起的第一凹凸表面之外，第一电极层120远离衬底110的表面也为包括多个凸起的第二凹凸表面。
例如，在一些示例中，第二凹凸表面(即第一电极120与电子传输层130接触的表面)所包括的多个凸起使得第二凹凸表面的均方根表面粗糙度(RMS)的范围约为5纳米-10纳米。需要说明的是，此处的“约为5纳米-10纳米”是指均方根表面粗糙度的范围的下限值在5纳米的10％的误差范围之内，均方根表面粗糙度的范围的上限值在10纳米的10％的误差范围之内。
由此，通过使第一电极层120与电子传输层130接触的表面包括多个凸起可以增加第一电极层120与电子传输层130之间的接触面积，使得当采用旋涂工艺形成的旋涂氧化锌薄膜作为电子传输层130时，可以避免旋涂的氧化锌纳米颗粒堆积在平坦的第一电极层120上而导致接触面积小进而导致电子注入少，从而载流子不平衡等问题。
例如，在一些示例中，第二凹凸表面所包括多个凸起在垂直于衬底110的方向上的高度H2的范围为1纳米-10纳米，例如2纳米、5纳米或者7纳米等。需要注意的是，高度H2指的是这些凸起的波峰与波谷在垂直于衬底110的方向上的距离。
例如，在一些示例中，第一电极层120包括第一子电极层和设置在第一子电极层上的导电纳米颗粒(如图9B中的第一子电极层1201和其上的导电纳米颗粒)，该导电纳米颗粒即构成第二凹凸表面的多个凸起。
此外，与第一凹凸表面类似地，第二凹凸表面所包括的多个凸起的形状可以是多种多样的。第二凹凸表面所包括的多个凸起的分布情况可以是均匀分布或非均匀分布，当凸起是均匀分布时，相邻凸起的分布间距例如可以为5纳米-10纳米。为避免重复，此处不再赘述。
在一些示例中，第二凹凸表面(即第一电极层120与电子传输层130接触的表面)所包括的多个凸起与第一凹凸表面(即电子传输层130与量子点发光层140接触的表面)所包括的多个凸起具有相同的形状，并且在垂直于衬底110的方向上，第二凹凸表面所包括的多个凸起与第一凹凸表面所包括的多个凸起具有相同的高度。例如，在制备过程中首先将第一电极120与电子传输层130接触的表面制备成包括多个凸起的第二凹凸表面，随后在第二凹凸表面上等厚度形成电子传输层130，电子传输层130自然形成包括多个凸起的第一凹凸表面。此时，无论使用旋涂工艺还是溅射工艺都可以等厚度形成包括多个凸起的第一凹凸表面的电子传输层130。
此外，本公开至少一实施例提供的发光二极管器件还可以包括空穴传输层和空穴注入层(未示出)。此时，空穴传输层和空穴注入层依次层叠设置在量子点发光层140上，第二电极150层叠设置在空穴注入层上。空穴传输层和空穴注入层的材料与先前结合图 1A所描述的相同，为避免重复，此处不再赘述。
此外，与图1A类似地，图3A中的电子传输层130可以由图3B所示的电子传输层130’代替，电子传输层130’包括两个子电子传输层1301和一个子电子阻挡层1302，子电子阻挡层1302夹设在两个子电子传输层1301之间。两个子电子传输层1301中离衬底110最远的那个子电子传输层与量子点传输层140接触的表面为包括多个凸起的第一凹凸表面。子电子传输层1301和子电子阻挡层1302的材料与先前结合图1A描述的类似，为避免重复，此处不再赘述。
此外，与图1A类似地，如图3A所示的电子传输层130(或者子电子传输层1301)也可以使用掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜。上述三价金属离子可以为铝离子，并且掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，例如5％、10％或者15％等，铝离子的掺杂质量百分数为0.5％～10％，例如2％、5％或者7％等。为避免重复，此处不再赘述。
图4是根据本公开至少一实施例的显示面板的截面示意图。如图4所示，显示面板200包括：衬底基板210和阵列排布在衬底基板210上的多个子像素220，多个子像素220中的每个子像素包括上述的发光二极管器件100。
例如，显示面板200还包括像素限定层230，像素限定层230设置在电子传输层130远离衬底基板200的表面上，像素限定层230包括多个开口2301，像素限定层230至少部分覆盖电子传输层130的边缘，并且多个开口2301分别暴露电子传输层130的中间部分，量子点发光层140至少设置在多个开口中。
例如，显示面板200还包括像素电路层211，像素电路层211设置在衬底基板210与发光二极管器件100之间。每个子像素220还包括设置在像素电路层211中的像素驱动电路，以用于驱动发光二极管器件100的发光状态。
例如，如图4所示，在第一电极层120上形成电子传输层130之后，在电子传输层130远离第一电极层120的表面形成量子点发光层140之前，在电子传输层130远离第一电极层120的表面形成像素限定层220，从而可以更好地限定后续制备量子点发光层140的范围。并且，像素限定层220除了可以提供用于形成量子点发光层140的开口之外，还可对已经形成的电子传输层130的边缘部分的缺陷(例如毛刺)进行遮挡，从而使得后续形成的膜层的均匀性更好。像素限定层220在衬底基板210上的正投影与各发光元件210的电子传输层120在衬底基板110上的正投影的交叠部分的宽度W可为1微米-5微米的范围，例如宽度为2微米或者3微米等。
例如，衬底基板210可以为刚性基板或柔性基板，该刚性基板可以为玻璃基板、陶瓷基板、塑料基板等，该柔性基板可以为塑料基板(例如聚酰亚胺基板)、树脂基板等，本公开的实施例对此不做限定。
该显示面板具有前述QLED器件的全部特征和优点，此处不再详细描述。
本公开的实施例还提供了一种显示装置。显示装置包括如上的显示面板200。如本领域技术人员将理解，显示装置200还可以包括必要的封装元件和控制电路，本公开的实 施例对此不做限定。该显示装置可以实现为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
该显示装置具有前述QLED器件的全部特征和优点，此处不再详细描述。
图5是根据本公开至少一实施例的发光二极管器件的制备方法的流程图。参考图5，该制备方法包括步骤S110-在步骤S150。
步骤S110：提供衬底。
例如，该衬底可以是玻璃衬底、石英衬底或者柔性PET(聚对苯二甲酸乙二醇酯)衬底等，本公开的实施例对衬底的具体形式不做限定。
步骤S120：在衬底上形成第一电极层。
例如，该第一电极层可为透明电极，其材料例如为ITO(氧化铟锡)、FTO(氟掺杂的氧化锡)或者导电聚合物等，或者，第一电极层也可为不透明的电极，例如金属电极，例如铝或银电极等。
步骤S130：在第一电极层远离衬底的表面上形成电子传输层，其中，形成该电子传输层包括：将电子传输层远离第一电极层的表面形成为包括多个凸起的第一凹凸表面。
步骤S140：在电子传输层远离第一电极层的表面上形成量子点发光层。
例如，该量子点发光层可以采用硅量子点、锗量子点、硫化镉量子点、硒化镉量子点、碲化镉量子点、硒化锌量子点、硫化铅量子点、硒化铅量子点、磷化铟量子点和砷化铟量子点等量子点材料等。
步骤S150：在量子点发光层远离电子传输层的表面上形成第二电极层。
例如，该第二电极层可以为金属、合金、或者金属、合金与有良好导电功能的金属氧化物的组合。
采用该方法制备的发光二极管器件可以具有如图1A所示的结构。
由此，通过将电子传输层与量子点发光层接触的表面形成为包括多个凸起的第一凹凸表面，电子传输层与量子点发光层的接触面积较大，使得当电子传输层采用溅射工艺形成的溅射氧化锌薄膜时，可以避免由于纳米颗粒状的量子点堆积在平坦的溅射氧化锌薄膜表面而导致的电子注入少、载流子不平衡等问题。
例如，可以通过多种方式来实现步骤S130中的将电子传输层远离第一电极层的表面形成为包括多个凸起的第一凹凸表面。例如，可以采用等离子刻蚀或者喷砂处理方式对电子传输层远离第一电极层的表面进行粗糙化处理，例如，使得电子传输层远离第一电极层的表面的均方根表面粗糙度的范围为5纳米-10纳米。等离子刻蚀可以采用干法刻蚀，如反应等离子刻蚀(Reactive Ion Etching，RIE)和感应耦合等离子(Inductively Coupled Plasma，ICP)刻蚀，采用氩气或氧气等离子体作为刻蚀的反应气体。喷砂处理可以采用陶瓷砂、石英砂等材料执行。
例如，图6是根据本公开另一实施例的发光二极管器件的制备方法的流程图。与图5不同之处在于，该制备方法中，首先将第一电极层与电子传输层接触的表面制备成包括多个凸起的第二凹凸表面，随后在第二凹凸表面上形成电子传输层，从而电子传输层形 成包括多个凸起的第一凹凸表面。
具体地，如图6所示，该制备方法中的步骤S210、S240、S250与图5中的步骤S110、S140、S150相同，此外，在步骤S220中，在衬底上形成包括依次层叠的第一子电极层和第二子电极层的第一电极层，并将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面；在步骤S230中，采用溅射工艺或旋涂工艺在第二凹凸表面上进行溅射或旋涂而形成电子传输层，以使电子传输层远离第一电极层的表面形成为包括多个凸起的第一凹凸表面。可以等厚度或非等厚度进行溅射或旋涂，在等厚度溅射或旋涂的情况下，随后形成的第一凹凸表面所包括的多个凸起将具有与第二凹凸表面所包括的多个凸起相同的形状和尺寸(例如，相同的形状和高度)。采用该方法制备的发光二极管器件可以具有如图3A所示的结构，并且其中第一电极层120将包括第一子电极层1201和第二子电极层1202(如图7B所示)。
可以通过多种方式来实现上述步骤S220中的将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面，下面结合附图7A-9B进行说明。
图7A是将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面的一种方法的流程图。如图7A所示，可以通过步骤S2201-S2204来实现上述步骤S220。例如，图7B示出了与步骤S2201-S2204一一对应的发光二极管器件在制备过程中的结构。
步骤S2201：在衬底上形成第一子电极层。
例如，如图7B所示，在衬底上形成第一子电极层1201。
步骤S2202：在第一子电极层远离衬底的表面形成纳米颗粒。
例如，如图7B所示，在第一子电极层1201远离衬底的表面形成纳米颗粒。例如，纳米颗粒可以采用聚苯乙烯或硅，例如可以使用涂布工艺将聚苯乙烯(Polystyrene)球(即PS球)或硅球涂布在第一电极层110上。
步骤S2203：在第一子电极层远离衬底的表面以小于纳米颗粒的厚度形成第二子电极层。
例如，如图7B所示，在第一子电极层1201远离衬底的表面以小于纳米颗粒的厚度形成第二子电极层1202。
例如，第二子电极层的形成厚度为5纳米-10纳米，例如7纳米或者8纳米等。
步骤S2204：在第二子电极层中刻蚀去除纳米颗粒，以形成包括多个凸起的所述第二凹凸表面。
例如，如图7B所示，在第二子电极层1202中刻蚀去除纳米颗粒。例如，采用可以溶解纳米颗粒但不溶解第二子电极层1202的溶液来去除纳米颗粒(例如，刻蚀去除聚苯乙烯可以使用四氢呋喃、二甲基甲酰胺或丙酮，刻蚀去除硅球可以使用氢氟酸、氢氧化钠、硼氢化物、甲苯、二氯甲烷等)。
由此，第二子电极层1202与量子传输层130接触的表面的局部区域产生表面等离激元效应，引起局域电磁场增强，缩短量子点发光层中激子的辐射寿命，进而避免俄歇复合。
需要说明的是，第二子电极层1202可以采用与第一子电极层1201相同或不同的材料。第二子电极层1202可以采用包含两种金属的合金材料(例如Au-Ag合金)来制备，以获得更强的共振，导致更短的激子辐射寿命。
需要说明的是，图7A所示的方法中的应用于第一子电极层1201的步骤也可以适应性地应用于图1A所示的结构中的电子传输层130与量子点发光层140接触的表面。例如，通过在电子传输层130远离衬底的表面形成纳米颗粒、在电子传输层130远离衬底的表面以小于纳米颗粒的厚度形成金属层、以及在电子传输层130中刻蚀去除纳米颗粒来实现图5所示的方法中的步骤S130。
例如，图8A是图6中的将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面的另一种方法的流程图。如图8A所示，通过步骤S2201’-S2202’来实现上述步骤S220。例如，图8B示出了与步骤S2201’-S2202’一一对应的发光二极管器件在制备过程中的结构。
步骤S2201’：在衬底上形成第一子电极层。
如图8B所示，在衬底上形成第一子电极层1201。
步骤S2202’：在第一子电极层远离衬底的表面形成导电薄膜，该导电薄膜的厚度为1纳米-5纳米。
例如，可以采用蒸镀工艺在第一子电极层远离衬底的表面上形成导电薄膜，该导电薄膜的厚度为1纳米-5纳米以使导电薄膜暴露第一子电极层的部分，从而形成包括多个凸起的第二凹凸表面。
例如，导电薄膜的材料可以是金(Au)或银(Ag)等。可以使用蒸镀工艺形成极薄(例如，1纳米-5纳米)的该导电薄膜，使该导电薄膜不完全覆盖第一子电极层远离衬底的表面从而暴露第一子电极层的部分。如图8B所示的在第一子电极层上的岛状结构即为上述的多个凸起。
需要说明的是，图8A所示的方法中的应用于第一子电极层1201的步骤也可以适应性地应用于图1A所示的结构中的电子传输层130与量子点发光层140接触的表面。例如，通过使用蒸镀工艺在电子传输层130与量子点发光层140接触的表面上形成厚度为1纳米-5纳米且暴露电子传输层130的部分的导电薄膜来实现图5所示的方法中的步骤S130。
例如，图9A是图6中的将第二子电极层远离衬底的表面形成为包括多个凸起的第二凹凸表面的另一种方法的流程图。如图9A所示，通过步骤S2201”-S2202”来实现上述步骤S220。例如，图9B示出了与步骤S2201”-S2202”一一对应的发光二极管器件在制备过程中的结构。
步骤S2201”：在衬底上形成第一子电极层。
如图9B所示，在衬底上形成第一子电极层1201。
步骤S2202”：在第一子电极层远离衬底的表面形成导电纳米颗粒以形成包括多个凸起的第二凹凸表面。
如图9B所示，在第一子电极层1201远离衬底的表面形成导电纳米颗粒。例如，导 电纳米颗粒的形成厚度为1纳米-10纳米，也即，导电纳米颗粒的直径可以为1纳米-10纳米。
例如，导电纳米颗粒的材料可以是金(Au)或银(Ag)等。例如，可以使用涂布工艺将导电纳米颗粒涂布在第一电极层110上。
例如，以上结合图7A-图9B所描述的方式都可以将第二凹凸表面形成为均方根表面粗糙度的范围为5纳米-10纳米。也都可以将第二凹凸表面的多个凸起形成为高度范围为1纳米-10纳米。
需要说明的是，图9A所示的方法中的应用于第一子电极层1201的步骤也可以适应性地应用于图1A所示的结构中的电子传输层130与量子点发光层140接触的表面。例如，通过在电子传输层130远离衬底的表面上形成导电纳米颗粒来实现图5所示的方法中的步骤S130。
另外，参考图6，在步骤S230中，可以采用溅射工艺或旋涂工艺在第二凹凸表面上进行溅射或旋涂而形成电子传输层。若在此步骤中选择使用溅射工艺，则可以使用溅射工艺形成掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为电子传输层，并且该三价金属离子可以为铝离子。例如，将镁离子的掺杂质量百分数控制为0.5％～20％，例如5％、10％或者15％等、铝离子的掺杂质量百分数控制为0.5％～10％，例如2％、5％或者7％等，并且可以采用ZnMgAlO溅射、或者ZnMgO与Al2O3共溅射、或者ZnAlO与MgO共溅射中的一种形成该掺杂氧化锌薄膜。
例如，图10是根据本公开一实施例的另一种发光二极管器件的制备方法的流程图。如图10所示，该制备方法包括步骤S310-S350。
步骤S310：提供衬底。
例如，该衬底可以是玻璃衬底、石英衬底、或者柔性PET(聚对苯二甲酸乙二醇酯)衬底。
步骤S320：在衬底上形成第一电极层。
例如，该第一电极层可为透明电极，透明电极的材料例如为ITO(氧化铟锡)、FTO(氟掺杂的氧化锡)或者导电聚合物，或者，第一电极层也可为不透明的电极，例如金属电极，例如铝电极或银电极等。
步骤S330：在第一电极远离衬底的表面形成电子传输层，其中，形成该电子传输层包括：使用溅射工艺形成掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为该电子传输层。
步骤S340：在电子传输层远离第一电极层的表面形成量子点发光层。
步骤S350：在量子点发光层远离电子传输层的表面形成第二电极层。
由此，通过使用掺杂了镁离子和三价金属离子(例如，铝(Al)离子、铟(In)离子、镓(Ga)离子等)的掺杂氧化锌薄膜作为电子传输层，可以使电子传输层具有与量子点发光层更匹配的能级、更合适的导电性以及更好的稳定性。
例如，在一些示例中，步骤S330中采用的三价金属离子为铝离子，并且掺杂氧化锌 薄膜中的镁离子的掺杂质量百分数为0.5％～20％，铝离子的掺杂质量百分数为0.5％～10％，并且可以采用ZnMgAlO溅射、或者ZnMgO与Al2O3共溅射、或者ZnAlO与MgO共溅射中的一种形成所述掺杂氧化锌薄膜。
例如，在一些示例中，发光二极管器件的制备方法还包括：采用等离子刻蚀或者喷砂处理方式对电子传输层远离第一电极层的表面进行粗糙化处理，以使电子传输层远离第一电极层的表面的均方根表面粗糙度的范围为5纳米-10纳米。例如，等离子刻蚀可以采用干法刻蚀，如反应等离子刻蚀(Reactive Ion Etching，RIE)和感应耦合等离子(Inductively Coupled Plasma，ICP)刻蚀，采用氩气或氧气等离子体作为刻蚀的反应气体。喷砂处理可以采用陶瓷砂、石英砂等材料执行。
由此，在上述实施例中，电子传输层与量子点发光层120接触的表面的粗糙度较高，电子传输层与量子点发光层的接触面积较大，使得可以避免由于纳米颗粒状的量子点堆积在平坦的溅射氧化锌薄膜表面而导致的电子注入少、载流子不平衡等问题，同时还可以避免由于纳米颗粒状的量子点堆积在平坦的溅射氧化锌薄膜表面而导致电子传输层与空穴传输层直接接触而造成的漏电。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (20)

  1. 一种发光二极管器件，包括：
    衬底；
    第一电极层，层叠设置在所述衬底上；
    电子传输层，层叠设置在所述第一电极层远离所述衬底的表面上；
    量子点发光层，层叠设置在所述电子传输层远离所述第一电极层的表面上；以及
    第二电极层，层叠设置在所述量子点发光层远离所述电子传输层的表面上；
    其中，所述电子传输层远离所述第一电极层的表面为包括多个凸起的第一凹凸表面。
  2. 如权利要求1所述的发光二极管器件，其中，所述第一凹凸表面的均方根表面粗糙度的范围为5纳米-10纳米。
  3. 如权利要求2所述的发光二极管器件，其中，所述第一凹凸表面所包括的多个凸起在垂直于所述衬底的方向上的高度的范围为1纳米-10纳米。
  4. 如权利要求1-3任一所述的发光二极管器件，其中，所述第一电极层远离所述衬底的表面为包括多个凸起的第二凹凸表面。
  5. 如权利要求4所述的发光二极管器件，其中，所述第一电极层包括第一子电极层和设置在所述第一子电极层上的导电纳米颗粒，所述导电纳米颗粒构成所述第二凹凸表面的所述多个凸起。
  6. 如权利要求4所述的发光二极管器件，其中，所述第二凹凸表面所包括的多个凸起与所述第一凹凸表面所包括的多个凸起具有相同的形状，并且在垂于在所述衬底的方向上，所述第二凹凸表面所包括的多个凸起与所述第一凹凸表面所包括的多个凸起具有相同的高度。
  7. 如权利要求1-6所述的发光二极管器件，其中，所述电子传输层包括掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜。
  8. 如权利要求7所述的发光二极管器件，其中，所述三价金属离子为铝离子，并且所述掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，铝离子的掺杂质量百分数为0.5％～10％。
  9. 如权利要求1-8所述的发光二极管器件，其中，所述电子传输层包括N+1个子电子传输层和N个子电子阻挡层，
    所述N个子电子阻挡层分别夹设在所述N+1个子电子传输层之间，N为大于等于2的正整数，所述N+1个子电子传输层中离所述衬底最远的子电子传输层的远离所述衬底的表面为所述第一凹凸表面，并且所述N+1个子电子传输层的材料相同，所述N个子电子阻挡层与所述N+1个子电子传输层的材料不同。
  10. 一种显示面板，包括：
    衬底基板；和
    阵列排布在所述衬底基板上的多个子像素，其中，所述多个子像素中的每个包括如 权利要求1-9中任一项所述的发光二极管器件，
    所述显示面板还包括像素限定层，
    其中，所述像素限定层设置在所述电子传输层远离所述衬底基板的表面上，所述像素限定层包括多个开口，所述像素限定层至少部分覆盖电子传输层的边缘，并且所述多个开口分别暴露电子传输层的中间部分，所述量子点发光层至少设置在所述多个开口中。
  11. 一种发光二极管器件的制备方法，包括：
    提供衬底；
    在所述衬底上形成第一电极层；
    在所述第一电极层远离所述衬底的表面上形成电子传输层；
    在所述电子传输层远离所述第一电极层的表面上形成量子点发光层；以及
    在所述量子点发光层远离所述电子传输层的表面上形成第二电极层，
    其中，形成所述电子传输层包括：将所述电子传输层远离所述第一电极层的表面形成为包括多个凸起的第一凹凸表面。
  12. 如权利要求11所述的制备方法，其中，将所述电子传输层远离所述第一电极层的表面形成为包括多个凸起的第一凹凸表面包括：
    在所述衬底上形成包括依次层叠的第一子电极层和第二子电极层的第一电极层，并将所述第二子电极层远离所述衬底的表面形成为包括多个凸起的第二凹凸表面；
    采用溅射工艺或旋涂工艺在所述第二凹凸表面上进行溅射或旋涂而形成所述电子传输层，以使所述电子传输层远离所述第一电极层的表面形成为包括多个凸起的所述第一凹凸表面。
  13. 如权利要求12所述的制备方法，其中，将所述第二子电极层远离所述衬底的表面形成为包括多个凸起的第二凹凸表面包括：
    在所述第一子电极层远离所述衬底的表面形成纳米颗粒；
    在所述第一子电极层远离所述衬底的表面以小于纳米颗粒的厚度形成所述第二子电极层；以及
    在所述第二子电极层中刻蚀去除所述纳米颗粒，以形成包括多个凸起的所述第二凹凸表面，
    其中，所述第二子电极层的厚度为5纳米-10纳米。
  14. 如权利要求12所述的制备方法，其中，将所述第二子电极层远离所述衬底的表面形成为包括多个凸起的第二凹凸表面包括：
    采用蒸镀工艺在所述第一子电极层远离所述衬底的表面上形成导电薄膜，所述导电薄膜的厚度为1-5纳米以使所述导电薄膜暴露所述第一子电极层的部分，从而形成包括多个凸起的所述第二凹凸表面。
  15. 如权利要求12所述的制备方法，其中，将所述第二子电极层远离所述衬底的表面形成为包括多个凸起的第二凹凸表面包括：
    在所述第一子电极层远离所述衬底的表面形成导电纳米颗粒以形成包括多个凸起的 所述第二凹凸表面，所述导电纳米颗粒的厚度为1纳米-10纳米。
  16. 如权利要求12所述的制备方法，其中，采用溅射工艺或旋涂工艺在所述第二凹凸表面上形成所述电子传输层包括：
    采用溅射工艺在所述第二凹凸表面上形成掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为所述电子传输层。
  17. 如权利要求16所述的制备方法，其中，所述三价金属离子为铝离子，并且所述掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，铝离子的掺杂质量百分数为0.5％～10％，并且
    采用ZnMgAlO溅射、或者ZnMgO与Al 2O 3共溅射、或者ZnAlO与MgO共溅射中的一种形成所述掺杂氧化锌薄膜。
  18. 一种发光二极管器件的制备方法，包括：
    提供衬底；
    在所述衬底上形成第一电极；
    在所述第一电极远离所述衬底的表面形成电子传输层；
    在所述电子传输层远离所述第一电极层的表面形成量子点发光层；以及
    在所述量子点发光层远离所述电子传输层的表面形成第二电极层；
    其中，形成所述电子传输层包括：使用溅射工艺形成掺杂了镁离子和三价金属离子的掺杂氧化锌薄膜作为所述电子传输层。
  19. 如权利要求18所述的制备方法，其中，所述三价金属离子为铝离子，其中，所述掺杂氧化锌薄膜中的镁离子的掺杂质量百分数为0.5％～20％，铝离子的掺杂质量百分数为0.5％～10％，并且
    采用ZnMgAlO溅射、或者ZnMgO与Al 2O 3共溅射、或者ZnAlO与MgO共溅射中的一种形成所述掺杂氧化锌薄膜。
  20. 如权利要求19所述的制备方法，其中，采用等离子刻蚀或者喷砂处理方式对所述电子传输层远离所述第一电极层的表面进行粗糙化处理，以使所述电子传输层远离所述第一电极层的表面的均方根表面粗糙度的范围为5纳米-10纳米。
PCT/CN2021/095172 2020-06-30 2021-05-21 发光二极管器件及其制备方法、显示面板 WO2022001470A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/802,564 US20230078114A1 (en) 2020-06-30 2021-05-21 Light-emitting diode device and manufacturing method thereof, and display panel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010619865.1A CN113871542B (zh) 2020-06-30 2020-06-30 发光二极管器件及其制备方法、显示面板
CN202010619865.1 2020-06-30

Publications (1)

Publication Number Publication Date
WO2022001470A1 true WO2022001470A1 (zh) 2022-01-06

Family

ID=78981757

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/095172 WO2022001470A1 (zh) 2020-06-30 2021-05-21 发光二极管器件及其制备方法、显示面板

Country Status (3)

Country Link
US (1) US20230078114A1 (zh)
CN (1) CN113871542B (zh)
WO (1) WO2022001470A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2024026658A1 (zh) * 2022-08-02 2024-02-08 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101237011A (zh) * 2007-01-31 2008-08-06 李崇华 具有一层状微光学结构的微光学基板及发光二极管
US20170186985A1 (en) * 2015-12-28 2017-06-29 Samsung Display Co., Ltd. Organic light emitting diode and organic light emitting diode display device including the same
CN107293647A (zh) * 2017-06-13 2017-10-24 苏州大学 一种量子点发光二极管及其制备方法
CN107611272A (zh) * 2017-08-24 2018-01-19 南昌航空大学 一种新型量子点发光二极管及其制备方法
CN109873018A (zh) * 2019-03-01 2019-06-11 惠科股份有限公司 显示面板及其制备方法、显示装置
CN111326664A (zh) * 2018-12-14 2020-06-23 浙江大学 量子点发光二极管器件及用于制作其的墨水

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105679958B (zh) * 2016-04-20 2018-03-13 京东方科技集团股份有限公司 电致发光器件及其制作方法、显示装置
CN106410055A (zh) * 2016-11-07 2017-02-15 Tcl集团股份有限公司 一种量子点发光二极管及制备方法
CN106654027A (zh) * 2016-11-22 2017-05-10 纳晶科技股份有限公司 量子点电致发光器件、具有其的显示装置与照明装置
CN108232023A (zh) * 2017-06-13 2018-06-29 苏州大学 一种倒置结构量子点发光二极管及其制备方法
CN107681059B (zh) * 2017-08-21 2019-07-16 浙江大学 单光子源器件、其制备方法及其应用
KR20200025618A (ko) * 2018-08-31 2020-03-10 엘지디스플레이 주식회사 발광 표시 장치

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101237011A (zh) * 2007-01-31 2008-08-06 李崇华 具有一层状微光学结构的微光学基板及发光二极管
US20170186985A1 (en) * 2015-12-28 2017-06-29 Samsung Display Co., Ltd. Organic light emitting diode and organic light emitting diode display device including the same
CN107293647A (zh) * 2017-06-13 2017-10-24 苏州大学 一种量子点发光二极管及其制备方法
CN107611272A (zh) * 2017-08-24 2018-01-19 南昌航空大学 一种新型量子点发光二极管及其制备方法
CN111326664A (zh) * 2018-12-14 2020-06-23 浙江大学 量子点发光二极管器件及用于制作其的墨水
CN109873018A (zh) * 2019-03-01 2019-06-11 惠科股份有限公司 显示面板及其制备方法、显示装置

Also Published As

Publication number Publication date
US20230078114A1 (en) 2023-03-16
CN113871542A (zh) 2021-12-31
CN113871542B (zh) 2023-10-24

Similar Documents

Publication Publication Date Title
TWI292491B (en) Method for manufacturing microlens and method for manufacturing organic electroluminescence element
TW201301600A (zh) 有機電致發光元件
KR101654360B1 (ko) 유기 발광소자용 기판 및 그 제조방법
JP7504033B2 (ja) 量子ドット発光デバイス及びその製造方法
CN110265564B (zh) 量子点发光二极管及其制备方法和显示屏
US11778855B2 (en) Light-emitting diode structure, fabrication method therefor, and display panel
WO2021082146A1 (zh) 显示面板及其制造方法
WO2017088807A1 (zh) 有机电致发光器件及其制作方法、显示装置
Wang et al. High-efficiency and high-resolution patterned quantum dot light emitting diodes by electrohydrodynamic printing
KR101973207B1 (ko) 금속 산화물이 함유된 양극 및 상기 양극을 포함하는 유기발광소자
CN110364559B (zh) Qled显示屏及制备方法
CN111653678B (zh) 量子点发光二极管及其制作方法、显示面板、显示装置
Jiao et al. 61‐2: Weakening Micro‐Cavity Effects in White Top‐Emitting WOLEDs with Semitransparent Metal Top Electrode
WO2022001470A1 (zh) 发光二极管器件及其制备方法、显示面板
CN110048024B (zh) 显示基板及其制造方法、显示装置
KR20120133961A (ko) 유기발광다이오드 및 그 제조방법
CN114026703B (zh) 量子点发光结构及其制作方法、阵列基板和显示装置
WO2019196629A1 (zh) Oled器件及其制作方法、显示装置
CN108539036B (zh) 一种电极结构、qled及制备方法
CN108735904B (zh) 一种可提高出光效率的qled及制备方法
KR20130129665A (ko) 광추출 효율이 향상된 나노 캐버티 유기 발광 소자 및 그의 제조방법
US20130149803A1 (en) Method of fabricating organic light emitting diode
CN111244298B (zh) 一种发光器件及显示器
KR20110094032A (ko) 유기 복사 방출 소자 제조 방법 및 유기 복사 방출 소자
WO2022252052A1 (zh) 量子点发光二极管及其制备方法、显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21831622

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21831622

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205 DATED 31/08/2023)

122 Ep: pct application non-entry in european phase

Ref document number: 21831622

Country of ref document: EP

Kind code of ref document: A1