WO2021244556A1 - 一种功放发射机 - Google Patents

一种功放发射机 Download PDF

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Publication number
WO2021244556A1
WO2021244556A1 PCT/CN2021/097791 CN2021097791W WO2021244556A1 WO 2021244556 A1 WO2021244556 A1 WO 2021244556A1 CN 2021097791 W CN2021097791 W CN 2021097791W WO 2021244556 A1 WO2021244556 A1 WO 2021244556A1
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Prior art keywords
signal
separation
outphasing
baseband signal
doherty
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PCT/CN2021/097791
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English (en)
French (fr)
Inventor
彭瑞敏
丁冲
张晓毅
王晖
秦天银
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中兴通讯股份有限公司
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Publication of WO2021244556A1 publication Critical patent/WO2021244556A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/005—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/005—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges
    • H04B1/0067—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with one or more circuit blocks in common for different bands
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0483—Transmitters with multiple parallel paths
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers

Definitions

  • This application relates to the field of communication technology, and in particular to a power amplifier transmitter.
  • the requirements for the efficiency indicators of the radio frequency power amplifier (PA) in the communication base station transmitter architecture are gradually increasing.
  • the support of multi-carrier mode has been widely used in communication networks, so the power amplifier is used as a communication base station.
  • the most important energy-consuming equipment in China needs to support signals in two or more frequency bands at the same time.
  • an embodiment of the present application provides a power amplifier transmitter, including: a first input terminal configured to input a first baseband signal; a second input terminal configured to input a second baseband signal; A baseband signal; an Outphasing signal separation circuit, which is configured to connect to the first input terminal to perform signal separation processing on the first baseband signal, and output a first Outphasing separation signal and a second Outphasing separation signal that are out of phase;
  • the Doherty signal separation circuit is configured to be connected to the second input terminal to perform signal separation processing on the second baseband signal, and output a first Doherty separation signal and a second Doherty separation signal based on Doherty time domain adjustment;
  • the first adder is set to add the first Outphasing separation signal and the first Doherty separation signal; the second adder is set to add the second Outphasing separation signal to the first Doherty separation signal; Adding two Doherty separated signals; and a power amplifier circuit,
  • FIG. 1 is a circuit diagram of a power amplifier transmitter with dual-frequency concurrent input provided in Embodiment 1 of the present application;
  • FIG. 2 is a circuit diagram of a power amplifier circuit provided by Embodiment 1 of the present application.
  • Fig. 3 is a circuit diagram of a power amplifier transmitter with multi-frequency concurrent input provided in the second embodiment of the present application;
  • FIG. 4 is a circuit diagram of the power amplifier circuit provided in the second embodiment of the present application.
  • module means, “component” or “unit” used to indicate elements is only for the description of the present application, and has no special meaning in itself. Therefore, “module”, “part” or “unit” can be used in a mixed manner.
  • this embodiment provides a power amplifier transmitter, including
  • the first input terminal is set to input the first baseband signal
  • the second input terminal is set to input a second baseband signal
  • the outphasing signal separation circuit 100 is configured to be connected to the first input terminal to perform signal separation processing on the first baseband signal, and output the first Outphasing separation signal and the second Outphasing separation signal that are out of phase;
  • the Doherty signal separation circuit 200 is configured to be connected to the second input terminal to perform signal separation processing on the second baseband signal, and output the first Doherty separation signal and the second Doherty separation signal based on Doherty time domain adjustment;
  • the first adder 300 is configured to add the first Outphasing separation signal and the first Doherty separation signal
  • the second adder 400 is configured to add the second Outphasing separation signal and the second Doherty separation signal
  • the power amplifying circuit 500 is set to support the Outphasing working mode on the frequency band of the first baseband signal and the Doherty working mode on the frequency band of the second baseband signal.
  • the power amplifying circuit 500 is connected to the first adder 300 and the second adder 400 The output terminal of the first adder 300 and the second adder 400 for power amplification.
  • the first baseband signal is Band1 and the second baseband signal is Band2 as an example.
  • the frequency band of the first baseband signal Band1 and the frequency band of the second baseband signal Band2 are different from each other. Therefore, the power amplifier of this embodiment transmits
  • the machine is a dual-frequency dual-input amplifier circuit, and can support Outphasing working mode in Band1 frequency band, and Doherty working mode in Band2 frequency band. Therefore, the first baseband signal Band1 and the second baseband signal Band2 are respectively used in the power amplifier circuit 500. Outphasing work mode and Doherty work mode are amplified and then combined for output.
  • a matching Outphasing signal separation circuit 100 and a Doherty signal separation circuit 200 are provided for the power amplifier circuit 500, wherein the Outphasing signal separation circuit 100 stores out-of-phase information corresponding to Band1, and the first baseband signal Band1 is in the Outphasing signal separation circuit
  • the first Outphasing separation signal and the second Outphasing separation signal that are out of phase are output after phase angle transformation in 100.
  • the Doherty signal separation circuit 200 is also divided into two outputs, one is directly output as the first Doherty separation signal, and the other is passed through Based on Doherty time domain adjustment, the second Doherty separation signal is output, the first Outphasing separation signal and the first Doherty separation signal are added by the first adder 300, and the second Outphasing separation signal is added by the second adder 400 Add to the second Doherty separation signal to obtain two inputs of the power amplifier circuit 500 respectively. Since the two inputs of the power amplifier circuit 500 work in different working modes, there is no need to meet the same impedance trend at different frequencies. Instead, there are two different power amplifier working modes corresponding to the impedance trend optional, which simplifies the circuit structure , At the same time, it reduces the difficulty of circuit design and the complexity of circuit debugging.
  • the first baseband signal Band1 and the second baseband signal Band2 of the dual-frequency concurrent input are frequency-divided on the digital side.
  • the Outphasing working mode and Doherty working mode supported by the power amplifier circuit 500 will be The input frequency is divided into two frequency bands, and the high efficiency characteristics of Outphasing and dual-input Doherty are used to improve the performance of the traditional single-input Doherty power amplifier.
  • the power amplifier circuit 500 includes a third adder 510, a first amplifier PA1, and a second amplifier PA2.
  • the input terminal of the first amplifier PA1 is connected to the output terminal of the first adder 300
  • the input end of the second amplifier PA2 is connected to the output end of the second adder 400
  • the output ends of the first amplifier PA1 and the second amplifier PA2 are connected to the input end of the third adder 510.
  • the power amplifier circuit 500 is a dual-input dual-band power amplifier, built-in single-input single-output first amplifier PA1 and second amplifier PA2, and through the third adder 510 to output the first amplifier PA1 and the second amplifier PA2 two channels Add together to achieve power amplification for dual-frequency concurrent input signals.
  • the power amplifier transmitter also includes:
  • the first digital predistortion unit DPD1 is configured to be connected to the first input terminal to perform digital predistortion processing on the first baseband signal Band1 and then input it to the Outphasing signal separation circuit 100;
  • the second digital predistortion unit DPD2 is configured to be connected to the second input terminal to perform digital predistortion processing on the second baseband signal Band2 and then input it to the Doherty signal separation circuit 200;
  • the first digital-to-analog conversion unit DAC1 the output terminal of the first adder 300 is connected to the power amplifying circuit 500 through the first digital-to-analog conversion unit DAC1;
  • the second digital-to-analog conversion unit DAC2, and the output terminal of the second adder 400 is connected to the power amplifier circuit 500 through the second digital-to-analog conversion unit DAC2.
  • the baseband signal is digitally processed based on the digital predistortion technology, and digital-analog signal conversion is performed at the output end to adapt to the working mode of the power amplifier circuit 500, thereby improving the linearity of the entire system architecture and improving the efficiency of the power amplifier circuit 500.
  • the first digital predistortion unit DPD1 performs digital predistortion processing on the first baseband signal Band1 and introduces the second baseband signal Band2 as input. Based on the digital predistortion processing of the second baseband signal Band2, the second digital predistortion unit DPD2 introduces the first baseband signal Band1 as input to reduce the linear influence of the first baseband signal Band1 on the second baseband signal Band2.
  • the output of the first digital predistortion unit DPD1 is the signal predistorted by the first baseband signal Band1
  • the output of the second digital predistortion unit DPD2 is the second baseband signal Band2 predistortion.
  • the processed signal is a single output.
  • the Outphasing signal separation circuit 100 includes:
  • the first modulo unit 130 is configured to be connected to the first input terminal and perform modulo processing on the first baseband signal Band1;
  • the second modulo unit 140 is configured to be connected to the second input terminal and perform modulo processing on the second baseband signal Band2;
  • the first look-up table unit stores first out-of-phase information.
  • the first look-up table unit is configured to connect the first modulus unit 130 and the second modulus unit 140, and according to the first out-of-phase information and the first baseband signal Band1
  • the modulus value of and the modulus value of the second baseband signal Band2 output the first Outphasing phase angle;
  • the second look-up table unit stores second out-of-phase information.
  • the second look-up table unit is configured to connect the first modulus unit 130 and the second modulus unit 140, and according to the second out-of-phase information and the first baseband signal Band1
  • the modulus value of and the modulus value of the second baseband signal Band2 output the second Outphasing phase angle;
  • the first multiplier 110 is configured to connect the first input terminal and the output terminal of the first look-up table unit, and multiply the first baseband signal Band1 with the phase information represented by the first Outphasing phase angle, and then output the first outphasing separation. Signal;
  • the second multiplier 120 is configured to connect the first input terminal and the output terminal of the second look-up table unit, multiply the first baseband signal Band1 and the phase information represented by the second Outphasing phase angle, and then output the second Outphasing separation Signal.
  • the first baseband signal Band1 and the second baseband signal Band2 are modulated by the first modulus unit 130 and the second modulus unit 140, respectively, to obtain the modulus values of the two baseband signals.
  • the meaning of the modulus value is to quantize the two baseband signals.
  • the effect of concurrent baseband signals on the efficiency of the power amplifier circuit 500; since the Doherty mode of Band2 will affect the outphasing angle of Band1, the modulus values of the two baseband signals are input into the first look-up table. Unit and the second look-up table unit, the output of the first look-up table unit and the second look-up table unit is the Outphasing phase angle corresponding to each power amplitude of the baseband signal. This angle represents the high efficiency state of the power amplifier circuit 500.
  • the out-of-phase information contained in the table can adjust the operation mode of the power amplifier corresponding to the first baseband signal Band1 and the second baseband signal Band2, thereby improving the efficiency of the power amplifier; it is understandable that it is input into two look-up table units respectively
  • the modulus in is two, so the look-up tables stored in the first look-up table unit and the second look-up table unit are two-dimensional, that is, 2D-LUT.
  • the Outphasing signal separation circuit 100 further includes a first digital up-conversion unit DUC1 and a second digital up-conversion unit DUC2, and the first multiplier 110, the first digital up-conversion unit DUC1, and the first adder 300 are sequentially connected , The second multiplier 120, the second digital up-conversion unit DUC2 and the second adder 400 are connected in sequence.
  • Using digital up-conversion technology to modulate the first Outphasing separated signal and the second Outphasing separated signal to medium and high frequency which can reduce the design difficulty, and can reduce the data volume and transmission speed of the baseband data, which is convenient for subsequent processing.
  • the Doherty signal separation circuit 200 further includes a signal adjustment unit configured to adjust one or more of the gain, phase, and waveform of the second baseband signal, The second baseband signal is processed by the signal adjustment unit to obtain the second Doherty separated signal.
  • the function of the signal adjustment unit is to offset the disadvantages of the traditional Doherty circuit.
  • the auxiliary power amplifier in the traditional Doherty circuit is biased in class C. Once the bias state is determined, the opening position of the auxiliary power amplifier is determined, which leads to the failure of the auxiliary power amplifier. The efficiency is declining, and the ideal state is not reached.
  • the signal adjustment unit can adjust one or more of the gain, phase and waveform to improve Doherty's work efficiency.
  • the theoretical basis is to achieve flexible configuration of dual-input Doherty through digital terminal control.
  • strategies such as the opening position, power distribution ratio and phase adjustment of the auxiliary power amplifier are used to improve the efficiency and linearity of the Doherty power amplifier, and make up for the undesirable characteristics of the traditional single-input Doherty power amplifier; Balanced power points inject more power into the auxiliary power amplifier.
  • the auxiliary power amplifier controls the opening position of the auxiliary power amplifier, and on the other hand, controls the power distribution ratio of the auxiliary power amplifier, so as to maximize the efficiency of the Doherty power amplifier while maintaining linear performance;
  • the signal phase is adjusted, and the phase matching degree is higher by adjusting the phase of the two channels; it can also be adjusted in other ways, and I will not give an example one by one here.
  • the design of the Doherty signal separation circuit 200 can be made simpler through digital up-conversion technology, and it also includes a third digital up-conversion unit DUC3 and a fourth digital up-conversion unit DUC4.
  • the second baseband signal Band2 passes through the third digital up-conversion unit DUC3. After processing, it is input to the first adder 300, and the second baseband signal Band2 is processed by the signal adjustment unit and the fourth digital up-conversion unit DUC4, and then input to the second adder 400.
  • frequency band there are no restrictions on which frequency band the power amplifier circuit 500 supports Outphasing working mode and which frequency band supports Doherty working mode. Taking into account the working performance and working parameters of other components in the circuit design, as well as the RF output after mixing In terms of efficiency, different frequency bands can be selected as Band1 signal and Band2 signal.
  • the Outphasing signal separation circuit 100 and the Doherty signal separation circuit 200 are matched to simplify the circuit structure.
  • the first baseband signal Band1 and the second baseband signal Band2 pass through the signal separation circuit in two different working modes. For mixing output, there is no need to consider meeting the same impedance trend at different frequency points, but there are two different power amplifier working modes corresponding to the impedance trend optional, which reduces the design difficulty of the power amplifier transmitter.
  • this embodiment provides a power amplifier transmitter, including
  • the first input terminal is configured to input a first baseband signal, where the first baseband signal includes a plurality of first sub-baseband signals with different frequency bands;
  • the second input terminal is configured to input a second baseband signal, where the second baseband signal includes a plurality of second sub-baseband signals with different frequency bands;
  • the outphasing signal separation circuit 100 is configured to be connected to the first input terminal to perform signal separation processing on the first baseband signal, and output the first Outphasing separation signal and the second Outphasing separation signal out of phase.
  • the Outphasing signal separation circuit 100 The number is the same as the number of the first sub-baseband signal;
  • the Doherty signal separation circuit 200 is configured to be connected to the second input terminal to perform signal separation processing on the second baseband signal, and output the first Doherty separation signal and the second Doherty separation signal based on Doherty time domain adjustment, and the Doherty signal separation
  • the number of circuits 200 is the same as the number of second sub-baseband signals
  • the first adder 300 is configured to add the first Outphasing separation signal and the first Doherty separation signal
  • the second adder 400 is configured to add the second Outphasing separation signal and the second Doherty separation signal
  • the power amplifying circuit 500 is set to support the Outphasing working mode on the frequency band of the first baseband signal and the Doherty working mode on the frequency band of the second baseband signal.
  • the power amplifying circuit 500 is connected to the first adder 300 and the second adder 400 The output terminal of the first adder 300 and the second adder 400 for power amplification.
  • Each first sub-baseband signal is represented as Band1 to Bandm
  • each second sub-baseband signal is represented as Bandm+1 to Bandn, where m and n are both positive and greater than 1.
  • each first sub-baseband signal corresponds to one frequency band, that is, the first baseband signal contains more than one frequency band
  • each second sub-baseband signal corresponds to one frequency band, that is, the second baseband signal contains multiple frequency bands. 1 piece.
  • Each frequency band of the first sub-baseband signal corresponds to an Outphasing signal separation circuit 100
  • each frequency band of the second sub-baseband signal corresponds to a Doherty signal separation circuit 200.
  • out-of-phase information in each Outphasing signal separation circuit 100 corresponds to different first sub-baseband signals
  • the Doherty time domain adjustment in each Doherty signal separation circuit 200 corresponds to different second sub-baseband signals, the first sub-baseband signals Band1 to Bandm and the second sub-baseband signals Bandm+1 to Bandn
  • the first adder 300 adds all the first Outphasing separated signals and the first Doherty separated signals to obtain different first Outphasing separated signals and the first Doherty separated signals.
  • the two Outphasing separation signals, the first Doherty separation signal and the second Doherty separation signal are finally input to one input of the power amplifier circuit 500, and all the second Outphasing separation signals and the second adder 400 are passed through the second adder 400.
  • the Doherty split signals are added together and input to the other input terminal of the power amplifier circuit 500.
  • this embodiment further includes:
  • the first digital predistortion unit DPD1 is configured to be connected to the first input terminal to perform digital predistortion processing on the first sub-baseband signals Band1 to Bandm and then input to the Outphasing signal separation circuit 100;
  • the second digital predistortion unit DPD2 is configured to be connected to the second input terminal to perform digital predistortion processing on the second sub-baseband signals Bandm+1 to Bandn and then input to the Doherty signal separation circuit 200;
  • the first digital-to-analog conversion unit DAC1 the output terminal of the first adder 300 is connected to the power amplifying circuit 500 through the first digital-to-analog conversion unit DAC1;
  • the second digital-to-analog conversion unit DAC2, and the output terminal of the second adder 400 is connected to the power amplifier circuit 500 through the second digital-to-analog conversion unit DAC2.
  • first digital predistortion unit DPD1 and second digital predistortion unit DPD2 are multiple-input single-output DPD devices, and the description of the linear influence between the input frequency bands refers to the first embodiment, and the description is not repeated here.
  • the single Outphasing signal separation circuit 100 and the single Doherty signal separation circuit 200 are the same in structure as the Outphasing signal separation circuit 100 and the Doherty signal separation circuit 200 in the first embodiment, for the first sub-baseband signals Band1 to Bandm and the second sub-band signal The input and output processing of the baseband signals Bandm+1 to Bandn are similar. In order to avoid repetition, the structure and working mode of the single Outphasing signal separation circuit 100 and the single Doherty signal separation circuit 200 will not be described in detail.
  • the first adder 300 and the second adder 400 are actually composed of multiple sub-adders cascaded, and each sub-adder adds two of the signals. , The output of which is used as one of the inputs of the next sub-adder, thereby forming the above-mentioned first adder 300 and second adder 400.
  • an embodiment of the present application also provides a power amplifier transmitter, including the power amplifier transmitter as in Embodiment 1 or Embodiment 2, and the power amplifier transmitter adopts the above power amplifier transmitter.
  • Set the Outphasing signal separation circuit 100 to perform out-of-phase signal separation processing on the first baseband signal to obtain the first Outphasing separated signal and the second Outphasing separated signal
  • the Doherty signal separation circuit 200 to perform digital Doherty signal separation on the second baseband signal Process to obtain the first Doherty separation signal and the second Doherty separation signal, by adding the first Outphasing separation signal and the first Doherty separation signal, and the second Outphasing separation signal and the second Doherty separation signal Add two signals that are input to the power amplifier circuit 500.
  • the power amplifier circuit 500 combines and outputs the amplified radio frequency signal after mixing processing. Compared with the existing dual-input working mode architecture, the embodiment of the present application does not need to be Meet the same impedance trend at different frequencies, but there are two different power amplifier working modes corresponding to the impedance trend to choose from, simplify the circuit structure and reduce the design difficulty of the power amplifier transmitter.

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Abstract

一种功放发射机，包括Outphasing信号分离电路(100)、Doherty信号分离电路(200)、第一加法器(300)、第二加法器(400)和功率放大电路(500)，Outphasing信号分离电路(100)对第一基带信号进行信号分离处理，并输出异相的第一路Outphasing分离信号和第二路Outphasing分离信号，Doherty信号分离电路(200)对第二基带信号进行信号分离处理，并输出第一路Doherty分离信号和基于Doherty时域调整的第二路Doherty分离信号，第一加法器(300)将第一路Outphasing分离信号和第一路Doherty分离信号相加，第二加法器(400)将第二路Outphasing分离信号和第二路Doherty分离信号相加，并输入到功率放大电路(500)进行功率放大。

Description

一种功放发射机
相关申请的交叉引用
本申请基于申请号为202010494603.7、申请日为2020年6月3日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请涉及通信技术领域，尤其涉及一种功放发射机。
背景技术
随着通信技术的发展，通信基站发射机架构中对射频功率放大器(Power Amplifier，简称PA)效率指标的要求逐渐增加，同时支持多载波模式已经普遍应用在通信网络中，因此功率放大器作为通信基站中最主要的耗能设备需要同时支持两个甚至多个频段的信号。
现有的双输入型功率放大器在宽带多频场景中应用同一种双输入工作模式，这需要输出匹配电路在不同频点上满足同一种阻抗趋势，增加了功率放大器的匹配电路设计的复杂度。
发明内容
为了至少在一定程度上解决上述技术问题，本申请实施例提供了一种功放发射机，包括：第一输入端，被设置为输入第一基带信号；第二输入端，被设置为输入第二基带信号；Outphasing信号分离电路，被设置为连接所述第一输入端以对所述第一基带信号进行信号分离处理，并输出异相的第一路Outphasing分离信号和第二路Outphasing分离信号；Doherty信号分离电路，被设置为连接所述第二输入端以对所述第二基带信号进行信号分离处理，并输出第一路Doherty分离信号和基于Doherty时域调整的第二路Doherty分离信号；第一加法器，被设置为将所述第一路Outphasing分离信号和所述第一路Doherty分离信号相加；第二加法器，被设置为将所述第二路Outphasing分离信号和所述第二路Doherty分离信号相加；和功率放大电路，被设置为在所述第一基带信号的频段上支持Outphasing工作模式，在所述第二基带信号的频段上支持Doherty工作模式，所述功率放大电路连接所述第一加法器和所述第二加法器的输出端，以对所述第一加法器和所述第二加法器输出的信号进行功率放大。
附图说明
图1是本申请实施例一提供的双频并发输入的功放发射机的电路图；
图2是本申请实施例一提供的功率放大电路的电路图；
图3是本申请实施例二提供的多频并发输入的功放发射机的电路图；
图4是本申请实施例二提供的功率放大电路的电路图。
具体实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
在后续的描述中，使用用于表示元件的诸如“模块”、“部件”或“单元”的后缀仅为了有利于本申请的说明，其本身没有特有的意义。因此，“模块”、“部件”或“单元”可以混合地使用。
实施例一
如图1所示，本实施例提供了一种功放发射机，包括
第一输入端，被设置为输入第一基带信号；
第二输入端，被设置为输入第二基带信号；
Outphasing信号分离电路100，被设置为连接第一输入端以对第一基带信号进行信号分离处理，并输出异相的第一路Outphasing分离信号和第二路Outphasing分离信号；
Doherty信号分离电路200，被设置为连接第二输入端以对第二基带信号进行信号分离处理，并输出第一路Doherty分离信号和基于Doherty时域调整的第二路Doherty分离信号；
第一加法器300，被设置为将第一路Outphasing分离信号和第一路Doherty分离信号相加；
第二加法器400，被设置为将第二路Outphasing分离信号和第二路Doherty分离信号相加；和
功率放大电路500，被设置为在第一基带信号的频段上支持Outphasing工作模式，在第二基带信号的频段上支持Doherty工作模式，功率放大电路500连接第一加法器300和第二加法器400的输出端，以对第一加法器300和第二加法器400输出的信号进行功率放大。
本实施例中以第一基带信号为Band1、第二基带信号为Band2为例进行说明，其中第一基带信号Band1的频段和第二基带信号Band2的频段互不相同，因此本实施例的功放发射机为双频双输入放大电路，并且能够在Band1的频段上支持Outphasing工作模式，在Band2频段上支持Doherty工作模式，因此第一基带信号Band1和第二基带信号Band2在功率放大电路500中分别以Outphasing工作模式和Doherty工作模式进行放大后合路输出。
基于此，为功率放大电路500设置相匹配的Outphasing信号分离电路100和Doherty信号分离电路200，其中Outphasing信号分离电路100内存储有对应Band1的异相信息，第一基带信号Band1在Outphasing信号分离电路100内通过相角变换后输出异相的第一路Outphasing分离信号和第二路Outphasing分离信号，Doherty信号分离电路200同样分成两路输出，一路直接输出为第一路Doherty分离信号，另一路经过基于Doherty时域调整后输出第二路Doherty分离信号，通过第一加法器300将第一路Outphasing分离信号和第一路Doherty分离信号相加，通过第二加法器400将第二路Outphasing分离信号和第二路 Doherty分离信号相加，分别得到功率放大电路500的两路输入。由于功率放大电路500的两路输入工作于不同的工作模式，因此无需在不同频点上满足同一种阻抗趋势，而是有两种不同的功放工作模式对应的阻抗趋势可选，简化了电路结构，同时降低了电路设计难度和电路调试的复杂度。
可以理解的是，双频并发输入的第一基带信号Band1和第二基带信号Band2是在数字端进行分频的，例如FPGA器件中，基于功率放大电路500支持的Outphasing工作模式和Doherty工作模式将输入频率划分成两个频段，利用Outphasing与双输入Doherty高效率特性来改善传统单输入Doherty的功放性能。
参照图2，为实现双输入的合路输出，功率放大电路500包括第三加法器510、第一放大器PA1和第二放大器PA2，第一放大器PA1的输入端连接第一加法器300的输出端，第二放大器PA2的输入端连接第二加法器400的输出端，第一放大器PA1和第二放大器PA2的输出端连接第三加法器510的输入端。功率放大电路500为双输入的双频段功率放大器，内置单输入单输出的第一放大器PA1和第二放大器PA2，并通过第三加法器510将第一放大器PA1和第二放大器PA2的两路输出相加，从而实现对双频并发输入信号进行功率放大。
为提高功率放大电路500的效率，减少功率放大电路500在其非线性区运行时产生的失真，本实施例采用数字预失真对第一基带信号Band1和第二基带信号Band2进行线性化处理，具体地，功放发射机还包括：
第一数字预失真单元DPD1，被设置为连接第一输入端以对第一基带信号Band1进行数字预失真处理后输入到Outphasing信号分离电路100；
第二数字预失真单元DPD2，被设置为连接第二输入端以对第二基带信号Band2进行数字预失真处理后输入到Doherty信号分离电路200；
第一数模转换单元DAC1，第一加法器300的输出端通过第一数模转换单元DAC1连接到功率放大电路500；和
第二数模转换单元DAC2，第二加法器400的输出端通过第二数模转换单元DAC2连接到功率放大电路500。
基于数字预失真技术对基带信号进行数字化处理，并在输出端进行数字-模拟信号的转换以适应功率放大电路500的工作方式，从而提高整个系统架构的线性度，提高功率放大电路500的效率。
为降低第二基带信号Band2对第一基带信号Band1线性的影响，第一数字预失真单元DPD1在对第一基带信号Band1进行数字预失真处理的基础上，引入第二基带信号Band2作为输入，同理，第二数字预失真单元DPD2在对第二基带信号Band2进行数字预失真处理的基础上，引入第一基带信号Band1作为输入，降低第一基带信号Band1对第二基带信号Band2线性的影响，可以理解的是，在本实施例中，第一数字预失真单元DPD1的输出 为第一基带信号Band1预失真处理后的信号，第二数字预失真单元DPD2的输出为第二基带信号Band2预失真处理后的信号。显然，针对第一基带信号Band1和第二基带信号Band2两个频段，第一数字预失真单元DPD1和第二数字预失真单元DPD2均为双频DPD，其输出为单路输出。
在一实施方式中，为了实现Outphasing信号分离电路100的两路异相，需要在Outphasing信号分离电路100中设置存储有异相信息的查找表，具体地，Outphasing信号分离电路100包括：
第一取模单元130，被设置为连接第一输入端并对第一基带信号Band1进行取模处理；
第二取模单元140，被设置为连接第二输入端并对第二基带信号Band2进行取模处理；
第一查找表单元，存储有第一异相信息，第一查找表单元被设置为连接第一取模单元130和第二取模单元140，并根据第一异相信息、第一基带信号Band1的模值和第二基带信号Band2的模值输出第一Outphasing相角；
第二查找表单元，存储有第二异相信息，第二查找表单元被设置为连接第一取模单元130和第二取模单元140，并根据第二异相信息、第一基带信号Band1的模值和第二基带信号Band2的模值输出第二Outphasing相角；
第一乘法器110，被设置为连接第一输入端和第一查找表单元的输出端，将第一基带信号Band1与第一Outphasing相角所代表的相位信息相乘后输出第一路Outphasing分离信号；和
第二乘法器120，被设置为连接第一输入端和第二查找表单元的输出端，将第一基带信号Band1与第二Outphasing相角所代表的相位信息相乘后输出第二路Outphasing分离信号。
通过第一取模单元130和第二取模单元140分别对第一基带信号Band1和第二基带信号Band2进行求模，得出两个基带信号的模值，该模值的意义在于量化两个并发的基带信号之间对功率放大电路500架构效率的影响；由于Band2的Doherty工作模式会对Band1上的Outphasing异相角产生影响，因此将两个基带信号的模值分别输入到第一查找表单元和第二查找表单元，第一查找表单元和第二查找表单元的输出为基带信号每一个功率幅度下对应的Outphasing相角，该角度代表了功率放大电路500的高效率状态，根据查找表所包含的异相信息，可以对应第一基带信号Band1和第二基带信号Band2来调整功率放大器的运行方式，从而提高功率放大器的效率；可以理解的是，由于分别输入到两个查找表单元中的模值为两个，因此第一查找表单元和第二查找表单元内存储的查找表是二维的，即2D-LUT。
在一实施方式中，Outphasing信号分离电路100还包括第一数字上变频单元DUC1和第二数字上变频单元DUC2，第一乘法器110、第一数字上变频单元DUC1和第一加法器300依次连接，第二乘法器120、第二数字上变频单元DUC2和第二加法器400依次连接。 通过数字上变频技术将第一路Outphasing分离信号和第二路Outphasing分离信号调制到中高频，可以降低设计难度，且可降低基带数据的数据量和传输速度，便于后续处理。
在一实施方式中，为实现Doherty分离信号的调整，Doherty信号分离电路200还包括信号调整单元，信号调整单元被设置为对第二基带信号进行增益、相位和波形中的一个或多个调整，第二基带信号经过信号调整单元处理后得到第二路Doherty分离信号。信号调整单元的作用是抵消传统Doherty电路的劣势，通常来说，传统的Doherty电路中辅助功放偏置在C类，当偏置状态一旦确定，辅助功放的开启位置就确定了，导致辅助功放的效率衰退，达不到理想状态，通过信号调整单元可以对增益、相位和波形中的一个或多个调整，改善Doherty的工作效率，其理论依据在于，通过数字端控制来达到灵活配置双输入Doherty功放中辅路功率放大器的开启位置、功率分配比和相位调整等策略来提升Doherty功放的效率与线性度，弥补传统单输入型Doherty功放的不理想特性；例如，对信号的增益进行调整，通过不均衡功分将更多的功率注入到辅助功放，一方面控制辅助功放的开启位置，另一方面控制辅助功放的功率分配比，从而在保持线性性能基础上最大化Doherty功放效率；又如，对信号进行相位调整，通过调整两路的相位使相位匹配度更高；还可以通过其他方式对进行调整，在此不一一举例。
同样地，通过数字上变频技术可以使Doherty信号分离电路200设计更加简单，还包括第三数字上变频单元DUC3和第四数字上变频单元DUC4，第二基带信号Band2经过第三数字上变频单元DUC3处理后输入到第一加法器300，第二基带信号Band2经过信号调整单元处理和第四数字上变频单元DUC4处理后输入到第二加法器400。
可以理解的是，功率放大电路500针对哪一频段支持Outphasing工作模式和针对哪一频段支持Doherty工作模式并没有限制，考虑到电路设计中其他元器件的工作性能和工作参数，以及混合后射频输出的效率大小，可以选择不同的频段作为Band1信号和Band2信号。
基于双输入的功率放大电路500，匹配设置Outphasing信号分离电路100和Doherty信号分离电路200，简化了电路结构，第一基带信号Band1和第二基带信号Band2通过两种不同工作模式的信号分离电路后混频输出，无需考虑在不同频点上满足同一种阻抗趋势，而是有两种不同的功放工作模式对应的阻抗趋势可选，降低功放发射机的设计难度。
实施例二，
如图3和图4所示，本实施例提供了一种功放发射机，包括
第一输入端，被设置为输入第一基带信号，其中第一基带信号包括多个频段互不相同的第一子基带信号；
第二输入端，被设置为输入第二基带信号，其中第二基带信号包括多个频段互不相同的第二子基带信号；
Outphasing信号分离电路100，被设置为连接第一输入端以对第一基带信号进行信号分离处理，并输出异相的第一路Outphasing分离信号和第二路Outphasing分离信号，Outphasing信号分离电路100的数量与第一子基带信号的数量相同；
Doherty信号分离电路200，被设置为连接第二输入端以对第二基带信号进行信号分离处理，并输出第一路Doherty分离信号和基于Doherty时域调整的第二路Doherty分离信号，Doherty信号分离电路200的数量与第二子基带信号的数量相同；
第一加法器300，被设置为将第一路Outphasing分离信号和第一路Doherty分离信号相加；
第二加法器400，被设置为将第二路Outphasing分离信号和第二路Doherty分离信号相加；和
功率放大电路500，被设置为在第一基带信号的频段上支持Outphasing工作模式，在第二基带信号的频段上支持Doherty工作模式，功率放大电路500连接第一加法器300和第二加法器400的输出端，以对第一加法器300和第二加法器400输出的信号进行功率放大。
本实施例中针对多频并发输入的情况进行说明，各个第一子基带信号表示为Band1至Bandm，各个第二子基带信号表示为Bandm+1至Bandn，其中m、n均为大于1的正整数，显然可知，每个第一子基带信号对应一个频段，即第一基带信号包含的频段多于1个，每个第二子基带信号对应一个频段，即第二基带信号包含的频段多个1个。
第一子基带信号的每个频段对应一个Outphasing信号分离电路100，第二子基带信号的每个频段对应一个Doherty信号分离电路200，具体来说，每个Outphasing信号分离电路100中的异相信息对应不同的第一子基带信号，每个Doherty信号分离电路200中的Doherty时域调整对应不同的第二子基带信号，第一子基带信号Band1至Bandm和第二子基带信号Bandm+1至Bandn通过Outphasing信号分离电路100和Doherty信号分离电路200处理后，第一加法器300将全部第一路Outphasing分离信号和第一路Doherty分离信号相加，分别得到不同的第一路Outphasing分离信号、第二路Outphasing分离信号、第一路Doherty分离信号和第二路Doherty分离信号，最后通过输入功率放大电路500的一个输入端，通过第二加法器400将全部的第二路Outphasing分离信号和第二路Doherty分离信号相加，输入功率放大电路500的另一个输入端。
基于上述多频并发输入的情况，为实现数字化处理和频段分离，提高功率放大电路500的效率，减少功率放大电路500在其非线性区运行时产生的失真，本实施例还包括：
第一数字预失真单元DPD1，被设置为连接第一输入端以对第一子基带信号Band1至Bandm进行数字预失真处理后输入到Outphasing信号分离电路100；
第二数字预失真单元DPD2，被设置为连接第二输入端以对第二子基带信号Bandm+1至Bandn进行数字预失真处理后输入到Doherty信号分离电路200；
第一数模转换单元DAC1，第一加法器300的输出端通过第一数模转换单元DAC1连接到功率放大电路500；和
第二数模转换单元DAC2，第二加法器400的输出端通过第二数模转换单元DAC2连接到功率放大电路500。
上述第一数字预失真单元DPD1和第二数字预失真单元DPD2为多输入单输出的DPD器件，其输入频段之间的线性影响的说明参照第一实施例，在此不再重复说明。
由于单个Outphasing信号分离电路100和单个Doherty信号分离电路200在结构上分别与实施例一中的Outphasing信号分离电路100和Doherty信号分离电路200相同，对于第一子基带信号Band1至Bandm和第二子基带信号Bandm+1至Bandn的输入输出处理相似，为了避免重复赘述，针对单个Outphasing信号分离电路100和单个Doherty信号分离电路200的结构及工作方式不再详细说明。
值得注意的是，由于是多路信号进行相加，因此第一加法器300和第二加法器400实际上为多个子加法器级联组成的，每个子加法器将其中两路信号进行相加，其输出作为下一个子加法器的其中一路输入，从而构成上述的第一加法器300和第二加法器400。
基于上述实施例一和实施例二，本申请的一个实施例还提供了一种功放发射机，包括有如实施例一或实施例二中的功放发射机，功放发射机采用上述功放发射机，通过设置Outphasing信号分离电路100对第一基带信号进行异相信号分离处理，得到第一路Outphasing分离信号和第二路Outphasing分离信号，还设置Doherty信号分离电路200对第二基带信号进行数字Doherty信号分离处理，得到第一路Doherty分离信号和第二路Doherty分离信号，通过将第一路Outphasing分离信号和第一路Doherty分离信号相加，以及将第二路Outphasing分离信号和第二路Doherty分离信号相加，得到两路输入到功率放大电路500的信号，功率放大电路500通过混频处理后合路输出放大后的射频信号，相对于现有的双输入工作模式架构，本申请实施例无需在不同频点上满足同一种阻抗趋势，而是有两种不同的功放工作模式对应的阻抗趋势可选，简化电路结构，降低功放发射机的设计难度。
以上参照附图说明了本申请的一些实施例，并非因此局限本申请的权利范围。本领域技术人员不脱离本申请的范围和实质内所作的任何修改、等同替换和改进，均应在本申请的权利范围之内。

Claims (10)

  1. 一种功放发射机，包括：
    第一输入端，被设置为输入第一基带信号；
    第二输入端，被设置为输入第二基带信号；
    Outphasing信号分离电路，被设置为连接所述第一输入端以对所述第一基带信号进行信号分离处理，并输出异相的第一路Outphasing分离信号和第二路Outphasing分离信号；
    Doherty信号分离电路，被设置为连接所述第二输入端以对所述第二基带信号进行信号分离处理，并输出第一路Doherty分离信号和基于Doherty时域调整的第二路Doherty分离信号；
    第一加法器，被设置为将所述第一路Outphasing分离信号和所述第一路Doherty分离信号相加；
    第二加法器，被设置为将所述第二路Outphasing分离信号和所述第二路Doherty分离信号相加；和
    功率放大电路，被设置为在所述第一基带信号的频段上支持Outphasing工作模式，在所述第二基带信号的频段上支持Doherty工作模式，所述功率放大电路连接所述第一加法器和所述第二加法器的输出端，以对所述第一加法器和所述第二加法器输出的信号进行功率放大。
  2. 根据权利要求1所述的功放发射机，其中，所述功率放大电路包括第一放大器、第二放大器和第三加法器，所述第一放大器的输入端连接所述第一加法器的输出端，所述第二放大器的输入端连接所述第二加法器的输出端，所述第一放大器和所述第二放大器的输出端连接所述第三加法器的输入端。
  3. 根据权利要求1所述的功放发射机，还包括：
    第一数字预失真单元，被设置为连接所述第一输入端以对所述第一基带信号进行数字预失真处理后输入到所述Outphasing信号分离电路；
    第二数字预失真单元，被设置为连接所述第二输入端以对所述第二基带信号进行数字预失真处理后输入到所述Doherty信号分离电路；
    第一数模转换单元，所述第一加法器的输出端通过所述第一数模转换单元连接到所述功率放大电路；和
    第二数模转换单元，所述第二加法器的输出端通过所述第二数模转换单元连接到所述功率放大电路。
  4. 根据权利要求3所述的功放发射机，其中，所述第一数字预失真单元还被设置为连接所述第二输入端以同时对所述第一基带信号和所述第二基带信号进行数字预失真处理，所述第二数字预失真单元还被设置为连接所述第一输入端以同时对所述第一基带信号和所述第二基带信号进行数字预失真处理。
  5. 根据权利要求1所述的功放发射机，其中，所述Outphasing信号分离电路包括：
    第一取模单元，被设置为连接所述第一输入端并对所述第一基带信号进行取模处理；
    第二取模单元，被设置为连接所述第二输入端并对所述第二基带信号进行取模处理；
    第一查找表单元，存储有第一异相信息，所述第一查找表单元被设置为连接所述第一取模单元和所述第二取模单元，并根据所述第一异相信息、所述第一基带信号的模值和所述第二基带信号的模值输出第一Outphasing相角；
    第二查找表单元，存储有第二异相信息，所述第二查找表单元被设置为连接所述第一取模单元和所述第二取模单元，并根据所述第二异相信息、所述第一基带信号的模值和所述第二基带信号的模值输出第二Outphasing相角；
    第一乘法器，被设置为连接所述第一输入端和所述第一查找表单元的输出端，将所述第一基带信号与所述第一Outphasing相角所代表的相位信息相乘后输出所述第一路Outphasing分离信号；和
    第二乘法器，被设置为连接所述第一输入端和所述第二查找表单元的输出端，将所述第一基带信号与所述第二Outphasing相角所代表的相位信息相乘后输出所述第二路Outphasing分离信号。
  6. 根据权利要求5所述的功放发射机，其中，所述Outphasing信号分离电路还包括第一数字上变频单元和第二数字上变频单元，所述第一乘法器、所述第一数字上变频单元和所述第一加法器依次连接，所述第二乘法器、所述第二数字上变频单元和所述第二加法器依次连接。
  7. 根据权利要求5所述的功放发射机，其中，所述第一查找表单元和所述第二查找表单元内均存储有二维查找表2D-LUT。
  8. 根据权利要求1所述的功放发射机，其中，所述Doherty信号分离电路还包括信号调整单元，所述信号调整单元被设置为对所述第二基带信号进行增益、相位和波形中的一个或多个调整，所述第二基带信号经过所述信号调整单元处理后得到所述第二路Doherty分离信号。
  9. 根据权利要求8所述的功放发射机，其中，所述Doherty信号分离电路还包括第三数字上变频单元和第四数字上变频单元，所述第二基带信号经过所述第三数字上变频单元处理后输入到所述第一加法器，所述第二基带信号经过所述信号调整单元处理和所述第四数字上变频单元处理后输入到所述第二加法器。
  10. 根据权利要求1所述的功放发射机，其中，所述第一基带信号包括多个频段互不相同的第一子基带信号，所述第二基带信号包括多个频段互不相同的第二基带信号，所述Outphasing信号分离电路的数量与所述第一子基带信号的数量相同，所述Doherty信号分离电路的数量与所述第二子基带信号的数量相同。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103891137A (zh) * 2013-06-27 2014-06-25 华为技术有限公司 一种多频段功率放大装置
CN104980174A (zh) * 2015-06-30 2015-10-14 上海华为技术有限公司 一种双频段双输入功放发射机
CN107547056A (zh) * 2016-06-28 2018-01-05 英飞凌科技股份有限公司 放大射频信号的方法和doherty‑chireix 组合放大器
CN110011621A (zh) * 2019-03-28 2019-07-12 杭州电子科技大学温州研究院有限公司 一种集成异向与多尔蒂结构的高回退范围射频功率放大器

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103891137A (zh) * 2013-06-27 2014-06-25 华为技术有限公司 一种多频段功率放大装置
CN104980174A (zh) * 2015-06-30 2015-10-14 上海华为技术有限公司 一种双频段双输入功放发射机
CN107547056A (zh) * 2016-06-28 2018-01-05 英飞凌科技股份有限公司 放大射频信号的方法和doherty‑chireix 组合放大器
CN110011621A (zh) * 2019-03-28 2019-07-12 杭州电子科技大学温州研究院有限公司 一种集成异向与多尔蒂结构的高回退范围射频功率放大器

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