WO2021240642A1 - Harmonic suppression device and air conditioning system - Google Patents

Harmonic suppression device and air conditioning system Download PDF

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Publication number
WO2021240642A1
WO2021240642A1 PCT/JP2020/020731 JP2020020731W WO2021240642A1 WO 2021240642 A1 WO2021240642 A1 WO 2021240642A1 JP 2020020731 W JP2020020731 W JP 2020020731W WO 2021240642 A1 WO2021240642 A1 WO 2021240642A1
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WIPO (PCT)
Prior art keywords
phase
load current
power supply
switching element
charging
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PCT/JP2020/020731
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French (fr)
Japanese (ja)
Inventor
啓佑 石倉
暁範 橋本
秀太 石川
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三菱電機株式会社
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Priority to JP2022527315A priority Critical patent/JPWO2021240642A1/ja
Priority to PCT/JP2020/020731 priority patent/WO2021240642A1/en
Publication of WO2021240642A1 publication Critical patent/WO2021240642A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present disclosure relates to a harmonic suppression device that suppresses a harmonic component of a current flowing through a system power supply, and an air conditioning system equipped with the harmonic suppression device.
  • a drive circuit for turning on / off an upper switching element and a lower switching element constituting a rectifier has a bootstrap capacitor (see, for example, Patent Document 1). ..
  • the upper switching element and the lower switching element are connected in series to form a leg.
  • the rectifier is configured by connecting a plurality of legs in parallel.
  • the bootstrap capacitor acts as a power source for driving the upper switching element of each leg.
  • the bootstrap capacitor is charged from the control power supply.
  • Patent Document 1 for charging the bootstrap capacitor for activating the harmonic suppression operation, the lower switching element of the phase to be charged is based on the phase of the AC power supply voltage, and the phase voltage of the AC power supply is the minimum. Always turn on when taking phase. Further, PWM control is performed when the phase voltage of the AC power supply is not the minimum phase and is negative.
  • the bootstrap capacitor is charged based on the state of the AC power supply voltage. Therefore, if the imbalance of the AC power supply voltage is significant, or if distortion is superimposed on the power supply voltage of the AC power supply due to a large impedance on the power supply side, etc., the phase of the AC power supply voltage should be recognized correctly. I can't. As a result, charging starts in a charging period different from the original one, and there is a problem that a large current steeper than expected flows.
  • Patent Document 1 described above describes a means for charging a bootstrap capacitor based on a reactor current after rectification of a harmonic generation load.
  • a new current detecting means for the reactor after rectification is required.
  • a means for detecting the power supply voltage and the phase is required.
  • This disclosure is made to solve such a problem, and obtains a harmonic suppression device capable of charging a bootstrap capacitor without being affected by an AC power source and an air conditioning system equipped with the harmonic suppression device.
  • the purpose is.
  • the harmonic suppression device is a harmonic suppression device that is connected in parallel with a harmonic generation load connected to an AC power supply and suppresses the harmonics generated by the harmonic generation load, and is an upper switching element.
  • a plurality of upper and lower arms in which the lower switching element and the lower switching element are connected in series are connected in parallel, and each phase of the AC power supply is connected to a middle point which is a connection point between the upper switching element and the lower switching element.
  • a second drive circuit that operates ON / OFF, and a control device that generates a control signal that causes the first drive circuit and the second drive circuit to perform the ON / OFF operation of the upper switching element and the lower switching element.
  • the first drive circuit has a bootstrap condenser that acts as a power source for driving the upper switching element and a control power supply for charging the bootstrap condenser, and the control device is a control power source for each of the AC power supplies.
  • the phase having the minimum load current is selected as the charging phase, and the lower switching element corresponding to the charging phase is operated ON / OFF in the second drive circuit.
  • the bootstrap condenser of the first drive circuit corresponding to the charging phase is charged.
  • the bootstrap capacitor for driving the upper switching element can be charged without being affected by the AC power supply. can.
  • FIG. 1st drive circuit 13r to 13t in the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a block diagram which showed the structure of the control apparatus 10 of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a figure which shows an example of the ON / OFF operation of the lower switching element 70x to 70z which concerns on Embodiment 1.
  • FIG. It is a figure which shows an example of the 1st drive circuit 13 which has the control voltage adjustment circuit 20 for suppressing the heat generation of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a flowchart explaining the charge control example of the boot strap capacitor 18 of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a flowchart explaining the charge control example of the bootstrap capacitor 18 in the harmonic suppression apparatus 4 when there is a phase which does not generate a load current in Embodiment 1.
  • FIG. It is a figure which shows the load current of R phase, S phase, and T phase. It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • FIG. It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1.
  • each program according to the embodiment of the present disclosure is a process performed in chronological order in the order described, but is a process that is executed in parallel or individually even if it is not necessarily processed in chronological order. May include.
  • each function of the harmonic suppression device and the air conditioning system may be realized by either hardware or software.
  • Each function in each block diagram may be realized by hardware such as a circuit device, or may be realized by software implemented on an arithmetic unit.
  • FIG. 1 is a circuit block diagram showing a schematic configuration of an air conditioning system 1 provided with a harmonic suppression device 4 according to a first embodiment.
  • the harmonic suppression device 4 suppresses the harmonic component of the current flowing from the harmonic generation load 3 to the AC power supply 2.
  • a harmonic is a wave having a frequency that is an integral multiple of the fundamental wave contained in the waveform on which distortion is superimposed.
  • the air conditioning system 1 is connected to an AC power supply 2 that functions as a system power supply.
  • the air conditioning system 1 includes a harmonic generation load 3, a harmonic suppression device 4, and a refrigerant circuit 5.
  • the AC power supply 2 is, for example, a three-phase AC power supply, and supplies electric power to the harmonic generation load 3.
  • the three output lines extending from the AC power supply 2 are referred to as a first output line (R phase), a second output line (S phase), and a third output line (T phase), respectively. ..
  • the harmonic generation load 3 is a power conversion device including, for example, a rectifier 30, a DC reactor 31, a smoothing capacitor 32, an inverse converter (not shown), and the like, and supplies electric power to the refrigerant circuit 5.
  • the rectifier 30 rectifies the AC voltage of the AC power supply 2 to a DC voltage.
  • a smoothing capacitor 32 is connected in parallel to the output side of the rectifier 30 via a DC reactor 31.
  • the smoothing capacitor 32 smoothes the DC voltage input from the rectifier 30 via the DC reactor 31. If necessary, an inverter circuit may be provided between the harmonic generation load 3 and the refrigerant circuit 5.
  • the refrigerant circuit 5 includes, for example, a compressor 50, two heat exchangers 51 and 52, and an expansion valve 53 connected via a refrigerant pipe 54.
  • the refrigerant circuit 5 may further include a four-way valve, an accumulator, and the like.
  • the compressor 50 sucks in a low-pressure gas refrigerant, compresses it, and discharges it as a high-pressure gas refrigerant.
  • the compressor 50 is, for example, an inverter compressor.
  • the inverter compressor can change the amount of the refrigerant to be sent out per unit time by controlling the inverter circuit or the like.
  • Each of the two heat exchangers 51 and 52 has a heat transfer tube and fins.
  • the heat exchangers 51 and 52 are, for example, fin-and-tube heat exchangers.
  • Each of the heat exchangers 51 and 52 exchanges heat between the refrigerant flowing inside the heat transfer tube and the air flowing outside the heat transfer tube.
  • the refrigerant circuit 5 is an air conditioner, one of the heat exchangers 51 and 52 functions as an evaporator and the other functions as a condenser.
  • the expansion valve 53 decompresses the inflowing liquid refrigerant by a squeezing action and flows out so that the refrigerant liquefied by the condenser can be easily evaporated by the evaporator. Further, the expansion valve 53 adjusts the amount of the refrigerant so as to maintain an appropriate amount of the refrigerant according to the load of the evaporator.
  • the expansion valve 53 is composed of, for example, an electronic expansion valve. As shown in FIG. 1, the expansion valve 53 is connected to the two heat exchangers 51 and 52 by a refrigerant pipe 54.
  • the harmonic suppression device 4 is provided to suppress the harmonic current because the harmonic generation load 3 causes the harmonic current to flow to the AC power supply 2.
  • the harmonic suppression device 4 is connected in parallel with the harmonic generation load 3 connected to the AC power supply 2 to suppress the harmonics generated from the harmonic generation load 3.
  • the harmonic suppression device 4 is built in the main body of the air conditioning system 1 as shown in FIG. 9, or is externally attached to the main body of the air conditioning system 1 as shown in FIG. Alternatively, as shown in FIG. 11, the harmonic suppression device 4 may be configured separately from the air conditioning system 1 and may be placed separately.
  • 9 to 11 are diagrams schematically showing the installation method of the harmonic suppression device 4 according to the first embodiment.
  • the harmonic suppression device 4 includes a ripple filter 6, a switching circuit 7, a reactor 8, a capacitor 9, a control device 10, a load current detection unit 11, and a compensation current detection unit 12. have.
  • the ripple filter 6 suppresses the ripple component of the compensation current output from the harmonic suppression device 4.
  • the ripple filter 6 has reactors 64a, 64b and 64c and capacitors 65a, 65b and 65c.
  • the reactors 64a, 64b and 64c are connected in series to the first output line (R phase), the second output line (S phase) and the third output line (T phase) of the AC power supply 2, respectively. ..
  • one end of the capacitor 65a is connected to the first output line (R phase) of the AC power supply 2, and the other end is connected to the connection point 63.
  • One end of the capacitor 65b is connected to the second output line (S phase) of the AC power supply 2, and the other end is connected to the connection point 63.
  • One end of the capacitor 65c is connected to the third output line (T phase) of the AC power supply 2, and the other end is connected to the connection point 63.
  • the reactor 8 connects the switching circuit 7 and the ripple filter 6.
  • the reactor 8 has reactors 8a, 8b and 8c.
  • the reactors 8a, 8b and 8c are connected in series to the first output line (R phase), the second output line (S phase) and the third output line (T phase) of the AC power supply 2, respectively. ..
  • the capacitor 9 is connected in parallel to the switching circuit 7.
  • the switching elements 70r, 70s and 70t arranged on the upper side and the switching elements 70x, 70y and 70z arranged on the lower side have a diode 71 connected in antiparallel to each other.
  • this configuration is referred to as an arm.
  • the arm is configured by connecting two arms in series, and hereinafter, this is referred to as an upper and lower arm.
  • the three upper and lower arms are connected in parallel.
  • a capacitor 9 is connected in parallel to these upper and lower arms.
  • connection points between the switching element 70r and the switching element 70x, the connection points between the switching element 70s and the switching element 70y, and the connection points between the switching element 70t and the switching element 70z are referred to as midpoints 72a, 72b, and 72c, respectively. ..
  • the first output line (R phase) of the AC power supply 2 is connected to the midpoint 72a via the reactor 64a and the reactor 8a of the ripple filter 6. Further, the second output line (S phase) of the AC power supply 2 is connected to the midpoint 72b via the reactor 64b and the reactor 8b of the ripple filter 6. Similarly, the third output line (T phase) of the AC power supply 2 is connected to the midpoint 72c via the reactor 64c and the reactor 8c of the ripple filter 6.
  • the diode 71 is connected in antiparallel to each of the switching elements 70r to 70t and 70x to 70z.
  • drive circuits 13r to 13t and 13x to 13z for outputting drive signals for performing these ON / OFF operations are installed in each of the switching elements 70r to 70t and 70x to 70z, respectively.
  • the drive circuits 13r to 13t and 13x to 13z are connected to the control device 10, receive a control signal 61 from the control device 10, and perform an ON / OFF operation of the corresponding switching element based on the control signal 61. ..
  • the switching elements 70r to 70t are referred to as upper switching elements, and the switching elements 70x to 70z are referred to as lower switching elements.
  • the drive circuits 13r to 13t for driving the upper switching elements 70r to 70t are referred to as first drive circuits 13r to 13t, and the drive circuits 13x to 13z for driving the lower switching elements 70x to 70z are referred to as second drive circuits. It is called 13x to 13z.
  • the diodes 71 connected in antiparallel to the switching elements 70r to 70t and 70x to 70z of the three upper and lower arms connected in parallel constitute the "rectifier" of the harmonic suppression device 4 according to the first embodiment.
  • the switching circuit 7 of FIG. 1 from which the first drive circuits 13r to 13t and the second drive circuits 13x to 13z are removed is the "rectifier" of the harmonic suppression device 4 according to the first embodiment.
  • FIG. 2 is a circuit configuration diagram showing the configuration of the first drive circuits 13r to 13t in the harmonic suppression device 4 according to the first embodiment.
  • the first drive circuits 13r to 13t are collectively referred to as the first drive circuit 13.
  • the first drive circuit 13 drives the upper switching elements 70r to 70t, respectively.
  • the first drive circuit 13 includes a current limiting resistor 14, a diode 15, a bootstrap capacitor 18, and a drive IC (Integrated Circuit) 17.
  • the bootstrap capacitor 18 acts as a power source for driving the upper switching elements 70r to 70t.
  • the bootstrap capacitor 18 is charged from the control power supply 16 via the diode 15.
  • the drive IC 17 is powered by the voltage across the bootstrap capacitor 18.
  • the drive IC 17 receives the control signal 61 from the control device 10.
  • the drive IC 17 outputs a drive signal 62 to each of the upper switching elements 70r, 70s and 70t based on the control signal 61, and turns on / off each of the upper switching elements 70r, 70s and 70t.
  • the current limiting resistor 14 limits the current from the control power supply 16. As shown in FIG. 2, the current limiting resistor 14 is connected to the anode side of the diode 15, but is not limited to this, and may be connected to the cathode side.
  • the second drive circuits 13x to 13z for driving the lower switching elements 70x to 70z have basically the same configuration as the first drive circuits 13r to 13t shown in FIG. However, in the second drive circuit 13x to 13z, the diode 15 may not be provided. The reason will be explained. As shown in FIG. 1, the second drive circuits 13x to 13z are configured to eliminate the need for the diode 15 because the negative electrode of the capacitor 9 can be shared, and the bootstrap capacitor 18 is constantly charged.
  • the control device 10 outputs a control signal 61 for turning on / off the switching elements 70r to 70t and 70x to 70z to the first drive circuits 13r to 13t and the second drive circuits 13x to 13z.
  • the control device 10 includes a charging phase determination unit 10a and a control signal generation unit 10b.
  • FIG. 3 is a block diagram showing the configuration of the control device 10 of the harmonic suppression device 4 according to the first embodiment.
  • the charging phase determining unit 10a determines the phase for charging the bootstrap capacitor 18 from the upper switching elements 70r to 70t of the R phase, the S phase, and the T phase.
  • the control signal generation unit 10b generates a control signal 61 for suppressing the harmonic current.
  • the control device 10 is composed of a processing circuit.
  • the processing circuit is composed of dedicated hardware or a processor.
  • the dedicated hardware is, for example, an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array).
  • the processor executes a program stored in memory.
  • the control device 10 has a memory.
  • the memory is a non-volatile or volatile semiconductor memory such as RAM (RandomAccessMemory), ROM (ReadOnlyMemory), flash memory, EPROM (ErasableProgrammableROM), or a disk such as a magnetic disk, flexible disk, or optical disk. Is.
  • the load current detection unit 11 shown in FIG. 1 detects the load current input from the AC power supply 2 to the harmonic generation load 3.
  • the load current detection unit 11 has a load current detection unit 11r and 11t.
  • the load current detection unit 11r detects the load current flowing through the first output line (R phase) of the AC power supply 2, and the load current detection unit 11t flows through the third output line (T phase) of the AC power supply 2.
  • Detect load current The load current detection units 11r and 11t are connected to the control device 10, and transmit the current information of the detected load current to the control device 10.
  • the second output line (S phase) of the AC power supply 2 is not provided with a load current detection unit for detecting the load current.
  • the load current flowing through the second output line (S phase) is based on the load current flowing through the first output line (R phase) and the load current flowing through the third output line (T phase) by the control device 10. , Obtained by calculation.
  • the second output line (S phase) of the AC power supply 2 may be provided with a load current detection unit for detecting the load current flowing through the second output line (S phase).
  • the load current detection unit 11 is composed of, for example, a current sensor.
  • the compensation current detection unit 12 shown in FIG. 1 detects the compensation current output from the harmonic suppression device 4 in order to suppress the harmonic current generated from the harmonic generation load 3.
  • the compensation current detection unit 12 has compensation current detection units 12a and 12c.
  • the compensation current detection unit 12a is provided between the reactor 8a and the midpoint 72a (R phase), and detects the compensation current flowing therethrough.
  • the compensation current detection unit 12c is provided between the reactor 8c and the midpoint 72c (T phase), and detects the compensation current flowing therethrough.
  • the compensation current detection units 12a and 12c are connected to the control device 10, and transmit the current information of the detected compensation current to the control device 10. In the example of FIG.
  • a compensation current detection unit for detecting the compensation current flowing therethrough is not provided between the reactor 8b and the midpoint 72b (S phase). Therefore, the control device 10 flows between the reactor 8b and the midpoint 72b based on the compensation current of the R phase detected by the compensation current detection unit 12a and the compensation current of the T phase detected by the compensation current detection unit 12c.
  • the S-phase compensation current is calculated.
  • a compensation current detection unit may be provided between the reactor 8b and the midpoint 72b (S phase).
  • the compensation current detection unit 12 is composed of, for example, a current sensor.
  • the harmonic suppression device 4 turns on the lower switching elements 70x to 70z of the switching circuit 7 to charge the bootstrap capacitors 18 of the first drive circuits 13r to 13t that drive the upper switching elements 70r to 70t.
  • the harmonic suppression device 4 charges the bootstrap capacitor 18 when a load current is generated from the harmonic generation load 3
  • the upper switching elements 70r to 70t of the phase to be charged are simply referred to as upper switching elements 70
  • the lower switching elements 70x to 70z of the phase are simply referred to as lower switching elements. It will be called 70.
  • the phase to be charged is referred to as a charging phase.
  • the first drive circuits 13r to 13t of the upper switching elements 70r to 70t are simply referred to as drive circuits 13.
  • the control voltage of the control power supply 16 becomes higher than the potential of the midpoint 72.
  • the current may flow through the diode 71 connected in antiparallel to the lower switching element 70 of the charging phase, or the lower switching element 70 may be driven ON.
  • power is supplied from the control power supply 16 to the bootstrap capacitor 18 via the current limiting resistor 14 and the diode 15.
  • the charge phase determination unit 10a of the control device 10 minimizes the load current based on the load current of the harmonic generation load 3 detected by the load current detection unit 11. Select a phase. The selected phase becomes the charging phase.
  • the control signal generation unit 10b of the control device 10 generates a control signal 61 for driving the lower switching element corresponding to the charging phase in order to charge the bootstrap capacitor 18 of the charging phase.
  • the control signal 61 designates the duty ratio of the lower switching element 70 of the charging phase in the range of 0% ⁇ duty ratio ⁇ 100%.
  • the charging period of the bootstrap capacitor 18 of each phase is set during one cycle of the load current. It becomes present, and the startability of the upper switching element 70 is improved.
  • the duty ratio of the lower switching element 70x to 70z needs to be set in the range exceeding 0%. This range is a range in which the decrease in the charge amount of the bootstrap capacitor 18 is small.
  • the control device 10 determines whether or not an imbalance has occurred in the AC power supply 2 as follows. That is, the control device 10 compares the effective values of the load currents of each phase, and determines whether or not the ratio of the phase having the maximum value and the phase having the minimum value of the load current is equal to or greater than the threshold U. When the ratio is less than the threshold value U, it is determined that no imbalance has occurred in the AC power supply 2. On the other hand, when the ratio is equal to or higher than the threshold value U, it is determined that an imbalance has occurred in the AC power supply 2. At this time, the threshold value U may be changed depending on the magnitude of the load current. Alternatively, it may be a predetermined fixed value.
  • the charging phase determination unit 10a of the control device 10 detects a period in which almost no current flows in all the phases, and the charging phase is based on the phase charged in the period immediately before the period. To determine. After that, the control signal generation unit 10b needs to generate a control signal 61 for driving the lower switching element 70 of the charging phase to charge the bootstrap capacitor 18 of the upper switching element 70 of the charging phase.
  • the charging phase determination unit 10a uses the size of the effective value or the average value of the absolute values of the load currents of each phase, and the size of the phase having the maximum value and the phase having the minimum value. It is determined whether or not the ratio of the current is equal to or higher than the preset threshold value P. That is, it is determined whether or not the division result obtained by dividing the maximum phase size by the minimum phase size is equal to or greater than the threshold value P. When the ratio of the magnitudes of the maximum phase and the minimum phase is equal to or greater than the threshold value P, the charging phase determination unit 10a determines a period in which almost no current flows. This period is called the first period.
  • the charging phase determination unit 10a determines the charging phase based on the phase charged in the period immediately before the first period.
  • the load currents of the R phase, the S phase, and the T phase change periodically as shown in FIG.
  • FIG. 8 is a diagram showing an example of load currents of R-phase, S-phase, and T-phase of a rectifier to which a three-phase AC power supply having a DC reactor and a smoothing capacitor is input.
  • the horizontal axis represents the phase and the vertical axis represents the load current.
  • the solid line 80 shows the load current of the R phase
  • the broken line 81 shows the load current of the S phase
  • the dotted line 82 shows the load current of the T phase.
  • the period (1) is the period in which the load current of the T phase is the minimum
  • the period (2) is the period in which the load current of the R phase is the minimum
  • the period (3) is the period in which the load current of the S phase is the minimum.
  • the load currents of the R phase, S phase, and T phase change periodically, and the phases that minimize the load current are the R phase, S phase, T phase, R phase, S phase, and so on. It becomes in order. Therefore, when the phase charged in the 0th period immediately before the 1st period is the R phase, the phase with the smallest load current is the S phase, so that the charging phase determination unit 10a is the first phase.
  • the charging phase of the period is determined to be the S phase.
  • FIG. 4 is a diagram showing an example of ON / OFF operation of the load currents of the R phase, the S phase, and the T phase and the lower switching elements 70x to 70z when the AC power supply 2 is in equilibrium.
  • the horizontal axis represents the phase and the vertical axis represents the load current. Further, in FIG. 4B, the horizontal axis indicates the phase and the vertical axis indicates the ON / OFF operation.
  • the dotted line indicates the timing at which the phase with the minimum load current is switched.
  • the period (1) is the period in which the load current of the T phase is the minimum
  • the period (2) is the period in which the load current of the R phase is the minimum
  • the period (3) is the period in which the load current of the S phase is the minimum. The minimum period. Therefore, in order to charge the bootstrap capacitor 18 of the first drive circuit 13, a control signal having a duty ratio in the range of 0% ⁇ duty ratio ⁇ 100% may be generated during this period.
  • FIG. 4 is a diagram showing an example of ON / OFF operation of the lower switching elements 70x to 70z according to the first embodiment.
  • FIG. 4A is a waveform diagram showing the waveform of the load current generated by the harmonic generation load 3 flowing through the AC power supply 2.
  • FIG. 4B is a waveform diagram showing the operation waveforms of the drive signals 62x, 62y and 62z for turning on / off the lower switching elements 70x to 70z.
  • the charging phase is determined based on the load current, so that one cycle occurs when the AC power supply 2 is unbalanced.
  • the period during which current flows is shorter than at equilibrium. Therefore, the control device 10 obtains the ratio of the difference between the phase having the maximum load current and the phase having the minimum load current to the average of the load currents of all the phases from the load current of each phase as the unbalance rate. Then, the control device 10 limits the charging period by the unbalance rate for the phase having the smallest load current based on the effective value of the load current. As a result, the bootstrap capacitor 18 can be charged without a steep large current.
  • the charge amount in one cycle is not sufficient, charging is repeatedly performed over a period of a plurality of cycles until the charge amount of the bootstrap capacitor 18 becomes equal to or higher than the threshold value H (first threshold value). As a result, the amount of charge can be secured. If the imbalance of the power supply caused by the operation of the harmonic generation load 3 other than the air conditioning system 1 is eliminated, the unbalance rate of the load current becomes smaller and the limitation of the charging period is lifted. The charging time can be shortened. Further, if the charge period that can be limited is increased, the capacity of the bootstrap capacitor 18 becomes large. Therefore, it is desirable to limit the charge amount within a range where the decrease in the charge amount is small according to the capacity of the bootstrap capacitor 18.
  • FIG. 5 is a diagram showing an example of a first drive circuit 13 having a control voltage adjusting circuit 20 for suppressing heat generation of the harmonic suppression device 4 according to the first embodiment.
  • a control voltage adjusting circuit 20 In the first drive circuit 13 shown in FIG. 5, a control voltage adjusting circuit 20, a memory 21, a bootstrap control circuit 24, and a switching circuit 25 are added to the configuration of FIG.
  • a switching signal determined based on the operating state of the harmonic suppression device 4 is input from the control device 10 to the control voltage adjustment circuit 20.
  • the control voltage adjustment circuit 20 determines the maximum voltage for charging the bootstrap capacitor 18 based on the switching signal. At this time, when the load current detected by the load current detection unit 11 is equal to or higher than the threshold value G (third threshold value), the amount of heat generated by the switching element is large, so that the control device 10 has a first load current value. Output the switching signal.
  • the control voltage adjustment circuit 20 raises the control voltage of the control power supply 16 by, for example, a certain amount, based on the first switching signal. This suppresses the loss of the switching element.
  • the control device 10 when the load current is less than the threshold value G, the calorific value of the switchon element is relatively small, so that there is a temperature margin in operation. In this case, the control device 10 outputs the second switching signal based on the value of the load current.
  • the control voltage adjustment circuit 20 lowers the control voltage of the control power supply 16 by, for example, a certain amount, based on the second switching signal. As a result, although the switching loss increases, the noise during switching can be reduced.
  • the adjustment in the control voltage adjustment circuit 20 is divided into two stages, one above the threshold value and one below the threshold value, but the adjustment may be further subdivided according to the value of the load current or the operating state of the harmonic suppression device 4.
  • the memory 21 stores a plurality of charging methods as the charging method of the bootstrap capacitor 18 of the harmonic suppression device 4.
  • the memory 21 has a first storage unit 22 that stores the first charging method and a second storage unit 23 that stores the second charging method.
  • the first charging method stored in the first storage unit 22 is a charging method for the bootstrap capacitor 18 based on the load current.
  • the first charging method is applied when the harmonic generation load 3 is in an operating state and the AC power supply 2 is unbalanced or the power supply impedance is larger than the threshold value I.
  • the second charging method stored in the second storage unit 23 is a charging method for the bootstrap capacitor 18 based on the power supply voltage of the AC power supply 2 (see, for example, Patent Document 1).
  • the second charging method is applied when the AC power supply 2 is normal or when the load current detection unit 11 does not detect the load current.
  • the duty ratio of the corresponding lower switching element is limited to 100% or less, which exceeds 0%, based on the phase of the AC power supply 2, and the lower switching element is switched. As a result, the bootstrap capacitor 18 of the drive circuit 13 of the upper switching element is charged.
  • the control device 10 may output a switching signal based only on the load current, but when other parameters such as the state of the AC power supply 2 and the value of the power supply impedance are also used for the determination, the determination table is stored in advance in the memory. You may remember it in. In that case, the control device 10 determines in advance what conditions are satisfied to output the first switching signal and what conditions are satisfied to output the second switching signal. Is stored in the memory. Then, the switching signal may be output based on the determination table.
  • the switching circuit 25 reads the first charging method from the first storage unit 22 or reads the second charging method from the second storage unit 23 according to the switching signal. As a result, the bootstrap control circuit 24 uses the selected charging method and the detected value corresponding to the charging method among the detected values of the load current or the power supply voltage to make the bootstrap capacitor 18.
  • a control signal for charging is output to the drive IC 17.
  • the first charging method stored in the first storage unit 22 is applied when the load current is detected while the harmonic generation load 3 is in operation and the AC power supply 2 is unbalanced or has a large power supply impedance. ..
  • the second charging method stored in the second storage unit 23 is applied when the power supply of the AC power supply 2 is normal or when the load current is not detected. In this way, by switching between the first charging method and the second charging method according to the state of the AC power supply 2 or the load current, the state of the AC power supply 2 and the load current of the harmonic generation load 3 can be changed.
  • the bootstrap capacitor 18 can be charged regardless of the state.
  • the first charging method stored in the first storage unit 22 is applied, but the second charging method stored in the second storage unit 23 is not limited to that case.
  • a charging method may be applied.
  • the operation of switching the charging method is not performed while the bootstrap capacitor 18 is being charged. Therefore, the control device 10 does not change the output of the switching signal while charging the bootstrap capacitor 18.
  • the bootstrap capacitor 18 of the charging phase when the load current does not flow as in the above configuration and operation, the bootstrap capacitor 18 of the charging phase is charged based on the power supply voltage. When the load current flows, the bootstrap capacitor 18 of the charging phase is charged based on the load current. As a result, the influence of the distortion superimposed on the voltage of the AC power supply 2 or the influence of the imbalance of the AC power supply 2 can be suppressed to the minimum, so that the harmonic suppression device 4 can be started smoothly. can do. Further, in the first embodiment, there is a problem that the harmonic suppression device 4 cannot be started due to the flow of a steep large current due to the fact that the harmonic suppression device 4 cannot correctly recognize the phase of the AC power supply 2. It will be resolved. Therefore, even when the air conditioning system 1 and the harmonic suppression device 4 are operating in cooperation with each other, there is no problem that the operation of the air conditioning system 1 is hindered by the inability to start the harmonic suppression device 4.
  • a charging method in which a part of the steps is deleted from the flow of FIG. 6 or FIG. 7 described later, or a charging method in which some steps are added to the flow of FIG. 6 or FIG. 7 described later are also prepared. May be good.
  • those charging methods are stored in the memory 21 in advance as the third charging method, the fourth charging method, and the like, and one of them is selected by the switching signal from the control device 10. Use.
  • the switching elements 70r to 70t and 70x to 70z of the harmonic suppression device 4 according to the first embodiment may be composed of a wide bandgap semiconductor.
  • the wide bandgap semiconductor is, for example, GaN (gallium nitride), SiC (silicon carbide), or diamond.
  • the upper switching elements 70r to 70t and the lower switching elements 70x to 70z are composed of a wide bandgap semiconductor.
  • Wide bandgap semiconductors have a high withstand voltage and a high allowable current density. Therefore, the switching elements 70r to 70t and 70x to 70z can be miniaturized. As a result, it is possible to reduce the size of the semiconductor module incorporating such switching elements 70r to 70t and 70x to 70z. Further, since the wide bandgap semiconductor has good heat resistance, the heat sink for the switching elements 70r to 70t and 70x to 70z can be miniaturized.
  • the on-resistance is low, the conduction loss is small, and the switching loss is also small.
  • the amount of gate charge required is also small, the charging time of the bootstrap capacitor 18 is shortened.
  • FIG. 6 is a flowchart illustrating an example of charge control of the bootstrap capacitor 18 of the harmonic suppression device 4 according to the first embodiment.
  • FIG. 6 shows a flow when a load current is generated in all of the R phase, the S phase, and the T phase. That is, the flow of FIG. 6 corresponds to the first charging method stored in the first storage unit 22 shown in FIG. The flow of FIG. 6 is applied when the load current is flowing in all phases.
  • Step S1 The control device 10 determines whether the effective value of the load currents of the R phase, the S phase, and the T phase is larger than the threshold value A.
  • the threshold value A is a preset value, and is a charging start threshold value for determining whether or not charging is started. If the effective value of the load current exceeds the threshold value A, the harmonic suppression device 4 proceeds to step S2. On the other hand, if the effective value of the load current does not exceed the threshold value A, the process of FIG. 6 is terminated as it is.
  • Step S2 The control device 10 detects the phase having the smallest load current from the R phase, the S phase, and the T phase.
  • Step S3 The control device 10 sets a threshold value B of the load current for starting charging of each phase based on the minimum value of the load current of the previous charging phase.
  • the threshold value B may be a preset fixed value.
  • Step S4 The control device 10 determines whether the load current of the R phase is the smallest among the R phase, the S phase, and the T phase. The control device 10 proceeds to step S5 when the load current of the R phase is the smallest. On the other hand, if the load current of the R phase is not the smallest, the process proceeds to step S7.
  • Step S5 The control device 10 determines whether the load current of the R phase is below the threshold value B. If the load current of the R phase is below the threshold value B, the control device 10 proceeds to step S6. On the other hand, if the load current of the R phase is not lower than the threshold value B, the process is terminated as it is.
  • Step S6 The control device 10 outputs a control signal 61 for charging the bootstrap capacitor 18 of the R-phase drive circuit 13r.
  • the drive IC 17 outputs a drive signal 62 for driving the lower switching element 70x.
  • the lower switching element 70x is driven ON, and the bootstrap capacitor 18 of the R-phase drive circuit 13r is charged.
  • Step S7 The control device 10 determines whether the load current of the S phase is the smallest among the R phase, the S phase, and the T phase. The control device 10 proceeds to step S8 when the load current of the S phase is the smallest. On the other hand, if the load current of the S phase is not the smallest, the process proceeds to step S10.
  • Step S8 The control device 10 determines whether the load current of the S phase is below the threshold value B. The control device 10 proceeds to step S9 when the load current of the S phase is below the threshold value B. On the other hand, if the load current of the S phase is not lower than the threshold value B, the process is terminated as it is.
  • Step S9 The control device 10 outputs a control signal 61 for charging the bootstrap capacitor 18 of the S-phase drive circuit 13s.
  • the drive IC 17 outputs a drive signal 62 for driving the lower switching element 70y.
  • the lower switching element 70y is driven ON, and the bootstrap capacitor 18 of the S-phase drive circuit 13s is charged.
  • Step S10 The control device 10 determines whether the load current of the T phase is below the threshold value B. The control device 10 proceeds to step S11 when the load current of the T phase is below the threshold value B. On the other hand, if the load current of the T phase is not lower than the threshold value B, the process is terminated as it is.
  • Step S11 The control device 10 outputs a control signal 61 for charging the bootstrap capacitor 18 of the T-phase drive circuit 13t.
  • the drive IC 17 outputs a drive signal 62 for driving the lower switching element 70z.
  • the lower switching element 70z is driven ON, and the bootstrap capacitor 18 of the T-phase drive circuit 13t is charged.
  • FIG. 7 is a flowchart illustrating an example of charge control of the bootstrap capacitor 18 in the harmonic suppression device 4 when there is a phase in which the load current does not occur in the first embodiment. That is, the flow of FIG. 7 corresponds to the first charging method stored by the second storage unit 22 shown in FIG. The flow of FIG. 7 is applied when there is a phase in which the load current does not flow.
  • Step S21 The control device 10 selects a phase having the largest effective value and a phase having the smallest effective value from the effective values of the load currents of the R phase, the S phase, and the T phase.
  • the effective value of the maximum phase is referred to as the maximum effective value
  • the effective value of the minimum phase is referred to as the minimum effective value.
  • the control device 10 determines whether or not the ratio of the maximum effective value to the minimum effective value is equal to or greater than the threshold value P. When the ratio is equal to or higher than the threshold value P, the control device 10 proceeds to step S22. On the other hand, when the ratio is less than the threshold value P, the control device 10 ends the process as it is.
  • Step S22 The control device 10 determines whether or not the load currents of all the phases of the R phase, the S phase, and the T phase are equal to or less than the preset threshold value Q (second threshold value). The control device 10 proceeds to step S23 when the load currents of all the phases of the R phase, the S phase, and the T phase are equal to or less than the threshold value Q. On the other hand, if the load current of at least one of the R phase, the S phase and the T phase exceeds the threshold value Q, the control device 10 ends the process as it is.
  • Step S23 The control device 10 detects the first period in which the load currents of all the phases of the R phase, the S phase, and the T phase are equal to or less than the threshold value Q. The control device 10 determines whether the charged phase is the R phase when the load current in the period immediately before the first period is flowing. The control device 10 proceeds to step S24 when the charged phase is the R phase. On the other hand, if it is not the R phase, the process proceeds to step S25.
  • Step S24 The control device 10 sets the S phase as the charging phase of the bootstrap capacitor 18.
  • Step S25 The control device 10 determines whether the charged phase is the S phase when the load current in the period immediately before the first period is flowing. The control device 10 proceeds to step S26 when the charged phase is the S phase. On the other hand, if it is not the S phase, the process proceeds to step S27.
  • Step S26 The control device 10 sets the T phase as the charging phase of the bootstrap capacitor 18.
  • Step S27 The control device 10 determines whether the charged phase is the T phase when the load current in the period immediately before the first period is flowing. The control device 10 proceeds to step S28 when the charged phase is the T phase. On the other hand, if it is not the T phase, the process is terminated as it is.
  • Step S28 The harmonic suppression device 4 sets the R phase as the charging phase of the bootstrap capacitor 18.
  • Step S29 The control device 10 determines whether the charging start delay time has elapsed in order to charge the bootstrap capacitor 18 of the charging phase at the timing of wanting to charge while the load current of all the phases is below the threshold value Q and hardly flows. do. If the charging start delay time has elapsed, the control device 10 proceeds to step S30. On the other hand, if the charge start delay time has not elapsed, the process ends as it is.
  • Step S30 The control device 10 charges the bootstrap capacitor 18 of the charging phase.
  • the control device 10 detects the phase having the smallest load current as the charging phase.
  • the control device 10 charges the bootstrap capacitor when the load current of the charging phase falls below the threshold value B determined based on the minimum value of the load current of the previous charging phase.
  • the control device 10 uses the R phase.
  • the maximum effective value and the minimum effective value are selected from the effective values of the load currents of the S phase and the T phase.
  • the control device 10 determines the first period in which almost no current flows in all the phases.
  • the control device 10 determines the phase detected in the period immediately before the first period, and determines the charging phase based on the phase.
  • the harmonic suppression device 4 of the first embodiment charges based on the load current when the load current flows, and charges based on the power supply voltage when the load current does not flow. Distortion may be superimposed on the power supply voltage of the AC power supply 2 because the voltage imbalance of the AC power supply 2 is significant or the power supply impedance is large. In the first embodiment, even in such a case, the bootstrap capacitor 18 for driving the upper switching element can be charged without being affected by the AC power supply 2. As a result, the harmonic suppression device 4 can be stably started.
  • a method of detecting the power supply voltage and the phase to determine the charging phase can be considered, but when distortion is superimposed on the power supply voltage, the phase of the AC power supply 2 is correctly recognized. Can't. In that case, in the worst case, the harmonic suppression device 4 may not be activated. In the first embodiment, the problem can be solved, and as described above, the harmonic suppression device 4 can be stably started.
  • the phase information of the AC power supply 2 is not stable by the conventional charging method.
  • the bootstrap capacitor 18 is charged using the phase information of the power supply, the power supply phase information is not stable, so that the charging timing is deviated and the harmonic suppression device 4 may not be started due to the overcurrent.
  • the charging timing of the bootstrap capacitor 18 is determined from the load current, such an overcurrent problem can be avoided.
  • the boot strap capacitor 18 of the harmonic suppression device 4 is charged when the load current of the phase having the minimum load current falls below the threshold value B determined from the minimum value of the previous load current. implement.
  • the load current for starting charging of the bootstrap capacitor 18 may be a predetermined fixed value.
  • the ratio of the effective value current of the phase having the maximum effective value among the phases in which the load current flows and the phase in which the load current does not flow is obtained.
  • the charging phase is determined based on the phase charged immediately before the period in which the load current hardly flows, and charging is performed.
  • the harmonic suppression device 4 is not affected even when an element that affects the determination of the power supply voltage phase such as distortion is superimposed on the AC power supply 2. Therefore, the harmonic suppression device 4 can charge the bootstrap capacitor 18 without short-circuiting the power supply.
  • 1 air conditioning system 2 AC power supply, 3 harmonic generation load, 4 harmonic suppression device, 5 refrigerant circuit, 6 ripple filter, 7 switching circuit, 8 reactor, 8a reactor, 8b reactor, 8c reactor, 9 condenser, 10 control Device, 10a Charging phase determination unit, 10b Control signal generation unit, 11 Load current detection unit, 11r Load current detection unit, 11t Load current detection unit, 12 Compensation current detection unit, 12a Compensation current detection unit, 12c Compensation current detection unit, 13 drive circuit, 13r 1st drive circuit, 13s 1st drive circuit, 13t 1st drive circuit, 13x 2nd drive circuit, 13y 2nd drive circuit, 13z 2nd drive circuit, 14 current limiting resistance, 15 diode, 16 control Power supply, 18 bootstrap capacitor, 20 control voltage adjustment circuit, 21 memory, 22 1st storage unit, 23 2nd storage unit, 24 bootstrap control circuit, 25 switching circuit, 30 rectifier, 31 DC reactor, 32 smoothing capacitor, 50 Compressor, 51 heat exchanger, 52 heat exchanger, 53 expansion valve,

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Abstract

A harmonic suppression device comprises: a rectifier in which a plurality of vertical arms are connected in parallel, an upper-side switching element and a lower-side switching element being connected in series in each vertical arm, and the phases of an AC power source being connected at a center point that is the connection point between the upper-side switching element and the lower-side switching element; a load current detection unit that detects the load current inputted to a harmonic generation load from the AC power source; a first and second drive circuit that turn the upper-side switching element and the lower-side switching element on and off; and a control device that generates a control signal for causing the first and second drive circuits to turn the upper-side switching element and the lower-side switching element on and off, the control device selecting, from among the load currents of the phases of the AC power source, the phase for which the load current is smallest as a charging phase, and turning the lower-side switching element corresponding to the charging phase in the second drive circuit on and off, whereby the bootstrap capacitor of the first drive circuit corresponding to the charging phase is charged.

Description

高調波抑制装置および空気調和システムHarmonic suppressor and air conditioning system
 本開示は、系統電源へ流れる電流の高調波成分を抑制する高調波抑制装置、および、それを備えた空気調和システムに関する。 The present disclosure relates to a harmonic suppression device that suppresses a harmonic component of a current flowing through a system power supply, and an air conditioning system equipped with the harmonic suppression device.
 従来の高調波抑制装置として、整流器を構成する上側スイッチング素子と下側スイッチング素子とをON/OFF動作させる駆動回路が、ブートストラップコンデンサーを有しているものがある(例えば、特許文献1参照)。上側スイッチング素子と下側スイッチング素子とは直列接続されてレグを構成している。整流器は、複数のレグが並列接続されて構成されている。 As a conventional harmonic suppression device, a drive circuit for turning on / off an upper switching element and a lower switching element constituting a rectifier has a bootstrap capacitor (see, for example, Patent Document 1). .. The upper switching element and the lower switching element are connected in series to form a leg. The rectifier is configured by connecting a plurality of legs in parallel.
 特許文献1では、ブートストラップコンデンサーが、各レグの上側スイッチング素子を駆動させるための電源として作用する。ブートストラップコンデンサーは、制御電源から充電される。 In Patent Document 1, the bootstrap capacitor acts as a power source for driving the upper switching element of each leg. The bootstrap capacitor is charged from the control power supply.
 特許文献1では、高調波抑制動作を起動のためのブートストラップコンデンサーの充電のために、交流電源電圧の位相に基づいて、充電したい相の下側スイッチング素子を、交流電源の相電圧が最小の位相をとるときに常時ON動作させる。また、交流電源の相電圧が最小の位相ではなく、かつ、負極性であるときに、PWM制御を実施する。 In Patent Document 1, for charging the bootstrap capacitor for activating the harmonic suppression operation, the lower switching element of the phase to be charged is based on the phase of the AC power supply voltage, and the phase voltage of the AC power supply is the minimum. Always turn on when taking phase. Further, PWM control is performed when the phase voltage of the AC power supply is not the minimum phase and is negative.
 特許文献1で示される高調波抑制装置では、当該PWM制御を行うことにより、交流電源電圧の位相が最小相のときのみ常時ON動作させる場合と比較して、以下の効果を得ている。すなわち、交流電源電圧の位相が最小相ではなく、かつ、負極性であるときにおいても、急峻な大電流とならないレベルの電源短絡電流を流して、強制的にブートストラップコンデンサーを充電するため、充電時間を短縮できる。 In the harmonic suppression device shown in Patent Document 1, by performing the PWM control, the following effects are obtained as compared with the case where the AC power supply voltage is always turned on only when the phase is the minimum phase. That is, even when the phase of the AC power supply voltage is not the minimum phase and is negative, a power supply short-circuit current at a level that does not result in a steep large current is passed to forcibly charge the bootstrap capacitor. You can save time.
特開2012-50177号公報Japanese Unexamined Patent Publication No. 2012-50177
 上記の特許文献1の場合、交流電源電圧の状態に基づいて、ブートストラップコンデンサーの充電を実施している。そのため、交流電源電圧の不平衡が著しい場合、あるいは、電源側のインピーダンスが大きい等の理由により交流電源の電源電圧に歪みが重畳している場合には、交流電源電圧の位相を正しく認識することができない。これにより、本来とは異なる充電期間で充電を開始してしまい、想定よりも急峻な大電流が流れてしまうという問題点があった。 In the case of Patent Document 1 above, the bootstrap capacitor is charged based on the state of the AC power supply voltage. Therefore, if the imbalance of the AC power supply voltage is significant, or if distortion is superimposed on the power supply voltage of the AC power supply due to a large impedance on the power supply side, etc., the phase of the AC power supply voltage should be recognized correctly. I can't. As a result, charging starts in a charging period different from the original one, and there is a problem that a large current steeper than expected flows.
 また、上記の特許文献1には、高調波発生負荷の整流後に、リアクターの電流に基づいて、ブートストラップコンデンサーを充電する手段が記載されている。この場合、高調波抑制するための整流前の負荷電流の電流検出手段の他に、整流後のリアクターの電流検出手段が新たに必要になる。さらに、リアクターの電流だけでは、検出した電流がどの相からの電流によるものか判別できないため、電源電圧および位相を検出する手段が必要となる。 Further, Patent Document 1 described above describes a means for charging a bootstrap capacitor based on a reactor current after rectification of a harmonic generation load. In this case, in addition to the load current current detecting means before rectification for suppressing harmonics, a new current detecting means for the reactor after rectification is required. Further, since it is not possible to determine from which phase the detected current is derived from the reactor current alone, a means for detecting the power supply voltage and the phase is required.
 本開示は、かかる課題を解決するためになされたもので、交流電源の影響を受けることなく、ブートストラップコンデンサーを充電することが可能な、高調波抑制装置およびそれを備えた空気調和システムを得ることを目的とする。 This disclosure is made to solve such a problem, and obtains a harmonic suppression device capable of charging a bootstrap capacitor without being affected by an AC power source and an air conditioning system equipped with the harmonic suppression device. The purpose is.
 本開示に係る高調波抑制装置は、交流電源に接続された高調波発生負荷と並列に接続され、前記高調波発生負荷が発生する高調波を抑制する高調波抑制装置であって、上側スイッチング素子と下側スイッチング素子とが直列に接続された複数の上下アームが並列接続され、前記上側スイッチング素子と前記下側スイッチング素子との接続点である中点に前記交流電源の各相が接続された、整流器と、前記交流電源から前記高調波発生負荷に入力される負荷電流を検出する負荷電流検出部と、前記上側スイッチング素子をON/OFF動作させる第1駆動回路と、前記下側スイッチング素子をON/OFF動作させる第2駆動回路と、前記上側スイッチング素子および前記下側スイッチング素子の前記ON/OFF動作を前記第1駆動回路および前記第2駆動回路に実施させる制御信号を生成する制御装置とを備え、前記第1駆動回路は、前記上側スイッチング素子を駆動させる電源として作用するブートストラップコンデンサーと、前記ブートストラップコンデンサーを充電させる制御電源とを有し、前記制御装置は、前記交流電源の各相の前記負荷電流の中で、前記負荷電流が最小となる相を充電相として選択して、前記第2駆動回路に前記充電相に対応する前記下側スイッチング素子をON/OFF動作させることで、前記充電相に対応する前記第1駆動回路の前記ブートストラップコンデンサーを充電するものである。 The harmonic suppression device according to the present disclosure is a harmonic suppression device that is connected in parallel with a harmonic generation load connected to an AC power supply and suppresses the harmonics generated by the harmonic generation load, and is an upper switching element. A plurality of upper and lower arms in which the lower switching element and the lower switching element are connected in series are connected in parallel, and each phase of the AC power supply is connected to a middle point which is a connection point between the upper switching element and the lower switching element. , A rectifier, a load current detector that detects a load current input from the AC power supply to the harmonic generation load, a first drive circuit that turns the upper switching element ON / OFF, and the lower switching element. A second drive circuit that operates ON / OFF, and a control device that generates a control signal that causes the first drive circuit and the second drive circuit to perform the ON / OFF operation of the upper switching element and the lower switching element. The first drive circuit has a bootstrap condenser that acts as a power source for driving the upper switching element and a control power supply for charging the bootstrap condenser, and the control device is a control power source for each of the AC power supplies. Among the load currents of the phase, the phase having the minimum load current is selected as the charging phase, and the lower switching element corresponding to the charging phase is operated ON / OFF in the second drive circuit. , The bootstrap condenser of the first drive circuit corresponding to the charging phase is charged.
 本開示に係る高調波抑制装置によれば、電源電圧に歪みが重畳している場合においても、交流電源の影響を受けることなく、上側スイッチング素子を駆動させるためのブートストラップコンデンサーを充電することができる。 According to the harmonic suppression device according to the present disclosure, even when distortion is superimposed on the power supply voltage, the bootstrap capacitor for driving the upper switching element can be charged without being affected by the AC power supply. can.
実施の形態1に係る高調波抑制装置4を備えた空気調和システム1の概略構成を示す回路ブロック図である。It is a circuit block diagram which shows the schematic structure of the air conditioning system 1 provided with the harmonic suppression device 4 which concerns on Embodiment 1. FIG. 実施の形態1に係る高調波抑制装置4における第1駆動回路13r~13tの構成を示す回路構成図である。It is a circuit block diagram which shows the structure of the 1st drive circuit 13r to 13t in the harmonic suppression apparatus 4 which concerns on Embodiment 1. FIG. 実施の形態1に係る高調波抑制装置4の制御装置10の構成を示したブロック図である。It is a block diagram which showed the structure of the control apparatus 10 of the harmonic suppression apparatus 4 which concerns on Embodiment 1. FIG. 実施の形態1に係る下側スイッチング素子70x~70zのON/OFF動作の一例を示す図である。It is a figure which shows an example of the ON / OFF operation of the lower switching element 70x to 70z which concerns on Embodiment 1. FIG. 実施の形態1に係る高調波抑制装置4の発熱を抑制するための制御電圧調整回路20を有する第1駆動回路13の一例を示す図である。It is a figure which shows an example of the 1st drive circuit 13 which has the control voltage adjustment circuit 20 for suppressing the heat generation of the harmonic suppression apparatus 4 which concerns on Embodiment 1. FIG. 実施の形態1に係る高調波抑制装置4のブートストラップコンデンサー18の充電制御例を説明するフローチャートである。It is a flowchart explaining the charge control example of the boot strap capacitor 18 of the harmonic suppression apparatus 4 which concerns on Embodiment 1. FIG. 実施の形態1における負荷電流が発生しない相がある場合の高調波抑制装置4におけるブートストラップコンデンサー18の充電制御例を説明するフローチャートである。It is a flowchart explaining the charge control example of the bootstrap capacitor 18 in the harmonic suppression apparatus 4 when there is a phase which does not generate a load current in Embodiment 1. FIG. R相、S相、T相の負荷電流を示す図である。It is a figure which shows the load current of R phase, S phase, and T phase. 実施の形態1に係る高調波抑制装置4の設置方法を模式的に示す図である。It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1. FIG. 実施の形態1に係る高調波抑制装置4の設置方法を模式的に示す図である。It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1. FIG. 実施の形態1に係る高調波抑制装置4の設置方法を模式的に示す図である。It is a figure which shows typically the installation method of the harmonic suppression apparatus 4 which concerns on Embodiment 1. FIG.
 以下、本開示に係る高調波抑制装置および空気調和システムの実施の形態について図面を参照して説明する。本開示は、以下の実施の形態に限定されるものではなく、本開示の主旨を逸脱しない範囲で種々に変形することが可能である。また、本開示は、以下の実施の形態およびその変形例に示す構成のうち、組み合わせ可能な構成のあらゆる組み合わせを含むものである。また、各図において、同一の符号を付したものは、同一の又はこれに相当するものであり、これは明細書の全文において共通している。なお、各図面では、各構成部材の相対的な寸法関係または形状等が実際のものとは異なる場合がある。 Hereinafter, embodiments of the harmonic suppression device and the air conditioning system according to the present disclosure will be described with reference to the drawings. The present disclosure is not limited to the following embodiments, and can be variously modified without departing from the gist of the present disclosure. In addition, the present disclosure includes all combinations of configurations that can be combined among the configurations shown in the following embodiments and modifications thereof. Further, in each figure, those having the same reference numerals are the same or equivalent thereof, which are common to the whole text of the specification. In each drawing, the relative dimensional relationship or shape of each component may differ from the actual one.
 また、本開示の実施の形態に係る各プログラムは、記載された順序に沿って時系列に行われる処理であるが、必ずしも時系列に処理されなくても、並列的または個別に実効される処理を含んでもよい。 Further, each program according to the embodiment of the present disclosure is a process performed in chronological order in the order described, but is a process that is executed in parallel or individually even if it is not necessarily processed in chronological order. May include.
 また、本開示の実施の形態に係る高調波抑制装置および空気調和システムの各機能をハードウェアとソフトウェアのどちらで実現してもよい。各ブロック図における各機能は、回路デバイス等のハードウェアで実現してもよく、あるいは、演算装置上で実効されるソフトウェアで実現してもよい。 Further, each function of the harmonic suppression device and the air conditioning system according to the embodiment of the present disclosure may be realized by either hardware or software. Each function in each block diagram may be realized by hardware such as a circuit device, or may be realized by software implemented on an arithmetic unit.
 実施の形態1.
 図1は、実施の形態1に係る高調波抑制装置4を備えた空気調和システム1の概略構成を示す回路ブロック図である。空気調和システム1において、高調波抑制装置4は、高調波発生負荷3から交流電源2に流れる電流の高調波成分を抑制する。高調波とは、歪みが重畳された波形の中に含まれている、基本波の整数倍の周波数をもつ波のことである。
Embodiment 1.
FIG. 1 is a circuit block diagram showing a schematic configuration of an air conditioning system 1 provided with a harmonic suppression device 4 according to a first embodiment. In the air conditioning system 1, the harmonic suppression device 4 suppresses the harmonic component of the current flowing from the harmonic generation load 3 to the AC power supply 2. A harmonic is a wave having a frequency that is an integral multiple of the fundamental wave contained in the waveform on which distortion is superimposed.
 図1に示すように、空気調和システム1は、系統電源として機能する交流電源2に接続されている。空気調和システム1は、高調波発生負荷3と、高調波抑制装置4と、冷媒回路5とを備えている。交流電源2は、例えば三相交流電源であり、高調波発生負荷3に電力を供給する。以下では、交流電源2から延びている3本の出力線を、それぞれ、第1の出力線(R相)、第2の出力線(S相)、第3の出力線(T相)と呼ぶ。 As shown in FIG. 1, the air conditioning system 1 is connected to an AC power supply 2 that functions as a system power supply. The air conditioning system 1 includes a harmonic generation load 3, a harmonic suppression device 4, and a refrigerant circuit 5. The AC power supply 2 is, for example, a three-phase AC power supply, and supplies electric power to the harmonic generation load 3. Hereinafter, the three output lines extending from the AC power supply 2 are referred to as a first output line (R phase), a second output line (S phase), and a third output line (T phase), respectively. ..
 (高調波発生負荷3の構成)
 高調波発生負荷3の構成について説明する。高調波発生負荷3は、例えば、整流器30、直流リアクトル31、平滑コンデンサー32、逆変換器(図示せず)等を備える電力変換装置であり、冷媒回路5に電力を供給する。整流器30は、交流電源2の交流電圧を直流電圧に整流する。整流器30の出力側には、直流リアクトル31を介して、平滑コンデンサー32が並列接続されている。平滑コンデンサー32は、整流器30から直流リアクトル31を介して入力される直流電圧を平滑する。なお、高調波発生負荷3と冷媒回路5との間には、必要に応じて、インバータ回路を設けるようにしてもよい。
(Structure of harmonic generation load 3)
The configuration of the harmonic generation load 3 will be described. The harmonic generation load 3 is a power conversion device including, for example, a rectifier 30, a DC reactor 31, a smoothing capacitor 32, an inverse converter (not shown), and the like, and supplies electric power to the refrigerant circuit 5. The rectifier 30 rectifies the AC voltage of the AC power supply 2 to a DC voltage. A smoothing capacitor 32 is connected in parallel to the output side of the rectifier 30 via a DC reactor 31. The smoothing capacitor 32 smoothes the DC voltage input from the rectifier 30 via the DC reactor 31. If necessary, an inverter circuit may be provided between the harmonic generation load 3 and the refrigerant circuit 5.
 (冷媒回路5の構成)
 次に、冷媒回路5の構成について説明する。冷媒回路5は、例えば、圧縮機50、2つの熱交換器51および52、および、膨張弁53が、冷媒配管54を介して接続されて構成されている。冷媒回路5は、さらに、四方弁、および、アキュムレータなどを有していてもよい。
(Structure of Refrigerant Circuit 5)
Next, the configuration of the refrigerant circuit 5 will be described. The refrigerant circuit 5 includes, for example, a compressor 50, two heat exchangers 51 and 52, and an expansion valve 53 connected via a refrigerant pipe 54. The refrigerant circuit 5 may further include a four-way valve, an accumulator, and the like.
 圧縮機50は、低圧のガス冷媒を吸入して圧縮し、高圧のガス冷媒として吐出する。圧縮機50は、例えば、インバータ圧縮機である。インバータ圧縮機は、インバータ回路などの制御により、単位時間あたりに送り出す冷媒の量を変化させることができる。 The compressor 50 sucks in a low-pressure gas refrigerant, compresses it, and discharges it as a high-pressure gas refrigerant. The compressor 50 is, for example, an inverter compressor. The inverter compressor can change the amount of the refrigerant to be sent out per unit time by controlling the inverter circuit or the like.
 2つの熱交換器51および52のそれぞれは、伝熱管とフィンとを有している。熱交換器51および52は、例えば、フィンアンドチューブ式熱交換器である。熱交換器51および52のそれぞれは、伝熱管の内部を流れる冷媒と、伝熱管の外部を流れる空気との間の熱交換を行う。冷媒回路5が空気調和装置の場合、熱交換器51および52は、一方が蒸発器として機能し、他方が凝縮器として機能する。 Each of the two heat exchangers 51 and 52 has a heat transfer tube and fins. The heat exchangers 51 and 52 are, for example, fin-and-tube heat exchangers. Each of the heat exchangers 51 and 52 exchanges heat between the refrigerant flowing inside the heat transfer tube and the air flowing outside the heat transfer tube. When the refrigerant circuit 5 is an air conditioner, one of the heat exchangers 51 and 52 functions as an evaporator and the other functions as a condenser.
 膨張弁53は、凝縮器で液化した冷媒を蒸発器で蒸発しやすいように、流入された液冷媒を絞り作用により減圧させて流出する。また、膨張弁53は、蒸発器の負荷に応じた適切な冷媒量を維持するように、冷媒量を調整する。膨張弁53は、例えば、電子膨張弁から構成される。膨張弁53は、図1に示すように、2つの熱交換器51および52との間に、冷媒配管54によって接続されている。 The expansion valve 53 decompresses the inflowing liquid refrigerant by a squeezing action and flows out so that the refrigerant liquefied by the condenser can be easily evaporated by the evaporator. Further, the expansion valve 53 adjusts the amount of the refrigerant so as to maintain an appropriate amount of the refrigerant according to the load of the evaporator. The expansion valve 53 is composed of, for example, an electronic expansion valve. As shown in FIG. 1, the expansion valve 53 is connected to the two heat exchangers 51 and 52 by a refrigerant pipe 54.
 (高調波抑制装置4の構成)
 高調波抑制装置4は、高調波発生負荷3が交流電源2に対して高調波電流を流すため、当該高調波電流を抑制するために設けられている。高調波抑制装置4は、交流電源2に接続された高調波発生負荷3と並列に接続され、高調波発生負荷3から発生する高調波を抑制する。高調波抑制装置4は、図9に示すように、空気調和システム1の本体に内蔵されるか、または、図10に示すように、空気調和システム1の本体に外付けされる。あるいは、高調波抑制装置4は、図11に示すように、空気調和システム1に対して、別体で構成されて、別置きされていてもよい。なお、図9~図11は、実施の形態1に係る高調波抑制装置4の設置方法を模式的に示す図である。
(Structure of Harmonic Suppression Device 4)
The harmonic suppression device 4 is provided to suppress the harmonic current because the harmonic generation load 3 causes the harmonic current to flow to the AC power supply 2. The harmonic suppression device 4 is connected in parallel with the harmonic generation load 3 connected to the AC power supply 2 to suppress the harmonics generated from the harmonic generation load 3. The harmonic suppression device 4 is built in the main body of the air conditioning system 1 as shown in FIG. 9, or is externally attached to the main body of the air conditioning system 1 as shown in FIG. Alternatively, as shown in FIG. 11, the harmonic suppression device 4 may be configured separately from the air conditioning system 1 and may be placed separately. 9 to 11 are diagrams schematically showing the installation method of the harmonic suppression device 4 according to the first embodiment.
 高調波抑制装置4は、図1に示すように、リプルフィルタ6と、スイッチング回路7と、リアクトル8と、コンデンサー9と、制御装置10と、負荷電流検出部11と、補償電流検出部12とを有している。 As shown in FIG. 1, the harmonic suppression device 4 includes a ripple filter 6, a switching circuit 7, a reactor 8, a capacitor 9, a control device 10, a load current detection unit 11, and a compensation current detection unit 12. have.
 リプルフィルタ6は、高調波抑制装置4から出力される補償電流のリプル成分を抑制する。リプルフィルタ6は、リアクトル64a、64bおよび64cと、コンデンサー65a、65bおよび65cとを有している。リアクトル64a、64bおよび64cは、それぞれ、交流電源2の第1の出力線(R相)、第2の出力線(S相)、第3の出力線(T相)に直列に接続されている。また、コンデンサー65aの一端は、交流電源2の第1の出力線(R相)に接続され、他端は、接続点63に接続されている。コンデンサー65bの一端は、交流電源2の第2の出力線(S相)に接続され、他端は、接続点63に接続されている。コンデンサー65cの一端は、交流電源2の第3の出力線(T相)に接続され、他端は、接続点63に接続されている。 The ripple filter 6 suppresses the ripple component of the compensation current output from the harmonic suppression device 4. The ripple filter 6 has reactors 64a, 64b and 64c and capacitors 65a, 65b and 65c. The reactors 64a, 64b and 64c are connected in series to the first output line (R phase), the second output line (S phase) and the third output line (T phase) of the AC power supply 2, respectively. .. Further, one end of the capacitor 65a is connected to the first output line (R phase) of the AC power supply 2, and the other end is connected to the connection point 63. One end of the capacitor 65b is connected to the second output line (S phase) of the AC power supply 2, and the other end is connected to the connection point 63. One end of the capacitor 65c is connected to the third output line (T phase) of the AC power supply 2, and the other end is connected to the connection point 63.
 リアクトル8は、スイッチング回路7とリプルフィルタ6とを接続している。リアクトル8は、リアクトル8a、8bおよび8cを有している。リアクトル8a、8bおよび8cは、それぞれ、交流電源2の第1の出力線(R相)、第2の出力線(S相)、第3の出力線(T相)に直列に接続されている。 The reactor 8 connects the switching circuit 7 and the ripple filter 6. The reactor 8 has reactors 8a, 8b and 8c. The reactors 8a, 8b and 8c are connected in series to the first output line (R phase), the second output line (S phase) and the third output line (T phase) of the AC power supply 2, respectively. ..
 コンデンサー9は、スイッチング回路7に並列に接続されている。 The capacitor 9 is connected in parallel to the switching circuit 7.
 スイッチング回路7の構成について説明する。スイッチング回路7では、上側に配置されたスイッチング素子70r、70sおよび70tと下側に配置されたスイッチング素子70x、70yおよび70zとが、それぞれそれと逆並列に接続されたダイオード71を持つ。以下ではこの構成をアームと呼ぶ。また、アームは2つのアームが直列接続されて構成されており、以下では、これを、上下アームと呼ぶ。3つの上下アームは、並列に接続されている。さらに、これらの上下アームには、コンデンサー9が並列接続されている。スイッチング素子70rとスイッチング素子70xとの接続点、スイッチング素子70sとスイッチング素子70yとの接続点、及び、スイッチング素子70tとスイッチング素子70zとの接続点を、それぞれ、中点72a、72bおよび72cと呼ぶ。
The configuration of the switching circuit 7 will be described. In the switching circuit 7, the switching elements 70r, 70s and 70t arranged on the upper side and the switching elements 70x, 70y and 70z arranged on the lower side have a diode 71 connected in antiparallel to each other. Hereinafter, this configuration is referred to as an arm. Further, the arm is configured by connecting two arms in series, and hereinafter, this is referred to as an upper and lower arm. The three upper and lower arms are connected in parallel. Further, a capacitor 9 is connected in parallel to these upper and lower arms. The connection points between the switching element 70r and the switching element 70x, the connection points between the switching element 70s and the switching element 70y, and the connection points between the switching element 70t and the switching element 70z are referred to as midpoints 72a, 72b, and 72c, respectively. ..
 スイッチング回路7においては、交流電源2の第1の出力線(R相)が、リプルフィルタ6のリアクトル64aとリアクトル8aとを介して、中点72aに接続されている。また、交流電源2の第2の出力線(S相)は、リプルフィルタ6のリアクトル64bとリアクトル8bとを介して、中点72bに接続されている。同様に、交流電源2の第3の出力線(T相)は、リプルフィルタ6のリアクトル64cとリアクトル8cとを介して、中点72cに接続されている。 In the switching circuit 7, the first output line (R phase) of the AC power supply 2 is connected to the midpoint 72a via the reactor 64a and the reactor 8a of the ripple filter 6. Further, the second output line (S phase) of the AC power supply 2 is connected to the midpoint 72b via the reactor 64b and the reactor 8b of the ripple filter 6. Similarly, the third output line (T phase) of the AC power supply 2 is connected to the midpoint 72c via the reactor 64c and the reactor 8c of the ripple filter 6.
 また、スイッチング回路7においては、スイッチング素子70r~70tおよび70x~70zのそれぞれに対し、ダイオード71が逆並列に接続されている。さらに、スイッチング素子70r~70tおよび70x~70zのそれぞれには、これらのON/OFF動作をするための駆動信号を出力する駆動回路13r~13t及び13x~13zが設置されている。駆動回路13r~13t及び13x~13zは、制御装置10に接続されており、制御装置10から制御信号61を受信し、制御信号61に基づいて、対応するスイッチング素子のON/OFF動作を実施する。 Further, in the switching circuit 7, the diode 71 is connected in antiparallel to each of the switching elements 70r to 70t and 70x to 70z. Further, drive circuits 13r to 13t and 13x to 13z for outputting drive signals for performing these ON / OFF operations are installed in each of the switching elements 70r to 70t and 70x to 70z, respectively. The drive circuits 13r to 13t and 13x to 13z are connected to the control device 10, receive a control signal 61 from the control device 10, and perform an ON / OFF operation of the corresponding switching element based on the control signal 61. ..
 また、以下では、6つのスイッチング素子70r~70tおよび70x~70zのうち、スイッチング素子70r~70tを上側スイッチング素子と呼び、スイッチング素子70x~70zを下側スイッチング素子と呼ぶ。なお、以下では、上側スイッチング素子70r~70tを駆動する駆動回路13r~13tを第1駆動回路13r~13tと呼び、下側スイッチング素子70x~70zを駆動する駆動回路13x~13zを第2駆動回路13x~13zと呼ぶ。 Further, in the following, among the six switching elements 70r to 70t and 70x to 70z, the switching elements 70r to 70t are referred to as upper switching elements, and the switching elements 70x to 70z are referred to as lower switching elements. In the following, the drive circuits 13r to 13t for driving the upper switching elements 70r to 70t are referred to as first drive circuits 13r to 13t, and the drive circuits 13x to 13z for driving the lower switching elements 70x to 70z are referred to as second drive circuits. It is called 13x to 13z.
 なお、並列接続された3つの上下アームそれぞれのスイッチング素子70r~70tおよび70x~70zに逆並列接続されたダイオード71は、実施の形態1に係る高調波抑制装置4の「整流器」を構成している。すなわち、図1のスイッチング回路7から、第1駆動回路13r~13tおよび第2駆動回路13x~13zを抜いたものが、実施の形態1に係る高調波抑制装置4の「整流器」になる。 The diodes 71 connected in antiparallel to the switching elements 70r to 70t and 70x to 70z of the three upper and lower arms connected in parallel constitute the "rectifier" of the harmonic suppression device 4 according to the first embodiment. There is. That is, the switching circuit 7 of FIG. 1 from which the first drive circuits 13r to 13t and the second drive circuits 13x to 13z are removed is the "rectifier" of the harmonic suppression device 4 according to the first embodiment.
 図2は、実施の形態1に係る高調波抑制装置4における第1駆動回路13r~13tの構成を示す回路構成図である。ここでは、説明を簡略化させるために、第1駆動回路13r~13tを、まとめて、第1駆動回路13と呼ぶ。第1駆動回路13は、上側スイッチング素子70r~70tをそれぞれ駆動させるものである。第1駆動回路13は、図2で示されるように、電流制限抵抗14と、ダイオード15と、ブートストラップコンデンサー18と、駆動IC(Integrated Circuit)17とを有している。ブートストラップコンデンサー18は、上側スイッチング素子70r~70tを駆動させる電源として作用する。ブートストラップコンデンサー18は、制御電源16からダイオード15を介して充電される。駆動IC17は、ブートストラップコンデンサー18の両端電圧によって電源供給される。駆動IC17は、制御装置10から制御信号61を受信する。駆動IC17は、制御信号61に基づいて、上側スイッチング素子70r、70sおよび70tのそれぞれに対して駆動信号62を出力して、上側スイッチング素子70r、70sおよび70tのそれぞれをON/OFF動作させる。電流制限抵抗14は、制御電源16からの電流を制限する。なお、図2で示されるように、電流制限抵抗14は、ダイオード15のアノード側に接続されているが、これに限らず、カソード側に接続されていてもよい。 FIG. 2 is a circuit configuration diagram showing the configuration of the first drive circuits 13r to 13t in the harmonic suppression device 4 according to the first embodiment. Here, for the sake of simplification of the description, the first drive circuits 13r to 13t are collectively referred to as the first drive circuit 13. The first drive circuit 13 drives the upper switching elements 70r to 70t, respectively. As shown in FIG. 2, the first drive circuit 13 includes a current limiting resistor 14, a diode 15, a bootstrap capacitor 18, and a drive IC (Integrated Circuit) 17. The bootstrap capacitor 18 acts as a power source for driving the upper switching elements 70r to 70t. The bootstrap capacitor 18 is charged from the control power supply 16 via the diode 15. The drive IC 17 is powered by the voltage across the bootstrap capacitor 18. The drive IC 17 receives the control signal 61 from the control device 10. The drive IC 17 outputs a drive signal 62 to each of the upper switching elements 70r, 70s and 70t based on the control signal 61, and turns on / off each of the upper switching elements 70r, 70s and 70t. The current limiting resistor 14 limits the current from the control power supply 16. As shown in FIG. 2, the current limiting resistor 14 is connected to the anode side of the diode 15, but is not limited to this, and may be connected to the cathode side.
 なお、下側スイッチング素子70x~70zをそれぞれ駆動させる第2駆動回路13x~13zは、基本的に、図2に示した第1駆動回路13r~13tと同様の構成を有している。但し、第2駆動回路13x~13zにおいては、ダイオード15を設けなくてもよい。その理由について説明する。第2駆動回路13x~13zは、図1に示すように、コンデンサー9の負極を共通化できるため、ダイオード15を不要とする構成になっており、ブートストラップコンデンサー18は、常時充電されている。 The second drive circuits 13x to 13z for driving the lower switching elements 70x to 70z have basically the same configuration as the first drive circuits 13r to 13t shown in FIG. However, in the second drive circuit 13x to 13z, the diode 15 may not be provided. The reason will be explained. As shown in FIG. 1, the second drive circuits 13x to 13z are configured to eliminate the need for the diode 15 because the negative electrode of the capacitor 9 can be shared, and the bootstrap capacitor 18 is constantly charged.
 図1の説明に戻る。制御装置10は、第1駆動回路13r~13tおよび第2駆動回路13x~13zに、スイッチング素子70r~70tおよび70x~70zをON/OFF動作させる制御信号61を出力する。制御装置10は、図3に示すように、充電相決定部10aと、制御信号生成部10bとを備えている。図3は、実施の形態1に係る高調波抑制装置4の制御装置10の構成を示したブロック図である。充電相決定部10aは、R相、S相、T相の上側スイッチング素子70r~70tの中から、ブートストラップコンデンサー18を充電する相を決定する。制御信号生成部10bは、高調波電流を抑制するための制御信号61を生成する。 Return to the explanation in Fig. 1. The control device 10 outputs a control signal 61 for turning on / off the switching elements 70r to 70t and 70x to 70z to the first drive circuits 13r to 13t and the second drive circuits 13x to 13z. As shown in FIG. 3, the control device 10 includes a charging phase determination unit 10a and a control signal generation unit 10b. FIG. 3 is a block diagram showing the configuration of the control device 10 of the harmonic suppression device 4 according to the first embodiment. The charging phase determining unit 10a determines the phase for charging the bootstrap capacitor 18 from the upper switching elements 70r to 70t of the R phase, the S phase, and the T phase. The control signal generation unit 10b generates a control signal 61 for suppressing the harmonic current.
 ここで、制御装置10のハードウェア構成について説明する。制御装置10は処理回路から構成される。処理回路は、専用のハードウェア、または、プロセッサから構成される。専用のハードウェアは、例えば、ASIC(Application Specific Integrated Circuit)またはFPGA(Field Programmable Gate Array)などである。プロセッサは、メモリに記憶されるプログラムを実行する。制御装置10はメモリを有している。当該メモリは、RAM(Random Access Memory)、ROM(Read Only Memory)、フラッシュメモリ、EPROM(Erasable Programmable ROM)などの不揮発性または揮発性の半導体メモリ、もしくは、磁気ディスク、フレキシブルディスク、光ディスクなどのディスクである。 Here, the hardware configuration of the control device 10 will be described. The control device 10 is composed of a processing circuit. The processing circuit is composed of dedicated hardware or a processor. The dedicated hardware is, for example, an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array). The processor executes a program stored in memory. The control device 10 has a memory. The memory is a non-volatile or volatile semiconductor memory such as RAM (RandomAccessMemory), ROM (ReadOnlyMemory), flash memory, EPROM (ErasableProgrammableROM), or a disk such as a magnetic disk, flexible disk, or optical disk. Is.
 また、図1に示す負荷電流検出部11は、交流電源2から高調波発生負荷3に入力される負荷電流を検出する。負荷電流検出部11は、負荷電流検出部11rおよび11tを有している。負荷電流検出部11rは、交流電源2の第1の出力線(R相)を流れる負荷電流を検出し、負荷電流検出部11tは、交流電源2の第3の出力線(T相)を流れる負荷電流を検出する。負荷電流検出部11rおよび11tは、制御装置10に接続されており、検出した負荷電流の電流情報を制御装置10に送信する。なお、図1の例では、交流電源2の第2の出力線(S相)には、負荷電流を検出する負荷電流検出部が設けられていない。第2の出力線(S相)を流れる負荷電流は、制御装置10が、第1の出力線(R相)を流れる負荷電流および第3の出力線(T相)を流れる負荷電流に基づいて、演算により求める。なお、交流電源2の第2の出力線(S相)に、第2の出力線(S相)を流れる負荷電流を検出する負荷電流検出部を設けるようにしてもよい。なお、負荷電流検出部11は、例えば、電流センサから構成されている。 Further, the load current detection unit 11 shown in FIG. 1 detects the load current input from the AC power supply 2 to the harmonic generation load 3. The load current detection unit 11 has a load current detection unit 11r and 11t. The load current detection unit 11r detects the load current flowing through the first output line (R phase) of the AC power supply 2, and the load current detection unit 11t flows through the third output line (T phase) of the AC power supply 2. Detect load current. The load current detection units 11r and 11t are connected to the control device 10, and transmit the current information of the detected load current to the control device 10. In the example of FIG. 1, the second output line (S phase) of the AC power supply 2 is not provided with a load current detection unit for detecting the load current. The load current flowing through the second output line (S phase) is based on the load current flowing through the first output line (R phase) and the load current flowing through the third output line (T phase) by the control device 10. , Obtained by calculation. The second output line (S phase) of the AC power supply 2 may be provided with a load current detection unit for detecting the load current flowing through the second output line (S phase). The load current detection unit 11 is composed of, for example, a current sensor.
 図1に示す補償電流検出部12は、高調波発生負荷3から発生する高調波電流を抑制するために、高調波抑制装置4から出力される補償電流を検出する。補償電流検出部12は、補償電流検出部12aおよび12cを有している。補償電流検出部12aは、リアクトル8aと中点72aとの間(R相)に設けられ、そこを流れる補償電流を検出する。また、補償電流検出部12cは、リアクトル8cと中点72cとの間(T相)に設けられ、そこを流れる補償電流を検出する。補償電流検出部12aおよび12cは、制御装置10に接続されており、検出した補償電流の電流情報を制御装置10に送信する。なお、図1の例では、リアクトル8bと中点72bとの間(S相)には、そこを流れる補償電流を検出する補償電流検出部が設けられていない。そのため、制御装置10が、補償電流検出部12aが検出したR相の補償電流と補償電流検出部12cが検出したT相の補償電流とに基づいて、リアクトル8bと中点72bとの間に流れるS相の補償電流を演算により求める。なお、これに限らず、リアクトル8bと中点72bとの間(S相)にも、補償電流検出部を設けるようにしてもよい。なお、補償電流検出部12は、例えば、電流センサから構成されている。 The compensation current detection unit 12 shown in FIG. 1 detects the compensation current output from the harmonic suppression device 4 in order to suppress the harmonic current generated from the harmonic generation load 3. The compensation current detection unit 12 has compensation current detection units 12a and 12c. The compensation current detection unit 12a is provided between the reactor 8a and the midpoint 72a (R phase), and detects the compensation current flowing therethrough. Further, the compensation current detection unit 12c is provided between the reactor 8c and the midpoint 72c (T phase), and detects the compensation current flowing therethrough. The compensation current detection units 12a and 12c are connected to the control device 10, and transmit the current information of the detected compensation current to the control device 10. In the example of FIG. 1, a compensation current detection unit for detecting the compensation current flowing therethrough is not provided between the reactor 8b and the midpoint 72b (S phase). Therefore, the control device 10 flows between the reactor 8b and the midpoint 72b based on the compensation current of the R phase detected by the compensation current detection unit 12a and the compensation current of the T phase detected by the compensation current detection unit 12c. The S-phase compensation current is calculated. Not limited to this, a compensation current detection unit may be provided between the reactor 8b and the midpoint 72b (S phase). The compensation current detection unit 12 is composed of, for example, a current sensor.
 (ブートストラップコンデンサー18の充電動作)
 以下、実施の形態1に係る高調波抑制装置4が、ブートストラップコンデンサー18を充電させる動作について説明する。高調波抑制装置4は、スイッチング回路7の下側スイッチング素子70x~70zをON駆動させて、上側スイッチング素子70r~70tを駆動する第1駆動回路13r~13tのブートストラップコンデンサー18を充電させる。
(Charging operation of boot strap capacitor 18)
Hereinafter, the operation of the harmonic suppression device 4 according to the first embodiment to charge the bootstrap capacitor 18 will be described. The harmonic suppression device 4 turns on the lower switching elements 70x to 70z of the switching circuit 7 to charge the bootstrap capacitors 18 of the first drive circuits 13r to 13t that drive the upper switching elements 70r to 70t.
 まず、高調波発生負荷3より負荷電流が発生している場合において、高調波抑制装置4がブートストラップコンデンサー18を充電させる動作について説明する。以下では、説明を簡略化するために、充電する相の上側スイッチング素子70r~70tを、単に、上側スイッチング素子70と呼び、当該相の下側スイッチング素子70x~70zを、単に、下側スイッチング素子70と呼ぶこととする。また、充電する相を充電相と呼ぶこととする。さらに、上側スイッチング素子70r~70tの第1駆動回路13r~13tを、単に、駆動回路13と呼ぶこととする。 First, an operation in which the harmonic suppression device 4 charges the bootstrap capacitor 18 when a load current is generated from the harmonic generation load 3 will be described. In the following, for the sake of brevity, the upper switching elements 70r to 70t of the phase to be charged are simply referred to as upper switching elements 70, and the lower switching elements 70x to 70z of the phase are simply referred to as lower switching elements. It will be called 70. Further, the phase to be charged is referred to as a charging phase. Further, the first drive circuits 13r to 13t of the upper switching elements 70r to 70t are simply referred to as drive circuits 13.
 充電相の上側スイッチング素子70を駆動する駆動回路13のブートストラップコンデンサー18を充電するには、充電相の上下アームの中点72の電位をコンデンサー9の負極電位付近まで低くする必要がある。そうすることで、制御電源16の制御電圧が、中点72の電位よりも高くなる。このためには、充電相の下側スイッチング素子70と逆並列接続されているダイオード71に電流が流れるようにするか、あるいは、下側スイッチング素子70をON駆動すればよい。これにより、制御電源16から電流制限抵抗14とダイオード15を介してブートストラップコンデンサー18に電力が供給される。 In order to charge the bootstrap capacitor 18 of the drive circuit 13 that drives the upper switching element 70 of the charging phase, it is necessary to lower the potential of the midpoint 72 of the upper and lower arms of the charging phase to near the negative electrode potential of the capacitor 9. By doing so, the control voltage of the control power supply 16 becomes higher than the potential of the midpoint 72. For this purpose, the current may flow through the diode 71 connected in antiparallel to the lower switching element 70 of the charging phase, or the lower switching element 70 may be driven ON. As a result, power is supplied from the control power supply 16 to the bootstrap capacitor 18 via the current limiting resistor 14 and the diode 15.
 下側スイッチング素子70をON駆動する場合には、制御装置10の充電相決定部10aは、負荷電流検出部11が検出した高調波発生負荷3の負荷電流に基づいて、負荷電流が最小となる相を選択する。選択された相が、充電相となる。制御装置10の制御信号生成部10bは、充電相のブートストラップコンデンサー18を充電するために、充電相に対応する下側スイッチング素子を駆動するための制御信号61を生成する。当該制御信号61は、充電相の下側スイッチング素子70のデューティー比を、0%<デューティー比≦100%となる範囲に指定する。これにより、交流電源2の出力に、歪み等の電源電圧位相の判別に影響を与える要素が重畳されている場合でも、負荷電流1周期の間に、各相のブートストラップコンデンサー18の充電期間が存在するようになり、上側スイッチング素子70の起動性が改善する。 When the lower switching element 70 is driven ON, the charge phase determination unit 10a of the control device 10 minimizes the load current based on the load current of the harmonic generation load 3 detected by the load current detection unit 11. Select a phase. The selected phase becomes the charging phase. The control signal generation unit 10b of the control device 10 generates a control signal 61 for driving the lower switching element corresponding to the charging phase in order to charge the bootstrap capacitor 18 of the charging phase. The control signal 61 designates the duty ratio of the lower switching element 70 of the charging phase in the range of 0% <duty ratio ≦ 100%. As a result, even when an element that affects the determination of the power supply voltage phase such as distortion is superimposed on the output of the AC power supply 2, the charging period of the bootstrap capacitor 18 of each phase is set during one cycle of the load current. It becomes present, and the startability of the upper switching element 70 is improved.
 ここで、ブートストラップコンデンサー18の充電量が低下すると、上側スイッチング素子70r~70tの動作に影響を与える。そのため、下側スイッチング素子70x~70zのデューティー比は0%を超える範囲に設定する必要がある。当該範囲は、ブートストラップコンデンサー18の充電量の低下が少ない範囲である。 Here, if the charge amount of the bootstrap capacitor 18 decreases, it affects the operation of the upper switching elements 70r to 70t. Therefore, the duty ratio of the lower switching element 70x to 70z needs to be set in the range exceeding 0%. This range is a range in which the decrease in the charge amount of the bootstrap capacitor 18 is small.
 次に、交流電源2が不平衡の場合において、高調波抑制装置4がブートストラップコンデンサー18を充電させる動作について説明する。 Next, when the AC power supply 2 is unbalanced, the operation of the harmonic suppression device 4 to charge the bootstrap capacitor 18 will be described.
 制御装置10は、交流電源2に不平衡が発生しているか否かについては、以下のように判定する。すなわち、制御装置10は、各相の負荷電流の実効値を比較して、負荷電流の最大値をとる相と最小値をとる相との比が、閾値U以上か否かを判定する。当該比が閾値U未満の場合は、交流電源2に不平衡が発生していないと判定する。一方、当該比が閾値U以上の場合は、交流電源2に不平衡が発生していると判定する。このとき、閾値Uは負荷電流の大きさにより変更してもよい。またはあらかじめ決められた固定値であってもよい。 The control device 10 determines whether or not an imbalance has occurred in the AC power supply 2 as follows. That is, the control device 10 compares the effective values of the load currents of each phase, and determines whether or not the ratio of the phase having the maximum value and the phase having the minimum value of the load current is equal to or greater than the threshold U. When the ratio is less than the threshold value U, it is determined that no imbalance has occurred in the AC power supply 2. On the other hand, when the ratio is equal to or higher than the threshold value U, it is determined that an imbalance has occurred in the AC power supply 2. At this time, the threshold value U may be changed depending on the magnitude of the load current. Alternatively, it may be a predetermined fixed value.
 また、交流電源2が不平衡の場合には、不平衡の条件によっては、高調波発生負荷3において電流がほとんど流れない相が発生することがある。このときには、電流がほとんど流れない相については、負荷電流検出部11によって負荷電流を検出することができない。この場合には、制御装置10の充電相決定部10aは、すべての相の電流がほとんど流れていない期間を検出して、当該期間の直前の期間において充電を行った相に基づいて、充電相を決定する。その後、制御信号生成部10bは、充電相の下側スイッチング素子70を駆動する制御信号61を生成して、充電相の上側スイッチング素子70のブートストラップコンデンサー18を充電する必要がある。 Further, when the AC power supply 2 is unbalanced, a phase in which almost no current flows may occur in the harmonic generating load 3 depending on the unbalanced condition. At this time, the load current cannot be detected by the load current detection unit 11 for the phase in which almost no current flows. In this case, the charging phase determination unit 10a of the control device 10 detects a period in which almost no current flows in all the phases, and the charging phase is based on the phase charged in the period immediately before the period. To determine. After that, the control signal generation unit 10b needs to generate a control signal 61 for driving the lower switching element 70 of the charging phase to charge the bootstrap capacitor 18 of the upper switching element 70 of the charging phase.
 このためには、充電相決定部10aは、各相の負荷電流の実効値あるいは絶対値の平均値などの大きさを用いて、当該大きさが最大となる相と最小となる相との大きさの比が、予め設定された閾値P以上であるか否かを判定する。すなわち、最大となる相の大きさを、最小となる相の大きさで除算した除算結果が、閾値P以上であるか否かを判定する。最大となる相と最小となる相との大きさの比が、閾値P以上であった場合には、充電相決定部10aは、電流がほとんど流れていない期間を判別する。当該期間を、第1期間と呼ぶ。充電相決定部10aは、第1期間の直前の期間において充電を行った相に基づいて、充電相を決定する。ここで、R相、S相、T相の負荷電流は、図8に示すように、周期的に変化する。図8は、直流リアクトルおよび平滑コンデンサーを持つ三相交流電源が入力される整流器のR相、S相、T相の負荷電流を例として示す図である。図8において、横軸は位相、縦軸は負荷電流を示す。また、実線80はR相の負荷電流を示し、破線81はS相の負荷電流を示し、点線82はT相の負荷電流を示す。図8において、期間(1)は、T相の負荷電流が最小の期間で、期間(2)は、R相の負荷電流が最小の期間で、期間(3)は、S相の負荷電流が最小の期間である。このように、R相、S相、T相の負荷電流は周期的に変化し、負荷電流が最小になる相は、R相、S相、T相、R相、S相、・・・の順になる。従って、第1期間の直前の第0期間において充電を行った相がR相の場合には、次に負荷電流が最小となる相はS相であるため、充電相決定部10aは、第1期間の充電相をS相に決定する。また、第1期間の直前の第0期間において充電を行った相がS相の場合には、次に負荷電流が最小になる相はT相であるため、充電相決定部10aは、第1期間の充電相をT相に決定する。同様に、第1期間の直前の第0期間において充電を行った相がT相の場合には、次に負荷電流が最小となる相はR相であるため、充電相決定部10aは、第1期間の充電相をR相に決定する。ここで、図4は、交流電源2が平衡の場合のR相、S相、T相の負荷電流と下側スイッチング素子70x~70zのON/OFF動作例を示す図である。図4(a)において、横軸は位相、縦軸は負荷電流を示す。また、図4(b)において、横軸は位相、縦軸はON/OFF動作を示す。点線は負荷電流が最小となる相が切り替わるタイミングを示す。図4において、期間(1)は、T相の負荷電流が最小の期間で、期間(2)は、R相の負荷電流が最小の期間で、期間(3)は、S相の負荷電流が最小の期間である。従って、第1駆動回路13のブートストラップコンデンサー18を充電するためには、この期間の間において、デューティー比を、0%<デューティー比≦100%となる範囲の制御信号を生成すればよい。 For this purpose, the charging phase determination unit 10a uses the size of the effective value or the average value of the absolute values of the load currents of each phase, and the size of the phase having the maximum value and the phase having the minimum value. It is determined whether or not the ratio of the current is equal to or higher than the preset threshold value P. That is, it is determined whether or not the division result obtained by dividing the maximum phase size by the minimum phase size is equal to or greater than the threshold value P. When the ratio of the magnitudes of the maximum phase and the minimum phase is equal to or greater than the threshold value P, the charging phase determination unit 10a determines a period in which almost no current flows. This period is called the first period. The charging phase determination unit 10a determines the charging phase based on the phase charged in the period immediately before the first period. Here, the load currents of the R phase, the S phase, and the T phase change periodically as shown in FIG. FIG. 8 is a diagram showing an example of load currents of R-phase, S-phase, and T-phase of a rectifier to which a three-phase AC power supply having a DC reactor and a smoothing capacitor is input. In FIG. 8, the horizontal axis represents the phase and the vertical axis represents the load current. Further, the solid line 80 shows the load current of the R phase, the broken line 81 shows the load current of the S phase, and the dotted line 82 shows the load current of the T phase. In FIG. 8, the period (1) is the period in which the load current of the T phase is the minimum, the period (2) is the period in which the load current of the R phase is the minimum, and the period (3) is the period in which the load current of the S phase is the minimum. The minimum period. In this way, the load currents of the R phase, S phase, and T phase change periodically, and the phases that minimize the load current are the R phase, S phase, T phase, R phase, S phase, and so on. It becomes in order. Therefore, when the phase charged in the 0th period immediately before the 1st period is the R phase, the phase with the smallest load current is the S phase, so that the charging phase determination unit 10a is the first phase. The charging phase of the period is determined to be the S phase. Further, when the phase charged in the 0th period immediately before the 1st period is the S phase, the phase in which the load current is minimized next is the T phase, so that the charging phase determination unit 10a is the first phase. The charging phase of the period is determined to be the T phase. Similarly, when the phase charged in the 0th period immediately before the 1st period is the T phase, the phase with the smallest load current is the R phase, so that the charging phase determination unit 10a is the first. The charging phase for one period is determined to be the R phase. Here, FIG. 4 is a diagram showing an example of ON / OFF operation of the load currents of the R phase, the S phase, and the T phase and the lower switching elements 70x to 70z when the AC power supply 2 is in equilibrium. In FIG. 4A, the horizontal axis represents the phase and the vertical axis represents the load current. Further, in FIG. 4B, the horizontal axis indicates the phase and the vertical axis indicates the ON / OFF operation. The dotted line indicates the timing at which the phase with the minimum load current is switched. In FIG. 4, the period (1) is the period in which the load current of the T phase is the minimum, the period (2) is the period in which the load current of the R phase is the minimum, and the period (3) is the period in which the load current of the S phase is the minimum. The minimum period. Therefore, in order to charge the bootstrap capacitor 18 of the first drive circuit 13, a control signal having a duty ratio in the range of 0% <duty ratio ≦ 100% may be generated during this period.
 制御信号生成部10bは、第1期間において、充電相の下側スイッチング素子70を駆動して、上側スイッチング素子70のブートストラップコンデンサー18を充電するための制御信号61を生成する。これにより、負荷電流が流れない相においても、ブートストラップコンデンサー18が充電され、各相にブートストラップコンデンサー18の充電期間が存在するようになる。図4は、実施の形態1に係る下側スイッチング素子70x~70zのON/OFF動作の一例を示す図である。このうち、図4(a)は、交流電源2に流れる高調波発生負荷3により発生した負荷電流の波形を示す波形図である。また、図4(b)は、下側スイッチング素子70x~70zをON/OFF動作させる駆動信号62x、62yおよび62zの動作波形を示す波形図である。 In the first period, the control signal generation unit 10b drives the lower switching element 70 of the charging phase to generate a control signal 61 for charging the bootstrap capacitor 18 of the upper switching element 70. As a result, the bootstrap capacitor 18 is charged even in the phase in which the load current does not flow, and each phase has a charging period for the bootstrap capacitor 18. FIG. 4 is a diagram showing an example of ON / OFF operation of the lower switching elements 70x to 70z according to the first embodiment. Of these, FIG. 4A is a waveform diagram showing the waveform of the load current generated by the harmonic generation load 3 flowing through the AC power supply 2. Further, FIG. 4B is a waveform diagram showing the operation waveforms of the drive signals 62x, 62y and 62z for turning on / off the lower switching elements 70x to 70z.
 また、高調波発生負荷3より負荷電流が発生している場合の上記の充電方法においては、負荷電流に基づいて充電相を決定しているため、交流電源2の不平衡時においては、1周期のうち電流が流れる期間が、平衡時よりも短くなる。そのため、制御装置10は、それぞれの相の負荷電流から全ての相の負荷電流の平均に対する、負荷電流が最大をとる相と最小をとる相の差分の比率を、不平衡率として求める。そして、制御装置10は、負荷電流の実効値に基づいて、負荷電流が最も小さい相については、不平衡率により充電期間を制限する。これにより、急峻な大電流とならずに、ブートストラップコンデンサー18を充電することができる。1周期における充電量が十分でない場合には、ブートストラップコンデンサー18の充電量が閾値H(第1閾値)以上になるまで、複数周期の期間にわたって繰り返し充電を実施する。これにより、充電量を確保することが出来る。空気調和システム1以外の高調波発生負荷3等の運転による影響により発生した電源の不平衡が解消されれば、負荷電流の不平衡率は小さくなり、充電期間の制限が解除されることにより、充電時間を短くすることができる。また、制限できる充電期間を大きくすると、ブートストラップコンデンサー18の容量が大きくなってしまうため、ブートストラップコンデンサー18の容量に応じて、充電量の低下が少ない範囲で制限することが望ましい。 Further, in the above charging method when the load current is generated from the harmonic generation load 3, the charging phase is determined based on the load current, so that one cycle occurs when the AC power supply 2 is unbalanced. Of these, the period during which current flows is shorter than at equilibrium. Therefore, the control device 10 obtains the ratio of the difference between the phase having the maximum load current and the phase having the minimum load current to the average of the load currents of all the phases from the load current of each phase as the unbalance rate. Then, the control device 10 limits the charging period by the unbalance rate for the phase having the smallest load current based on the effective value of the load current. As a result, the bootstrap capacitor 18 can be charged without a steep large current. When the charge amount in one cycle is not sufficient, charging is repeatedly performed over a period of a plurality of cycles until the charge amount of the bootstrap capacitor 18 becomes equal to or higher than the threshold value H (first threshold value). As a result, the amount of charge can be secured. If the imbalance of the power supply caused by the operation of the harmonic generation load 3 other than the air conditioning system 1 is eliminated, the unbalance rate of the load current becomes smaller and the limitation of the charging period is lifted. The charging time can be shortened. Further, if the charge period that can be limited is increased, the capacity of the bootstrap capacitor 18 becomes large. Therefore, it is desirable to limit the charge amount within a range where the decrease in the charge amount is small according to the capacity of the bootstrap capacitor 18.
 また、負荷電流が大きく、高調波抑制装置4が抑制する高調波電流が多い場合には、高調波電流を抑制するための補償電流が大きくなり、高調波抑制装置4のスイッチング素子が高調波電流の少ない場合と比べて発熱する。図5は、実施の形態1に係る高調波抑制装置4の発熱を抑制するための制御電圧調整回路20を有する第1駆動回路13の一例を示す図である。 Further, when the load current is large and the harmonic current suppressed by the harmonic suppression device 4 is large, the compensation current for suppressing the harmonic current becomes large, and the switching element of the harmonic suppression device 4 increases the harmonic current. It generates heat compared to the case where there is little. FIG. 5 is a diagram showing an example of a first drive circuit 13 having a control voltage adjusting circuit 20 for suppressing heat generation of the harmonic suppression device 4 according to the first embodiment.
 図5に示す第1駆動回路13は、図2の構成に対して、制御電圧調整回路20と、メモリ21と、ブートストラップ制御回路24と、切替回路25とが追加されている。 In the first drive circuit 13 shown in FIG. 5, a control voltage adjusting circuit 20, a memory 21, a bootstrap control circuit 24, and a switching circuit 25 are added to the configuration of FIG.
 制御電圧調整回路20には、制御装置10から、高調波抑制装置4の運転状態に基づいて決定された切替信号が入力される。制御電圧調整回路20は、切替信号に基づいて、ブートストラップコンデンサー18を充電する最大電圧を決定する。このとき、負荷電流検出部11が検出した負荷電流が閾値G(第3閾値)以上場合には、スイッチング素子の発熱量が多いため、制御装置10は、負荷電流の値に基づいて、第1切替信号を出力する。制御電圧調整回路20は、第1切替信号に基づいて、制御電源16の制御電圧を、例えば一定量だけ高くする。これにより、スイッチング素子の損失を抑制する。一方、負荷電流が閾値G未満の場合には、スイッチン素子の発熱量が相対的に小さくなるため、運転における温度余裕ができる。この場合には、制御装置10が、負荷電流の値に基づいて、第2切替信号を出力する。制御電圧調整回路20は、第2切替信号に基づいて、制御電源16の制御電圧を、例えば一定量だけ低くする。これにより、スイッチング損失が増加するものの、スイッチング時のノイズを低減することが出来る。ここでは、制御電圧調整回路20での調整を、閾値以上と閾値未満の2段階としているが、負荷電流の値または高調波抑制装置4の運転状態に応じてさらに細分化してもよい。 A switching signal determined based on the operating state of the harmonic suppression device 4 is input from the control device 10 to the control voltage adjustment circuit 20. The control voltage adjustment circuit 20 determines the maximum voltage for charging the bootstrap capacitor 18 based on the switching signal. At this time, when the load current detected by the load current detection unit 11 is equal to or higher than the threshold value G (third threshold value), the amount of heat generated by the switching element is large, so that the control device 10 has a first load current value. Output the switching signal. The control voltage adjustment circuit 20 raises the control voltage of the control power supply 16 by, for example, a certain amount, based on the first switching signal. This suppresses the loss of the switching element. On the other hand, when the load current is less than the threshold value G, the calorific value of the switchon element is relatively small, so that there is a temperature margin in operation. In this case, the control device 10 outputs the second switching signal based on the value of the load current. The control voltage adjustment circuit 20 lowers the control voltage of the control power supply 16 by, for example, a certain amount, based on the second switching signal. As a result, although the switching loss increases, the noise during switching can be reduced. Here, the adjustment in the control voltage adjustment circuit 20 is divided into two stages, one above the threshold value and one below the threshold value, but the adjustment may be further subdivided according to the value of the load current or the operating state of the harmonic suppression device 4.
 メモリ21は、高調波抑制装置4のブートストラップコンデンサー18の充電方式として、複数の充電方式を記憶している。図5の例では、メモリ21は、第1充電方式を記憶した第1記憶部22と、第2充電方式を記憶した第2記憶部23とを有している。第1記憶部22が記憶する第1充電方式は、負荷電流に基づくブートストラップコンデンサー18の充電方式である。第1充電方式は、高調波発生負荷3が動作状態で、且つ、交流電源2が不平衡あるいは電源インピーダンスが閾値Iより大きい場合に適用される。第2記憶部23が記憶する第2充電方式は、交流電源2の電源電圧に基づくブートストラップコンデンサー18の充電方式である(例えば特許文献1参照)。第2充電方式は、交流電源2の正常時または負荷電流検出部11が負荷電流を検出していない場合に適用される。第2充電方式では、交流電源2の位相を基に、対応する下側スイッチング素子のデューティー比を0%を超える100%以下に制限して、当該下側スイッチング素子をスイッチングさせる。これにより、上側スイッチング素子の駆動回路13のブートストラップコンデンサー18が充電される。第1充電方式の詳細については、図6のフローチャートおよび図7のフローチャートを用いて後述する。 The memory 21 stores a plurality of charging methods as the charging method of the bootstrap capacitor 18 of the harmonic suppression device 4. In the example of FIG. 5, the memory 21 has a first storage unit 22 that stores the first charging method and a second storage unit 23 that stores the second charging method. The first charging method stored in the first storage unit 22 is a charging method for the bootstrap capacitor 18 based on the load current. The first charging method is applied when the harmonic generation load 3 is in an operating state and the AC power supply 2 is unbalanced or the power supply impedance is larger than the threshold value I. The second charging method stored in the second storage unit 23 is a charging method for the bootstrap capacitor 18 based on the power supply voltage of the AC power supply 2 (see, for example, Patent Document 1). The second charging method is applied when the AC power supply 2 is normal or when the load current detection unit 11 does not detect the load current. In the second charging method, the duty ratio of the corresponding lower switching element is limited to 100% or less, which exceeds 0%, based on the phase of the AC power supply 2, and the lower switching element is switched. As a result, the bootstrap capacitor 18 of the drive circuit 13 of the upper switching element is charged. The details of the first charging method will be described later with reference to the flowchart of FIG. 6 and the flowchart of FIG. 7.
 第1充電方式で充電を行うか、あるいは、第2充電方式で充電を行うかについては、制御装置10から切替回路25に入力される切替信号によって選択される。制御装置10は、負荷電流のみに基づいて、切替信号を出力してもよいが、交流電源2の状態および電源インピーダンスの値などの他のパラメータも判定に用いる場合には、判定テーブルを予めメモリに記憶しておいてもよい。その場合には、制御装置10は、どのような条件を満たした場合に第1切替信号を出力し、どのような条件を満たした場合に第2切替信号を出力するのかを予め定めた判定テーブルをメモリに記憶する。そして、当該判定テーブルに基づいて切替信号を出力するようにすればよい。切替回路25は、切替信号に従って、第1記憶部22から第1充電方式を読み出すか、あるいは、第2記憶部23から第2充電方式を読み出す。これにより、ブートストラップ制御回路24は、選択された充電方式で、且つ、負荷電流の検出値または電源電圧の検出値のうち、当該充電方式に対応する検出値を用いて、ブートストラップコンデンサー18を充電するための制御信号を、駆動IC17へ出力する。 Whether to charge by the first charging method or the second charging method is selected by the switching signal input from the control device 10 to the switching circuit 25. The control device 10 may output a switching signal based only on the load current, but when other parameters such as the state of the AC power supply 2 and the value of the power supply impedance are also used for the determination, the determination table is stored in advance in the memory. You may remember it in. In that case, the control device 10 determines in advance what conditions are satisfied to output the first switching signal and what conditions are satisfied to output the second switching signal. Is stored in the memory. Then, the switching signal may be output based on the determination table. The switching circuit 25 reads the first charging method from the first storage unit 22 or reads the second charging method from the second storage unit 23 according to the switching signal. As a result, the bootstrap control circuit 24 uses the selected charging method and the detected value corresponding to the charging method among the detected values of the load current or the power supply voltage to make the bootstrap capacitor 18. A control signal for charging is output to the drive IC 17.
 このように、第1記憶部22が記憶する第1充電方式は、高調波発生負荷3が動作状態で負荷電流が検出され、且つ、交流電源2が不平衡あるいは電源インピーダンスが大きい場合に適用する。第2記憶部23が記憶する第2充電方式は、交流電源2の電源正常時または負荷電流を検出していない場合に適用する。このように、交流電源2または負荷電流の状態に応じて、第1充電方式と第2充電方式とを切り替えて用いることで、交流電源2の状態、および、高調波発生負荷3の負荷電流の状態に関わらず、ブートストラップコンデンサー18に充電が可能である。なお、ここでは、負荷電流が発生している場合においては、第1記憶部22が記憶する第1充電方式を適用するとしたが、その場合に限らず、第2記憶部23が記憶する第2充電方式を適用するようにしてもよい。ただし、制御の安定化の観点から、ブートストラップコンデンサー18を充電している間は、充電方式の切替の動作を行わないようにする。そのため、制御装置10は、ブートストラップコンデンサー18の充電中は、切替信号の出力を変化させない。 As described above, the first charging method stored in the first storage unit 22 is applied when the load current is detected while the harmonic generation load 3 is in operation and the AC power supply 2 is unbalanced or has a large power supply impedance. .. The second charging method stored in the second storage unit 23 is applied when the power supply of the AC power supply 2 is normal or when the load current is not detected. In this way, by switching between the first charging method and the second charging method according to the state of the AC power supply 2 or the load current, the state of the AC power supply 2 and the load current of the harmonic generation load 3 can be changed. The bootstrap capacitor 18 can be charged regardless of the state. Here, when the load current is generated, the first charging method stored in the first storage unit 22 is applied, but the second charging method stored in the second storage unit 23 is not limited to that case. A charging method may be applied. However, from the viewpoint of stabilizing the control, the operation of switching the charging method is not performed while the bootstrap capacitor 18 is being charged. Therefore, the control device 10 does not change the output of the switching signal while charging the bootstrap capacitor 18.
 実施の形態1では、以上の構成および動作のように、負荷電流が流れない場合には、電源電圧に基づいて、充電相のブートストラップコンデンサー18を充電する。また、負荷電流が流れる場合には、負荷電流に基づいて、充電相のブートストラップコンデンサー18を充電する。これにより、交流電源2の電圧に歪みが重畳している影響または交流電源2が不平衡となることによる影響を、最小限に抑制することができるので、高調波抑制装置4の起動を円滑にすることができる。また、実施の形態1では、高調波抑制装置4が交流電源2の位相を正しく認識できないことに起因して、急峻な大電流が流れたことにより、高調波抑制装置4が起動できないという問題が解消される。そのため、空気調和システム1と高調波抑制装置4とが連携運転している場合においても、高調波抑制装置4が起動できないことに空気調和システム1の運転が妨げられるといった問題も生じることがなくなる。 In the first embodiment, when the load current does not flow as in the above configuration and operation, the bootstrap capacitor 18 of the charging phase is charged based on the power supply voltage. When the load current flows, the bootstrap capacitor 18 of the charging phase is charged based on the load current. As a result, the influence of the distortion superimposed on the voltage of the AC power supply 2 or the influence of the imbalance of the AC power supply 2 can be suppressed to the minimum, so that the harmonic suppression device 4 can be started smoothly. can do. Further, in the first embodiment, there is a problem that the harmonic suppression device 4 cannot be started due to the flow of a steep large current due to the fact that the harmonic suppression device 4 cannot correctly recognize the phase of the AC power supply 2. It will be resolved. Therefore, even when the air conditioning system 1 and the harmonic suppression device 4 are operating in cooperation with each other, there is no problem that the operation of the air conditioning system 1 is hindered by the inability to start the harmonic suppression device 4.
 なお、ここでは、充電方式として、第1充電方式と第2充電方式との2種類としているが、充電方式の個数は3以上であってもよい。具体的には、後述する図6または図7のフローから一部分のステップを削除した充電方式、あるいは、後述する図6または図7のフローに何らかのステップを追加した充電方式なども用意しておいてもよい。その場合、それらの充電方式を第3の充電方式および第4の充電方式などとして、予めメモリ21に記憶しておき、制御装置10からの切替信号により、それらの中から1つを選択して用いる。 Here, there are two types of charging methods, a first charging method and a second charging method, but the number of charging methods may be three or more. Specifically, a charging method in which a part of the steps is deleted from the flow of FIG. 6 or FIG. 7 described later, or a charging method in which some steps are added to the flow of FIG. 6 or FIG. 7 described later are also prepared. May be good. In that case, those charging methods are stored in the memory 21 in advance as the third charging method, the fourth charging method, and the like, and one of them is selected by the switching signal from the control device 10. Use.
 なお、実施の形態1に係る高調波抑制装置4のスイッチング素子70r~70tおよび70x~70zは、ワイドバンドギャップ半導体で構成されていてもよい。ワイドバンドギャップ半導体は、例えば、GaN(窒化ガリウム)、SiC(炭化珪素)、または、ダイヤモンドである。 The switching elements 70r to 70t and 70x to 70z of the harmonic suppression device 4 according to the first embodiment may be composed of a wide bandgap semiconductor. The wide bandgap semiconductor is, for example, GaN (gallium nitride), SiC (silicon carbide), or diamond.
 上側スイッチング素子70r~70t及び下側スイッチング素子70x~70zが、ワイドバンドギャップ半導体によって構成されている場合の効果について説明する。ワイドバンドギャップ半導体は、耐電圧が高く、許容電流密度も高い。そのため、スイッチング素子70r~70tおよび70x~70zの小型化が可能となる。その結果、そのようなスイッチング素子70r~70tおよび70x~70zを組み込んだ半導体モジュールの小型化も可能となる。また、ワイドバンドギャップ半導体は、耐熱性もよいので、スイッチング素子70r~70tおよび70x~70zに対するヒートシンクを小型化することもできる。さらに、ワイドバンドギャップ半導体をスイッチング素子70r~70tおよび70x~70zに適用した場合、そのオン抵抗が低く、導通損失が小さくなり、また、スイッチング損失も小さい。その他、必要となるゲート電荷量も小さくなるため、ブートストラップコンデンサー18の充電時間が短くなる。 The effect when the upper switching elements 70r to 70t and the lower switching elements 70x to 70z are composed of a wide bandgap semiconductor will be described. Wide bandgap semiconductors have a high withstand voltage and a high allowable current density. Therefore, the switching elements 70r to 70t and 70x to 70z can be miniaturized. As a result, it is possible to reduce the size of the semiconductor module incorporating such switching elements 70r to 70t and 70x to 70z. Further, since the wide bandgap semiconductor has good heat resistance, the heat sink for the switching elements 70r to 70t and 70x to 70z can be miniaturized. Further, when the wide bandgap semiconductor is applied to the switching elements 70r to 70t and 70x to 70z, the on-resistance is low, the conduction loss is small, and the switching loss is also small. In addition, since the amount of gate charge required is also small, the charging time of the bootstrap capacitor 18 is shortened.
 (実施の形態1の動作)
 図6は、実施の形態1に係る高調波抑制装置4のブートストラップコンデンサー18の充電制御例を説明するフローチャートである。図6は、R相、S相、および、T相のすべての相で、負荷電流が発生している場合のフローを示している。すなわち、図6のフローは、図5に示す第1記憶部22に記憶された第1充電方式に該当する。図6のフローは、負荷電流がすべての相に流れている場合に適用される。
(Operation of Embodiment 1)
FIG. 6 is a flowchart illustrating an example of charge control of the bootstrap capacitor 18 of the harmonic suppression device 4 according to the first embodiment. FIG. 6 shows a flow when a load current is generated in all of the R phase, the S phase, and the T phase. That is, the flow of FIG. 6 corresponds to the first charging method stored in the first storage unit 22 shown in FIG. The flow of FIG. 6 is applied when the load current is flowing in all phases.
 (ステップS1)
 制御装置10は、R相、S相およびT相の負荷電流の実効値が閾値Aよりも大きいか判定する。閾値Aは、予め設定された値であり、充電開始か否かを判定するための充電開始閾値である。高調波抑制装置4は、負荷電流の実効値が閾値Aを超えている場合は、ステップS2に進む。一方、負荷電流の実効値が閾値Aを超えていない場合は、図6の処理をそのまま終了する。
(Step S1)
The control device 10 determines whether the effective value of the load currents of the R phase, the S phase, and the T phase is larger than the threshold value A. The threshold value A is a preset value, and is a charging start threshold value for determining whether or not charging is started. If the effective value of the load current exceeds the threshold value A, the harmonic suppression device 4 proceeds to step S2. On the other hand, if the effective value of the load current does not exceed the threshold value A, the process of FIG. 6 is terminated as it is.
 (ステップS2)
 制御装置10は、R相、S相およびT相の中から、負荷電流が最も小さい相を検出する。
(Step S2)
The control device 10 detects the phase having the smallest load current from the R phase, the S phase, and the T phase.
 (ステップS3)
 制御装置10は、前回の充電相の負荷電流の最小値に基づいて、各相の充電を開始する負荷電流の閾値Bを設定する。なお、これに限らず、閾値Bは、予め設定された固定値であってもよい。
(Step S3)
The control device 10 sets a threshold value B of the load current for starting charging of each phase based on the minimum value of the load current of the previous charging phase. Not limited to this, the threshold value B may be a preset fixed value.
 (ステップS4)
 制御装置10は、R相、S相およびT相の中で、R相の負荷電流が最も小さいか判定する。制御装置10は、R相の負荷電流が最も小さい場合はステップS5に進む。一方、R相の負荷電流が最も小さくない場合は、ステップS7に進む。
(Step S4)
The control device 10 determines whether the load current of the R phase is the smallest among the R phase, the S phase, and the T phase. The control device 10 proceeds to step S5 when the load current of the R phase is the smallest. On the other hand, if the load current of the R phase is not the smallest, the process proceeds to step S7.
 (ステップS5)
 制御装置10は、R相の負荷電流が閾値Bを下回っているか判定する。制御装置10は、R相の負荷電流が閾値Bを下回っている場合は、ステップS6に進む。一方、R相の負荷電流が閾値Bを下回っていない場合は、処理をそのまま終了する。
(Step S5)
The control device 10 determines whether the load current of the R phase is below the threshold value B. If the load current of the R phase is below the threshold value B, the control device 10 proceeds to step S6. On the other hand, if the load current of the R phase is not lower than the threshold value B, the process is terminated as it is.
 (ステップS6)
 制御装置10は、R相の駆動回路13rのブートストラップコンデンサー18を充電するための制御信号61を出力する。これにより、駆動IC17が、下側スイッチング素子70xを駆動させるための駆動信号62を出力する。これにより、下側スイッチング素子70xがON駆動され、R相の駆動回路13rのブートストラップコンデンサー18が充電される。
(Step S6)
The control device 10 outputs a control signal 61 for charging the bootstrap capacitor 18 of the R-phase drive circuit 13r. As a result, the drive IC 17 outputs a drive signal 62 for driving the lower switching element 70x. As a result, the lower switching element 70x is driven ON, and the bootstrap capacitor 18 of the R-phase drive circuit 13r is charged.
 (ステップS7)
 制御装置10は、R相、S相およびT相の中で、S相の負荷電流が最も小さいか判定する。制御装置10は、S相の負荷電流が最も小さい場合はステップS8に進む。一方、S相の負荷電流が最も小さくない場合は、ステップS10に進む。
(Step S7)
The control device 10 determines whether the load current of the S phase is the smallest among the R phase, the S phase, and the T phase. The control device 10 proceeds to step S8 when the load current of the S phase is the smallest. On the other hand, if the load current of the S phase is not the smallest, the process proceeds to step S10.
 (ステップS8)
 制御装置10は、S相の負荷電流が閾値Bを下回っているか判定する。制御装置10は、S相の負荷電流が閾値Bを下回っている場合はステップS9に進む。一方、S相の負荷電流が閾値Bを下回っていない場合は、処理をそのまま終了する。
(Step S8)
The control device 10 determines whether the load current of the S phase is below the threshold value B. The control device 10 proceeds to step S9 when the load current of the S phase is below the threshold value B. On the other hand, if the load current of the S phase is not lower than the threshold value B, the process is terminated as it is.
 (ステップS9)
 制御装置10は、S相の駆動回路13sのブートストラップコンデンサー18を充電するための制御信号61を出力する。これにより、駆動IC17が、下側スイッチング素子70yを駆動させるための駆動信号62を出力する。これにより、下側スイッチング素子70yがON駆動され、S相の駆動回路13sのブートストラップコンデンサー18が充電される。
(Step S9)
The control device 10 outputs a control signal 61 for charging the bootstrap capacitor 18 of the S-phase drive circuit 13s. As a result, the drive IC 17 outputs a drive signal 62 for driving the lower switching element 70y. As a result, the lower switching element 70y is driven ON, and the bootstrap capacitor 18 of the S-phase drive circuit 13s is charged.
 (ステップS10)
 制御装置10は、T相の負荷電流が閾値Bを下回っているか判定する。制御装置10は、T相の負荷電流が閾値Bを下回っている場合はステップS11に進む。一方、T相の負荷電流が閾値Bを下回っていない場合は、処理をそのまま終了する。
(Step S10)
The control device 10 determines whether the load current of the T phase is below the threshold value B. The control device 10 proceeds to step S11 when the load current of the T phase is below the threshold value B. On the other hand, if the load current of the T phase is not lower than the threshold value B, the process is terminated as it is.
 (ステップS11)
 制御装置10は、T相の駆動回路13tのブートストラップコンデンサー18を充電するための制御信号61を出力する。これにより、駆動IC17が、下側スイッチング素子70zを駆動させるための駆動信号62を出力する。これにより、下側スイッチング素子70zがON駆動され、T相の駆動回路13tのブートストラップコンデンサー18が充電される。
(Step S11)
The control device 10 outputs a control signal 61 for charging the bootstrap capacitor 18 of the T-phase drive circuit 13t. As a result, the drive IC 17 outputs a drive signal 62 for driving the lower switching element 70z. As a result, the lower switching element 70z is driven ON, and the bootstrap capacitor 18 of the T-phase drive circuit 13t is charged.
 図7は、実施の形態1における負荷電流が発生しない相がある場合の高調波抑制装置4におけるブートストラップコンデンサー18の充電制御例を説明するフローチャートである。すなわち、図7のフローは、図5に示す第2記憶部22が記憶する第1充電方式に該当する。図7のフローは、負荷電流が流れていない相がある場合に適用する。 FIG. 7 is a flowchart illustrating an example of charge control of the bootstrap capacitor 18 in the harmonic suppression device 4 when there is a phase in which the load current does not occur in the first embodiment. That is, the flow of FIG. 7 corresponds to the first charging method stored by the second storage unit 22 shown in FIG. The flow of FIG. 7 is applied when there is a phase in which the load current does not flow.
 (ステップS21)
 制御装置10は、R相、S相およびT相の負荷電流の実効値から、実効値が最大の相と、最小の相とを選択する。以下では、最大の相の実効値を、最大実効値と呼び、最小の相の実効値を、最小実効値と呼ぶ。制御装置10は、最大実効値と最小実効値との比が閾値P以上か否かを判定する。制御装置10は、当該比が閾値P以上の場合は、ステップS22に進む。一方、制御装置10は、当該比が閾値P未満の場合は、処理をそのまま終了する。
(Step S21)
The control device 10 selects a phase having the largest effective value and a phase having the smallest effective value from the effective values of the load currents of the R phase, the S phase, and the T phase. In the following, the effective value of the maximum phase is referred to as the maximum effective value, and the effective value of the minimum phase is referred to as the minimum effective value. The control device 10 determines whether or not the ratio of the maximum effective value to the minimum effective value is equal to or greater than the threshold value P. When the ratio is equal to or higher than the threshold value P, the control device 10 proceeds to step S22. On the other hand, when the ratio is less than the threshold value P, the control device 10 ends the process as it is.
 (ステップS22)
 制御装置10は、R相、S相およびT相のすべての相の負荷電流が、予め設定された閾値Q(第2閾値)以下か否かを判定する。制御装置10は、R相、S相およびT相のすべての相の負荷電流が、閾値Q以下の場合は、ステップS23に進む。一方、R相、S相およびT相の少なくとも1つの相の負荷電流が閾値Qを超えていれば、制御装置10は、処理をそのまま終了する。
(Step S22)
The control device 10 determines whether or not the load currents of all the phases of the R phase, the S phase, and the T phase are equal to or less than the preset threshold value Q (second threshold value). The control device 10 proceeds to step S23 when the load currents of all the phases of the R phase, the S phase, and the T phase are equal to or less than the threshold value Q. On the other hand, if the load current of at least one of the R phase, the S phase and the T phase exceeds the threshold value Q, the control device 10 ends the process as it is.
 (ステップS23)
 制御装置10は、R相、S相およびT相のすべての相の負荷電流が閾値Q以下の第1期間を検出する。制御装置10は、第1期間の直前の期間の負荷電流が流れているときに、充電した相がR相か判定する。制御装置10は、充電した相がR相である場合は、ステップS24に進む。一方、R相でない場合は、ステップS25に進む。
(Step S23)
The control device 10 detects the first period in which the load currents of all the phases of the R phase, the S phase, and the T phase are equal to or less than the threshold value Q. The control device 10 determines whether the charged phase is the R phase when the load current in the period immediately before the first period is flowing. The control device 10 proceeds to step S24 when the charged phase is the R phase. On the other hand, if it is not the R phase, the process proceeds to step S25.
 (ステップS24)
 制御装置10は、S相をブートストラップコンデンサー18の充電相として設定する。
(Step S24)
The control device 10 sets the S phase as the charging phase of the bootstrap capacitor 18.
 (ステップS25)
 制御装置10は、第1期間の直前の期間の負荷電流が流れているときに、充電した相がS相か判定する。制御装置10は、充電した相がS相である場合は、ステップS26に進む。一方、S相でない場合は、ステップS27に進む。
(Step S25)
The control device 10 determines whether the charged phase is the S phase when the load current in the period immediately before the first period is flowing. The control device 10 proceeds to step S26 when the charged phase is the S phase. On the other hand, if it is not the S phase, the process proceeds to step S27.
 (ステップS26)
 制御装置10は、T相をブートストラップコンデンサー18の充電相として設定する。
(Step S26)
The control device 10 sets the T phase as the charging phase of the bootstrap capacitor 18.
 (ステップS27)
 制御装置10は、第1期間の直前の期間の負荷電流が流れているときに、充電した相がT相か判定する。制御装置10は、充電した相がT相である場合は、ステップS28に進む。一方、T相でない場合は、そのまま処理を終了する。
(Step S27)
The control device 10 determines whether the charged phase is the T phase when the load current in the period immediately before the first period is flowing. The control device 10 proceeds to step S28 when the charged phase is the T phase. On the other hand, if it is not the T phase, the process is terminated as it is.
 (ステップS28)
 高調波抑制装置4は、R相をブートストラップコンデンサー18の充電相として設定する。
(Step S28)
The harmonic suppression device 4 sets the R phase as the charging phase of the bootstrap capacitor 18.
 (ステップS29)
 制御装置10は、すべての相の負荷電流が閾値Q以下でほとんど流れていない期間に、充電相のブートストラップコンデンサー18を充電したいタイミングで充電するために、充電開始遅れ時間が経過しているか判定する。制御装置10は、充電開始遅れ時間が経過している場合はステップS30へ進む。一方、充電開始遅れ時間が経過していない場合は、処理をそのまま終了する。
(Step S29)
The control device 10 determines whether the charging start delay time has elapsed in order to charge the bootstrap capacitor 18 of the charging phase at the timing of wanting to charge while the load current of all the phases is below the threshold value Q and hardly flows. do. If the charging start delay time has elapsed, the control device 10 proceeds to step S30. On the other hand, if the charge start delay time has not elapsed, the process ends as it is.
 (ステップS30)
 制御装置10は、充電相のブートストラップコンデンサー18を充電する。
(Step S30)
The control device 10 charges the bootstrap capacitor 18 of the charging phase.
 実施の形態1では、図6に示すように、制御装置10が、負荷電流が最も小さい相を、充電相として検出する。制御装置10は、充電相の負荷電流が、前回の充電相の負荷電流の最小値に基づいて決定された閾値Bを下回った場合に、ブートストラップコンデンサーの充電を行う。 In the first embodiment, as shown in FIG. 6, the control device 10 detects the phase having the smallest load current as the charging phase. The control device 10 charges the bootstrap capacitor when the load current of the charging phase falls below the threshold value B determined based on the minimum value of the load current of the previous charging phase.
 また、実施の形態1では、図7に示すように、R相、S相およびT相の中で、負荷電流が流れない相が発生している場合には、制御装置10は、R相、S相およびT相の負荷電流の実効値の中から、最大実効値と最小実効値とを選択する。制御装置10は、最大実効値と最小実効値との比が閾値P以上の場合には、すべての相に電流がほとんど流れていない第1期間を判別する。制御装置10は、第1期間の直前の期間に検出した相を判定し、当該相に基づいて充電相を決定する。 Further, in the first embodiment, as shown in FIG. 7, when a phase in which the load current does not flow is generated among the R phase, the S phase, and the T phase, the control device 10 uses the R phase. The maximum effective value and the minimum effective value are selected from the effective values of the load currents of the S phase and the T phase. When the ratio of the maximum effective value to the minimum effective value is equal to or greater than the threshold value P, the control device 10 determines the first period in which almost no current flows in all the phases. The control device 10 determines the phase detected in the period immediately before the first period, and determines the charging phase based on the phase.
 以上のように、実施の形態1の高調波抑制装置4は、負荷電流が流れる場合は、負荷電流に基づいて充電を行い、負荷電流が流れない場合は、電源電圧に基づいて充電を行う。交流電源2の電圧不平衡が著しい、または、電源インピーダンスが大きいなどの理由で、交流電源2の電源電圧には、歪みが重畳している場合がある。実施の形態1では、そのような場合においても、交流電源2の影響を受けることなく、上側スイッチング素子を駆動させるためのブートストラップコンデンサー18を充電することができる。これにより、高調波抑制装置4を安定して起動させることができる。 As described above, the harmonic suppression device 4 of the first embodiment charges based on the load current when the load current flows, and charges based on the power supply voltage when the load current does not flow. Distortion may be superimposed on the power supply voltage of the AC power supply 2 because the voltage imbalance of the AC power supply 2 is significant or the power supply impedance is large. In the first embodiment, even in such a case, the bootstrap capacitor 18 for driving the upper switching element can be charged without being affected by the AC power supply 2. As a result, the harmonic suppression device 4 can be stably started.
 なお、従来の充電方法として、電源電圧と位相とを検出して充電相を決定する方法が考えられるが、電源電圧に歪みが重畳している場合には、交流電源2の位相を正しく認識することができない。その場合、最悪の場合には、高調波抑制装置4が起動できない場合がある。実施の形態1では、当該課題が解決でき、上記のように、高調波抑制装置4を安定して起動させることができる。 As a conventional charging method, a method of detecting the power supply voltage and the phase to determine the charging phase can be considered, but when distortion is superimposed on the power supply voltage, the phase of the AC power supply 2 is correctly recognized. Can't. In that case, in the worst case, the harmonic suppression device 4 may not be activated. In the first embodiment, the problem can be solved, and as described above, the harmonic suppression device 4 can be stably started.
 また、交流電源2の相間電圧不平衡、または、電源電圧歪みが大きい場合には、従来の充電方式では、交流電源2の位相情報が安定しない。その場合に、電源の位相情報を用いて、ブートストラップコンデンサー18を充電すると、電源位相情報が安定しないため、充電タイミングがずれてしまい、過電流により高調波抑制装置4が起動できない場合がある。実施の形態1では、負荷電流からブートストラップコンデンサー18の充電タイミングを決定するため、このような過電流の問題も回避することができる。 Further, when the phase voltage of the AC power supply 2 is unbalanced or the power supply voltage distortion is large, the phase information of the AC power supply 2 is not stable by the conventional charging method. In that case, if the bootstrap capacitor 18 is charged using the phase information of the power supply, the power supply phase information is not stable, so that the charging timing is deviated and the harmonic suppression device 4 may not be started due to the overcurrent. In the first embodiment, since the charging timing of the bootstrap capacitor 18 is determined from the load current, such an overcurrent problem can be avoided.
 実施の形態1では、高調波抑制装置4のブートストラップコンデンサー18の充電は、負荷電流が最小をとる相の負荷電流が、前回の負荷電流の最小値より決定した閾値Bを下回った場合に、実施する。このとき、ブートストラップコンデンサー18の充電を開始する負荷電流は、あらかじめ決められた固定値であってもよい。また、負荷電流が流れない相が発生している場合には、負荷電流が流れる相の中で最大実効値をとる相と負荷電流が流れない相の実効値電流との比を求める。当該比が閾値P以上の場合に、負荷電流がほとんど流れていない期間の直前に充電した相に基づいて充電相を決定し、充電を実施する。これらによって、高調波抑制装置4は、交流電源2に歪み等の電源電圧位相の判別に影響を与える要素が重畳されている場合でも、当該影響を受けることがない。したがって、高調波抑制装置4は、電源短絡させることなく、ブートストラップコンデンサー18を充電することができる。 In the first embodiment, the boot strap capacitor 18 of the harmonic suppression device 4 is charged when the load current of the phase having the minimum load current falls below the threshold value B determined from the minimum value of the previous load current. implement. At this time, the load current for starting charging of the bootstrap capacitor 18 may be a predetermined fixed value. Further, when a phase in which the load current does not flow is generated, the ratio of the effective value current of the phase having the maximum effective value among the phases in which the load current flows and the phase in which the load current does not flow is obtained. When the ratio is equal to or higher than the threshold value P, the charging phase is determined based on the phase charged immediately before the period in which the load current hardly flows, and charging is performed. As a result, the harmonic suppression device 4 is not affected even when an element that affects the determination of the power supply voltage phase such as distortion is superimposed on the AC power supply 2. Therefore, the harmonic suppression device 4 can charge the bootstrap capacitor 18 without short-circuiting the power supply.
 1 空気調和システム、2 交流電源、3 高調波発生負荷、4 高調波抑制装置、5 冷媒回路、6 リプルフィルタ、7 スイッチング回路、8 リアクトル、8a リアクトル、8b リアクトル、8c リアクトル、9 コンデンサー、10 制御装置、10a 充電相決定部、10b 制御信号生成部、11 負荷電流検出部、11r 負荷電流検出部、11t 負荷電流検出部、12 補償電流検出部、12a 補償電流検出部、12c 補償電流検出部、13 駆動回路、13r 第1駆動回路、13s 第1駆動回路、13t 第1駆動回路、13x 第2駆動回路、13y 第2駆動回路、13z 第2駆動回路、14 電流制限抵抗、15 ダイオード、16 制御電源、18 ブートストラップコンデンサー、20 制御電圧調整回路、21 メモリ、22 第1記憶部、23 第2記憶部、24 ブートストラップ制御回路、25 切替回路、30 整流器、31 直流リアクトル、32 平滑コンデンサー、50 圧縮機、51 熱交換器、52 熱交換器、53 膨張弁、54 冷媒配管、61 制御信号、62 駆動信号、62x 駆動信号、62y 駆動信号、62z 駆動信号、63 接続点、64 リアクトル、64a リアクトル、64b リアクトル、64c リアクトル、65 コンデンサー、65a コンデンサー、65b コンデンサー、65c コンデンサー、70 スイッチング素子、70r 上側スイッチング素子、70s 上側スイッチング素子、70t 上側スイッチング素子、70x 下側スイッチング素子、70y 下側スイッチング素子、70z 下側スイッチング素子、71 ダイオード、72 中点、72a 中点、72b 中点、72c 中点。 1 air conditioning system, 2 AC power supply, 3 harmonic generation load, 4 harmonic suppression device, 5 refrigerant circuit, 6 ripple filter, 7 switching circuit, 8 reactor, 8a reactor, 8b reactor, 8c reactor, 9 condenser, 10 control Device, 10a Charging phase determination unit, 10b Control signal generation unit, 11 Load current detection unit, 11r Load current detection unit, 11t Load current detection unit, 12 Compensation current detection unit, 12a Compensation current detection unit, 12c Compensation current detection unit, 13 drive circuit, 13r 1st drive circuit, 13s 1st drive circuit, 13t 1st drive circuit, 13x 2nd drive circuit, 13y 2nd drive circuit, 13z 2nd drive circuit, 14 current limiting resistance, 15 diode, 16 control Power supply, 18 bootstrap capacitor, 20 control voltage adjustment circuit, 21 memory, 22 1st storage unit, 23 2nd storage unit, 24 bootstrap control circuit, 25 switching circuit, 30 rectifier, 31 DC reactor, 32 smoothing capacitor, 50 Compressor, 51 heat exchanger, 52 heat exchanger, 53 expansion valve, 54 refrigerant pipe, 61 control signal, 62 drive signal, 62x drive signal, 62y drive signal, 62z drive signal, 63 connection point, 64 reactor, 64a reactor , 64b reactor, 64c reactor, 65 capacitor, 65a capacitor, 65b capacitor, 65c capacitor, 70 switching element, 70r upper switching element, 70s upper switching element, 70t upper switching element, 70x lower switching element, 70y lower switching element, 70z lower switching element, 71 diode, 72 midpoint, 72a midpoint, 72b midpoint, 72c midpoint.

Claims (12)

  1.  交流電源に接続された高調波発生負荷と並列に接続され、前記高調波発生負荷が発生する高調波を抑制する高調波抑制装置であって、
     上側スイッチング素子と下側スイッチング素子とが直列に接続された複数の上下アームが並列接続され、前記上側スイッチング素子と前記下側スイッチング素子との接続点である中点に前記交流電源の各相が接続された、整流器と、
     前記交流電源から前記高調波発生負荷に入力される負荷電流を検出する負荷電流検出部と、
     前記上側スイッチング素子をON/OFF動作させる第1駆動回路と、
     前記下側スイッチング素子をON/OFF動作させる第2駆動回路と、
     前記上側スイッチング素子および前記下側スイッチング素子の前記ON/OFF動作を前記第1駆動回路および前記第2駆動回路に実施させる制御信号を生成する制御装置と
     を備え、
     前記第1駆動回路は、
     前記上側スイッチング素子を駆動させる電源として作用するブートストラップコンデンサーと、
     前記ブートストラップコンデンサーを充電させる制御電源と
     を有し、
     前記制御装置は、
     前記交流電源の各相の前記負荷電流の中で、前記負荷電流が最小となる相を充電相として選択して、前記第2駆動回路に前記充電相に対応する前記下側スイッチング素子をON/OFF動作させることで、前記充電相に対応する前記第1駆動回路の前記ブートストラップコンデンサーを充電する、
     高調波抑制装置。
    A harmonic suppression device that is connected in parallel with a harmonic generation load connected to an AC power supply and suppresses the harmonics generated by the harmonic generation load.
    A plurality of upper and lower arms in which an upper switching element and a lower switching element are connected in series are connected in parallel, and each phase of the AC power supply is located at a middle point which is a connection point between the upper switching element and the lower switching element. Connected, rectifier and
    A load current detector that detects the load current input from the AC power supply to the harmonic generating load, and
    The first drive circuit that turns on / off the upper switching element and
    The second drive circuit that turns on / off the lower switching element, and
    A control device for generating a control signal for causing the first drive circuit and the second drive circuit to perform the ON / OFF operation of the upper switching element and the lower switching element is provided.
    The first drive circuit is
    A bootstrap capacitor that acts as a power source to drive the upper switching element,
    It has a control power supply to charge the bootstrap capacitor and
    The control device is
    Among the load currents of each phase of the AC power supply, the phase having the minimum load current is selected as the charging phase, and the lower switching element corresponding to the charging phase is turned on / in the second drive circuit. By operating the OFF operation, the bootstrap capacitor of the first drive circuit corresponding to the charging phase is charged.
    Harmonic suppressor.
  2.  前記負荷電流検出部が前記負荷電流を検出した場合に、
     前記制御装置は、
     前記交流電源の各相の前記負荷電流の中で、前記負荷電流が最小となる相を前記充電相として選択して、前記充電相の前記負荷電流が最小となる期間に、前記第2駆動回路に前記充電相に対応する前記下側スイッチング素子をON/OFF動作させて、前記充電相に対応する前記第1駆動回路の前記ブートストラップコンデンサーを充電する、
     請求項1に記載の高調波抑制装置。
    When the load current detection unit detects the load current,
    The control device is
    Among the load currents of each phase of the AC power supply, the phase having the minimum load current is selected as the charging phase, and the second drive circuit is used during the period when the load current of the charging phase is minimized. The lower switching element corresponding to the charging phase is turned ON / OFF to charge the bootstrap capacitor of the first drive circuit corresponding to the charging phase.
    The harmonic suppression device according to claim 1.
  3.  前記交流電源が不平衡となる場合に、
     前記制御装置は、
     前記交流電源の平衡時に前記負荷電流が流れる期間に対する、前記不平衡時に前記負荷電流が流れる期間の比率を、不平衡率として求め、
     前記充電相に対応する前記第1駆動回路の前記ブートストラップコンデンサーを充電する期間を、前記不平衡率に基づいて制限し、
     前記ブートストラップコンデンサーの充電量が第1閾値以上になるまで、複数周期の期間にわたって繰り返し前記ブートストラップコンデンサーを充電させる、
     請求項1または2に記載の高調波抑制装置。
    When the AC power supply becomes unbalanced,
    The control device is
    The ratio of the period during which the load current flows during the unbalance to the period during which the load current flows during the equilibrium of the AC power supply is determined as the unbalance rate.
    The period for charging the bootstrap capacitor of the first drive circuit corresponding to the charging phase is limited based on the unbalance rate.
    The bootstrap capacitor is repeatedly charged over a period of a plurality of cycles until the charge amount of the bootstrap capacitor becomes equal to or higher than the first threshold value.
    The harmonic suppression device according to claim 1 or 2.
  4.  前記負荷電流検出部が前記負荷電流を検出しない場合に、
     前記制御装置は、
     各相の前記負荷電流が第2閾値以下となる期間を第1期間として判別し、
     前記第1期間の直前の期間において充電相であった相に基づいて、前記第1期間の充電相を決定する、
     請求項1~3のいずれか1項に記載の高調波抑制装置。
    When the load current detector does not detect the load current,
    The control device is
    The period in which the load current of each phase is equal to or less than the second threshold value is determined as the first period.
    The charging phase of the first period is determined based on the phase that was the charging phase in the period immediately preceding the first period.
    The harmonic suppression device according to any one of claims 1 to 3.
  5.  前記第1駆動回路は、前記ブートストラップコンデンサーの充電方式として、複数の充電方式を記憶するメモリを有し、
     前記制御装置は、
     前記負荷電流検出部の前記負荷電流の検出の有無、または、前記交流電源の平衡および不平衡の別に基づいて、前記複数の充電方式の中から1つを選択する切替信号を前記第1駆動回路に対して出力し、
     前記第1駆動回路は、前記切替信号によって指定された充電方式を前記メモリから読み出して、当該充電方式で、前記ブートストラップコンデンサーの充電を行う、
     請求項1~4のいずれか1項に記載の高調波抑制装置。
    The first drive circuit has a memory for storing a plurality of charging methods as a charging method for the bootstrap capacitor.
    The control device is
    The first drive circuit outputs a switching signal for selecting one from the plurality of charging methods based on whether or not the load current is detected by the load current detection unit, or whether the AC power supply is balanced or unbalanced. Output to
    The first drive circuit reads the charging method specified by the switching signal from the memory and charges the bootstrap capacitor by the charging method.
    The harmonic suppression device according to any one of claims 1 to 4.
  6.  前記制御装置は、
     前記ブートストラップコンデンサーの充電中は、前記切替信号の出力を変化させない、
     請求項5に記載の高調波抑制装置。
    The control device is
    While charging the bootstrap capacitor, the output of the switching signal is not changed.
    The harmonic suppression device according to claim 5.
  7.  前記第1駆動回路は、
     前記制御電源の制御電圧を調整する制御電圧調整回路を有し、
     前記制御電圧調整回路は、
     前記負荷電流検出部が検出した前記負荷電流が第3閾値以上の場合は、前記制御電源の前記制御電圧を上昇させ、
     前記負荷電流検出部が検出した前記負荷電流が前記第3閾値未満の場合は、前記制御電源の前記制御電圧を下降させる、
     請求項1~6のいずれか1項に記載の高調波抑制装置。
    The first drive circuit is
    It has a control voltage adjustment circuit that adjusts the control voltage of the control power supply.
    The control voltage adjustment circuit is
    When the load current detected by the load current detection unit is equal to or higher than the third threshold value, the control voltage of the control power supply is increased.
    When the load current detected by the load current detection unit is less than the third threshold value, the control voltage of the control power supply is lowered.
    The harmonic suppression device according to any one of claims 1 to 6.
  8.  前記上側スイッチング素子および前記下側スイッチング素子は、ワイドバンドギャップ半導体によって構成されている、
     請求項1~7のいずれか1項に記載の高調波抑制装置。
    The upper switching element and the lower switching element are composed of a wide bandgap semiconductor.
    The harmonic suppression device according to any one of claims 1 to 7.
  9.  前記ワイドバンドギャップ半導体は、GaN(窒化ガリウム)、SiC(炭化珪素)、又は、ダイヤモンドである、
     請求項8に記載の高調波抑制装置。
    The wide bandgap semiconductor is GaN (gallium nitride), SiC (silicon carbide), or diamond.
    The harmonic suppression device according to claim 8.
  10.  前記交流電源は、三相交流電源であり、
     前記整流器は、前記三相交流電源の各相に対応させて設置された3つの前記上下アームの並列接続によって構成されている、
     請求項1~9のいずれか1項に記載の高調波抑制装置。
    The AC power supply is a three-phase AC power supply.
    The rectifier is configured by connecting three upper and lower arms in parallel, which are installed corresponding to each phase of the three-phase AC power supply.
    The harmonic suppression device according to any one of claims 1 to 9.
  11.  圧縮機、熱交換器、および、膨張弁が冷媒配管を介して接続された冷媒回路と、
     前記冷媒回路を駆動する前記高調波発生負荷と、
     前記高調波発生負荷が発生する高調波電流を抑制する請求項1~10のいずれか1項に記載の高調波抑制装置と
     を備えた、空気調和システム。
    A refrigerant circuit in which a compressor, a heat exchanger, and an expansion valve are connected via a refrigerant pipe,
    The harmonic generation load that drives the refrigerant circuit and
    An air conditioning system including the harmonic suppression device according to any one of claims 1 to 10, wherein the harmonic current generated by the harmonic generation load is suppressed.
  12.  前記高調波抑制装置は、前記空気調和システムの本体に内蔵されている、
     請求項11に記載の空気調和システム。
    The harmonic suppression device is built in the main body of the air conditioning system.
    The air conditioning system according to claim 11.
PCT/JP2020/020731 2020-05-26 2020-05-26 Harmonic suppression device and air conditioning system WO2021240642A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1175363A (en) * 1997-06-23 1999-03-16 Mitsubishi Electric Corp Suppressing apparatus for higher harmonic of power source
JP2012050177A (en) * 2010-08-24 2012-03-08 Mitsubishi Electric Corp Harmonic suppressor
JP2016158432A (en) * 2015-02-25 2016-09-01 ジョンソンコントロールズ ヒタチ エア コンディショニング テクノロジー(ホンコン)リミテッド Power conversion device, active filter and motor drive device
KR20190090542A (en) * 2018-01-25 2019-08-02 엘지전자 주식회사 Active power filter and air conditioner comprising the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1175363A (en) * 1997-06-23 1999-03-16 Mitsubishi Electric Corp Suppressing apparatus for higher harmonic of power source
JP2012050177A (en) * 2010-08-24 2012-03-08 Mitsubishi Electric Corp Harmonic suppressor
JP2016158432A (en) * 2015-02-25 2016-09-01 ジョンソンコントロールズ ヒタチ エア コンディショニング テクノロジー(ホンコン)リミテッド Power conversion device, active filter and motor drive device
KR20190090542A (en) * 2018-01-25 2019-08-02 엘지전자 주식회사 Active power filter and air conditioner comprising the same

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