WO2021227045A1

WO2021227045A1 - Semiconductor packaging method and packaging structure thereof

Info

Publication number: WO2021227045A1
Application number: PCT/CN2020/090612
Authority: WO
Inventors: 张波; 陈科; 秦培
Original assignee: 深圳市汇顶科技股份有限公司
Priority date: 2020-05-15
Filing date: 2020-05-15
Publication date: 2021-11-18

Abstract

Disclosed are a semiconductor packaging method and packaging structure thereof. The semiconductor packaging method comprises: electroplating pins on the upper surface of a substrate layer; bonding front surfaces of crystal grains to the upper surface of the substrate layer by means of a binder; filling the substrate layer, the pins and the crystal grains with glue to form a plastic-packaged housing; removing the substrate layer so as to cause the pins to be exposed from the lower surface of the plastic-packaged housing; and removing the binder so as to cause the front surfaces of the crystal grains to be exposed from the lower surface of the plastic-packaged housing, and recessing the front surfaces of the crystal grains to the lower surface of the plastic-packaged housing, thereby reducing the thickness of a semiconductor packaging structure.

Description

Semiconductor packaging method and packaging structure

Technical field

The embodiments of the present application relate to the field of semiconductor technology, and in particular, to a semiconductor packaging method and a packaging structure thereof.

Background technique

With the development of semiconductor and electronic technology, the thickness of semiconductor packaging structures is getting thinner and thinner, and the degree of integration is getting higher and higher. For example, in the Quad Flat No-lead Package (QFN), the QFN structure usually includes a lead frame formed by die pads and pins, a plastic package case, and a die. The die is directly pasted to the die pad through the die to form a plastic package shell. The thickness of the QFN package structure is the sum of the thickness of the lead frame and the thickness of the plastic package shell, which is about 400 mm. The total thickness of the package structure is directly related to the above structure and process level. In this case, reducing the thickness of the package structure is full of difficulties and challenges.

Summary of the invention

The purpose of some embodiments of the present application is to provide a semiconductor packaging method and packaging structure, which greatly reduces the thickness of the semiconductor packaging structure.

The embodiment of the present application provides a semiconductor packaging method, including: electroplating pins and die pads on the upper surface of a base layer; bonding the backside of the die on the die pad with an adhesive; The base layer, the pins, the die pads, and the die encapsulation form a plastic-encapsulated shell, and the plastic-encapsulated shell covers the pin with a larger area than the substrate layer and the pin contact The area of the die pad that the plastic encapsulation case wraps is larger than the contact area of the base layer and the die pad; and the base layer is removed so that the die pad and the die pad The pins are exposed on the lower surface of the plastic housing.

Compared with the prior art, the embodiment of the present application is designed for the semiconductor packaging method, for example, the base layer is removed, so that the die pads and pins are exposed on the lower surface of the plastic housing, and the outside The circuit is directly electrically connected to the die through the die pad, ensuring that the overall performance of the chip is not affected while reducing the thickness of the semiconductor package structure.

Optionally, the above packaging method further includes providing die pads, the back surface of the die pad is attached to the base layer through the die pad, and the front surface of the die pad is adhered to the base layer through the die pad. The agent is connected to the back side of the die.

Optionally, before pouring the base layer, the pins, and the die pads to form a plastic enclosure, the packaging method further includes: forming leads between the die and the pins by wire bonding .

Optionally, pouring the base layer, the pins, and the die pads to form a plastic package housing includes: using a special-shaped plastic packaging mold to treat the base layer, the pins, and the die pads Glue is poured to form a special-shaped plastic-encapsulated shell, and the special-shaped plastic-encapsulated shell is used for exposing the front surface of the die, and the front surface of the die is recessed on the upper surface of the special-shaped plastic-encapsulated shell.

Optionally, in the above packaging method, at least two rows of the leads surround the die pad.

Optionally, in the above-mentioned packaging method, the die pads or the pins are electroplated with a combination of two, three or four metals among nickel, gold, silver, and palladium to form a laminated structure.

Optionally, in the above packaging method, the thickness of the laminated structure of the die pad or the lead is less than 0.1 mm.

Optionally, in the above packaging method, the base layer is a metal plate with a thickness less than 200um.

The embodiment of the present application provides a semiconductor packaging method, including: electroplating pins on the upper surface of the base layer; bonding the front surface of the crystal grains on the upper surface of the base layer with an adhesive; The feet and the die are filled with glue to form a plastic shell, the area of the plastic shell wrapping the pins is larger than the contact area of the base layer with the pins, and the plastic shell wrapping the die The area is larger than the contact area of the base layer and the die; the base layer is removed so that the pins are exposed on the lower surface of the plastic housing; and the adhesive is removed so that the The front surface of the die is exposed on the lower surface of the plastic housing, and the front surface of the die is recessed on the lower surface of the plastic housing.

Compared with the prior art, the embodiment of the present application is designed for the semiconductor packaging method, such as removing the base layer and removing the adhesive, so that the front surface of the die and the pins are exposed to the plastic package. The lower surface of the casing further reduces the thickness of the semiconductor packaging structure.

Optionally, after the adhesive is removed, the above-mentioned packaging method further includes: forming a lead between the front surface of the die and the pin by wire bonding.

Optionally, after the leads are formed by wire bonding between the front surface of the die and the pins, the above-mentioned packaging method further includes: spot-coating the leads and curing the resin gel.

Optionally, after pouring the base layer, the pins, and the die to form a plastic-encapsulated shell, the above-mentioned packaging method further includes: grinding the upper surface of the plastic-encapsulated shell to expose the plastic-encapsulated shell The back side of the die.

Optionally, in the above packaging method, at least two rows of the leads surround the die.

Optionally, in the above-mentioned packaging method, the pins are electroplated with a combination of two, three, or four metals among nickel, gold, silver, and palladium to form a laminated structure.

Optionally, in the above-mentioned packaging method, the thickness of the laminated structure of the pin is less than 0.1 mm.

An embodiment of the present application also provides a semiconductor package structure, including: a die, the back side of the die is connected to the die pad by an adhesive; the die pad, the die pad is electroplated on The upper surface of the base layer; pins, the pins are electroplated on the upper surface of the base layer; The die pad is formed by encapsulating the die, the area of the plastic encapsulation shell wrapping the pin is larger than the area of the base layer contacting the pin, and the area of the plastic encapsulating shell wrapping the die pad is larger than the substrate The area of the bottom layer in contact with the die pad is such that the base layer can be removed, wherein the die pad and the lead are exposed on the lower surface of the plastic housing.

Compared with the prior art, the embodiment of the present application has designed the semiconductor package structure so that the die pads and pins are exposed on the lower surface of the plastic housing, and the external circuit directly passes through the die pads and the die. The particle electrical connection ensures that the overall performance of the chip is not affected while reducing the thickness of the semiconductor packaging structure.

Optionally, the above-mentioned package structure further includes: a lead, which connects the die and the lead.

Optionally, the plastic housing is a special-shaped plastic housing, and the special-shaped plastic housing is used to expose the front surface of the die, and the front surface of the die is recessed on the upper surface of the special-shaped plastic housing.

Optionally, in the above-mentioned package structure, at least two rows of the leads surround the die pad.

Optionally, in the above-mentioned package structure, the die pad or the lead is plated with a combination of two, three or four metals among nickel, gold, silver, and palladium to form a laminated structure.

Optionally, in the above-mentioned package structure, the thickness of the laminated structure of the die pad or the lead is less than 0.1 mm.

Optionally, in the above-mentioned packaging structure, the base layer is a metal plate with a thickness less than 200um.

An embodiment of the present application also provides a semiconductor packaging structure, including: a die, the front surface of the die is connected to the upper surface of the base layer by an adhesive; pins, the pin is electroplated on the upper surface of the base layer ; Plastic-encapsulated housing, the plastic-encapsulated housing is formed by the base layer, the pins and the die casting, and the area of the plastic-encapsulated housing wrapping the pins is larger than that of the base layer and the lead The area where the feet are in contact with the die, and the area where the die is wrapped by the plastic housing is larger than the area where the base layer contacts the die, so that the base layer is removed, and the pins are exposed to the plastic housing On the lower surface of the body, by removing the adhesive, the front surface of the die is exposed to the lower surface of the plastic housing, and the front surface of the die is recessed on the lower surface of the plastic housing.

Compared with the prior art, the embodiment of the present application is designed for the semiconductor package structure, so that by removing the base layer and the adhesive, the front surface of the die and the pins are exposed to the plastic housing The lower surface further reduces the thickness of the semiconductor package structure.

Optionally, the above-mentioned package structure further includes: a lead, which connects the die and the lead after the adhesive is removed.

Optionally, the lead is shielded by resin gel.

Optionally, the plastic-encapsulated shell exposes the back surface of the die.

Optionally, in the above-mentioned package structure, at least two rows of the leads surround the die.

Optionally, in the above-mentioned package structure, the pins are electroplated with a combination of two, three or four metals among nickel, gold, silver and palladium to form a laminated structure.

Optionally, in the above-mentioned package structure, the thickness of the laminated structure of the pin is less than 0.1 mm.

Description of the drawings

One or more embodiments are exemplified by the pictures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise stated, the drawings in the drawings do not constitute a scale limitation. The following division of the various embodiments is for convenience of description, and should not constitute any limitation on the specific implementation of the present invention, and the various embodiments may be combined with each other without contradiction.

FIG. 1 is a schematic flowchart of a semiconductor packaging method provided by an embodiment of the application;

2 is a schematic flowchart of a semiconductor packaging method provided by an embodiment of the application;

3 is a schematic diagram of the corresponding structure after electroplating pins and die pads on the substrate layer in the steps of the semiconductor packaging method provided by an embodiment of the application;

4 is a schematic diagram of the corresponding structure after the back side of the die is attached to the die pad through the adhesive in the steps of the semiconductor packaging method provided by an embodiment of the application;

FIG. 5 is a schematic diagram of the corresponding structure after wire bonding in the steps of the semiconductor packaging method provided by an embodiment of the application; FIG.

FIG. 6 is a schematic diagram of a corresponding structure after a plastic encapsulation case is formed by pouring glue in the steps of a semiconductor packaging method according to an embodiment of the application; FIG.

FIG. 7 is a schematic diagram of the corresponding structure after the base layer is removed in the steps of the semiconductor packaging method provided by an embodiment of the application; FIG.

FIG. 8 is a schematic flowchart of a semiconductor packaging method provided by another embodiment of this application;

FIG. 9 is a schematic diagram of a corresponding structure of a special-shaped plastic encapsulation shell formed by using a special-shaped plastic encapsulation mold in the steps of a semiconductor packaging method according to another embodiment of the application;

10 is a schematic diagram of the corresponding structure after the base layer is removed in the steps of the semiconductor packaging method provided by another embodiment of the application;

FIG. 11 is a schematic flowchart of a semiconductor packaging method provided by another embodiment of this application;

FIG. 12 is a schematic diagram of the corresponding structure after the plastic packaging case is formed in the steps of the semiconductor packaging method according to another embodiment of the application; FIG.

FIG. 13 is a schematic diagram of the corresponding structure after the base layer is removed in the steps of the semiconductor packaging method according to another embodiment of the application; FIG.

14 is a schematic diagram of a corresponding structure after the adhesive is removed in the steps of the semiconductor packaging method provided by another embodiment of the application;

15 is a schematic diagram of the corresponding structure after wire bonding in the semiconductor packaging method step provided by another embodiment of this application;

16 is a schematic diagram of the corresponding structure after the resin colloid is applied and cured in the steps of the semiconductor packaging method provided by another embodiment of the application;

FIG. 17 is a flowchart of a semiconductor packaging method provided by another embodiment of this application;

FIG. 18 is a schematic diagram of the corresponding structure after the plastic packaging case is formed in the steps of the semiconductor packaging method provided by another embodiment of the application; FIG.

FIG. 19 is a schematic diagram of the corresponding structure after polishing the plastic package in the steps of the semiconductor packaging method according to another embodiment of the application; FIG.

FIG. 20 is a schematic diagram of the corresponding structure after further polishing the plastic package in the steps of the semiconductor packaging method according to another embodiment of the application; FIG.

21 is a schematic diagram of the corresponding structure after the base layer is removed in the steps of the semiconductor packaging method provided by another embodiment of this application;

22 is a schematic diagram of the corresponding structure after the adhesive is removed in the steps of the semiconductor packaging method according to another embodiment of the application;

FIG. 23 is a schematic diagram of the corresponding structure after wire bonding in the steps of the semiconductor packaging method provided by another embodiment of the application; FIG.

FIG. 24 is a schematic diagram of the corresponding structure after the resin colloid is applied and cured in the steps of the semiconductor packaging method provided by another embodiment of the application; FIG.

FIG. 25 is a schematic diagram of a semiconductor package structure provided by another embodiment of this application;

FIG. 26 is a schematic diagram of a semiconductor package structure provided by another embodiment of this application;

FIG. 27 is a schematic diagram of a semiconductor package structure provided by another embodiment of this application;

FIG. 28 is a schematic diagram of a semiconductor package structure provided by another embodiment of this application;

FIG. 29 is a top view of a lead frame provided by another embodiment of the application.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the present application clearer, some embodiments of the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not used to limit the present application.

FIG. 1 is a flowchart of each step of a semiconductor packaging method provided by an embodiment of the application, and the method includes:

S1: Electroplating pins and die pads on the upper surface of the base layer.

Wherein, the pins and die pads are electroplated on the upper surface of the base layer, so that the pins and die pads are connected to the base layer respectively.

S2: Adhere the back surface of the die on the die pad through an adhesive.

Specifically, the back surface of the die may be connected to the upper surface of the die pad by an adhesive, which specifically includes coating the adhesive on the back side of the die or coating the adhesive on the upper surface of the die pad, Then, the back surface of the die and the upper surface of the die pad are connected by curing the adhesive. Wherein, the binder may include silver paste.

S3: Pouring the base layer, the pins, the die pads, and the die to form a plastic enclosure, and the area of the plastic enclosure surrounding the pins is larger than that of the base layer and the die. As for the contact area of the pin, the area of the die pad wrapped by the plastic package is larger than the contact area of the base layer and the die pad.

The formation of the plastic-encapsulated shell can be processed by injection molding, and transfer injection molding or compression injection molding can be used during injection molding. The plastic shell wraps the pins and die pads, where the area of the plastic shell wraps the pins is larger than the contact area of the base layer and the pin, and the plastic shell wraps the die pads area larger than the base layer and the die pads Contact area, therefore, the bonding force between the plastic package and the pin is greater than the bonding force between the base layer and the pin, and the bonding force between the plastic package and the die pad is greater than the base layer and the die pad The bonding force between makes the base layer easy to remove.

S4: Remove the base layer so that the die pads and the pins are exposed on the lower surface of the plastic housing.

The method of removing the base layer may be manual removal or mechanical removal. By tearing off the base layer, the thickness of the semiconductor package structure is reduced.

As shown in FIG. 2, before pouring the base layer, the pins, and the die pads to form a plastic enclosure, the method further includes: S21: forming leads between the die and the pins by wire bonding .

Using package wire bonding, the solder joints formed on the front surface of the die are connected to the pins through leads. Wherein, the material of the lead wire is gold, silver, aluminum, copper or palladium-plated copper alloy. In the embodiment of the present application, the lead is first punched out, and then the plastic-encapsulated housing is formed.

3-7 are schematic structural diagrams corresponding to each step of a method for forming a packaging structure provided by an embodiment of the application.

3 is a schematic diagram of the corresponding structure after electroplating pins and die pads on the substrate layer in the steps of the semiconductor packaging method provided by an embodiment of the application. Please refer to FIG. 3, the lead frame 11 includes a base layer 20, die pads 21 and pins 23, wherein the die pads 21 and the pins 23 are electroplated on the upper surface of the base layer 20. The lead frame 11 can be manufactured by an Electro Fine Forming method. The substrate layer 20 is used to provide support for the plastic shell. The thickness of the substrate layer 20 may be less than 200 μm, and the substrate layer 20 may be made of stainless steel, or a metal plate or other materials. The upper surface of the die pad 21 is used to mount the die, and is used to ground the die and provide a heat dissipation function for the die. The die pad 21 and the lead 23 can be formed by plating a combination of 2 to 3 metals of nickel, gold, silver, and palladium or all the metals to form a laminated structure. Preferably, the die pad 21 or the lead 23 is a laminated structure. The layer structure is a three-layer structure of silver, nickel and gold in sequence. The bottom layer is gold, so that the die pads and pins are electroplated on the base layer respectively. The bonding performance is good, because the bonding performance of nickel and gold and nickel and silver is good Therefore, the nickel is located in the middle layer and the silver is located in the top layer, which is convenient for soldering, so that the electrical connection performance with external devices is good. The thickness of the laminated structure can be less than 0.1mm, preferably, the laminated thickness is 65mm.

The crystal grain referred to in this application can also be referred to as a bare chip or die, and refers to a unit in a silicon wafer used in the production of a silicon semiconductor integrated circuit.

FIG. 4 is a schematic diagram of the corresponding structure after the back side of the die is bonded to the die pad through the adhesive in the step of the semiconductor packaging method provided by an embodiment of the application. Please refer to FIG. 4, the back side 122 of the die 12 is bonded The agent 14 is connected to the upper surface of the die pad 21. Specifically, the adhesive 14 is applied to the back surface 122 of the die 12, or the adhesive 14 is applied to the upper surface of the die pad 21, and the back surface 122 of the die 12 is welded to the die by curing the adhesive 14. The disk 21 is bonded together, and the back surface 122 of the die 12 may be a back surface formed after a thinning and polishing process, and forms an intermediate product structure 30.

FIG. 5 is a schematic diagram of the corresponding structure after wire bonding in the semiconductor packaging method step provided by an embodiment of the application. Please refer to FIG. Connected by lead 16. Wherein, the material of the lead 16 is gold, silver, aluminum, copper or palladium-plated copper alloy. There may be leads of multiple materials in the same package product, but a single wire bonding has only one of the materials listed. For example, a product may have leads that use both gold wires and copper wires.

FIG. 6 is a schematic diagram of the corresponding structure after forming a plastic shell by pouring glue in the steps of a semiconductor packaging method according to an embodiment of the application. Please refer to FIG. 6, the plastic shell 10 completely envelops the die 12; The injection molding process can be used, and the transfer injection molding or compression injection molding process can be used during injection molding, and the leads have been formed before the plastic package housing is formed. The plastic housing 10 formed in the embodiment of the present application completely covers the die 12, the die pad 11, the lead 16 and shields the upper surface of the base layer 20. Among them, the area of the plastic packaged housing that wraps the pins is larger than the area of the base layer and the pin contact, and the area of the plastic packaged housing that wraps the die pad is larger than the area of the base layer that contacts the die pad. Therefore, the plastic package and the pin The bonding force between the base layer and the pin is greater than the bonding force between the plastic shell and the die pad is greater than the bonding force between the base layer and the die pad, making the base layer easy to remove .

FIG. 7 is a schematic diagram of the corresponding structure after the base layer is removed in the steps of the semiconductor packaging method according to an embodiment of the application. Please refer to FIG. 7 to remove the base layer 20 of the lead frame 11 to finally form the semiconductor packaging structure 33. The base layer 20 of the lead frame 11 is removed manually or mechanically. Since the pins are plated on the base layer, the base layer 20 can be removed directly by tearing off to expose the pins 23 on the lower surface 102 of the plastic housing The back side of the die pad 21 and the back side of the die pad 21. Thereafter, the semiconductor package structure can be electrically connected with an external circuit.

The thickness of the semiconductor package structure in the prior art is the thickness of the plastic package case and the thickness of the copper lead frame. Compared with the prior art, the embodiment of the present application actually includes a base layer and die pads and pins electroplated on the base layer. The thickness of the die pads and pins is 30-100 mm. Preferably, the thickness is 65mm, and the final thickness of the semiconductor package structure is the sum of the thickness of the plastic package shell and the thickness of the die pad layer, or the sum of the thickness of the plastic package shell and the thickness of the pins. After the base layer, the thickness of the semiconductor packaging structure can be significantly reduced, and the actual product's demand for ultra-thin design can be met. Through the design of the semiconductor packaging method, for example, the base layer is removed, so that the lower surface of the die pad and the pins are exposed on the lower surface of the plastic package case, and the external circuit directly passes through the die pad and the die. The electrical connection reduces the thickness of the semiconductor packaging structure while ensuring that the overall performance of the semiconductor packaging structure is not affected.

Another embodiment of the present application relates to a packaging method. The difference from the previous embodiment is that the embodiment of the present application uses a special-shaped plastic packaging mold.

FIG. 8 is a flowchart of each step of the semiconductor packaging method provided by the second embodiment of this application, and the method includes:

S81: Electroplating pins and die pads on the upper surface of the base layer.

S82: Adhere the back surface of the die on the die pad through an adhesive.

Specifically, the back surface of the die can be bonded to the upper surface of the die pad by an adhesive, which specifically includes coating the adhesive on the back side of the die, or coating the upper surface of the die pad with adhesive. The bonding agent is used to bond the back surface of the die and the upper surface of the die pad together through a curing adhesive. For example, the binder may be silver paste.

S83: Use a special-shaped plastic encapsulation mold to encapsulate the base layer, the pins, and the die pad to form a special-shaped plastic encapsulated shell, the special-shaped plastic encapsulated shell is used to expose the front surface of the die, and The front surface of the pellets is recessed on the upper surface of the special-shaped plastic-encapsulated shell.

The special-shaped plastic shell wraps the pins and die pads. The area of the special-shaped plastic shell that wraps the pins is larger than the contact area between the base layer and the pins. The contact area of the die pad, therefore, the bonding force between the special-shaped plastic package and the pin is greater than the bonding force between the base layer and the pin, and the bonding force between the special-shaped plastic package and the die pad is greater than the base layer The bonding force with the die pad makes the base layer easy to remove. The front surface of the die is recessed on the upper surface of the special-shaped plastic-sealed shell, and the height of the front surface of the die recessed on the upper surface of the special-shaped plastic-sealed shell is determined by the special-shaped plastic packaging mold.

S84: Remove the base layer so that the die pads and the pins are exposed on the lower surface of the special-shaped plastic encapsulation housing.

The package structure provided by the embodiment of the present application will be described in detail below with reference to the accompanying drawings. For the same or corresponding parts as the previous embodiment, reference may be made to the detailed description of the foregoing embodiment, which will not be repeated here.

9-10 are schematic structural diagrams corresponding to some steps of a semiconductor packaging method provided by another embodiment of the application.

FIG. 9 is a schematic diagram of the corresponding structure of a special-shaped plastic package formed by using a special-shaped plastic package mold in a step of a semiconductor packaging method according to another embodiment of the application. Please refer to Fig. 9. The special-shaped plastic package mold is used to form a special-shaped plastic package 15 The special-shaped plastic housing 15 formed in the embodiment of the present application exposes part or all of the front surface 121 of the die 12, that is, the special-shaped plastic housing 15 in the embodiment of the present application covers the front and side surfaces of the die 12, and the pins 23 And the lead 16, in fact, does not completely enclose the die 12.

In this application, the front surface 121 of the die 12 and the back surface 122 of the die 12 are disposed opposite to each other.

FIG. 10 is a schematic diagram of the corresponding structure after the base layer is removed in the steps of the semiconductor packaging method according to another embodiment of the application. Please refer to FIG. 10, the base layer 20 of the lead frame 11 is removed to form the final semiconductor packaging structure. Removing the base layer reduces the thickness of the semiconductor package structure.

Compared with the prior art, the embodiment of the present application can significantly reduce the thickness of the semiconductor package structure after removing the base layer, which not only meets the requirements for ultra-thin design of the semiconductor package structure, but also exposes the special-shaped plastic package shell by using a special-shaped plastic package mold Extruding part or all of the front side of the die satisfies the actual product's need to open the window for the front surface of the ultra-thin semiconductor package structure, for example, to meet the optical fingerprint sensor's demand for light path collection. At the same time, the height of the front surface of the die recessed on the lower surface of the special-shaped plastic package is determined by the special-shaped plastic package to adjust the thickness of the semiconductor package structure.

FIG. 11 is a flowchart of each step of a semiconductor packaging method provided by another embodiment of this application, and the method includes:

S11: Electroplating pins on the upper surface of the base layer.

Wherein, the pins are electroplated on the upper surface of the base layer to realize the connection between the pins and the base layer.

S12: Glue the front surface of the crystal grains through an adhesive on the upper surface of the base layer.

Specifically, the front surface of the die is connected to the upper surface of the base layer by an adhesive, the adhesive is coated on the front side of the die, or the adhesive is directly coated on the base layer, and then the die is cured by curing the adhesive. The front side is connected to the base layer. For example, the binder may be silver paste.

S13: Pouring the base layer, the pins, and the die to form a plastic-encapsulated shell, and the area of the plastic-encapsulated shell wrapping the pins is larger than the contact area of the substrate layer and the pins; The area of the plastic package shell enclosing the crystal grain is larger than the contact area of the base layer and the crystal grain.

The formation of the plastic-encapsulated shell can be processed by injection molding, and transfer injection molding or compression injection molding can be used during injection molding. The plastic-encapsulated shell wraps the pins and the die. The area of the plastic-encapsulated shell that wraps the pins is larger than the contact area between the base layer and the pin, and the plastic-encapsulated shell covers the area of the die that is larger than the contact area between the base layer and the die. Therefore, The bonding force between the plastic shell and the pins is greater than the bonding force between the base layer and the pins, and the bonding force between the plastic shell and the die is greater than the bonding force between the base layer and the die, making the base layer easier Remove.

S14: Remove the base layer so that the pins are exposed on the lower surface of the plastic housing.

The method of removing the base layer may be manual removal or mechanical removal. By tearing off the base layer, the thickness of the semiconductor package structure can be reduced.

S15: Remove the adhesive so that the front surface of the die is exposed on the lower surface of the plastic housing, and the front surface of the die is recessed on the lower surface of the plastic housing.

In the embodiment of the present application, by removing the adhesive, the front surface of the die is exposed to the lower surface of the plastic housing. The adhesive can be removed using acid or alkaline solutions, or a variety of organic solutions can be used to remove the adhesive. The depth of the front surface of the die in the plastic housing can be controlled by adjusting the thickness of the coated adhesive. The embodiment of the application can complete the window opening without making a special-shaped plastic sealing mold, and has lower cost and greater flexibility in structural design.

After removing the adhesive, it also includes:

S16: A lead is formed between the front surface of the die and the pin by wire bonding.

Using package wire bonding, the solder joints formed on the front surface of the die are connected to the pins through leads. Wherein, the material of the lead wire is gold, silver, aluminum, copper or palladium-plated copper alloy. In the embodiment of the present application, a plastic housing is formed first, and then leads are formed by wire bonding. Since the front surface of the die is recessed in the plastic housing, wire bonding on the front side of the die can reduce the height of the lead, thereby reducing the thickness of the entire semiconductor package structure.

After forming the lead between the front surface of the die and the pin by wire bonding, the method further includes:

S17: Dotting the lead wire and curing the resin colloid.

Protect the lead exposed outside the plastic shell and the area on the front surface of part of the die by means of dispensing and curing resin gel.

12-16 are schematic structural diagrams corresponding to steps of a semiconductor packaging method provided by another embodiment of this application.

FIG. 12 is a schematic diagram of the corresponding structure after the plastic packaging case is formed in the steps of the semiconductor packaging method provided by another embodiment of the application. Please refer to FIG. 12. The lead frame includes a base layer 20 and pins 23. The upper surface of the bottom layer 20 realizes the connection between the pins 23 and the top surface of the bottom layer 20. The lead frame can be manufactured by the electro-fine forming method. The difference from the foregoing embodiment is that the lead frame 20 of the embodiment of the present application does not include die pads. Among them, the base layer 20 has a supporting function, and its thickness can be less than 200 μm, and the base layer 20 is made of stainless steel, or a metal plate or other materials. The pin 23 can be electroplated to form a laminated structure with a combination of two or three metals of nickel, gold, silver, and palladium, or a combination of all metals, and the thickness of the laminated structure can be less than 0.10 mm. The adhesive 14 is coated and cured on the front surface 121 of the die 12 or on the base layer 20 of the lead frame. The front surface 121 of the die 12 is connected to the base layer 20 of the lead frame through a patch. The final curing of the adhesive 14 can be accomplished by oven baking or ultraviolet irradiation. Further, a plastic encapsulation process is used to form the completely shielding die 12 and the plastic encapsulation housing 10, and at this time, an encapsulation intermediate 40 as shown in FIG. 12 is formed.

FIG. 13 is a schematic diagram of the corresponding structure after the base layer is removed in the steps of the semiconductor packaging method provided by another embodiment of the application. Please refer to FIG. 13, and the base layer 20 can be removed manually or mechanically. The bonding force between the feet is greater than the bonding force between the base layer and the pins, and the bonding force between the plastic shell and the die pad is greater than the bonding force between the base layer and the die pad, making the base layer easy to move In addition, for example, the base layer 20 can also be removed directly by tearing off, so as to expose the back surface 102 of the plastic housing 10 in contact with the base 20. FIG. 13 is a schematic diagram of the structure of the package intermediate 50 shown in FIG. 12 after the base layer 20 of the lead frame is removed.

14 is a schematic diagram of the corresponding structure after removing the adhesive in the steps of the semiconductor packaging method according to another embodiment of the application. 12 Adhesive 14 on the front side 121. One of the methods that can be used to remove the binder 14 is to soak the intermediate product 50 shown in FIG. 13 with an acid or alkali solution, and it is also possible to soak the intermediate product 50 with a variety of organic solutions. Generally, different adhesives 14 can be removed in different ways. After that, some conventional treatments, such as cleaning, are performed to obtain the semiconductor package intermediate structure 60 as shown in FIG. 14. The intermediate structure 60 has the following characteristics: the front surface 121 of the die 12 and the back surface 231 of the lead 23 of the lead frame are exposed on the bottom surface 102 of the plastic package case 10, and the front surface 121 of the die 12 is recessed and embedded in the intermediate structure 60 Inside. In the early stage, the depth of the die 12 recessed in the intermediate structure 60 can be controlled by adjusting the thickness of the coated adhesive 14, and this depth can control the height of the wire bonding. In this way, the windowing action is completed, so that the subsequent packaging and wire bonding are not required. Opening the window can be completed by making a special-shaped plastic sealing mold, with lower cost and greater flexibility in structural design.

The term “windowing” in this application refers to exposing the front surface of the crystal grains.

FIG. 15 is a schematic diagram of the structure corresponding to the steps of the semiconductor packaging method provided by another embodiment of the application. Please refer to FIG. The solder joints 161, which are wired to the die 12 recessed in the plastic housing, can reduce the actual height of the lead, and the thickness of the semiconductor package structure can be reduced by reducing the height of the lead 16.

FIG. 16 is a schematic diagram of the corresponding structure after the resin colloid is applied and cured in the steps of the semiconductor packaging method provided by another embodiment of the application. Please refer to FIG. 16. Further, according to application requirements, the resin colloid 18 can be cured by dot coating Protect the lead 16 and part of the front surface 121 area of the die 12 exposed outside the plastic package housing 10. FIG. 16 is a schematic structural diagram of the square semiconductor package structure 70 after the wire-bonded product shown in FIG. 15 is applied with the cured resin gel 18. Compared with the embodiment that requires special-shaped plastic sealing molds, the difficulty of the front-side plastic sealing window opening requirements is that for different product designs, different window opening requirements need to be designed and processed with different special-shaped plastic sealing molds, which is not only costly, but also has a long cycle. After the change, the special-shaped plastic encapsulation mold cannot be used again. The front plastic sealing window opening in the embodiment of the present application does not need to use a special-shaped plastic sealing mold, which saves the cost of the manufacturing process. The semiconductor package structure of the embodiment of the present application does not include die pads, and by removing the base layer, the thickness of the semiconductor package structure is further reduced.

Compared with the prior art, the embodiment of the present application first forms a plastic package and then draws out the leads. This application can also be directly referred to as wire bonding. The front surface of the die is recessed in the semiconductor package structure, which helps Reduce the package wire height to reduce the overall thickness of the package. The thickness of the die bond can be adjusted to control the depth of the die embedded in the plastic housing, thereby adjusting the height of the lead. By removing the adhesive, the plastic package can be opened without the need to make special-shaped plastic package molds. The cost is lower and the structural design flexibility is greater. It meets the needs of some ultra-thin semiconductor packaging structures that require windows to be opened on the front surface of the plastic package, such as optical fingerprints. For the sensor, only the part where the sensor collects the signal can be exposed in the open window part.

FIG. 17 is a flowchart of each step of a semiconductor packaging method provided by another embodiment of this application, and the method includes:

S71: Electroplating pins on the upper surface of the base layer.

S72: Glue the front surface of the crystal grains through an adhesive on the upper surface of the base layer.

Specifically, the front surface of the die is connected to the upper surface of the base layer by an adhesive, which specifically includes coating the adhesive on the front side of the die, or directly coating the adhesive on the base layer, and then curing the adhesive. Connect the front side of the die to the base layer. For example, the binder may be silver paste.

S73: Pouring the base layer, the pins, and the die to form a plastic-encapsulated housing, and the area of the plastic-encapsulated housing that wraps the leads is larger than the contact area of the base layer with the leads. The area of the plastic package shell enclosing the crystal grain is larger than the contact area of the base layer and the crystal grain.

After pouring the base layer, the pins, and the die to form a plastic housing, the method further includes:

S74: Grind the upper surface of the plastic-encapsulated shell, so that the plastic-encapsulated shell has exposed the back surface of the die.

Polish the upper surface of the plastic package shell to make the semiconductor package structure thinner. The thickness of the polishing can be polished to not expose the back of the die, or it can be polished to just expose the back of the die, or to expose the back of the die. The plastic package shell and the back surface of the die are further polished at the same time to further reduce the thickness of the semiconductor packaging structure. The thickness of the polishing can be adjusted according to the need for the thickness of the packaging structure.

S75: Remove the base layer so that the pins are exposed on the lower surface of the plastic housing.

The method of removing the base layer can be manual removal or mechanical removal. By tearing off the base layer, the thickness of the semiconductor package structure can be reduced.

S76: Remove the adhesive so that the front surface of the die is exposed on the lower surface of the plastic housing, and the front surface of the die is recessed on the lower surface of the plastic housing.

In the embodiment of the present application, by removing the adhesive, the front surface of the die is exposed to the lower surface of the plastic housing. The adhesive can be removed by using an acid or alkali solution, or an organic solution to remove the adhesive. By adjusting the thickness of the applied adhesive, the depth of the front surface of the die in the plastic housing can be controlled. The embodiment of the application can complete the window opening without making a special-shaped plastic sealing mold, and has lower cost and greater flexibility in structural design.

After removing the adhesive, it also includes:

S77: forming a lead between the front surface of the die and the pin by wire bonding.

S78, applying dot coating to the lead and curing the resin colloid.

18-23 are schematic structural diagrams corresponding to some steps of a semiconductor packaging method provided by another embodiment of this application.

FIG. 18 is a schematic diagram of the corresponding structure after the plastic package is formed in the steps of the semiconductor packaging method provided by another embodiment of the application. Please refer to FIG. 18. The lead frame includes a base layer 20 and pins 23, and the pins 23 are plated on the substrate The upper surface of the bottom layer 20 realizes the connection between the pins 23 and the top surface of the bottom layer 20. The lead frame can be manufactured by the Electro Fine Forming method. The lead frame of the embodiment of the present application does not include die pads. Among them, the base layer 20 has a supporting function, and its thickness may be less than 200 μm, and the base layer 20 is made of stainless steel, or may be a metal plate or other materials. The pins 23 can be electroplated to form a laminated structure with a combination of two or three metals of nickel, gold, silver, and palladium, or a combination of all metals, and the thickness of the laminated structure can be less than 0.10 mm. The adhesive 14 is coated on the front surface 121 of the die 12 or on the base layer 20 of the lead frame. The front surface 121 of the die 12 and the base layer 20 of the lead frame are bonded together by a patch. The curing of the adhesive 14 can be accomplished by oven baking or ultraviolet irradiation. Further, a plastic encapsulation process is used to form a complete shielding die 12 and a plastic encapsulation shell 10. At this time, a package intermediate 40 as shown in FIG. 18 is formed.

Figure 19 is a schematic diagram of the corresponding structure after polishing the plastic housing in the steps of the semiconductor packaging method according to another embodiment of the application. Please refer to Figure 19, grinding the upper surface of the plastic housing to make the plastic housing thinner. The back side of the die is not exposed, or it can be polished to just expose the back side 122 of the die. Figure 19 shows the back side 122 of the die 12 just exposed by polishing, or the back side 122 of the die 12 is exposed and then the plastic-encapsulated shell is further exposed. To further reduce the thickness of the semiconductor packaging structure as shown in Figure 20, the thickness of the polishing can be adjusted arbitrarily according to the needs of the thickness of the packaging structure. The back surface of the die is exposed to the outside of the plastic shell, which is beneficial to the crystal. Particles to dissipate heat.

FIG. 21 is a schematic diagram of the corresponding structure after removing the base layer in the steps of the semiconductor packaging method according to another embodiment of the application. Please refer to FIG. 21. The base layer 20 of the lead frame can be removed manually or mechanically. Electroplating on the base layer, and the material of the base layer and the plastic shell material have weak adhesion. The base layer 20 can be removed directly by tearing off to expose the back surface 102 of the plastic shell 10 in contact with the base 20 . FIG. 20 is a schematic diagram of the structure of the package intermediate 50 shown in FIG. 19 after the base layer 20 of the lead frame is removed.

FIG. 22 is a schematic diagram of the corresponding structure after the adhesive is removed in the steps of the semiconductor packaging method according to another embodiment of the application. Please refer to FIG. 22 to further remove the exposed plastic casing 10 and cover the front surface of the die 12 121 of the adhesive 14. One of the methods that can be used to remove the binder 14 is to use an acid or alkali solution to soak the intermediate product 50 shown in FIG. 13; it is also possible to use an organic solution to soak the intermediate product 50. Generally, different adhesives 14 can be removed in different ways. After that, some conventional treatments, such as cleaning, can be performed to obtain the semiconductor package intermediate structure 60 as shown in FIG. 22. The intermediate structure 60 has the following characteristics: the front surface 121 of the die 12 and the back surface 231 of the lead 23 of the lead frame are exposed on the bottom surface 102 of the plastic package case 10, and the front surface 121 of the die 12 is recessed and embedded in the intermediate structure 60 Inside. In the early stage, the depth of the depression of the die 12 in the intermediate structure 60 can be controlled by adjusting the thickness of the coating adhesive 14.

FIG. 23 is a schematic diagram of the structure corresponding to the steps of the semiconductor packaging method provided by another embodiment of the application. Please refer to FIG. 23. Leads 16 are used to connect the die 12 and the pins 23, and solder joints are formed on the die 12 161. The purpose of reducing the thickness of the semiconductor package structure can be achieved by reducing the height of the lead 16.

FIG. 24 is a schematic diagram of the corresponding structure after the resin colloid is applied and cured in the steps of the semiconductor packaging method provided by another embodiment of the application. Please refer to FIG. 24. Further, according to the application requirements, the resin colloid 18 can be cured by dot coating Protect the lead 16 and part of the front surface 121 area of the die 12 exposed outside the plastic package housing 10. FIG. 24 is a schematic structural view of the semiconductor package structure 70 after the wire-bonded product shown in FIG. 23 has been applied with the cured resin gel 18. The front plastic sealing window opening in the embodiment of the present application does not need to use a special-shaped plastic sealing mold, which saves the cost of the manufacturing process. The semiconductor package structure does not include die pads, and by removing the base layer, the thickness of the semiconductor package structure is further reduced.

Compared with the prior art, the embodiment of the present application first forms the plastic-encapsulated shell, and then polishes the plastic-encapsulated shell until the back surface 122 of the die 12 is exposed, or after polishing the back surface 122 of the die 12 is exposed. Continue to polish the back surface of the plastic package shell and the die to further reduce the thickness of the semiconductor package structure. The embodiment of the application realizes the opening of the plastic package by removing the adhesive, which meets the requirement of opening a window for some ultra-thin semiconductor packaging structures on the front side of the plastic package, such as an optical fingerprint sensor. The opening part only exposes the part where the sensor collects signals. .

Please continue to refer to FIG. 25, which is a schematic cross-sectional structure diagram of a semiconductor package structure according to another embodiment of this application.

The semiconductor package structure of the embodiment of the present application includes a die 12, a die pad 21, a pin 23, and a plastic housing 10, wherein the back surface of the die 12 is connected to the die pad 21 by an adhesive 14. The die pad 21 is electroplated on the upper surface of the base layer, the pins 23 are electroplated on the upper surface of the base layer, and the plastic housing 10 is composed of the base layer, the pins 23, and the die The pad 21 and the die 12 are filled with glue, the area of the plastic package 10 wrapping the pins 23 is larger than the area of the base layer contacting the pins 23, and the plastic package 10 wraps all the pins 23. The area of the die pad 21 is larger than the contact area of the base layer and the die pad 21, so that the base layer is removed, wherein the die pad 21 and the lead 23 are exposed On the lower surface of the plastic housing 10. The semiconductor package structure further includes a lead 16 which connects the die and the lead.

The thickness of the semiconductor packaging structure in the prior art is the thickness of the plastic package housing and the thickness of the copper lead frame, and the thickness of the semiconductor packaging structure in the prior art is about 400um. Compared with the prior art, the embodiment of the present application actually includes a metal base layer and die pads and pins electroplated on the base layer. The thickness of the base layer is about 200um, so that it can support the plastic housing. The thickness of the die pads or pins electroplated on the base layer is about 30-100um. The final thickness of the semiconductor package structure is the sum of the thickness of the plastic package and the die pads or the thickness of the plastic package and the pins. The sum of the thickness of the semiconductor package reduces the thickness of the semiconductor package structure, and meets the needs of actual products for ultra-thin design.

Please refer to FIG. 26, which is a schematic cross-sectional structure diagram of a semiconductor package structure provided by another embodiment of this application.

The semiconductor package structure of the embodiment of the present application is different from the above-mentioned embodiment in that the plastic package of the semiconductor package structure of the embodiment of the present application is a special-shaped plastic package 15, and the special-shaped plastic package 15 is used to expose the die 12 The front surface 121 of the die 12 is recessed on the upper surface of the special-shaped plastic-encapsulated housing 15.

Compared with the prior art, the embodiment of the present application meets the requirement of opening a window for some ultra-thin semiconductor packaging structures for plastic packaging on the front side while reducing the overall thickness of the semiconductor packaging structure, for example, meets the requirements of optical fingerprint sensors for light path collection. At the same time, the height of the front surface of the die recessed on the upper surface of the plastic package is determined by the profile plastic package to adjust the thickness of the semiconductor package structure.

Please refer to FIG. 27. FIG. 27 is a schematic cross-sectional structure diagram of a semiconductor package structure provided by another embodiment of this application.

The semiconductor package structure of the embodiment of the present application includes: a die 12, a pin 16 and a plastic housing 102. The front surface of the die 12 is connected to the upper surface of a base layer by an adhesive, and the pin 16 is electroplated on the base layer. On the upper surface, the plastic housing 102 is formed by the base layer, the pins 16 and the die 12, and the area of the plastic housing 102 that wraps the pins 16 is larger than that of the base layer and The contact area of the pin 16 is larger than the contact area of the base layer and the die 12 by the plastic shell 102 wrapping the die 12, so that the base layer can be removed. The feet 12 are exposed on the lower surface of the plastic housing 102. By removing the adhesive, the front surface of the die 12 is exposed to the lower surface of the plastic housing 102, and the front surface of the die 12 is recessed in The lower surface of the plastic housing 102. The semiconductor package structure further includes a lead 16 that connects the die 122 and the lead 23 after removing the adhesive. The thickness of the semiconductor package structure can be adjusted by adjusting the height of the lead. Wherein, the lead 16 is shielded by the resin gel 18

Compared with the prior art, the embodiment of the present application does not include the base layer and the adhesive, which reduces the overall thickness of the chip, and can meet the needs of some ultra-thin semiconductor packaging structures that require windowing on the front surface of the plastic packaging without special molds. Demand reduces costs. The purpose of opening windows on the surface of semiconductor packaging structures is to meet the optical path collection requirements of similar optical fingerprint sensors. The semiconductor packaging structure in the embodiment of the present application further reduces the thickness of the entire semiconductor packaging structure by forming a plastic package first, and then wiring the front surface of the die recessed in the plastic package.

Please refer to FIG. 28, which is a schematic cross-sectional structure diagram of a semiconductor package structure provided by another embodiment of this application.

The difference from the above-mentioned embodiment is that the plastic-encapsulated shell of the embodiment of the present application exposes the back surface 122 of the die 12. By grinding the plastic-encapsulated shell, the back surface 122 of the die 12 is exposed, and the plastic-encapsulated shell 102 can be further polished. And the back surface 122 of the die 12 until the required thickness is reached, which further reduces the thickness of the semiconductor package structure.

Compared with the prior art, the embodiments of the present application further reduce the overall thickness of the semiconductor package structure by polishing the upper surface of the plastic package housing, and at the same time meet the requirement of opening windows for the plastic packaging of some ultra-thin semiconductor package structures. Demand, the purpose of opening the window on the front of the semiconductor package structure is to meet the optical path collection requirements of similar optical fingerprint sensors. Exposure of the back surface of the semiconductor package structure to the outside of the plastic encapsulation case facilitates heat dissipation of the die.

The existing QFN has a single row of pins, and the pins are located on a circle near the edge of the semiconductor package structure. If the number of pins needs to be increased, the area of the chip will be increased and the cost of the chip will increase. In the embodiment of the present application, the pins 23 on the lead frame 11 can be designed as a single row or multiple rows, which meets the requirement of a thin and light semiconductor package that requires multiple rows of pins. FIG. 29 is a top view of the lead frame unit structure with the above design features, which has two die pads 21 and two rows of package pins 23. By designing multiple rows of pins, the package size can be further reduced, independent chip pads can be designed, and the requirements for independent grounding and heat dissipation of multiple dies can also be met.

Compared with the previous embodiment, the semiconductor package structure of the embodiment of the present application can increase the number of pins without increasing the area and thickness of the semiconductor package structure by adding multiple rows of pins. The cost of packaging manufacturing.

A person of ordinary skill in the art can understand that the above-mentioned embodiments are specific embodiments for realizing the present application, and in practical applications, various changes can be made to them in form and details without departing from the spirit and spirit of the present application. Scope.

Claims

A semiconductor packaging method, characterized in that it comprises:

Electroplating pins on the upper surface of the base layer;

The front surface of the crystal grains is glued on the upper surface of the base layer through an adhesive;

The base layer, the pins, and the die are filled with glue to form a plastic-encapsulated shell, and the area of the plastic-encapsulated shell that wraps the pins is larger than the contact area of the substrate layer and the pins. The area of the plastic package shell wrapping the crystal grains is larger than the contact area of the base layer and the crystal grains;

Removing the base layer so that the pins are exposed on the lower surface of the plastic housing; and

The adhesive is removed, so that the front surface of the die is exposed on the lower surface of the plastic casing, and the front surface of the die is recessed on the lower surface of the plastic casing.
The method according to claim 1, wherein after removing the adhesive, the method further comprises: forming a lead between the front surface of the die and the lead by wire bonding.
The method according to claim 2, characterized in that, after forming the lead between the front surface of the die and the lead by wire bonding, the method further comprises: spot-coating the lead and curing the resin colloid.
The method according to claim 1, wherein after pouring the base layer, the pins, and the die to form a plastic-encapsulated housing, the method further comprises:

The upper surface of the plastic-encapsulated shell is polished, and the plastic-encapsulated shell has exposed the back surface of the die.
The method according to any one of claims 1 to 4, wherein at least two rows of the pins surround the die.
The method according to any one of claims 1 to 4, wherein the pin is electroplated with a combination of two, three or four metals among nickel, gold, silver, and palladium to form a laminated structure.
The method according to claim 6, wherein the thickness of the laminated structure of the pin is less than 0.1 mm.
The method according to any one of claims 1 to 4, wherein the base layer is a metal plate with a thickness of less than 200um.
A semiconductor packaging structure, characterized in that it comprises:

Crystal grains, the front surface of the crystal grains is connected to the upper surface of the base layer by an adhesive;

Pins, the pins are electroplated on the upper surface of the base layer;

Plastic-encapsulated housing, the plastic-encapsulated housing is formed by the base layer, the pins, and the die casting, and the area of the plastic-encapsulated housing that wraps the pins is larger than that of the base layer and the pins The contact area, the area of the plastic shell that wraps the die is larger than the contact area of the base layer and the die, so that the base layer is removed, and the pins are exposed to the plastic shell On the lower surface, by removing the adhesive, the front surface of the die is exposed to the lower surface of the plastic housing, and the front surface of the die is recessed on the lower surface of the plastic housing.
9. The structure according to claim 9, further comprising: a lead, which connects the die and the lead after the adhesive is removed.
The structure according to claim 10, wherein the lead is shielded by a resin gel.
The structure according to claim 9, wherein the plastic-encapsulated shell exposes the back surface of the die.
The structure according to any one of claims 9 to 12, wherein at least two rows of the pins surround the die.
The structure according to any one of claims 9 to 12, wherein the pins are plated with a combination of two, three or four metals among nickel, gold, silver, and palladium to form a laminated structure.
The structure according to claim 14, wherein the thickness of the laminated structure of the pin is not greater than 0.1 mm.
The structure according to any one of claims 9 to 12, wherein the base layer is a metal plate with a thickness of less than 200.