WO2021214870A1 - Impedance converter and method for making same - Google Patents

Impedance converter and method for making same Download PDF

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Publication number
WO2021214870A1
WO2021214870A1 PCT/JP2020/017196 JP2020017196W WO2021214870A1 WO 2021214870 A1 WO2021214870 A1 WO 2021214870A1 JP 2020017196 W JP2020017196 W JP 2020017196W WO 2021214870 A1 WO2021214870 A1 WO 2021214870A1
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impedance converter
signal line
dielectric substrate
line
impedance
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PCT/JP2020/017196
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French (fr)
Japanese (ja)
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美和 武藤
松崎　秀昭
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日本電信電話株式会社
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Priority to PCT/JP2020/017196 priority Critical patent/WO2021214870A1/en
Publication of WO2021214870A1 publication Critical patent/WO2021214870A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/02—Coupling devices of the waveguide type with invariable factor of coupling

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  • the present invention relates to an impedance converter in a semiconductor high frequency module.
  • a microstrip line is used as a transmission line used in a high frequency circuit.
  • the microstrip line forms a transmission line by forming a ground surface of a flat conductor layer on one surface of the dielectric substrate and forming a band-shaped line on the other surface of the dielectric substrate.
  • the characteristic impedance of this microstrip line is determined by the width and thickness of the strip line and the dielectric constant and thickness of the dielectric substrate.
  • the characteristic impedance of the high-frequency circuit and the load circuit or signal source is matched in order to efficiently transmit power and signals at the connection portion. I need to let you.
  • an impedance converter formed so that the characteristic impedance is different at both ends of the microstrip line is used (see Non-Patent Document 1).
  • FIG. 9A is a plan view showing the structure of a conventional impedance converter
  • FIG. 9B is a sectional view taken along line AA'of the impedance converter of FIG. 9A
  • FIG. 9C is a sectional view taken along line BB'of the impedance converter of FIG. 9A.
  • the impedance converter using a transmission line is a microstrip line by gradually changing the width of the signal line 102 as shown in FIGS. 9A to 9C in order to prevent deterioration of transmission characteristics due to a sudden impedance change in a high frequency band.
  • the characteristic impedance of the above was converted into a desired impedance.
  • 100 is a dielectric substrate and 101 is a ground layer.
  • the number of signals of semiconductor high-frequency modules has been increasing, and the board connection pads have been miniaturized. That is, the number of signals input and output from the semiconductor high-frequency module is increasing due to the high functionality of the semiconductor high-frequency module, but the outer size of the module is reduced in order to improve the functionality and cost of the semiconductor high-frequency module. Because of the need, the distance between the board connection pad and the pad is becoming finer. As a result, there is a demand for the realization of a transmission line capable of routing multiple signals at high density in a wiring substrate connected to a semiconductor high frequency module, and an impedance converter that performs impedance conversion while maintaining high frequency characteristics by the transmission line.
  • the line width is gradually changed in a tapered shape.
  • FIG. 10A when trying to secure a sufficient distance between the signal lines 102, there is a problem that the distance d1 of the substrate connection pad 103 also becomes large and the size of the impedance converter becomes large.
  • FIG. 10B when the width of the signal line 102 becomes large and the interval d2 of the signal line 102 becomes small, there is a problem that the crosstalk noise between the signal lines 102 becomes large.
  • Crosstalk noise between signal lines 102 is generated by shifting the electrons of the other signal line 102 when a signal pulse is transmitted by one signal line 102. Therefore, the smaller the distance between the signal lines 102, the larger the amount of electron displacement of the other signal line 102, and the larger the crosstalk noise. As described above, with the conventional impedance converter, it is difficult to achieve both improvement of line density and reduction of crosstalk noise between lines, and it is difficult to apply it to high-density mounting.
  • the present invention has been made to solve the above problems, and an object of the present invention is to provide an impedance converter and a method for manufacturing the same, which can achieve both improvement of line density and reduction of crosstalk noise between lines. do.
  • the impedance converter of the present invention includes a dielectric substrate, a ground layer formed on the back surface of the dielectric substrate, and a signal line formed on the surface of the dielectric substrate, and is located at a position facing the signal line.
  • a recess gradually increasing in depth along the signal propagation direction of the signal line is formed on the back surface of the dielectric substrate, and the ground layer is formed on the back surface of the dielectric substrate and inside the recess. It is characterized by being.
  • the method for manufacturing an impedance converter of the present invention includes a first step of forming a signal line on the surface of a dielectric substrate and a signal line on the back surface of the dielectric substrate at a position facing the signal line. It is characterized by including a second step of forming a recess whose depth gradually becomes deeper along a signal propagation direction, and a third step of forming a ground layer on the back surface of the dielectric substrate and inside the recess. Is to be.
  • the distance between the signal line and the ground layer can be gradually changed, so that a desired characteristic impedance value can be set and the characteristics on the input side can be set. It is possible to realize an impedance converter in which the impedance and the characteristic impedance on the output side are different. Further, in the present invention, crosstalk noise between lines can be reduced. As a result, in the present invention, the interval between signal lines can be miniaturized while suppressing the crosstalk noise to the same amount as in the conventional case, and both the improvement of the line density and the reduction of the crosstalk noise between the lines can be achieved at the same time. Therefore, an impedance converter applicable to high-density mounting can be realized.
  • FIG. 1A-1B are a plan view and a cross-sectional view of the impedance converter of the present invention.
  • 2A-2C are cross-sectional views of the impedance converter of the present invention.
  • FIG. 3 is a diagram showing the characteristic impedance of the impedance converter and the conventional impedance converter according to the embodiment of the present invention.
  • FIG. 4 is a cross-sectional view illustrating the distance between the signal line and the ground layer of the impedance converter according to the embodiment of the present invention and the distance between the lines.
  • FIG. 5 is a diagram showing the relationship between the characteristic impedance of the impedance converter according to the embodiment of the present invention and the distance between the signal line and the ground layer.
  • FIGS. 6A-6D are diagrams showing a model of a microstrip line using an electromagnetic field simulator.
  • FIG. 7 is a diagram showing the simulation results of backward crosstalk of the impedance converter and the conventional impedance converter according to the embodiment of the present invention.
  • FIG. 8 is a diagram showing a simulation result of forward crosstalk of the impedance converter and the conventional impedance converter according to the embodiment of the present invention.
  • 9A-9C are a plan view and a cross-sectional view showing the structure of a conventional impedance converter.
  • 10A-10B are plan views illustrating problems with conventional impedance converters.
  • FIG. 1A is a plan view of the impedance converter of the present invention
  • FIG. 1B is a sectional view taken along line AA'of the impedance converter of FIG. 1A
  • 2A is a sectional view taken along line BB'of the impedance converter of FIG. 1A
  • FIG. 2B is a sectional view taken along the line CC'of the impedance converter of FIG. 1A
  • FIG. It is a line sectional view.
  • the microstrip line of the present invention includes a dielectric substrate 10, a ground layer 11 formed on the back surface of the dielectric substrate 10, a plurality of signal lines 13 formed on the surface of the dielectric substrate 10, and a dielectric substrate. It includes substrate connection pads 14 and 15 formed so as to connect to the end of the signal line 13 on the surface of 10.
  • Each signal line 13 is arranged so as to be separated from each other in a direction orthogonal to the signal propagation direction (horizontal direction in FIGS. 1A and 1B).
  • recesses 12 are formed at positions facing each signal line 13 so that the depth gradually increases along the signal propagation direction of the signal lines 13.
  • the distance between the signal line 13 and the ground layer 11 is set along the signal propagation direction at the position directly below each signal line 13. It gradually changes as h1, h2, h3 (h1> h2> h3).
  • the recess 12 is deepest at either one end (output side in this embodiment) of the signal input side or the output side. Therefore, the distance between the signal line 13 and the ground layer 11 is the shortest at either one end of the signal input side or the output side.
  • RIE Reactive Ion Etching Due to the loading effect during RIE, the etching rate is low in the area where the pattern is narrow, and the etching rate is high in the area where the pattern is wide.
  • the width of the opening of the mask at a position facing the signal line 13 is the signal propagation direction.
  • the mask pattern is gradually widened along. That is, the opening is a mask pattern having a tapered shape in a plan view.
  • the dielectric substrate 10 is etched by RIE using such a mask, as shown in FIGS. 1A, 1B, and 2A to 2C, the shape is such that the width gradually increases and becomes deeper.
  • the recess 12 can be formed.
  • the ground layer 11 may be formed on the back surface of the dielectric substrate 10 and the inside of the recess 12 by, for example, a plating method.
  • the present invention makes it possible to continuously change the characteristic impedance while maintaining the line width W and the line spacing G by gradually changing the distance between the signal line 13 and the ground layer 11. It is a thing.
  • the characteristic impedance becomes smaller as the distance between the signal line and the ground layer becomes smaller.
  • the characteristic impedance and the output portion of the input portion of the microstrip line are not increased without increasing the line width W and the substantial line-to-line distance (W + G) seen from the upper surface. It is possible to realize an impedance converter whose characteristic impedance is different from that of.
  • the line spacing becomes smaller as the line width becomes larger.
  • the characteristic in-edance can be adjusted without changing the line width W and the line spacing G, crosstalk noise can be reduced.
  • the effect of reducing the crosstalk noise between the lines can be obtained at the same time as the impedance conversion function and without lowering the line density.
  • the manufacturing process of the present invention includes a wiring process for forming a signal line 13 and substrate connection pads 14 and 15 on the front surface of the dielectric substrate 10, and forming a ground layer 11 after forming a recess 12 on the back surface of the dielectric substrate 10. It is divided into processes, but each manufacturing process is established. Therefore, the impedance converter of the present invention has a feasible configuration. Further, in the present invention, since the recess 12 and the ground layer 11 are formed after the wiring process, the characteristic impedance of the line can be adjusted at the end.
  • the present invention it is possible to adjust the characteristic impedance of the microstrip line without changing the width of the signal line, and the pad spacing is made finer, the line density is improved, and the crosstalk noise between the lines is reduced. It is possible to form an impedance converter applicable to high-density mounting that achieves both reduction and reduction.
  • a ground layer 11 made of a conductor member such as Au is formed on one surface (back surface) of the dielectric substrate 10 made of benzocyclobutene (BCB) or the like. ing. On the other surface (surface) of the dielectric substrate 10, a band-shaped signal line 13 also made of a conductor member such as Au is formed. On the surface of the dielectric substrate 10, substrate connection pads 14 and 15 made of conductor members such as Au are formed so as to be electrically connected to both ends of the signal line 13. Further, vias 16 and 17 are provided on the lower surfaces of the substrate connection pads 14 and 15. The vias 16 and 17 are not essential constituents in the present invention, and a structure without the vias 16 and 17 may be used.
  • one end (input side) of the impedance converter of this embodiment has an input impedance Zi and the other end (output side) has an output impedance Zo (Zi> Zo).
  • the left end is the input side and the right end is the output side.
  • the distance between the signal line 13 and the ground layer 11 gradually decreases from the input side to the output side.
  • the characteristic impedance also gradually decreases from Zi to Zo.
  • the electric field (electric field) between the plates can be regarded as uniform.
  • the parallel capacitance C is proportional to the plate area S and inversely proportional to the plate spacing d.
  • ⁇ in equation (1) is the permittivity.
  • the parallel capacitance C becomes larger than the value defined by the equation (1).
  • the electric resistance R of the conductor is inversely proportional to the cross-sectional area A [m 2 ] of the conductor, and is proportional to the length L [m] of the conductor and the resistivity ⁇ [ ⁇ m].
  • the electrical resistance R of the signal line becomes smaller than the value specified by the equation (2).
  • the characteristic impedance Z 0 of the microstrip line is represented by the equation (3).
  • R is the series resistance ( ⁇ ) per unit length of the signal line
  • L is the series inductance (H) per unit length of the signal line
  • G is the parallel conductance (S) per unit length of the signal line
  • C is It is the parallel capacitance (F) per unit length of the signal line.
  • An impedance converter with a line length of 300 ⁇ m using Au (gold) as the material for the signal line 13 and the ground layer 11 and a benzocyclobutene (BCB) substrate (dielectric constant ⁇ r 2.7) as the dielectric substrate 10.
  • the characteristic impedance Z 0 on the output side of is shown in FIG. 300 in FIG. 3 shows the characteristic impedance Z 0 on the output side of the conventional impedance converter shown in FIGS. 9A to 9C, 10A, and 10B, and 301 is the characteristic impedance on the output side of the impedance converter of this embodiment. It shows Z 0.
  • the line width on the input side of the conventional impedance converter is 20 ⁇ m
  • the line spacing G on the input side is 20 ⁇ m
  • the line width on the output side is W ⁇ m.
  • the distance between the signal line 102 of the conventional impedance converter and the ground layer 101 is 20 ⁇ m
  • the thickness of the signal line 102 is 2 ⁇ m.
  • the width of the signal line 13 of the impedance converter of this embodiment was fixed to 20 ⁇ m on both the input side and the output side, and the line spacing G was fixed to 20 ⁇ m.
  • the thickness of the signal line 13 is 2 ⁇ m.
  • the shortest distance h between the signal line 13 and the ground layer 11 of the impedance converter of this embodiment is used as a parameter. Further, the line width W and the substantial line-to-line distance W + G are used as indicators of the effect on the vertical axis of FIG.
  • the characteristic impedance on the output side when the line width on the output side is increased from 25 ⁇ m to 50 ⁇ m (distance between lines W + G is increased from 45 ⁇ m to 70 ⁇ m), the characteristic impedance on the output side is reduced from 70 ⁇ to 49 ⁇ .
  • the characteristic impedance on the output side can be changed without changing the line width or the line-to-line distance.
  • FIG. 5 shows the relationship between the characteristic impedance Z 0 of the impedance converter of this embodiment and the distance h between the signal line 13 and the ground layer 11. From FIG. 5, it can be seen that when the value of the distance h changes from 14 ⁇ m to 6 ⁇ m, the characteristic impedance Z 0 changes from 69 ⁇ to 44 ⁇ .
  • 6A-6D are diagrams showing a model of a microstrip line using the electromagnetic field simulator Sonnet®-EM.
  • 6A is a cross-sectional view of a conventional impedance converter model
  • FIG. 6B is a perspective view of a conventional impedance converter model
  • FIG. 6C is a cross-sectional view of the impedance converter model of the present embodiment
  • FIG. 6D is the present embodiment. It is a perspective view of the model of the impedance converter of.
  • the actual line-to-line distance W + G was fixed at 30 ⁇ m and the characteristic impedance was adjusted to 55 ⁇ in both the conventional and the present embodiments.
  • the width W of the signal line 102 of the conventional impedance converter shown in FIGS. 6A and 6B is 25 ⁇ m
  • the thickness a of the signal line 102 is 2 ⁇ m
  • the line spacing G is 5 ⁇ m
  • the distance h between the signal line 102 and the ground layer 101. was 20 ⁇ m.
  • 6C and 6D is 20 ⁇ m
  • the thickness a of the signal line 13 is 2 ⁇ m
  • the line spacing G is 10 ⁇ m
  • the signal line 13 and the ground layer 11 The shortest distance h between them was set to 10 ⁇ m.
  • the shape of only the output side of the impedance converter is calculated to simplify the calculation. Further, the side wall of the recess 12 has no conductor member, and the number of lines of the impedance converter is two.
  • port p1 is the input port of one signal line 102
  • port p2 is the output port of one signal line 102
  • port p3 is the other signal.
  • the input port and port p4 of the line 102 are the output ports of the other signal line 102.
  • the port number setting is the same for the two signal lines 13 provided in parallel in the impedance converter of this embodiment.
  • S31 is the voltage ratio between port p1 and port p3 when a signal is given to port p1, and represents backward (near end) crosstalk.
  • S41 is a voltage ratio between port p1 and port p4, and represents forward (far end) crosstalk.
  • 7 and 8 are diagrams showing the simulation results of S31 and S41, respectively, and are displayed in decibels in order to make the difference easy to understand.
  • 70 in FIG. 7 shows the backward crosstalk of the conventional impedance converter
  • 71 shows the backward crosstalk of the impedance converter of this embodiment.
  • 80 in FIG. 8 shows the forward crosstalk of the conventional impedance converter
  • 81 shows the forward crosstalk of the impedance converter of this embodiment.
  • the backward crosstalk of the impedance converter of this embodiment is smaller than the backward crosstalk of the conventional impedance converter, and is particularly smaller by 7 dB or more in a wide range of 15 GHz to 100 GHz.
  • the forward crosstalk of the impedance converter of this embodiment is smaller than the forward crosstalk of the conventional impedance converter, and is particularly smaller by about 7 dB in a wide range of 15 GHz to 100 GHz.
  • the distance between the signal line 13 and the ground layer 11 is gradually increased by forming the recess 12 on the back surface of the dielectric substrate 10 without changing the line width or the line spacing. Take the form of change.
  • the distance between the signal line 13 and the ground layer 11 can be gradually changed by gradually increasing the depth of the recess 12, so that a desired characteristic impedance value can be set and the input side can be set. It is possible to realize an impedance converter in which the characteristic impedance of the above and the characteristic impedance of the output side are different. Further, in this embodiment, the crosstalk noise between the lines can be reduced by bringing the signal line 13 closer to the ground layer 11.
  • the interval between signal lines (interval between adjacent board connection pads) can be miniaturized while suppressing crosstalk noise to the same amount as in the conventional case, and the line density can be improved. Since it is possible to achieve both reduction of crosstalk noise between lines, it is possible to realize an impedance converter applicable to high-density mounting.
  • the characteristic impedance on the output side of the impedance converter is reduced, but an impedance converter in which the characteristic impedance on the input side is reduced can also be formed.
  • the right end may be the input side and the left end may be the output side in FIGS. 1A and 1B. In this case, the depth of the recess 12 gradually becomes shallower along the signal propagation direction.
  • FIGS. 1A, 1B, and 2A to 2C the case where the number of signal lines 13 provided in parallel is three has been described, but the present invention is not limited to this, and the number of signal lines is two or four or more. Needless to say, it may be a multi-lane.
  • the present invention can be applied to a technique for converting impedance in a semiconductor high frequency module.

Abstract

An impedance converter according to the present invention comprises: a dielectric substrate (10); a ground layer (11) formed on the back surface of the dielectric substrate (10); and a signal line (13) formed on the front surface of the dielectric substrate (10). A recess (12), the depth of which gradually increases in the signal propagation direction of the signal line (13), is formed in the back surface of the dielectric substrate (10) the position of which is opposed to the signal line (13). The ground layer (13) is formed on the back surface of the dielectric substrate (10) and within the recess (12).

Description

インピーダンス変換器とその製造方法Impedance transducer and its manufacturing method
　本発明は、半導体高周波モジュールにおけるインピーダンス変換器に関するものである。 The present invention relates to an impedance converter in a semiconductor high frequency module.
　高周波回路に用いられる伝送線路として、マイクロストリップ線路が使用されている。マイクロストリップ線路は、誘電体基板の一方の面に平面的な導電体層のグランド面を形成し、誘電体基板の他方の面に帯状の線路を形成して伝送線路を構成している。このマイクロストリップ線路の特性インピーダンスは、ストリップ線路の幅と厚さ、および誘電体基板の誘電率と厚さによって決定される。 A microstrip line is used as a transmission line used in a high frequency circuit. The microstrip line forms a transmission line by forming a ground surface of a flat conductor layer on one surface of the dielectric substrate and forming a band-shaped line on the other surface of the dielectric substrate. The characteristic impedance of this microstrip line is determined by the width and thickness of the strip line and the dielectric constant and thickness of the dielectric substrate.
　高周波回路に、例えば、ある一定のインピーダンスを有する負荷回路や信号源を接続する場合、接続部分で電力や信号を効率よく伝達させるために、高周波回路と負荷回路や信号源との特性インピーダンスを整合させる必要がある。このインピーダンス整合を行わせるため、マイクロストリップ線路の両端で特性インピーダンスが異なるように形成したインピーダンス変換器が用いられる（非特許文献１参照）。 For example, when a load circuit or signal source having a certain impedance is connected to a high-frequency circuit, the characteristic impedance of the high-frequency circuit and the load circuit or signal source is matched in order to efficiently transmit power and signals at the connection portion. I need to let you. In order to perform this impedance matching, an impedance converter formed so that the characteristic impedance is different at both ends of the microstrip line is used (see Non-Patent Document 1).
　図９Ａは従来のインピーダンス変換器の構造を示す平面図、図９Ｂは図９Ａのインピーダンス変換器のＡ－Ａ’線断面図、図９Ｃは図９Ａのインピーダンス変換器のＢ－Ｂ’線断面図である。伝送線路によるインピーダンス変換器は、高周波帯での急激なインピーダンス変化による伝送特性の劣化を防ぐため、図９Ａ～図９Ｃに示すように信号線路１０２の幅を徐々に変化させることにより、マイクロストリップ線路の特性インピーダンスを所望のインピーダンスに変換するようにしていた。図９Ａ～図９Ｃにおける１００は誘電体基板、１０１はグランド層である。 9A is a plan view showing the structure of a conventional impedance converter, FIG. 9B is a sectional view taken along line AA'of the impedance converter of FIG. 9A, and FIG. 9C is a sectional view taken along line BB'of the impedance converter of FIG. 9A. Is. The impedance converter using a transmission line is a microstrip line by gradually changing the width of the signal line 102 as shown in FIGS. 9A to 9C in order to prevent deterioration of transmission characteristics due to a sudden impedance change in a high frequency band. The characteristic impedance of the above was converted into a desired impedance. In FIGS. 9A to 9C, 100 is a dielectric substrate and 101 is a ground layer.
　近年、半導体高周波モジュールの信号数の増大、基板接続パッドの微細化が進んでいる。すなわち、半導体高周波モジュールの高機能化のために半導体高周波モジュールから入出力される信号が増加しているが、半導体高周波モジュールの高機能化・低コスト化のためにはモジュールの外形サイズを小さくする必要があるため、基板接続パッドとパッド間隔の微細化が進行している。その結果、半導体高周波モジュールと接続する配線基板において、高密度で多信号を引き回せる伝送線路や、伝送線路によって高周波特性を維持したままインピーダンス変換を行うインピーダンス変換器の実現が求められている。 In recent years, the number of signals of semiconductor high-frequency modules has been increasing, and the board connection pads have been miniaturized. That is, the number of signals input and output from the semiconductor high-frequency module is increasing due to the high functionality of the semiconductor high-frequency module, but the outer size of the module is reduced in order to improve the functionality and cost of the semiconductor high-frequency module. Because of the need, the distance between the board connection pad and the pad is becoming finer. As a result, there is a demand for the realization of a transmission line capable of routing multiple signals at high density in a wiring substrate connected to a semiconductor high frequency module, and an impedance converter that performs impedance conversion while maintaining high frequency characteristics by the transmission line.
　伝送線路によって高周波特性を維持したままインピーダンス変換を行う場合、従来技術では、線路幅をテーパー形状で徐々に変化させている。しかし、図１０Ａに示すように、信号線路１０２の間隔を十分に確保しようとすると、基板接続パッド１０３の間隔ｄ１も大きくなって、インピーダンス変換器のサイズが大きくなるという問題点があった。また、図１０Ｂに示すように、信号線路１０２の幅が大きくなって信号線路１０２の間隔ｄ２が小さくなると、信号線路１０２間のクロストークノイズが大きくなるという問題点があった。 When impedance conversion is performed by a transmission line while maintaining high frequency characteristics, in the conventional technology, the line width is gradually changed in a tapered shape. However, as shown in FIG. 10A, when trying to secure a sufficient distance between the signal lines 102, there is a problem that the distance d1 of the substrate connection pad 103 also becomes large and the size of the impedance converter becomes large. Further, as shown in FIG. 10B, when the width of the signal line 102 becomes large and the interval d2 of the signal line 102 becomes small, there is a problem that the crosstalk noise between the signal lines 102 becomes large.
　信号線路１０２間のクロストークノイズは、一方の信号線路１０２によって信号パルスが伝送されたとき、他方の信号線路１０２の電子を変位させることにより生じるものである。このため、信号線路１０２の間隔が小さくなればなる程、他方の信号線路１０２の電子の変位量も大きくなり、クロストークノイズも大きくなっていく。以上のように、従来のインピーダンス変換器では、線路密度の向上と線路間のクロストークノイズの低減とを両立させることが難しく、高密度実装に適用することが困難であった。 Crosstalk noise between signal lines 102 is generated by shifting the electrons of the other signal line 102 when a signal pulse is transmitted by one signal line 102. Therefore, the smaller the distance between the signal lines 102, the larger the amount of electron displacement of the other signal line 102, and the larger the crosstalk noise. As described above, with the conventional impedance converter, it is difficult to achieve both improvement of line density and reduction of crosstalk noise between lines, and it is difficult to apply it to high-density mounting.
　本発明は、上記課題を解決するためになされたもので、線路密度の向上と線路間のクロストークノイズの低減とを両立させることができるインピーダンス変換器とその製造方法を提供することを目的とする。 The present invention has been made to solve the above problems, and an object of the present invention is to provide an impedance converter and a method for manufacturing the same, which can achieve both improvement of line density and reduction of crosstalk noise between lines. do.
　本発明のインピーダンス変換器は、誘電体基板と、前記誘電体基板の裏面に形成されたグランド層と、前記誘電体基板の表面に形成された信号線路とを備え、前記信号線路と対向する位置の前記誘電体基板の裏面に、前記信号線路の信号伝搬方向に沿って深さが徐々に深くなる凹部が形成され、前記グランド層は、前記誘電体基板の裏面および前記凹部の内部に形成されていることを特徴とするものである。 The impedance converter of the present invention includes a dielectric substrate, a ground layer formed on the back surface of the dielectric substrate, and a signal line formed on the surface of the dielectric substrate, and is located at a position facing the signal line. A recess gradually increasing in depth along the signal propagation direction of the signal line is formed on the back surface of the dielectric substrate, and the ground layer is formed on the back surface of the dielectric substrate and inside the recess. It is characterized by being.
　また、本発明のインピーダンス変換器の製造方法は、誘電体基板の表面に信号線路を形成する第１の工程と、前記信号線路と対向する位置の前記誘電体基板の裏面に、前記信号線路の信号伝搬方向に沿って深さが徐々に深くなる凹部を形成する第２の工程と、前記誘電体基板の裏面および前記凹部の内部にグランド層を形成する第３の工程とを含むことを特徴とするものである。 Further, the method for manufacturing an impedance converter of the present invention includes a first step of forming a signal line on the surface of a dielectric substrate and a signal line on the back surface of the dielectric substrate at a position facing the signal line. It is characterized by including a second step of forming a recess whose depth gradually becomes deeper along a signal propagation direction, and a third step of forming a ground layer on the back surface of the dielectric substrate and inside the recess. Is to be.
　本発明によれば、誘電体基板の裏面に凹部を形成することにより、信号線路とグランド層間の距離を徐々に変えることができるので、所望の特性インピーダンス値が設定可能で、かつ入力側の特性インピーダンスと出力側の特性インピーダンスとが異なるインピーダンス変換器を実現することができる。また、本発明では、線路間のクロストークノイズを低減することができる。その結果、本発明では、従来と同程度の量にクロストークノイズを抑えたまま、信号線路の間隔を微細化することができ、線路密度の向上と線路間のクロストークノイズの低減とを両立させることができるので、高密度実装に適用可能なインピーダンス変換器を実現することができる。 According to the present invention, by forming a recess on the back surface of the dielectric substrate, the distance between the signal line and the ground layer can be gradually changed, so that a desired characteristic impedance value can be set and the characteristics on the input side can be set. It is possible to realize an impedance converter in which the impedance and the characteristic impedance on the output side are different. Further, in the present invention, crosstalk noise between lines can be reduced. As a result, in the present invention, the interval between signal lines can be miniaturized while suppressing the crosstalk noise to the same amount as in the conventional case, and both the improvement of the line density and the reduction of the crosstalk noise between the lines can be achieved at the same time. Therefore, an impedance converter applicable to high-density mounting can be realized.
図１Ａ－図１Ｂは、本発明のインピーダンス変換器の平面図および断面図である。1A-1B are a plan view and a cross-sectional view of the impedance converter of the present invention. 図２Ａ－図２Ｃは、本発明のインピーダンス変換器の断面図である。2A-2C are cross-sectional views of the impedance converter of the present invention. 図３は、本発明の実施例に係るインピーダンス変換器および従来のインピーダンス変換器の特性インピーダンスを示す図である。FIG. 3 is a diagram showing the characteristic impedance of the impedance converter and the conventional impedance converter according to the embodiment of the present invention. 図４は、本発明の実施例に係るインピーダンス変換器の信号線路とグランド層間の距離と、線路間距離について説明する断面図である。FIG. 4 is a cross-sectional view illustrating the distance between the signal line and the ground layer of the impedance converter according to the embodiment of the present invention and the distance between the lines. 図５は、本発明の実施例に係るインピーダンス変換器の特性インピーダンスと、信号線路とグランド層間の距離との関係を示す図である。FIG. 5 is a diagram showing the relationship between the characteristic impedance of the impedance converter according to the embodiment of the present invention and the distance between the signal line and the ground layer. 図６Ａ－図６Ｄは、電磁界シミュレータによるマイクロストリップ線路のモデルを示す図である。6A-6D are diagrams showing a model of a microstrip line using an electromagnetic field simulator. 図７は、本発明の実施例に係るインピーダンス変換器および従来のインピーダンス変換器のバックワード・クロストークのシミュレーション結果を示す図である。FIG. 7 is a diagram showing the simulation results of backward crosstalk of the impedance converter and the conventional impedance converter according to the embodiment of the present invention. 図８は、本発明の実施例に係るインピーダンス変換器および従来のインピーダンス変換器のフォワード・クロストークのシミュレーション結果を示す図である。FIG. 8 is a diagram showing a simulation result of forward crosstalk of the impedance converter and the conventional impedance converter according to the embodiment of the present invention. 図９Ａ－図９Ｃは、従来のインピーダンス変換器の構造を示す平面図および断面図である。9A-9C are a plan view and a cross-sectional view showing the structure of a conventional impedance converter. 図１０Ａ－図１０Ｂは、従来のインピーダンス変換器の問題点を説明する平面図である。10A-10B are plan views illustrating problems with conventional impedance converters.
［発明の原理］
　図１Ａは本発明のインピーダンス変換器の平面図、図１Ｂは図１Ａのインピーダンス変換器のＡ－Ａ’線断面図である。図２Ａは図１Ａのインピーダンス変換器のＢ－Ｂ’線断面図、図２Ｂは図１Ａのインピーダンス変換器のＣ－Ｃ’線断面図、図２Ｃは図１Ａのインピーダンス変換器のＤ－Ｄ’線断面図である。 [Principle of invention]
1A is a plan view of the impedance converter of the present invention, and FIG. 1B is a sectional view taken along line AA'of the impedance converter of FIG. 1A. 2A is a sectional view taken along line BB'of the impedance converter of FIG. 1A, FIG. 2B is a sectional view taken along the line CC'of the impedance converter of FIG. 1A, and FIG. It is a line sectional view.
　本発明のマイクロストリップ線路は、誘電体基板１０と、誘電体基板１０の裏面に形成されたグランド層１１と、誘電体基板１０の表面に形成された複数本の信号線路１３と、誘電体基板１０の表面の信号線路１３の端部と接続するように形成された基板接続パッド１４，１５とを備えている。 The microstrip line of the present invention includes a dielectric substrate 10, a ground layer 11 formed on the back surface of the dielectric substrate 10, a plurality of signal lines 13 formed on the surface of the dielectric substrate 10, and a dielectric substrate. It includes substrate connection pads 14 and 15 formed so as to connect to the end of the signal line 13 on the surface of 10.
　各信号線路１３は、信号伝搬方向（図１Ａ、図１Ｂの左右方向）と直交する方向に離間して配置されている。誘電体基板１０の裏面には、各信号線路１３と対向する位置に、それぞれ信号線路１３の信号伝搬方向に沿って深さが徐々に深くなる凹部１２が形成されている。このように、本発明では、誘電体基板１０の裏面に凹部１２を設けることにより、各信号線路１３の直下の位置において、信号伝搬方向に沿って信号線路１３とグランド層１１間の距離が、ｈ１，ｈ２，ｈ３（ｈ１＞ｈ２＞ｈ３）というように徐々に変化する。凹部１２は、信号の入力側または出力側のいずれか一端（本実施例では出力側）で最も深くなる。したがって、信号線路１３とグランド層１１間の距離は、信号の入力側または出力側のいずれか一端で最短となる。 Each signal line 13 is arranged so as to be separated from each other in a direction orthogonal to the signal propagation direction (horizontal direction in FIGS. 1A and 1B). On the back surface of the dielectric substrate 10, recesses 12 are formed at positions facing each signal line 13 so that the depth gradually increases along the signal propagation direction of the signal lines 13. As described above, in the present invention, by providing the recess 12 on the back surface of the dielectric substrate 10, the distance between the signal line 13 and the ground layer 11 is set along the signal propagation direction at the position directly below each signal line 13. It gradually changes as h1, h2, h3 (h1> h2> h3). The recess 12 is deepest at either one end (output side in this embodiment) of the signal input side or the output side. Therefore, the distance between the signal line 13 and the ground layer 11 is the shortest at either one end of the signal input side or the output side.
　凹部１２の形成方法としては、例えばＲＩＥ（Reactive Ion Etching）がある。ＲＩＥの際のローディング効果により、パターンが狭いエリアではエッチングレートが低くなり、パターンが広いエリアではエッチングレートが高くなる。 As a method of forming the recess 12, for example, there is RIE (Reactive Ion Etching). Due to the loading effect during RIE, the etching rate is low in the area where the pattern is narrow, and the etching rate is high in the area where the pattern is wide.
　そこで、ベンゾシクロブテン（ＢＣＢ）等からなる誘電体基板１０の裏面に、例えばＡｌ等の金属によりマスクを形成する際に、信号線路１３と対向する位置のマスクの開口部の幅が信号伝搬方向に沿って徐々に広くなるマスクパターンとする。すなわち、開口部が平面視テーパー形状のマスクパターンとする。このようなマスクを用いて、ＲＩＥにより誘電体基板１０をエッチングすれば、図１Ａ、図１Ｂ、図２Ａ～図２Ｃに示すように、幅が徐々に広くなるに従って徐々に深くなるような形状の凹部１２を形成することができる。そして、例えばウエットエッチングによってマスクを除去した後に、例えばめっき法によって誘電体基板１０の裏面および凹部１２の内部にグランド層１１を形成すればよい。 Therefore, when a mask is formed on the back surface of the dielectric substrate 10 made of benzocyclobutene (BCB) or the like with a metal such as Al, the width of the opening of the mask at a position facing the signal line 13 is the signal propagation direction. The mask pattern is gradually widened along. That is, the opening is a mask pattern having a tapered shape in a plan view. When the dielectric substrate 10 is etched by RIE using such a mask, as shown in FIGS. 1A, 1B, and 2A to 2C, the shape is such that the width gradually increases and becomes deeper. The recess 12 can be formed. Then, after removing the mask by, for example, wet etching, the ground layer 11 may be formed on the back surface of the dielectric substrate 10 and the inside of the recess 12 by, for example, a plating method.
　このように、本発明は、信号線路１３とグランド層１１間の距離を徐々に変えることにより、線路幅Ｗや線路間隔Ｇを維持したまま、特性インピーダンスを連続的に変化させることを可能にしたものである。 As described above, the present invention makes it possible to continuously change the characteristic impedance while maintaining the line width W and the line spacing G by gradually changing the distance between the signal line 13 and the ground layer 11. It is a thing.
　マイクロストリップ線路においては、信号線路とグランド層との距離が小さくなると、特性インピーダンスが小さくなる。図９Ａ～図９Ｃ、図１０Ａ、図１０Ｂに示した従来構成で特性インピーダンスを小さくするためには、線路幅を大きくする必要があり、パッド間隔の微細化と線路密度の向上とを両立させる必要がある高密度実装に適応することが困難であった。これに対して、本発明では、線路幅Ｗを大きくすることなく、また上面から見た実質的な線路間距離（Ｗ＋Ｇ）を大きくすることなく、マイクロストリップ線路の入力部分の特性インピーダンスと出力部分の特性インピーダンスとが異なるインピーダンス変換器を実現することができる。 In the microstrip line, the characteristic impedance becomes smaller as the distance between the signal line and the ground layer becomes smaller. In order to reduce the characteristic impedance in the conventional configurations shown in FIGS. 9A to 9C, 10A, and 10B, it is necessary to increase the line width, and it is necessary to achieve both finer pad spacing and improved line density. It was difficult to adapt to some high density mounting. On the other hand, in the present invention, the characteristic impedance and the output portion of the input portion of the microstrip line are not increased without increasing the line width W and the substantial line-to-line distance (W + G) seen from the upper surface. It is possible to realize an impedance converter whose characteristic impedance is different from that of.
　また、図９Ａ～図９Ｃ、図１０Ａ、図１０Ｂに示した従来構成では、線路幅が大きくなることにより、線路間隔が小さくなる。これに対して、本発明では、線路幅Ｗや線路間隔Ｇを変えずに特性インイーダンスを調整できるため、クロストークノイズを低減することができる。このように、本発明では、線路間のクロストークノイズを低減する効果を、インピーダンス変換機能と同時に、また線路密度を低下させることなく得ることができる。 Further, in the conventional configuration shown in FIGS. 9A to 9C, 10A, and 10B, the line spacing becomes smaller as the line width becomes larger. On the other hand, in the present invention, since the characteristic in-edance can be adjusted without changing the line width W and the line spacing G, crosstalk noise can be reduced. As described above, in the present invention, the effect of reducing the crosstalk noise between the lines can be obtained at the same time as the impedance conversion function and without lowering the line density.
　インピーダンス変換器において、信号線路とグランド層との距離を変化させる技術としては、例えば特開２０１３－２５１８６３号公報に記載のものが知られている。しかし、特開２０１３－２５１８６３号公報に記載のインピーダンス変換器は、グランド層を傾斜させる三次元構造であるため、製造プロセスが現実には難しく、実用化が困難であった。 As a technique for changing the distance between the signal line and the ground layer in the impedance converter, for example, the one described in Japanese Patent Application Laid-Open No. 2013-251863 is known. However, since the impedance converter described in JP2013-251863 has a three-dimensional structure in which the ground layer is inclined, the manufacturing process is actually difficult and it is difficult to put it into practical use.
　本発明の製造プロセスは、誘電体基板１０の表面に信号線路１３と基板接続パッド１４，１５を形成する配線プロセスと、誘電体基板１０の裏面に凹部１２を形成した後にグランド層１１を形成するプロセスとに分かれるが、それぞれの製造プロセスが確立している。このため、本発明のインピーダンス変換器は、実現可能な構成である。また、本発明では、配線プロセスの後で、凹部１２とグランド層１１を形成するため、線路の特性インピーダンスを最後に調整することが可能となる。 The manufacturing process of the present invention includes a wiring process for forming a signal line 13 and substrate connection pads 14 and 15 on the front surface of the dielectric substrate 10, and forming a ground layer 11 after forming a recess 12 on the back surface of the dielectric substrate 10. It is divided into processes, but each manufacturing process is established. Therefore, the impedance converter of the present invention has a feasible configuration. Further, in the present invention, since the recess 12 and the ground layer 11 are formed after the wiring process, the characteristic impedance of the line can be adjusted at the end.
　したがって、本発明によれば、信号線路の幅を変化させずにマイクロストリップ線路の特性インピーダンスを調整することが可能になり、パッド間隔の微細化、線路密度の向上と線路間のクロストークノイズの低減とを両立する、高密度実装に適用可能なインピーダンス変換器を形成することができる。 Therefore, according to the present invention, it is possible to adjust the characteristic impedance of the microstrip line without changing the width of the signal line, and the pad spacing is made finer, the line density is improved, and the crosstalk noise between the lines is reduced. It is possible to form an impedance converter applicable to high-density mounting that achieves both reduction and reduction.
［実施例］
　次に、本発明の実施例について説明する。本実施例のインピーダンス変換器は、発明の原理で説明した構成の具体例なので、本実施例においても図１Ａ、図１Ｂ、図２Ａ～図２Ｃを用いて説明する。 [Example]
Next, examples of the present invention will be described. Since the impedance converter of this embodiment is a specific example of the configuration described in the principle of the invention, it will be described with reference to FIGS. 1A, 1B, and 2A to 2C in this embodiment as well.
　図１Ａ、図１Ｂ、図２Ａ～図２Ｃにおいて、ベンゾシクロブテン（ＢＣＢ）等からなる誘電体基板１０の一方の面（裏面）には、Ａｕ等の導電体部材からなるグランド層１１が形成されている。誘電体基板１０の他方の面（表面）には、同じくＡｕ等の導電体部材からなる帯状の信号線路１３が形成されている。
　誘電体基板１０の表面には、信号線路１３の両端とそれぞれ電気的に接続するように形成されたＡｕ等の導電体部材からなる基板接続パッド１４，１５が形成されている。また、基板接続パッド１４，１５の下面には、ビア１６，１７が設けられている。ビア１６，１７は本発明において必須の構成要件ではなく、ビア１６，１７が無い構造でも構わない。 In FIGS. 1A, 1B, and 2A to 2C, a ground layer 11 made of a conductor member such as Au is formed on one surface (back surface) of the dielectric substrate 10 made of benzocyclobutene (BCB) or the like. ing. On the other surface (surface) of the dielectric substrate 10, a band-shaped signal line 13 also made of a conductor member such as Au is formed.
On the surface of the dielectric substrate 10, substrate connection pads 14 and 15 made of conductor members such as Au are formed so as to be electrically connected to both ends of the signal line 13. Further, vias 16 and 17 are provided on the lower surfaces of the substrate connection pads 14 and 15. The vias 16 and 17 are not essential constituents in the present invention, and a structure without the vias 16 and 17 may be used.
　本実施例のインピーダンス変換器の一端（入力側）は入力インピーダンスＺｉを有し、他端（出力側）は出力インピーダンスＺｏを有するものとする（Ｚｉ＞Ｚｏ）。図１Ａ、図１Ｂの例では左端が入力側、右端が出力側となっている。上記のとおり、本実施例では、誘電体基板１０の裏面に凹部１２を形成することにより、入力側から出力側に向かうに従って信号線路１３とグランド層１１間の距離が徐々に小さくなっている。これにより、特性インピーダンスもＺｉからＺｏへと徐々に小さくなっていく。 It is assumed that one end (input side) of the impedance converter of this embodiment has an input impedance Zi and the other end (output side) has an output impedance Zo (Zi> Zo). In the examples of FIGS. 1A and 1B, the left end is the input side and the right end is the output side. As described above, in this embodiment, by forming the recess 12 on the back surface of the dielectric substrate 10, the distance between the signal line 13 and the ground layer 11 gradually decreases from the input side to the output side. As a result, the characteristic impedance also gradually decreases from Zi to Zo.
　極板間隔が極板の一辺の長さに比べて極めて小さい平行板コンデンサーでは、極板間の電場（電界）が一様とみなすことができる。このとき並列静電容量Ｃは、極板面積Ｓに比例し、極板間隔ｄに反比例する。 In a parallel plate capacitor whose plate spacing is extremely small compared to the length of one side of the plate, the electric field (electric field) between the plates can be regarded as uniform. At this time, the parallel capacitance C is proportional to the plate area S and inversely proportional to the plate spacing d.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
　式（１）におけるεは誘電率である。マイクロストリップ線路の信号線路とグランド層間の距離ｄが小さくなると、並列静電容量Ｃは式（１）で規定される値よりも大きくなる。また、導体の電気抵抗Ｒは、導体の断面積Ａ［ｍ2］に反比例し、導体の長さＬ［ｍ］と抵抗率ρ［Ωｍ］とに比例する。 Ε in equation (1) is the permittivity. When the distance d between the signal line of the microstrip line and the ground layer becomes small, the parallel capacitance C becomes larger than the value defined by the equation (1). Further, the electric resistance R of the conductor is inversely proportional to the cross-sectional area A [m 2 ] of the conductor, and is proportional to the length L [m] of the conductor and the resistivity ρ [Ωm].
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
　信号線路の厚さが大きくなると、信号線路の電気抵抗Ｒは式（２）で規定される値よりも小さくなる。また、マイクロストリップ線路の特性インピーダンスＺ0は式（３）で表される。 As the thickness of the signal line increases, the electrical resistance R of the signal line becomes smaller than the value specified by the equation (2). The characteristic impedance Z 0 of the microstrip line is represented by the equation (3).
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
　ここで、Ｒは信号線路の単位長あたりの直列抵抗（Ω）、Ｌは信号線路の単位長あたりの直列インダクタンス（Ｈ）、Ｇは信号線路の単位長あたりの並列コンダクタンス（Ｓ）、Ｃは信号線路の単位長あたりの並列静電容量（Ｆ）である。式（１）、式（３）より、信号線路とグランド層間の距離が小さくなると、特性インピーダンスが小さくなるので、本実施例によるマイクロストリップ線路は、入力側で特性インピーダンスが大きく、出力側で特性インピーダンスが小さくなるようなインピーダンス変換器を形成する。 Here, R is the series resistance (Ω) per unit length of the signal line, L is the series inductance (H) per unit length of the signal line, G is the parallel conductance (S) per unit length of the signal line, and C is It is the parallel capacitance (F) per unit length of the signal line. From equations (1) and (3), the characteristic impedance decreases as the distance between the signal line and the ground layer decreases. Therefore, the microstrip line according to this embodiment has a large characteristic impedance on the input side and a characteristic on the output side. Form an impedance converter that reduces the impedance.
　信号線路１３とグランド層１１の材料としてＡｕ（金）を使用し、誘電体基板１０としてベンゾシクロブテン（ＢＣＢ）基板（誘電率εｒ＝２．７）を用いた、線路長３００μｍのインピーダンス変換器の出力側の特性インピーダンスＺ0を図３に示す。図３の３００は図９Ａ～図９Ｃ、図１０Ａ、図１０Ｂに示した従来のインピーダンス変換器の出力側の特性インピーダンスＺ0を示し、３０１は本実施例のインピーダンス変換器の出力側の特性インピーダンスＺ0を示している。 An impedance converter with a line length of 300 μm using Au (gold) as the material for the signal line 13 and the ground layer 11 and a benzocyclobutene (BCB) substrate (dielectric constant εr = 2.7) as the dielectric substrate 10. The characteristic impedance Z 0 on the output side of is shown in FIG. 300 in FIG. 3 shows the characteristic impedance Z 0 on the output side of the conventional impedance converter shown in FIGS. 9A to 9C, 10A, and 10B, and 301 is the characteristic impedance on the output side of the impedance converter of this embodiment. It shows Z 0.
　ここでは、従来のインピーダンス変換器の入力側の線路幅を２０μｍ、入力側の線路間隔Ｇを２０μｍとし、出力側の線路幅をＷμｍとした。また、従来のインピーダンス変換器の信号線路１０２とグランド層１０１間の距離を２０μｍ、信号線路１０２の厚さを２μｍとした。本実施例のインピーダンス変換器の信号線路１３の幅を入力側、出力側共に２０μｍに固定し、線路間隔Ｇを２０μｍに固定した。信号線路１３の厚さは２μｍである。 Here, the line width on the input side of the conventional impedance converter is 20 μm, the line spacing G on the input side is 20 μm, and the line width on the output side is W μm. Further, the distance between the signal line 102 of the conventional impedance converter and the ground layer 101 is 20 μm, and the thickness of the signal line 102 is 2 μm. The width of the signal line 13 of the impedance converter of this embodiment was fixed to 20 μm on both the input side and the output side, and the line spacing G was fixed to 20 μm. The thickness of the signal line 13 is 2 μm.
　シミュレーションでは、図４に示すように本実施例のインピーダンス変換器の信号線路１３とグランド層１１間の最短距離ｈをパラメータとしている。また、線路幅Ｗと実質的な線路間距離Ｗ＋Ｇとを効果の指標として、図３の縦軸に用いている。 In the simulation, as shown in FIG. 4, the shortest distance h between the signal line 13 and the ground layer 11 of the impedance converter of this embodiment is used as a parameter. Further, the line width W and the substantial line-to-line distance W + G are used as indicators of the effect on the vertical axis of FIG.
　従来のインピーダンス変換器において、出力側の線路幅を２５μｍから５０μｍ（線路間距離Ｗ＋Ｇを４５μｍから７０μｍ）まで大きくしていくと、出力側の特性インピーダンスは７０Ωから４９Ωまで小さくなる。一方、本実施例では、線路幅や線路間距離を変えることなく、出力側の特性インピーダンスを変えることができる。図３の本実施例のインピーダンス変換器の例では、特性インピーダンス値が６９Ωのとき、距離ｈ＝１４μｍであり、特性インピーダンス値が４４Ωのとき、距離ｈ＝６μｍである。 In the conventional impedance converter, when the line width on the output side is increased from 25 μm to 50 μm (distance between lines W + G is increased from 45 μm to 70 μm), the characteristic impedance on the output side is reduced from 70 Ω to 49 Ω. On the other hand, in this embodiment, the characteristic impedance on the output side can be changed without changing the line width or the line-to-line distance. In the example of the impedance converter of this embodiment of FIG. 3, when the characteristic impedance value is 69Ω, the distance h = 14 μm, and when the characteristic impedance value is 44Ω, the distance h = 6 μm.
　図５に本実施例のインピーダンス変換器の特性インピーダンスＺ0と、信号線路１３とグランド層１１間の距離ｈとの関係を示す。図５より、距離ｈの値が１４μｍから６μｍまで変化すると、特性インピーダンスＺ0は６９Ωから４４Ωまで変化することが分かる。 FIG. 5 shows the relationship between the characteristic impedance Z 0 of the impedance converter of this embodiment and the distance h between the signal line 13 and the ground layer 11. From FIG. 5, it can be seen that when the value of the distance h changes from 14 μm to 6 μm, the characteristic impedance Z 0 changes from 69 Ω to 44 Ω.
　次に、従来のインピーダンス変換器と本実施例のインピーダンス変換器について、クロストーク量を比較してみる。図６Ａ～図６Ｄは電磁界シミュレータＳｏｎｎｅｔ（登録商標）－ＥＭによるマイクロストリップ線路のモデルを示す図である。図６Ａは従来のインピーダンス変換器のモデルの断面図、図６Ｂは従来のインピーダンス変換器のモデルの斜視図、図６Ｃは本実施例のインピーダンス変換器のモデルの断面図、図６Ｄは本実施例のインピーダンス変換器のモデルの斜視図である。 Next, let's compare the amount of crosstalk between the conventional impedance converter and the impedance converter of this embodiment. 6A-6D are diagrams showing a model of a microstrip line using the electromagnetic field simulator Sonnet®-EM. 6A is a cross-sectional view of a conventional impedance converter model, FIG. 6B is a perspective view of a conventional impedance converter model, FIG. 6C is a cross-sectional view of the impedance converter model of the present embodiment, and FIG. 6D is the present embodiment. It is a perspective view of the model of the impedance converter of.
　クロストーク量を比較するため、従来および本実施例共に実質的な線路間距離Ｗ＋Ｇを３０μｍに固定し、特性インピーダンスを５５Ωに揃えた。図６Ａ、図６Ｂに示した従来のインピーダンス変換器の信号線路１０２の幅Ｗを２５μｍ、信号線路１０２の厚さａを２μｍ、線路間隔Ｇを５μｍ、信号線路１０２とグランド層１０１間の距離ｈを２０μｍとした。また、図６Ｃ、図６Ｄに示した本実施例のインピーダンス変換器の信号線路１３の幅Ｗを２０μｍ、信号線路１３の厚さａを２μｍ、線路間隔Ｇを１０μｍ、信号線路１３とグランド層１１間の最短距離ｈを１０μｍとした。なお、シミュレーションでは、計算簡略化のため、インピーダンス変換器の出力側のみの形状を計算している。また、凹部１２の側壁には導電体部材が無い状態とし、インピーダンス変換器の線路数を２本としている。 In order to compare the amount of crosstalk, the actual line-to-line distance W + G was fixed at 30 μm and the characteristic impedance was adjusted to 55 Ω in both the conventional and the present embodiments. The width W of the signal line 102 of the conventional impedance converter shown in FIGS. 6A and 6B is 25 μm, the thickness a of the signal line 102 is 2 μm, the line spacing G is 5 μm, and the distance h between the signal line 102 and the ground layer 101. Was 20 μm. Further, the width W of the signal line 13 of the impedance converter of this embodiment shown in FIGS. 6C and 6D is 20 μm, the thickness a of the signal line 13 is 2 μm, the line spacing G is 10 μm, the signal line 13 and the ground layer 11 The shortest distance h between them was set to 10 μm. In the simulation, the shape of only the output side of the impedance converter is calculated to simplify the calculation. Further, the side wall of the recess 12 has no conductor member, and the number of lines of the impedance converter is two.
　図６Ｂ、図６Ｄのようにポート番号を設定したとき、Ｓパラメータの結果を調べることで、クロストーク量を直接評価できる。ポートｐ１は従来のインピーダンス変換器において平行に設けられた２本の信号線路１０２のうち、一方の信号線路１０２の入力ポート、ポートｐ２は一方の信号線路１０２の出力ポート、ポートｐ３は他方の信号線路１０２の入力ポート、ポートｐ４は他方の信号線路１０２の出力ポートである。本実施例のインピーダンス変換器において平行に設けられた２本の信号線路１３についても、ポート番号の設定は同様である。 When the port number is set as shown in FIGS. 6B and 6D, the amount of crosstalk can be directly evaluated by examining the result of the S parameter. Of the two signal lines 102 provided in parallel in the conventional impedance converter, port p1 is the input port of one signal line 102, port p2 is the output port of one signal line 102, and port p3 is the other signal. The input port and port p4 of the line 102 are the output ports of the other signal line 102. The port number setting is the same for the two signal lines 13 provided in parallel in the impedance converter of this embodiment.
　Ｓ３１は、ポートｐ１に信号を与えたときのポートｐ１とポートｐ３の電圧比であり、バックワード（近端）・クロストークを表す。また、Ｓ４１は、ポートｐ１とポートｐ４の電圧比であり、フォワード（遠端）・クロストークを表す。図７、図８はそれぞれＳ３１、Ｓ４１のシミュレーション結果を示す図であり、差異を分かりやすくするため、デシベル表示にしている。図７の７０は従来のインピーダンス変換器のバックワード・クロストークを示し、７１は本実施例のインピーダンス変換器のバックワード・クロストークを示している。また、図８の８０は従来のインピーダンス変換器のフォワード・クロストークを示し、８１は本実施例のインピーダンス変換器のフォワード・クロストークを示している。 S31 is the voltage ratio between port p1 and port p3 when a signal is given to port p1, and represents backward (near end) crosstalk. Further, S41 is a voltage ratio between port p1 and port p4, and represents forward (far end) crosstalk. 7 and 8 are diagrams showing the simulation results of S31 and S41, respectively, and are displayed in decibels in order to make the difference easy to understand. 70 in FIG. 7 shows the backward crosstalk of the conventional impedance converter, and 71 shows the backward crosstalk of the impedance converter of this embodiment. Further, 80 in FIG. 8 shows the forward crosstalk of the conventional impedance converter, and 81 shows the forward crosstalk of the impedance converter of this embodiment.
　図７によれば、本実施例のインピーダンス変換器のバックワード・クロストークは、従来のインピーダンス変換器のバックワード・クロストークよりも小さく、特に１５ＧＨｚ～１００ＧＨｚの広範囲において７ｄＢ以上小さいことが分かる。また、図８によれば、本実施例のインピーダンス変換器のフォワード・クロストークは、従来のインピーダンス変換器のフォワード・クロストークよりも小さく、特に１５ＧＨｚ～１００ＧＨｚの広範囲において７ｄＢ程度小さいことが分かる。 According to FIG. 7, it can be seen that the backward crosstalk of the impedance converter of this embodiment is smaller than the backward crosstalk of the conventional impedance converter, and is particularly smaller by 7 dB or more in a wide range of 15 GHz to 100 GHz. Further, according to FIG. 8, it can be seen that the forward crosstalk of the impedance converter of this embodiment is smaller than the forward crosstalk of the conventional impedance converter, and is particularly smaller by about 7 dB in a wide range of 15 GHz to 100 GHz.
　以上のように、本実施例では、線路幅や線路間隔を変化させなくても、誘電体基板１０の裏面に凹部１２を形成することにより、信号線路１３とグランド層１１間の距離を徐々に変える形態をとる。本実施例では、凹部１２の深さを徐々に深くすることにより、信号線路１３とグランド層１１間の距離を徐々に変えることができるので、所望の特性インピーダンス値が設定可能で、かつ入力側の特性インピーダンスと出力側の特性インピーダンスとが異なるインピーダンス変換器を実現することができる。また、本実施例では、信号線路１３をグランド層１１に近づけることにより、線路間のクロストークノイズを低減することができる。 As described above, in the present embodiment, the distance between the signal line 13 and the ground layer 11 is gradually increased by forming the recess 12 on the back surface of the dielectric substrate 10 without changing the line width or the line spacing. Take the form of change. In this embodiment, the distance between the signal line 13 and the ground layer 11 can be gradually changed by gradually increasing the depth of the recess 12, so that a desired characteristic impedance value can be set and the input side can be set. It is possible to realize an impedance converter in which the characteristic impedance of the above and the characteristic impedance of the output side are different. Further, in this embodiment, the crosstalk noise between the lines can be reduced by bringing the signal line 13 closer to the ground layer 11.
　したがって、本実施例によれば、従来と同程度の量にクロストークノイズを抑えたまま、信号線路の間隔（隣接する基板接続パッドの間隔）を微細化することができ、線路密度の向上と線路間のクロストークノイズの低減とを両立させることができるので、高密度実装に適用可能なインピーダンス変換器を実現することができる。 Therefore, according to this embodiment, the interval between signal lines (interval between adjacent board connection pads) can be miniaturized while suppressing crosstalk noise to the same amount as in the conventional case, and the line density can be improved. Since it is possible to achieve both reduction of crosstalk noise between lines, it is possible to realize an impedance converter applicable to high-density mounting.
　なお、本実施例では、インピーダンス変換器の出力側の特性インピーダンスを小さくしているが、入力側の特性インピーダンスを小さくしたインピーダンス変換器を形成することもできる。入力側の特性インピーダンスを小さくするには、図１Ａ、図１Ｂにおいて右端を入力側、左端を出力側とすればよい。この場合は、信号伝搬方向に沿って凹部１２の深さが徐々に浅くなる。 In this embodiment, the characteristic impedance on the output side of the impedance converter is reduced, but an impedance converter in which the characteristic impedance on the input side is reduced can also be formed. In order to reduce the characteristic impedance on the input side, the right end may be the input side and the left end may be the output side in FIGS. 1A and 1B. In this case, the depth of the recess 12 gradually becomes shallower along the signal propagation direction.
　また、図１Ａ、図１Ｂ、図２Ａ～図２Ｃでは、平行に設ける信号線路１３の本数が３本の場合について説明したが、これに限るものではなく、信号線路が２本、あるいは４本以上のマルチレーンであってもよいことは言うまでもない。 Further, in FIGS. 1A, 1B, and 2A to 2C, the case where the number of signal lines 13 provided in parallel is three has been described, but the present invention is not limited to this, and the number of signal lines is two or four or more. Needless to say, it may be a multi-lane.
　本発明は、半導体高周波モジュールにおいてインピーダンスを変換する技術に適用することができる。 The present invention can be applied to a technique for converting impedance in a semiconductor high frequency module.
　１０…誘電体基板、１１…グランド層、１２…凹部、１３…信号線路、１４，１５…基板接続パッド、１６，１７…ビア。 10 ... Dielectric board, 11 ... Ground layer, 12 ... Recess, 13 ... Signal line, 14, 15 ... Board connection pad, 16, 17 ... Via.

Claims (5)

  1. 　誘電体基板と、
    　前記誘電体基板の裏面に形成されたグランド層と、
    　前記誘電体基板の表面に形成された信号線路とを備え、
    　前記信号線路と対向する位置の前記誘電体基板の裏面に、前記信号線路の信号伝搬方向に沿って深さが徐々に深くなる凹部が形成され、
    　前記グランド層は、前記誘電体基板の裏面および前記凹部の内部に形成されていることを特徴とするインピーダンス変換器。     Dielectric substrate and
    A ground layer formed on the back surface of the dielectric substrate and
    A signal line formed on the surface of the dielectric substrate is provided.
    On the back surface of the dielectric substrate at a position facing the signal line, a recess is formed in which the depth gradually increases along the signal propagation direction of the signal line.
    An impedance converter characterized in that the ground layer is formed on the back surface of the dielectric substrate and inside the recess.
  2. 　請求項１記載のインピーダンス変換器において、
    　前記凹部は、深さが徐々に深くなるに従って幅が徐々に広くなる形状であることを特徴とするインピーダンス変換器。     In the impedance converter according to claim 1,
    An impedance converter characterized in that the recess has a shape in which the width gradually increases as the depth gradually increases.
  3. 　請求項１または２記載のインピーダンス変換器において、
    　前記信号伝搬方向と交差する方向に離間して配置された複数本の前記信号線路と複数個の前記凹部とを備えることを特徴とするインピーダンス変換器。     In the impedance converter according to claim 1 or 2.
    An impedance converter comprising a plurality of the signal lines and a plurality of the recesses arranged apart from each other in a direction intersecting the signal propagation direction.
  4. 　誘電体基板の表面に信号線路を形成する第１の工程と、
    　前記信号線路と対向する位置の前記誘電体基板の裏面に、前記信号線路の信号伝搬方向に沿って深さが徐々に深くなる凹部を形成する第２の工程と、
    　前記誘電体基板の裏面および前記凹部の内部にグランド層を形成する第３の工程とを含むことを特徴とするインピーダンス変換器の製造方法。     The first step of forming a signal line on the surface of the dielectric substrate and
    A second step of forming a recess on the back surface of the dielectric substrate at a position facing the signal line so that the depth gradually becomes deeper along the signal propagation direction of the signal line.
    A method for manufacturing an impedance converter, which comprises a third step of forming a ground layer on the back surface of the dielectric substrate and inside the recess.
  5. 　請求項４記載のインピーダンス変換器の製造方法において、
    　前記第２の工程は、
    　前記誘電体基板の裏面にマスクを形成する工程と、
    　ＲＩＥにより前記凹部を形成する工程とを含み、
    　前記マスクは、前記信号線路と対向する位置の開口部の幅が前記信号伝搬方向に沿って徐々に広くなるパターンであり、
    　深さが徐々に深くなるに従って幅が徐々に広くなる前記凹部を形成することを特徴とするインピーダンス変換器の製造方法。     In the method for manufacturing an impedance converter according to claim 4,
    The second step is
    The step of forming a mask on the back surface of the dielectric substrate and
    Including the step of forming the recess by RIE.
    The mask has a pattern in which the width of the opening at a position facing the signal line gradually widens along the signal propagation direction.
    A method for manufacturing an impedance converter, which comprises forming the recess having a width gradually increasing as the depth gradually increases.
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JP2019096979A (en) * 2017-11-21 2019-06-20 日本電信電話株式会社 Impedance converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2617085A (en) * 2022-03-28 2023-10-04 Leonardo UK Ltd An impedance matching circuit
CN115345108A (en) * 2022-08-31 2022-11-15 苏州浪潮智能科技有限公司 Transmission line structure determination method, system, electronic device and readable storage medium
CN115345108B (en) * 2022-08-31 2023-11-03 苏州浪潮智能科技有限公司 Transmission line structure determining method, system, electronic device and readable storage medium

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