WO2021200820A1 - Printed wiring board and method for manufacturing same - Google Patents

Printed wiring board and method for manufacturing same Download PDF

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Publication number
WO2021200820A1
WO2021200820A1 PCT/JP2021/013285 JP2021013285W WO2021200820A1 WO 2021200820 A1 WO2021200820 A1 WO 2021200820A1 JP 2021013285 W JP2021013285 W JP 2021013285W WO 2021200820 A1 WO2021200820 A1 WO 2021200820A1
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WO
WIPO (PCT)
Prior art keywords
conductor
hole
printed wiring
layer
wiring board
Prior art date
Application number
PCT/JP2021/013285
Other languages
French (fr)
Japanese (ja)
Inventor
啓作 松本
Original Assignee
京セラ株式会社
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Filing date
Publication date
Application filed by 京セラ株式会社 filed Critical 京セラ株式会社
Priority to JP2022512209A priority Critical patent/JPWO2021200820A1/ja
Publication of WO2021200820A1 publication Critical patent/WO2021200820A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • This disclosure relates to a printed wiring board and a method for manufacturing the printed wiring board.
  • the printed wiring board of the present disclosure has an insulating substrate and a conductor portion arranged at least inside the insulating substrate.
  • the insulating substrate has a plurality of laminated insulating layers and through holes penetrating from the first opening to the second opening in the thickness direction.
  • the conductor portion has a plurality of conductor layers and a through-hole conductor.
  • the plurality of conductor layers are located along the plane direction in each of the insulating layers.
  • the through-hole conductor has a cylindrical shape extending from the first opening toward the second opening.
  • the through-hole conductor is electrically connected to a part of the plurality of conductor layers at the existing position.
  • the plurality of conductor layers have at least one non-connecting conductor layer that is not in contact with the through-hole conductor near the second opening of the through-hole conductor.
  • the through-hole conductors have different positions in the thickness direction of the first end portion and the second end portion, which are two end portions close to the second opening, in a cross-sectional view along the central axis of the through hole.
  • the printed wiring board of the present disclosure has an insulating substrate and a conductor portion arranged at least inside the insulating substrate.
  • the insulating substrate has a plurality of laminated insulating layers and through holes penetrating from the first opening to the second opening in the thickness direction.
  • the conductor portion has a plurality of conductor layers and a through-hole conductor.
  • the plurality of conductor layers are located along the plane direction in each of the insulating layers.
  • the through-hole conductor has a cylindrical shape extending from the first opening toward the second opening.
  • the through-hole conductor is electrically connected to a part of the plurality of conductor layers at the existing position.
  • the plurality of conductor layers have at least one non-connecting conductor layer that is not in contact with the through-hole conductor near the second opening of the through-hole conductor.
  • the end face of the through-hole conductor near the second opening is inclined with respect to the central axis of the through-hole.
  • the method for manufacturing a printed wiring board of the present disclosure includes an insulating substrate in which a plurality of insulating layers are laminated, a conductor layer provided along the surface of the insulating layer, and a through hole penetrating the insulating substrate in the thickness direction. Including a step of preparing a multilayer substrate having a copper through-hole conductor original body covering the inner wall of the material. The manufacturing method includes a step of forming a protective layer which is not dissolved by the copper etching solution on the entire inner wall of the through-hole conductor raw material provided on the multilayer substrate.
  • the manufacturing method uses a cutting jig having a diameter larger than the inner diameter of the through-hole conductor original body and having a tapered tip portion, and the axial center of the through hole is the through hole.
  • the through-hole conductor original body and the protective layer are cut from one surface side of the multilayer substrate to a position in the middle of the thickness direction of the multilayer substrate by arranging the through-hole conductor original body and the protective layer at a position deviated from the central axis of the multilayer substrate.
  • the step of making the through-hole conductor original body electrically connected to at least two conductor layers is included.
  • FIG. 5 is a cross-sectional view showing a state in which a portion of a through-hole conductor bulk material provided in the printed wiring board processed body shown in FIG. 5 is machined.
  • FIG. 5 is a cross-sectional view showing a state after etching the printed wiring board processed body shown in FIG. 7. It is sectional drawing which shows the state after removing the protective layer from the printed wiring board processed body shown in FIG. It shows the manufacturing method of the printed wiring board of another aspect, and is sectional drawing which shows the state which cuts the part of the through-hole conductor original body with respect to the printed wiring board processed body which formed the protective layer. It is sectional drawing which shows the state of the printed wiring board processed body after partially cutting a through-hole conductor raw material. It is sectional drawing which shows the state after performing the etching process on the printed wiring board processed body shown in FIG. It is sectional drawing which shows the state after removing the protective layer from the printed wiring board processed body shown in FIG. It is a top view of the produced printed wiring board.
  • the printed wiring board disclosed in Patent Document 1 is required to have the ability to mount electric elements at a high density in order to realize high functionality and high performance of electronic devices.
  • FIG. 1 is a cross-sectional view showing a part of a printed wiring board shown as an example of an embodiment.
  • the printed wiring board A of the embodiment has an insulating substrate 1 and a conductor portion 3 arranged at least inside the insulating substrate 1.
  • the insulating substrate 1 has a structure in which a plurality of insulating layers 5 are laminated. Here, for convenience, each insulating layer 5 is designated by a different reference numeral.
  • the insulating substrate 1 has a structure in which a first insulating layer 5a, a second insulating layer 5b, and a third insulating layer 5c are laminated from an upper layer.
  • FIG. 1 shows a case where the insulating layer 5 has three layers, but the present invention is not limited to this.
  • the insulating substrate 1 also includes those having more than three insulating layers 5.
  • the number of layers of the insulating layer 5 constituting the insulating substrate 1 may be 3 or more.
  • the number of layers is 30 or more.
  • the upper limit of the number of layers of the insulating layer 5 is not particularly set, but 50 layers or less may be used as a guide.
  • the insulating substrate 1 has a through hole 7.
  • the through hole 7 penetrates the insulating substrate 1 in the thickness direction.
  • the through hole 7 has a first opening 8a on one surface side of the insulating substrate 1.
  • the other surface side of the insulating substrate 1 is the second opening 8b.
  • the first opening 8a and the second opening 8b are arranged so as to face each other in the insulating substrate 1.
  • the inner wall on the left side of the through hole 7 is designated by reference numeral 7L
  • the inner wall on the right side of the through hole 7 is designated by reference numeral 7R.
  • reference numeral 3 representing the conductor portion is used as a code for grouping the conductor layers 9 (9a, 9b, 9c, 9d, 9e, 9f, 9g, 9h) and the through-hole conductor 11.
  • the conductor portion 3 has a plurality of conductor layers 9 and a through-hole conductor 11.
  • the plurality of conductor layers 9 are located along the plane direction of each of the insulating layers 5.
  • FIG. 1 for convenience, the names and symbols of the conductor layers 9 arranged in each layer are changed. This is to make it possible to distinguish the conductor layers 9 arranged in each layer of the insulating layer 5 in FIG.
  • the arrangement of each conductor layer 9 is shown in FIG.
  • the first conductor layer 9a, the second conductor layer 9b, the third conductor layer 9c, and the third conductor layer 9c are arranged on the left side via the insulating layer 5, respectively, from the upper side in the stacking direction.
  • a four-conductor layer 9d is arranged.
  • the fifth conductor layer 9e, the sixth conductor layer 9f, the seventh conductor layer 9g, and the eighth conductor layer 9h are arranged from the upper side in the stacking direction via the insulating layer 5, respectively.
  • the first conductor layer 9a and the fifth conductor layer 9e arranged on the left side and the right side of one insulating layer are electrically connected. Notation of 1st conductor layer 9a, 2nd conductor layer 9b, 3rd conductor layer 9c, 4th conductor layer 9d, 5th conductor layer 9e, 6th conductor layer 9f, 7th conductor layer 9g and 8th conductor layer 9h. Is used for convenience when the printed wiring board A is viewed in the vertical sectional view shown in FIG.
  • reference numeral 11 representing a through-hole conductor is a reference numeral that combines reference numeral 11L and reference numeral 11R.
  • the through-hole conductor 11 has a cylindrical shape.
  • the through-hole conductor 11 extends from the first opening 8a toward the second opening 8b.
  • the through-hole conductor 11 extends from the second opening 8b side in the direction of the first opening 8a.
  • the through-hole conductor 11 in contact with the inner wall 7L of the through-hole 7 is the first through-hole conductor 11L.
  • the through-hole conductor 11 in contact with the inner wall 7R of the through-hole 7 is the second through-hole conductor 11R.
  • the first through-hole conductor 11L and the second through-hole conductor 11R are used for convenience when the printed wiring board A is viewed based on a vertical cross-sectional view as shown in FIG.
  • the through-hole conductor 11 has a first through-hole conductor 11L and a second through-hole conductor 11R. In this case, the first through-hole conductor 11L and the second through-hole conductor 11R are electrically connected.
  • the via hole conductor 11 may be arranged so that one via hole conductor 11 is vertically divided, and the two are separately insulated and arranged.
  • the through-hole conductor 11 has an end portion 11t in the middle of the insulating substrate 1 in the thickness direction.
  • the end portion of the first through-hole conductor 11L located on the left side of the through-hole conductor 11 is designated by reference numeral 11 tL.
  • the end portion of the second through-hole conductor 11R located on the right side of the through-hole conductor 11 is designated by reference numeral 11 tR.
  • reference numeral 11t is used when the reference numeral 11tL at the end of the first through-hole conductor 11L and the reference numeral 11tR at the end located on the right side of the second through-hole conductor 11 are collectively indicated.
  • the through-hole conductor 11 reaches the surface 1a of the insulating substrate 1 on the surface 1a side of one side of the insulating substrate 1.
  • the through-hole conductor 11 does not reach the front surface (back surface) 1b of the insulating substrate 1 on the other side surface 1b side of the insulating substrate 1.
  • the surface 1a on one side of the insulating substrate 1 is positioned on the upper surface side (first opening 8a side) of the insulating substrate 1 in FIG.
  • the front surface (back surface) 1b on the other side of the insulating substrate 1 is positioned on the lower surface side (second opening 8b side) of the insulating substrate 1 in FIG.
  • the through-hole conductor 11 may reach the surface 1b on the lower surface side of the insulating substrate 1 and may not reach the surface 1a on the upper surface side.
  • the through-hole conductor 11 is provided so as to partially cover the inner wall 7L and the inner wall 7R of the through-hole 7 in the thickness direction.
  • the through-hole conductor 11 is electrically connected to a plurality of conductor layers at a position where the through-hole conductor 11 exists.
  • the plurality of conductor layers 9 have at least one non-connecting conductor layer that is not in contact with the through-hole conductor 11 closer to the second opening 8b than the through-hole conductor 11.
  • the first through-hole conductor 11L excludes at least one conductor layer 9 from the plurality of conductor layers (first conductor layer 9a, second conductor layer 9b, third conductor layer 9c, and fourth conductor layer 9d). It is electrically connected to another conductor layer 9. In this case, the first through-hole conductor 11L is electrically connected to the first conductor layer 9a and the second conductor layer 9b. The first through-hole conductor 11L is not connected to the third conductor layer 9c and the fourth conductor layer 9d.
  • the through-hole conductor 11 is the other conductor layer 9 except for at least one of the plurality of conductor layers (fifth conductor layer 9e, sixth conductor layer 9f, seventh conductor layer 9g, and eighth conductor layer 9h). It is electrically connected to the conductor layer 9.
  • the second through-hole conductor 11R is electrically connected to the fifth conductor layer 9e and the sixth conductor layer 9f.
  • the second through-hole conductor 11R is not connected to the seventh conductor layer 9g and the eighth conductor layer 9h.
  • the conductor layer 9 excluding at least one conductor layer 9 is the third conductor layer 9c, the fourth conductor layer 9d, the seventh conductor layer 9g, and the eighth conductor layer 9h.
  • the non-connecting conductor layer refers to the third conductor layer 9c, the fourth conductor layer 9d, the seventh conductor layer 9g, and the eighth conductor layer 9h.
  • the position of the end portion 11t of the through-hole conductor 11 in the thickness direction is different between the inner walls 7L and 7R of the through-hole 7 when the insulating substrate 1 is viewed in a vertical cross section.
  • the end portion 11tL of the first through-hole conductor 11L and the end portion 11tR of the second through-hole conductor 11R are located between the inner walls 7L and 7R of the through-hole 7 when the insulating substrate 1 is viewed in a vertical cross section.
  • the position in the thickness direction is different.
  • the end portion 11tL of the first through-hole conductor 11L is hereinafter referred to as the first end portion 11tL.
  • the end portion 11tR of the second through-hole conductor 11R is hereinafter referred to as the second end portion 11tR.
  • the through-hole conductor 11 has different positions of the first end portion 11tL and the second end portion 11tR, which are two end portions close to the second opening 8b, in a cross-sectional view along the central axis Z of the through hole 7.
  • the central axis Z is shown separately on the upper side and the lower side of the printed wiring board A, but if it is described in the through hole 7, it may overlap with the display of other symbols or the like. This is because it came.
  • the central axis Z is linearly connected to the upper side and the lower side of the printed wiring board A.
  • the positions of the first end portion 11tL and the second end portion 11tR are different is evaluated from the shape of the through-hole conductor 11 seen when the printed wiring board A or the insulating substrate 1 is viewed in cross section. That is, in the printed wiring board A shown in FIG. 1, the length LL of the first through-hole conductor 11L is longer than the length LR of the second through-hole conductor 11R. In other words, in the printed wiring board A shown in FIG. 1, the end portion 11tL of the first through-hole conductor 11L is located at a position deeper than the end portion 11tR of the second through-hole conductor 11R.
  • the printed wiring board A has a dimensional difference ⁇ L between the length LL of the first through-hole conductor 11L and the length LR of the second through-hole conductor 11R.
  • the dimensional difference ⁇ L is the difference in length between the length LL of the first through-hole conductor 11L and the length LR of the second through-hole conductor 11R.
  • ⁇ L may have a different capacitance component that contributes to impedance in the printed wiring board A.
  • ⁇ L depends on the thickness of the insulating layer 5 (here, the second insulating layer 5b), but may be 1 ⁇ m or more.
  • the maximum value of ⁇ L is not particularly provided, but it may be within twice the thickness t of the one-layer insulating layer 5, and in particular, within a length corresponding to the thickness of the one-layer insulating layer 5. For example, it is preferably within 100 ⁇ m, particularly within 50 ⁇ m.
  • the printed wiring board A shown in FIG. 1 has different lengths of facing portions of the through-hole conductors 11 arranged in the through-hole 7 in this way.
  • the opposing portions in the through-hole 7 are portions arranged on both sides when the through-hole conductor 11 is vertically divided, as shown in FIG.
  • the cross section of the through-hole conductor 11 has a cylindrical shape, the cross section is not limited to the cross section arranged on both sides when the place having the maximum diameter (the place having the diameter) is vertically divided. Even if the through-hole conductor 11 is vertically divided at an arbitrary location, both the portion that becomes the first through-hole conductor 11L and the portion that becomes the second through-hole conductor 11R may be visible.
  • the distance dL in the thickness direction from the end portion 11tL of the first through-hole conductor 11L to the third conductor layer 9c is the distance in the thickness direction from the end portion 11tR of the second through-hole conductor 11R to the seventh conductor layer 9g. Shorter than dR.
  • the distance dL in the thickness direction is a perpendicular line from the end portion 11tL of the first through-hole conductor 11L to the surface where the position of the upper surface of the third conductor layer 9c is translated in the horizontal direction, as shown in FIG. It is the length when it is lowered.
  • the distance dR in the thickness direction is when a perpendicular line is drawn from the end portion 11tR of the second through-hole conductor 11R to the surface where the position of the upper surface of the seventh conductor layer 9g is translated in the horizontal direction. Is the length of.
  • the insulating layer 5b is arranged between the layers of the second conductor layer 9b and the third conductor layer 9c. In the region on the right side of the printed wiring board A, the insulating layer 5b is similarly arranged between the layers of the 7th conductor layer 9g and the 8th conductor layer 9h. In this case, the thickness t of the insulating layer 5b is the same between the region on the left side of the printed wiring board A and the region on the right side of the printed wiring board A.
  • the fact that the thickness t of the insulating layer 5b is the same means that the difference between the maximum thickness and the minimum thickness is within 10% when the thickness t of the insulating layer 5b is measured at a plurality of locations in the plane direction of the insulating layer 5b.
  • the absolute value of the value is within 10%.
  • the thickness t of the plurality of insulating layers 5 (here, the insulating layer 5a, the insulating layer 5b, and the insulating layer 5c) laminated to form the insulating substrate 1 may be the same, but it differs depending on the application. It may be the thickness.
  • the thickness of the first conductor layer 9a to the eighth conductor layer 9h may be the same, but may be different depending on the application.
  • the fact that the thickness of the conductor layer 9 is the same means that the difference ⁇ tM between the maximum thickness and the minimum thickness is 20% or less when the thickness of the conductor layer 9 is measured.
  • the absolute value is within 20%.
  • the distance dL from the end portion 11tL of the first through-hole conductor 11L to the third conductor layer 9c is from the end portion 11tR of the through-hole conductor 11R to the seventh conductor layer 9g. It is shorter than the interval dR. Due to the difference in spacing between the spacing dL and the spacing dR, the capacitance CdL generated in the insulating layer 5b located on the left side with the through hole 7 in the center and the insulating layer 5b located on the right side with the through hole 7 in the center. It is different from the capacitance CdR generated in.
  • the third conductor layer 9c is in a state of entering the recess 7LC provided in the inner wall 7L of the through hole 7.
  • its capacitance goes around the recess 7LC from the end 11tL of the through hole conductor 11L to the third conductor layer 9c.
  • the length from the end 11tR of the through-hole conductor 11R to the recess 7RC and up to the 7th conductor layer 9g is included.
  • the capacitance contributing to the impedance differs between the region AL on the left side and the region AR on the right side of the printed wiring board A.
  • the impedance can be adjusted in each of the left region AL and the right region AR with the through hole 7 in the center.
  • the printed wiring board A may have a difference in inductance between the area AL and the area AR with the through hole 7 in the center.
  • the inductance in the region AL of the printed wiring board A is such that the first conductor layer 9a, the second conductor layer 9b, and the first through-hole conductor 11L arranged so as to sandwich the first insulating layer 5a are electrically connected.
  • the inductance of the printed wiring board A in the region AR is such that the fifth conductor layer 9e, the sixth conductor layer 9f, and the second through-hole conductor 11R arranged so as to sandwich the first insulating layer 5a are electrically connected.
  • the printed wiring board A may have a structure having a difference between the inductance in the region AL and the inductance in the region AR.
  • FIG. 2 is a schematic view showing another aspect of the through-hole conductor in the printed wiring board of the embodiment.
  • the through-hole conductor 12 may have a cylindrical shape.
  • the printed wiring board having the through-hole conductor 12 shown in FIG. 2 is hereinafter referred to as a printed wiring board B.
  • the through-hole conductor 12 has an elliptical cut end at the end 12t. Also in the case of the through-hole conductor 12, the lengths of the opposing portions of the through-hole conductor 12 arranged in the through-hole 7 are different.
  • the end face of the through-hole conductor 12 near the second opening 8b is inclined with respect to the central axis Z of the through-hole 7. In FIG.
  • the length LL of the left side portion of the through-hole conductor 12 is longer than the length LR of the right portion of the through-hole conductor 12. Even in such a structure, the impedance can be adjusted in the same manner as in the case of the printed wiring board A described above.
  • the number of through-hole conductors 11 is the same in the left and right regions AL and AR of the through-hole 7 when the insulating substrate 1 is viewed in a vertical cross section. It is preferable that the conductor layer 9 is electrically connected to the conductor layer 9. If the through-hole conductor 11 has a structure in which the same number of conductor layers 9 are electrically connected in the left and right regions AL and AR of the through hole 7, the shape or size (length) of the through-hole conductor 11 is different. The change in the generated capacitance can be adjusted in the same insulating layer 5 (in the case of FIG. 1, the insulating layer 5c).
  • FIG. 3 is a schematic view showing another aspect of the through-hole conductor in the printed wiring board of the embodiment.
  • the shape of the through-hole conductor 11 is different from that of the printed wiring board A in FIG.
  • the printed wiring board C of FIG. 3 is a through-hole conductor 11 and a conductor layer 9 (first conductor layer 9a, second conductor layer 9b, fifth conductor layer 9e, sixth conductor) of the printed wiring board A shown in FIG.
  • the portion corresponding to the insulating substrate 1 existing in the layer 9f) and its surroundings is drawn.
  • the through-hole conductor 11L located on the left side of the through-hole 7 of the printed wiring board C but the through-hole conductor 11R located on the right side of the through-hole 7 also has a mirror image relationship.
  • the through-hole conductor 11L is longer than the through-hole conductor 11R, as in the printed wiring board A shown in FIG.
  • the surface of the through-hole conductor 11L on the inner wall 7L side of the through hole 7 is the outer surface 11LA
  • the surface opposite to the outer surface 11LA is the inner surface 11LB.
  • the length LLA of the outer surface 11LA of the through-hole conductor 11L is longer than the length LLB of the inner surface 11LB.
  • the first surface (outer surface 11LA) corresponding to the inner wall 7L side of the through hole 7 is located on the opposite side of the first surface (outer surface 11LA). It is located closer to the second opening 8b than 11LB). If the length LLA of the outer surface 11LA of the through-hole conductor 11 is longer than the length LLB of the inner surface 11LB, the inductance of this portion also depends on the difference between the length LLA of the outer surface 11LA and the length LLB of the inner surface 11LB. Can be changed.
  • the end portion 11tL of the through-hole conductor 11L may be inclined so as to be gradually shortened from the outer edge end 11LAt to the inner edge end 11LBt.
  • the end face from the outer edge end 11LAt to the inner edge end 11LBt is preferably an inclined surface.
  • the various printed wiring boards A and C described above have a conductor layer 9 (third conductor layer 9c, seventh conductor layer 9g) that is not electrically connected to the through-hole conductor 11 among the conductor layers 9. Had had.
  • the third conductor layer 9c and the seventh conductor layer 9g will be referred to as a non-connecting conductor layer 9c and 9g.
  • the non-connecting conductor layers 9c and 9g are arranged so as to sandwich the through-hole 7.
  • the length in the direction along the surface of the insulating layer 5 may be different between the two.
  • the capacitance can be changed due to the difference in the covering area with respect to the surface of the insulating layer 5 between the non-connecting conductor layer 9c and the non-connecting conductor layer 9g.
  • This makes it possible to adjust the impedance between the regions AL and the regions AR of the printed wiring boards A and C. Needless to say, the above effect can be obtained for the printed wiring board B as well.
  • At least one of the above-mentioned non-connecting conductors 9c and 9g may be at a position where its ends 9ct and 9gt are recessed from the inner walls 7L and 7R of the through hole 7.
  • the end 9ct of the non-connecting conductor layer 9c is recessed from the inner wall 7L of the through hole 7, for example, the distance between the through-hole conductor 11L and the end 9ct of the non-connecting conductor layer 9c becomes wide. This makes it possible to further improve the insulating property between the through-hole conductor 11L and the end 9ct of the non-connecting conductor layer 9c.
  • FIG. 4 is a cross-sectional view of a multilayer board used in the method for manufacturing the printed wiring board A of the embodiment.
  • the multilayer board 20 is prepared.
  • the multilayer board 20 has an insulating board 21 and a conductor portion 23.
  • the multilayer board 20 has through holes 25 in the thickness direction.
  • the insulating substrate 21 includes a plurality of insulating layers 27.
  • the insulating substrate 21 shown in FIG. 4 is composed of a first insulating layer 27a, a second insulating layer 27b, and a third insulating layer 27c from the upper side in the thickness direction.
  • the conductor portion 23 includes a plurality of conductor layers 29 and a through-hole conductor bulk material 31.
  • the conductor layer 29 includes a first conductor layer 29a, a second conductor layer 29b, a third conductor layer 29c, a fourth conductor layer 29d, a fifth conductor layer 29e, a sixth conductor layer 29f, a seventh conductor layer 29g, and an eighth conductor. It is composed of layers 29h.
  • Each of the above-mentioned conductor layers 29 may be integrated on the same surface of each layer of the insulating layer 27.
  • the pair of conductor layers 29 integrated on the same surface of each layer of the insulating layer 27 is as follows.
  • the first conductor layer 29a and the fifth conductor layer 29e are arranged on the upper surface side of the first insulating layer 27a.
  • a second conductor layer 29b and a sixth conductor layer 29f are arranged between the first insulating layer 27a and the second insulating layer 27b.
  • a third conductor layer 29c and a seventh conductor layer 29g are arranged between the second insulating layer 27b and the third insulating layer 27c.
  • the fourth conductor layer 29d and the eighth conductor layer 29h are arranged on the lower surface side of the third insulating layer 27c.
  • the through-hole conductor bulk material 31 covers the entire inner wall 25L and inner wall 25R of the through-hole 25.
  • the through-hole conductor base 31 includes a first conductor layer 29a, a second conductor layer 29b, a third conductor layer 29c, a fourth conductor layer 29d, a fifth conductor layer 29e, a sixth conductor layer 29f, a seventh conductor layer 29g, and the like. It is in a state of being electrically connected to the eighth conductor layer 29h.
  • the through-hole conductor bulk material 31 that appears to be separated across the through-hole 25 is divided into two parts on the left and right, and is indicated by a reference numeral.
  • the code of the through-hole conductor bulk material 31 located on the left side of the through-hole 25 is 31GL.
  • the code of the through-hole conductor bulk material 31 located on the right side of the through-hole 25 is 31GR.
  • FIG. 5 is a cross-sectional view showing a printed wiring board processed body in which the protective layer 33 is formed on the multilayer substrate 20 shown in FIG.
  • the protective layer 33 is formed on the inner surfaces 31LA and 31RA of the through-hole conductor bulk material 31 (31GL, 31GR) formed on the prepared multilayer substrate 20.
  • the multilayer board 20 on which the protective layer 33 is formed is hereinafter referred to as a printed wiring board processed body 20A.
  • the protective layer 33 is also formed on the surfaces of the first conductor layer 29a, the fourth conductor layer 29d, the fifth conductor layer 29e, and the eighth conductor layer 29h formed on the outermost surface of the insulating substrate 21.
  • the protective layer 33 is in contact with the through-hole conductor bulk material 31 (31GL), the first conductor layer 29a, and the fourth conductor layer 29d.
  • the protective layer 33 is in contact with the surfaces of the through-hole conductor bulk material 31 (31GL), the first conductor layer 29a, and the fourth conductor layer 29d.
  • the protective layer 33 is in contact with the through-hole conductor bulk material 31 (31GR), the fifth conductor layer 29e, and the eighth conductor layer 29h.
  • the protective layer 33 is in contact with the surfaces of the through-hole conductor bulk material 31 (31GR), the fifth conductor layer 29e, and the eighth conductor layer 29h.
  • As the material used for the protective layer 33 for example, tin or an ED film is suitable.
  • the protective layer 33 formed of such a material is preferably formed by an electrolytic plating method for tin and an electrodeposition method for an ED film.
  • FIG. 6 is a cross-sectional view showing a state in which a portion of the through-hole conductor bulk material 31 provided in the printed wiring board processed body 20A shown in FIG. 5 is cut.
  • FIG. 7 is a cross-sectional view showing a state of the printed wiring board processed body 20A after the through-hole conductor original body 31 is partially cut.
  • the through-hole conductor base 31 provided in the printed wiring board processed body 20A is cut to remove a part of the through-hole conductor base 31 and the protective layer 33.
  • a part of the through-hole conductor bulk material 31 and the protective layer 33 is removed by a jig for cutting.
  • a drilling machine can be mentioned.
  • the tip portion of the drill processing machine is hereinafter referred to as a drill 35.
  • a drill 35 having a tip portion 35A having a diameter (diameter or maximum diameter) larger than the inner diameter of the through-hole conductor bulk material 31 is used.
  • the inner diameter of the through-hole conductor bulk material 31 is the portion where the double-headed arrow is designated by the symbol DT in FIG.
  • the diameter of the tip portion 35A of the drill 35 is a portion in which a thick double-headed arrow is designated by a reference numeral DD in FIG.
  • a drill 35 having a slightly tapered tip portion 35A is used as the drill 35. Further, in the process of cutting with the drill 35, the axis 39 of the drill 35 is displaced from the central axis Z of the through-hole conductor original body 31.
  • the through after cutting is performed. Differences in length can be made on both sides of the through hole 25 of the hole conductor original body 31 sandwiched between them.
  • the difference in length in the through-hole conductor bulk material 31 is between the through-hole conductor processed body 31GL and the through-hole conductor processed body 31GR.
  • the length of the through-hole conductor processed body 31GL remaining from the through-hole conductor bulk material 31 is represented by the reference numeral LTL.
  • the length of the through-hole conductor processed body 31GR remaining from the through-hole conductor bulk material 31 is represented by the reference numeral LTR.
  • the portion remaining after the cutting process is the portion of the through-hole conductor processed body 31GL from the first conductor layer 29a to the portion in contact with the tip portion 35A of the drill 35.
  • the range is from the fifth conductor layer 29e to the portion where the tip portion 35A of the drill 35 is in contact.
  • the length LTL of the through-hole conductor processed body 31GL, which is a portion not cut after cutting is longer than the length LTR of the through-hole conductor processed body 31GR, which is also a portion not cut after cutting.
  • FIG. 8 is a cross-sectional view showing a state after etching the printed wiring board processed body 20A shown in FIG. 7.
  • FIG. 9 is a cross-sectional view showing a state after the protective layer 33 is removed from the printed wiring board processed body 20A shown in FIG.
  • the step of FIG. 8 is a step of etching the through-hole conductor processed body 31GL and the through-hole conductor processed body 31GR remaining after the cutting process.
  • the etching solution used in this case dissolves the metal (copper) used in the through-hole conductor bulk material 31, but does not dissolve the protective layer 33.
  • the etching solution include an aqueous solution of cupric chloride or an aqueous solution of ferric chloride.
  • Such an etching process is called a half etching process.
  • the through-hole conductor processed body 31GL and the through-hole conductor processed body 31GR are viewed from the direction in which the drill 35 is inserted. It is further removed by a predetermined length.
  • the length LTL of the through-hole conductor processed body 31GL after etching is shorter than the protective layer 33 in contact with the through-hole conductor processed body 31GL.
  • the length LTR of the through-hole conductor processed body 31GR after etching is also shorter than the protective layer 33 in contact with the through-hole conductor processed body 31GR.
  • the third conductor layer 29c, the fourth conductor layer 29d, the seventh conductor layer 29g, and the eighth conductor layer 29h, which are not covered by the protective layer 33, are also partially removed.
  • the third conductor layer 29c and the seventh conductor layer 29g are partially removed from the inner wall 25L and the inner wall 25R of the through hole 25 toward the back.
  • the end portion 29ct of the third conductor layer 29c and the end portion 29gt of the seventh conductor layer 29g are recessed from the inner wall 25L and the inner wall 25R of the through hole 25.
  • the protective layer 33 is a tin metal film
  • Enstrip manufactured by Meltex Inc.
  • Meckli Mover manufactured by MEC
  • the filler is embedded in the voids where the through-hole 25, the through-hole conductor processed body 31GL, and the through-hole conductor processed body 31GR are present.
  • a circuit pattern is further formed on the surface of the printed wiring board processed body 20A, and then a solder resist is applied, and the surface of the exposed conductor portion 23 is selected from the group of gold, platinum, and nickel.
  • a metal film containing at least one kind of material as a main component is formed.
  • a plating film should be applied to the metal film.
  • the printed wiring board A can be obtained by the above steps.
  • FIG. 10 shows a method of manufacturing a printed wiring board of another aspect, and shows a cross section showing a state in which a portion of the through-hole conductor original body 31 is cut with respect to the printed wiring board processed body on which the protective layer 33 is formed. It is a figure.
  • FIG. 11 is a cross-sectional view showing a state of the printed wiring board processed body after the through-hole conductor original body 31 is partially cut.
  • FIG. 12 is a cross-sectional view showing a state after etching the printed wiring board processed body shown in FIG.
  • FIG. 13 is a cross-sectional view showing a state after the protective layer 33 is removed from the printed wiring board processed body shown in FIG.
  • the axial center 39 of the drill 35 is shifted with respect to the central axis Z of the through hole 25.
  • the difference between the steps shown in FIGS. 10 to 13 and the steps shown in FIGS. 6 to 12 is that the shape of the drill 35 is different.
  • the drill 35 used here has a conical tip 35A.
  • the length LTL of the through-hole conductor processed body 31GL remaining after cutting and etching is longer than the length LTR of the through-hole conductor processed body 31GR.
  • the shapes of the through-hole conductor processed body 31GL and the end portions 31tL and 31tR of the through-hole conductor processed body 31GR can be made into the inclined shape shown in FIG.
  • the multilayer board 20 shown in FIG. 4 was prepared, and specifically, a printed wiring board was produced by using the steps of FIGS. 5 to 9. Further, the multilayer board 20 shown in FIG. 4 was prepared, and specifically, a printed wiring board was produced by using the steps of FIGS. 10 to 13.
  • FR-4 material glass cloth base material epoxy resin
  • the conductor layer a copper foil or a copper foil plated with electrolytic copper was used.
  • the printed wiring board produced by using the steps of FIGS. 5 to 9 is used as sample 1.
  • the printed wiring board produced by using the steps of FIGS. 10 to 13 is used as sample 2.
  • the through-hole conductor L and the through-hole conductor R are arranged so as to be opposed to each other by providing an insulating portion on the inner wall of the through hole.
  • the arrangement of the insulating layer and the first to eighth conductor layers is basically a four-layer structure shown in FIG.
  • the shapes of the first to eighth conductor layers are also strip-shaped as shown in FIG.
  • the area, length and thickness of the conductor layer formed on each insulating layer are the same.
  • the length of the portion corresponding to the through-hole conductor L was made longer than the length of the portion corresponding to the through-hole conductor R.
  • the through-hole conductor of sample 2 has a cylindrical shape and an inclined end portion thereof.
  • the impedance of the manufactured printed wiring board was measured using an impedance analyzer.
  • As the impedance analyzer 4192A manufactured by Yokogawa Hewlett-Packard Co., Ltd. was used.
  • the measurement frequency was in the range of 1 MHz to 10 MHz.
  • For the impedance the average value of the values obtained from the range of 1 MHz to 10 MHz was used.
  • the measurement measured the circuits between the first conductor layer and the third conductor layer, and between the fifth conductor layer and the seventh conductor layer, respectively.
  • the ratio of the impedance of the circuit between the 5th conductor layer and the 7th conductor layer to the average impedance of the circuit between the 1st conductor layer and the 3rd conductor layer was determined, respectively.
  • the same evaluation was performed on a sample in which the through-hole conductor was cylindrical and the difference between the length on the through-hole conductor L side and the length on the through-hole conductor R side was the same (0.01 ⁇ m or less).
  • the ratio of the impedance of the circuit between the 5th conductor layer and the 7th conductor layer to the average impedance of the circuit between the 1st conductor layer and the 3rd conductor layer of the sample of the comparative example is 1, the sample The impedance ratio of sample 1 tended to be larger than that of the sample of Comparative Example, and the impedance ratio of sample 2 tended to be larger than that of sample 1.
  • This disclosure can be used for printed wiring boards and methods for manufacturing them.
  • A, B, C ... Printed wiring board 1, 21 ... Insulation substrate 3, 23 ... Conductor part 5, 27 ... Insulation layer 7, 25 ... Through hole 8a ; 1st opening 8b ........... 2nd opening 9, 29 ; Conductor layer 11, 31 ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ Through-hole conductor 20 ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ Multi-layer board 33 ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ Protective layer Z ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ Central axis

Abstract

This printed wiring board comprises an insulating substrate 1 and a conductor portion 3 disposed at least inside the insulating substrate 1. The insulating substrate 1 has a plurality of stacked insulating layers. The insulating substrate 1 has a through-hole 7 penetrating therethrough from a first opening thereof to a second opening thereof in the thickness direction. The conductor portion 3 includes a plurality of conductor layers 9 and a through-hole conductor 11. The plurality of conductor layers 9 are respectively positioned along the insulating layers 5 in a planar direction. The through-hole conductor 11 has a tubular shape extending from the first opening toward the second opening. The through-hole conductor 11 at an existing position is electrically connected to some of the plurality of conductor layers 9. The plurality of conductor layers 9 include at least one layer of a non-connected conductor layer closer to the second opening than to the through-hole conductor 11 which is not in contact with the through-hole conductor 11. The through-hole conductor 11, in a cross-sectional view taken along the central axis of the through-hole 7, has two end portions closer to the second opening, including a first end portion and a second end portion that have different positions in the thickness direction.

Description

印刷配線板およびその製造方法Printed wiring board and its manufacturing method
 本開示は、印刷配線板およびその製造方法に関する。 This disclosure relates to a printed wiring board and a method for manufacturing the printed wiring board.
 近年、印刷配線板は、電子機器の高機能化および高性能化に伴い、高密度の実装、薄型化などが求められている(例えば、特開2017-135357号公報を参照)。 In recent years, printed wiring boards have been required to have high density mounting and thinning due to higher functionality and higher performance of electronic devices (see, for example, Japanese Patent Application Laid-Open No. 2017-135357).
 本開示の印刷配線板は、絶縁基板と、該絶縁基板の少なくとも内部に配置された導体部とを有する。前記絶縁基板は、積層された複数の絶縁層と、第1開口から第2開口に厚み方向に貫通するスルーホールとを有する。前記導体部は、複数の導体層とスルーホール導体とを有する。前記複数の導体層は、絶縁層のそれぞれに面方向に沿うように位置している。前記スルーホール導体は、前記第1開口から前記第2開口に向かって延びる筒状である。前記スルーホール導体は、存在位置において前記複数の導体層の一部と電気的に接続されている。前記複数の導体層は、前記スルーホール導体よりも前記第2開口の近くに、前記スルーホール導体と接していない非接続導体層を少なくとも1層有している。前記スルーホール導体は、前記スルーホールの中心軸に沿った断面視において、前記第2開口に近い2つの端部である、第1端部と第2端部との厚み方向における位置が異なる。 The printed wiring board of the present disclosure has an insulating substrate and a conductor portion arranged at least inside the insulating substrate. The insulating substrate has a plurality of laminated insulating layers and through holes penetrating from the first opening to the second opening in the thickness direction. The conductor portion has a plurality of conductor layers and a through-hole conductor. The plurality of conductor layers are located along the plane direction in each of the insulating layers. The through-hole conductor has a cylindrical shape extending from the first opening toward the second opening. The through-hole conductor is electrically connected to a part of the plurality of conductor layers at the existing position. The plurality of conductor layers have at least one non-connecting conductor layer that is not in contact with the through-hole conductor near the second opening of the through-hole conductor. The through-hole conductors have different positions in the thickness direction of the first end portion and the second end portion, which are two end portions close to the second opening, in a cross-sectional view along the central axis of the through hole.
 本開示の印刷配線板は、絶縁基板と、該絶縁基板の少なくとも内部に配置された導体部とを有する。前記絶縁基板は、積層された複数の絶縁層と、第1開口から第2開口に厚み方向に貫通するスルーホールと、を有する。前記導体部は、複数の導体層とスルーホール導体と、を有する。前記複数の導体層は、前記絶縁層のそれぞれに面方向に沿うように位置する。前記スルーホール導体は、前記第1開口から前記第2開口に向かって延びる筒状である。前記スルーホール導体は、存在位置において前記複数の導体層の一部と電気的に接続されている。前記複数の導体層は、前記スルーホール導体よりも前記第2開口の近くに、前記スルーホール導体と接していない非接続導体層を少なくとも1層有する。前記スルーホール導体は、前記第2開口に近い端面が、前記スルーホールの中心軸に対し傾いている。 The printed wiring board of the present disclosure has an insulating substrate and a conductor portion arranged at least inside the insulating substrate. The insulating substrate has a plurality of laminated insulating layers and through holes penetrating from the first opening to the second opening in the thickness direction. The conductor portion has a plurality of conductor layers and a through-hole conductor. The plurality of conductor layers are located along the plane direction in each of the insulating layers. The through-hole conductor has a cylindrical shape extending from the first opening toward the second opening. The through-hole conductor is electrically connected to a part of the plurality of conductor layers at the existing position. The plurality of conductor layers have at least one non-connecting conductor layer that is not in contact with the through-hole conductor near the second opening of the through-hole conductor. The end face of the through-hole conductor near the second opening is inclined with respect to the central axis of the through-hole.
 本開示の印刷配線板の製造方法は、複数の絶縁層が積層された絶縁基板と、前記絶縁層の面に沿うように設けられた導体層と、前記絶縁基板を厚み方向に貫通するスルーホールの内壁を覆う銅のスルーホール導体原体と、を有する多層基板を準備する工程を含む。前記製造方法は、該多層基板に設けられた前記スルーホール導体原体の内壁の全面に、前記銅のエッチング液では溶解しない保護層を形成する工程を含む。前記製造方法は、前記スルーホール導体原体の内径よりも径が大きく、且つ先端部が先細りの形状を有している切削加工用の治具を用い、該治具の軸心を前記スルーホールの中心軸からはずれた位置に配置して、前記スルーホール導体原体および前記保護層を、前記多層基板の一方の表面側から前記多層基板の厚み方向の途中の位置まで切削加工して、前記スルーホール導体原体が少なくとも2層の導体層と電気的に接続された状態とする工程を含む。 The method for manufacturing a printed wiring board of the present disclosure includes an insulating substrate in which a plurality of insulating layers are laminated, a conductor layer provided along the surface of the insulating layer, and a through hole penetrating the insulating substrate in the thickness direction. Including a step of preparing a multilayer substrate having a copper through-hole conductor original body covering the inner wall of the material. The manufacturing method includes a step of forming a protective layer which is not dissolved by the copper etching solution on the entire inner wall of the through-hole conductor raw material provided on the multilayer substrate. The manufacturing method uses a cutting jig having a diameter larger than the inner diameter of the through-hole conductor original body and having a tapered tip portion, and the axial center of the through hole is the through hole. The through-hole conductor original body and the protective layer are cut from one surface side of the multilayer substrate to a position in the middle of the thickness direction of the multilayer substrate by arranging the through-hole conductor original body and the protective layer at a position deviated from the central axis of the multilayer substrate. The step of making the through-hole conductor original body electrically connected to at least two conductor layers is included.
実施形態の一例として示す印刷配線板の一部を示す断面図である。It is sectional drawing which shows a part of the printed wiring board shown as an example of embodiment. 実施形態の印刷配線板におけるスルーホール導体の他の態様を示す模式図である。It is a schematic diagram which shows the other aspect of the through-hole conductor in the printed wiring board of an embodiment. 実施形態の印刷配線板の他の態様を示す断面図である。It is sectional drawing which shows the other aspect of the printed wiring board of an embodiment. 実施形態の印刷配線板の製造方法に用いる多層基板の断面図である。It is sectional drawing of the multilayer substrate used in the manufacturing method of the printed wiring board of an embodiment. 図4に示した多層基板に保護層を形成した印刷配線板加工体を示す断面図である。It is sectional drawing which shows the printed wiring board processed body which formed the protective layer on the multilayer board shown in FIG. 図5に示した印刷配線板加工体に設けたスルーホール導体原体の部分を切削加工する状態を示す断面図である。FIG. 5 is a cross-sectional view showing a state in which a portion of a through-hole conductor bulk material provided in the printed wiring board processed body shown in FIG. 5 is machined. スルーホール導体原体を部分的に切削加工した後の印刷配線板加工体の状態を示す断面図である。It is sectional drawing which shows the state of the printed wiring board processed body after partially cutting a through-hole conductor raw material. 図7に示した印刷配線板加工体にエッチング処理を施した後の状態を示す断面図である。FIG. 5 is a cross-sectional view showing a state after etching the printed wiring board processed body shown in FIG. 7. 図8に示した印刷配線板加工体から保護層を除去した後の状態を示す断面図である。It is sectional drawing which shows the state after removing the protective layer from the printed wiring board processed body shown in FIG. 他の態様の印刷配線板の製造方法を示すものであり、保護層を形成した印刷配線板加工体に対してスルーホール導体原体の部分を切削加工する状態を示す断面図である。It shows the manufacturing method of the printed wiring board of another aspect, and is sectional drawing which shows the state which cuts the part of the through-hole conductor original body with respect to the printed wiring board processed body which formed the protective layer. スルーホール導体原体を部分的に切削加工した後の印刷配線板加工体の状態を示す断面図である。It is sectional drawing which shows the state of the printed wiring board processed body after partially cutting a through-hole conductor raw material. 図11に示した印刷配線板加工体にエッチング処理を施した後の状態を示す断面図である。It is sectional drawing which shows the state after performing the etching process on the printed wiring board processed body shown in FIG. 図12に示した印刷配線板加工体から保護層を除去した後の状態を示す断面図である。It is sectional drawing which shows the state after removing the protective layer from the printed wiring board processed body shown in FIG. 作製した印刷配線板の平面図である。It is a top view of the produced printed wiring board.
 上述のように、特許文献1に開示された印刷配線板は、電子機器の高機能化および高性能化を実現するために、電気素子を高密度に実装できる性能が求められている。印刷配線板に複数の電気素子を搭載しようとすると、個々の電気素子に合わせた配線の設計が必要になる。印刷配線板は、配線の高密度化との兼ね合いで、インピーダンスの整合が困難になっている。 As described above, the printed wiring board disclosed in Patent Document 1 is required to have the ability to mount electric elements at a high density in order to realize high functionality and high performance of electronic devices. When mounting a plurality of electric elements on a printed wiring board, it is necessary to design the wiring according to each electric element. Impedance matching of printed wiring boards is difficult due to the high density of wiring.
 図1は、実施形態の一例として示す印刷配線板の一部を示す断面図である。実施形態の印刷配線板Aは、絶縁基板1と、絶縁基板1の少なくとも内部に配置された導体部3とを有する。絶縁基板1は、複数の絶縁層5が積層された構造である。ここで、便宜上、各絶縁層5に異なる符号を付すことにする。絶縁基板1は、上側の層より、第1絶縁層5a、第2絶縁層5b、第3絶縁層5cが積層された構成である。図1では、絶縁層5が3層の場合を示しているがこれに限らない。絶縁基板1は、3層よりも多くの絶縁層5を有しているものも含まれる。絶縁基板1を構成する絶縁層5の層数としては3層以上であってもよい。例えば、印刷配線板がアンテナ、フィルタなどを有する構造の場合30層以上にもなる。絶縁層5の層数の上限は特に定めないが50層以下を目安としてよい。 FIG. 1 is a cross-sectional view showing a part of a printed wiring board shown as an example of an embodiment. The printed wiring board A of the embodiment has an insulating substrate 1 and a conductor portion 3 arranged at least inside the insulating substrate 1. The insulating substrate 1 has a structure in which a plurality of insulating layers 5 are laminated. Here, for convenience, each insulating layer 5 is designated by a different reference numeral. The insulating substrate 1 has a structure in which a first insulating layer 5a, a second insulating layer 5b, and a third insulating layer 5c are laminated from an upper layer. FIG. 1 shows a case where the insulating layer 5 has three layers, but the present invention is not limited to this. The insulating substrate 1 also includes those having more than three insulating layers 5. The number of layers of the insulating layer 5 constituting the insulating substrate 1 may be 3 or more. For example, in the case of a structure in which the printed wiring board has an antenna, a filter, and the like, the number of layers is 30 or more. The upper limit of the number of layers of the insulating layer 5 is not particularly set, but 50 layers or less may be used as a guide.
 また、絶縁基板1は、スルーホール7を有する。スルーホール7は、絶縁基板1を厚み方向に貫通している。スルーホール7は、絶縁基板1の一方の表面側を第1開口8aとする。絶縁基板1の他方の表面側を第2開口8bとする。第1開口8aと第2開口8bとは絶縁基板1において対向した配置である。また、図1に示した印刷配線板Aの縦断面図では、便宜上、スルーホール7の左側の内壁を符号7Lとし、スルーホール7の右側の内壁を符号7Rとする。 Further, the insulating substrate 1 has a through hole 7. The through hole 7 penetrates the insulating substrate 1 in the thickness direction. The through hole 7 has a first opening 8a on one surface side of the insulating substrate 1. The other surface side of the insulating substrate 1 is the second opening 8b. The first opening 8a and the second opening 8b are arranged so as to face each other in the insulating substrate 1. Further, in the vertical cross-sectional view of the printed wiring board A shown in FIG. 1, for convenience, the inner wall on the left side of the through hole 7 is designated by reference numeral 7L, and the inner wall on the right side of the through hole 7 is designated by reference numeral 7R.
 図1において、導体部を表す符号3は、導体層9(9a、9b、9c、9d、9e、9f、9g、9h)およびスルーホール導体11をまとめる符号として用いている。導体部3は、複数の導体層9とスルーホール導体11とを有する。複数の導体層9は、絶縁層5のそれぞれに面方向に沿うように位置している。図1では、便宜上、各層に配置されている導体層9の名称および符号を変えている。図1において、絶縁層5の各層に配置された導体層9を区別できるようにするためである。各導体層9の配置を図1に示す。印刷配線板Aを縦断面視したときの配置で、左側には、絶縁層5をそれぞれ介して、積層方向の上側から第1導体層9a、第2導体層9b、第3導体層9cおよび第4導体層9dが配置されている。右側には、絶縁層5をそれぞれ介して、積層方向の上側から第5導体層9e、第6導体層9f、第7導体層9gおよび第8導体層9hが配置されている。この場合、一つの絶縁層(例えば、第1絶縁層5a)の左側および右側にそれぞれ配置された第1導体層9aおよび第5導体層9eは電気的に接続された状態となっている。第1導体層9a、第2導体層9b、第3導体層9c、第4導体層9d、第5導体層9e、第6導体層9f、第7導体層9gおよび第8導体層9hとの表記は、図1に示す縦断面図において印刷配線板Aを見る場合に便宜上用いるものである。 In FIG. 1, reference numeral 3 representing the conductor portion is used as a code for grouping the conductor layers 9 (9a, 9b, 9c, 9d, 9e, 9f, 9g, 9h) and the through-hole conductor 11. The conductor portion 3 has a plurality of conductor layers 9 and a through-hole conductor 11. The plurality of conductor layers 9 are located along the plane direction of each of the insulating layers 5. In FIG. 1, for convenience, the names and symbols of the conductor layers 9 arranged in each layer are changed. This is to make it possible to distinguish the conductor layers 9 arranged in each layer of the insulating layer 5 in FIG. The arrangement of each conductor layer 9 is shown in FIG. In the vertical cross-sectional view of the printed wiring board A, the first conductor layer 9a, the second conductor layer 9b, the third conductor layer 9c, and the third conductor layer 9c are arranged on the left side via the insulating layer 5, respectively, from the upper side in the stacking direction. A four-conductor layer 9d is arranged. On the right side, the fifth conductor layer 9e, the sixth conductor layer 9f, the seventh conductor layer 9g, and the eighth conductor layer 9h are arranged from the upper side in the stacking direction via the insulating layer 5, respectively. In this case, the first conductor layer 9a and the fifth conductor layer 9e arranged on the left side and the right side of one insulating layer (for example, the first insulating layer 5a) are electrically connected. Notation of 1st conductor layer 9a, 2nd conductor layer 9b, 3rd conductor layer 9c, 4th conductor layer 9d, 5th conductor layer 9e, 6th conductor layer 9f, 7th conductor layer 9g and 8th conductor layer 9h. Is used for convenience when the printed wiring board A is viewed in the vertical sectional view shown in FIG.
 図1において、スルーホール導体を表す符号11は符号11Lと符号11Rとをまとめる符号である。スルーホール導体11は、筒状である。スルーホール導体11は、第1開口8aから第2開口8bに向かって延びている。スルーホール導体11は、反対に、第2開口8b側から第1開口8aの方向に延びている。図1の縦断面図において、スルーホール7の内壁7Lに接しているスルーホール導体11は第1スルーホール導体11Lである。スルーホール7の内壁7Rに接しているスルーホール導体11は第2スルーホール導体11Rである。第1スルーホール導体11Lおよび第2スルーホール導体11Rは、印刷配線板Aを図1に示すような縦断面図を基にして見る場合に便宜上用いるものである。スルーホール導体11は第1スルーホール導体11Lおよび第2スルーホール導体11Rを有する。この場合、第1スルーホール導体11Lと第2スルーホール導体11Rとは電気的に接続されている。なお、ビアホール導体11については、1つのビアホール導体11を縦割りにしたような配置にして、2つを分けて絶縁させて配置する場合もある。 In FIG. 1, reference numeral 11 representing a through-hole conductor is a reference numeral that combines reference numeral 11L and reference numeral 11R. The through-hole conductor 11 has a cylindrical shape. The through-hole conductor 11 extends from the first opening 8a toward the second opening 8b. On the contrary, the through-hole conductor 11 extends from the second opening 8b side in the direction of the first opening 8a. In the vertical cross-sectional view of FIG. 1, the through-hole conductor 11 in contact with the inner wall 7L of the through-hole 7 is the first through-hole conductor 11L. The through-hole conductor 11 in contact with the inner wall 7R of the through-hole 7 is the second through-hole conductor 11R. The first through-hole conductor 11L and the second through-hole conductor 11R are used for convenience when the printed wiring board A is viewed based on a vertical cross-sectional view as shown in FIG. The through-hole conductor 11 has a first through-hole conductor 11L and a second through-hole conductor 11R. In this case, the first through-hole conductor 11L and the second through-hole conductor 11R are electrically connected. The via hole conductor 11 may be arranged so that one via hole conductor 11 is vertically divided, and the two are separately insulated and arranged.
 スルーホール導体11は、絶縁基板1の厚み方向の途中に端部11tが存在する。図1の縦断面図において、スルーホール導体11のうち左側に位置する第1スルーホール導体11Lの端部を符号11tLとする。図1の縦断面図において、スルーホール導体11のうち右側に位置する第2スルーホール導体11Rの端部を符号11tRとする。ここで、符号11tは、第1スルーホール導体11Lの端部の符号11tLと第2スルーホール導体11の右側に位置する端部の符号11tRとを総括して示す場合に用いる。スルーホール導体11は、絶縁基板1の一方側の表面1a側では、絶縁基板1の表面1aに達している。スルーホール導体11は、絶縁基板1の他方側の表面1b側では、絶縁基板1の表面(裏面)1bには達していない。ここで、絶縁基板1の一方側の表面1aは、図1では、絶縁基板1の上面側(第1開口8a側)に位置付けた。絶縁基板1の他方側の表面(裏面)1bは、図1では、絶縁基板1の下面側(第2開口8b側)に位置付けた。本開示では、スルーホール導体11が絶縁基板1の下面側の表面1bに達しており、上面側の表面1aに達していない構成であってもよい。スルーホール導体11は、スルーホール7の内壁7L、内壁7Rを厚み方向に部分的に覆うように設けられている。スルーホール導体11は、当該スルーホール導体11が存在する位置において複数の導体層と電気的に接続されている。 The through-hole conductor 11 has an end portion 11t in the middle of the insulating substrate 1 in the thickness direction. In the vertical cross-sectional view of FIG. 1, the end portion of the first through-hole conductor 11L located on the left side of the through-hole conductor 11 is designated by reference numeral 11 tL. In the vertical cross-sectional view of FIG. 1, the end portion of the second through-hole conductor 11R located on the right side of the through-hole conductor 11 is designated by reference numeral 11 tR. Here, reference numeral 11t is used when the reference numeral 11tL at the end of the first through-hole conductor 11L and the reference numeral 11tR at the end located on the right side of the second through-hole conductor 11 are collectively indicated. The through-hole conductor 11 reaches the surface 1a of the insulating substrate 1 on the surface 1a side of one side of the insulating substrate 1. The through-hole conductor 11 does not reach the front surface (back surface) 1b of the insulating substrate 1 on the other side surface 1b side of the insulating substrate 1. Here, the surface 1a on one side of the insulating substrate 1 is positioned on the upper surface side (first opening 8a side) of the insulating substrate 1 in FIG. The front surface (back surface) 1b on the other side of the insulating substrate 1 is positioned on the lower surface side (second opening 8b side) of the insulating substrate 1 in FIG. In the present disclosure, the through-hole conductor 11 may reach the surface 1b on the lower surface side of the insulating substrate 1 and may not reach the surface 1a on the upper surface side. The through-hole conductor 11 is provided so as to partially cover the inner wall 7L and the inner wall 7R of the through-hole 7 in the thickness direction. The through-hole conductor 11 is electrically connected to a plurality of conductor layers at a position where the through-hole conductor 11 exists.
 複数の導体層9は、スルーホール導体11よりも第2開口8bの近くに、スルーホール導体11と接していない非接続導体層を少なくとも1層有する。第1スルーホール導体11Lは、複数の導体層(第1導体層9a、第2導体層9b、第3導体層9cおよび第4導体層9d)のうち、少なくとも1層の導体層9を除く、他の導体層9と電気的に接続されている。この場合、第1スルーホール導体11Lは、第1導体層9aおよび第2導体層9bと電気的に接続されている。第1スルーホール導体11Lは、第3導体層9cおよび第4導体層9dとは接続されていない。スルーホール導体11は、複数の導体層(第5導体層9e、第6導体層9f、第7導体層9gおよび第8導体層9h)のうち、少なくとも1層の導体層9を除く、他の導体層9と電気的に接続されている。この場合、第2スルーホール導体11Rは、第5導体層9eおよび第6導体層9fと電気的に接続されている。第2スルーホール導体11Rは、第7導体層9gおよび第8導体層9hとは接続されていない。この場合、少なくとも1層の導体層9を除く導体層9とは、第3導体層9c、第4導体層9d、第7導体層9gおよび第8導体層9hのことである。ここで、非接続導体層とは、第3導体層9c、第4導体層9d、第7導体層9gおよび第8導体層9hのことである。 The plurality of conductor layers 9 have at least one non-connecting conductor layer that is not in contact with the through-hole conductor 11 closer to the second opening 8b than the through-hole conductor 11. The first through-hole conductor 11L excludes at least one conductor layer 9 from the plurality of conductor layers (first conductor layer 9a, second conductor layer 9b, third conductor layer 9c, and fourth conductor layer 9d). It is electrically connected to another conductor layer 9. In this case, the first through-hole conductor 11L is electrically connected to the first conductor layer 9a and the second conductor layer 9b. The first through-hole conductor 11L is not connected to the third conductor layer 9c and the fourth conductor layer 9d. The through-hole conductor 11 is the other conductor layer 9 except for at least one of the plurality of conductor layers (fifth conductor layer 9e, sixth conductor layer 9f, seventh conductor layer 9g, and eighth conductor layer 9h). It is electrically connected to the conductor layer 9. In this case, the second through-hole conductor 11R is electrically connected to the fifth conductor layer 9e and the sixth conductor layer 9f. The second through-hole conductor 11R is not connected to the seventh conductor layer 9g and the eighth conductor layer 9h. In this case, the conductor layer 9 excluding at least one conductor layer 9 is the third conductor layer 9c, the fourth conductor layer 9d, the seventh conductor layer 9g, and the eighth conductor layer 9h. Here, the non-connecting conductor layer refers to the third conductor layer 9c, the fourth conductor layer 9d, the seventh conductor layer 9g, and the eighth conductor layer 9h.
 スルーホール導体11の端部11tは、絶縁基板1を縦断面視したときに、スルーホール7の内壁7L、7Rの間で、厚み方向の位置が異なる。言い換えると、第1スルーホール導体11Lの端部11tLと第2スルーホール導体11Rの端部11tRとは、絶縁基板1を縦断面視したときに、スルーホール7の内壁7L、7Rの間で、厚み方向の位置が異なる。第1スルーホール導体11Lの端部11tLのことを、以下、第1端部11tLとする。第2スルーホール導体11Rの端部11tRのことを、以下、第2端部11tRとする。スルーホール導体11は、スルーホール7の中心軸Zに沿った断面視において、第2開口8bに近い2つの端部である、第1端部11tLと第2端部11tRとの位置が異なる。 The position of the end portion 11t of the through-hole conductor 11 in the thickness direction is different between the inner walls 7L and 7R of the through-hole 7 when the insulating substrate 1 is viewed in a vertical cross section. In other words, the end portion 11tL of the first through-hole conductor 11L and the end portion 11tR of the second through-hole conductor 11R are located between the inner walls 7L and 7R of the through-hole 7 when the insulating substrate 1 is viewed in a vertical cross section. The position in the thickness direction is different. The end portion 11tL of the first through-hole conductor 11L is hereinafter referred to as the first end portion 11tL. The end portion 11tR of the second through-hole conductor 11R is hereinafter referred to as the second end portion 11tR. The through-hole conductor 11 has different positions of the first end portion 11tL and the second end portion 11tR, which are two end portions close to the second opening 8b, in a cross-sectional view along the central axis Z of the through hole 7.
 図1では、中心軸Zは印刷配線基板Aの上側と下側とに分けて示しているが、これはスルーホール7内に記すと、他の符号などの表示との間で重なる場合がでてきたためである。中心軸Zは印刷配線基板Aの上側と下側とで直線的につながっている。 In FIG. 1, the central axis Z is shown separately on the upper side and the lower side of the printed wiring board A, but if it is described in the through hole 7, it may overlap with the display of other symbols or the like. This is because it came. The central axis Z is linearly connected to the upper side and the lower side of the printed wiring board A.
 第1端部11tLと第2端部11tRとの位置が異なるというのは、印刷配線板Aまたは絶縁基板1を断面視したときに見られるスルーホール導体11の形状から評価したものである。つまり、図1に示す印刷配線板Aでは、第1スルーホール導体11Lの長さLLは第2スルーホール導体11Rの長さLRよりも長い。言い換えると、図1に示す印刷配線板Aでは、第1スルーホール導体11Lの端部11tLは、第2スルーホール導体11Rの端部11tRよりも深い位置にある。つまり、印刷配線板Aは、第1スルーホール導体11Lの長さLLと第2スルーホール導体11Rの長さLRとの間に寸法の差ΔLを有する。ここで、寸法の差ΔLは、第1スルーホール導体11Lの長さLLと第2スルーホール導体11Rの長さLRとの長さの差のことである。ΔLは、印刷配線板Aにおいてインピーダンスに寄与するキャパシタンス成分が異なるものになればよい。ΔLは絶縁層5の厚み(ここでは、第2絶縁層5b)にもよるが1μm以上であればよい。ΔLの最大値は、特に設けないが、1層の絶縁層5の厚みtの2倍以内、特に、1層の絶縁層5の厚みに相当する長さ以内であればよい。例えば、100μm以内、特に、50μm以内がよい。 The fact that the positions of the first end portion 11tL and the second end portion 11tR are different is evaluated from the shape of the through-hole conductor 11 seen when the printed wiring board A or the insulating substrate 1 is viewed in cross section. That is, in the printed wiring board A shown in FIG. 1, the length LL of the first through-hole conductor 11L is longer than the length LR of the second through-hole conductor 11R. In other words, in the printed wiring board A shown in FIG. 1, the end portion 11tL of the first through-hole conductor 11L is located at a position deeper than the end portion 11tR of the second through-hole conductor 11R. That is, the printed wiring board A has a dimensional difference ΔL between the length LL of the first through-hole conductor 11L and the length LR of the second through-hole conductor 11R. Here, the dimensional difference ΔL is the difference in length between the length LL of the first through-hole conductor 11L and the length LR of the second through-hole conductor 11R. ΔL may have a different capacitance component that contributes to impedance in the printed wiring board A. ΔL depends on the thickness of the insulating layer 5 (here, the second insulating layer 5b), but may be 1 μm or more. The maximum value of ΔL is not particularly provided, but it may be within twice the thickness t of the one-layer insulating layer 5, and in particular, within a length corresponding to the thickness of the one-layer insulating layer 5. For example, it is preferably within 100 μm, particularly within 50 μm.
 図1に示した印刷配線板Aは、このようにスルーホール7内に配置されているスルーホール導体11のうち対向する部分の長さが異なる。この場合、スルーホール7の中で対向する部分というのは、図1に示すように、スルーホール導体11を縦割りにしたときに両側に配置した部分のことである。スルーホール導体11の断面が円筒の形状である場合に、径が最大となる場所(直径となる場所)を縦割りにしたときに両側に配置される断面の場合に限らない。スルーホール導体11を任意の場所で縦割りにしても第1スルーホール導体11Lとなる部分と第2スルーホール導体11Rとなる部分の両方が見える状態であればよい。ここで、第1スルーホール導体11Lの端部11tLから第3導体層9cまでの厚み方向の距離dLは、第2スルーホール導体11Rの端部11tRから第7導体層9gまでの厚み方向の距離dRよりも短い。 The printed wiring board A shown in FIG. 1 has different lengths of facing portions of the through-hole conductors 11 arranged in the through-hole 7 in this way. In this case, the opposing portions in the through-hole 7 are portions arranged on both sides when the through-hole conductor 11 is vertically divided, as shown in FIG. When the cross section of the through-hole conductor 11 has a cylindrical shape, the cross section is not limited to the cross section arranged on both sides when the place having the maximum diameter (the place having the diameter) is vertically divided. Even if the through-hole conductor 11 is vertically divided at an arbitrary location, both the portion that becomes the first through-hole conductor 11L and the portion that becomes the second through-hole conductor 11R may be visible. Here, the distance dL in the thickness direction from the end portion 11tL of the first through-hole conductor 11L to the third conductor layer 9c is the distance in the thickness direction from the end portion 11tR of the second through-hole conductor 11R to the seventh conductor layer 9g. Shorter than dR.
 ここで、厚み方向の距離dLとは、図1に示すように、第1スルーホール導体11Lの端部11tLから第3導体層9cの上面の位置を水平方向に平行移動させた面まで垂線を下したときの長さである。厚み方向の距離dRとは、図1に示すように、第2スルーホール導体11Rの端部11tRから第7導体層9gの上面の位置を水平方向に平行移動させた面まで垂線を下したときの長さである。 Here, the distance dL in the thickness direction is a perpendicular line from the end portion 11tL of the first through-hole conductor 11L to the surface where the position of the upper surface of the third conductor layer 9c is translated in the horizontal direction, as shown in FIG. It is the length when it is lowered. As shown in FIG. 1, the distance dR in the thickness direction is when a perpendicular line is drawn from the end portion 11tR of the second through-hole conductor 11R to the surface where the position of the upper surface of the seventh conductor layer 9g is translated in the horizontal direction. Is the length of.
 印刷配線板Aの左側の領域では、第2導体層9bと第3導体層9cとの層間に絶縁層5bが配置された構成となっている。印刷配線板Aの右側の領域では、第7導体層9gと第8導体層9hとの層間にも同じように絶縁層5bが配置された構成となっている。この場合、絶縁層5bは印刷配線板Aの左側の領域と印刷配線板Aの右側の領域との間で厚みtは同じとする。ここで、絶縁層5bの厚みtが同じというのは、絶縁層5bの平面方向の複数の場所で絶縁層5bの厚みtを測定したときに、最大厚みと最小厚みとの差が10%以内である場合のことを言う。この場合、最大厚みと最小厚みとの差ΔtDが10%以内というのは、最大厚みをtmax、最小厚みをtminとしたときに、式(tmax-tmin)/tmax=ΔtD(%)で表される値の絶対値が10%以内ということである。なお、絶縁基板1を形成するために積層された複数の絶縁層5(ここでは、絶縁層5a、絶縁層5b、絶縁層5c)の厚みtは同じであってもよいが、用途によっては異なる厚みであってもよい。 In the region on the left side of the printed wiring board A, the insulating layer 5b is arranged between the layers of the second conductor layer 9b and the third conductor layer 9c. In the region on the right side of the printed wiring board A, the insulating layer 5b is similarly arranged between the layers of the 7th conductor layer 9g and the 8th conductor layer 9h. In this case, the thickness t of the insulating layer 5b is the same between the region on the left side of the printed wiring board A and the region on the right side of the printed wiring board A. Here, the fact that the thickness t of the insulating layer 5b is the same means that the difference between the maximum thickness and the minimum thickness is within 10% when the thickness t of the insulating layer 5b is measured at a plurality of locations in the plane direction of the insulating layer 5b. Say if it is. In this case, the difference ΔtD between the maximum thickness and the minimum thickness is within 10%, which is expressed by the formula (tmax-tmin) / tmax = ΔtD (%) when the maximum thickness is tmax and the minimum thickness is tmin. The absolute value of the value is within 10%. The thickness t of the plurality of insulating layers 5 (here, the insulating layer 5a, the insulating layer 5b, and the insulating layer 5c) laminated to form the insulating substrate 1 may be the same, but it differs depending on the application. It may be the thickness.
 第1導体層9a~第8導体層9hもその厚みは同じであってもよいが、用途によっては異なる厚みでもよい。ここで、導体層9の厚みが同じというのは、導体層9の厚みを測定したときに、最大厚みと最小厚みとの差ΔtMが20%以内である場合のことを言う。最大厚みと最小厚みとの差ΔtMが20%以内というのは、最大厚みをtmax、最小厚みをtminとしたときに、式(tmax-tmin)/tmax=ΔtM(%)で表される値の絶対値が20%以内ということである。 The thickness of the first conductor layer 9a to the eighth conductor layer 9h may be the same, but may be different depending on the application. Here, the fact that the thickness of the conductor layer 9 is the same means that the difference ΔtM between the maximum thickness and the minimum thickness is 20% or less when the thickness of the conductor layer 9 is measured. The difference ΔtM between the maximum thickness and the minimum thickness is within 20% of the value expressed by the formula (tmax-tmin) / tmax = ΔtM (%) when the maximum thickness is tmax and the minimum thickness is tmin. The absolute value is within 20%.
 印刷配線板Aの場合、上述したように、第1スルーホール導体11Lの端部11tLから第3導体層9cまでの間隔dLは、スルーホール導体11Rの端部11tRから第7導体層9gまでの間隔dRよりも短くなっている。間隔dLと間隔dRとの間の間隔の差により、スルーホール7を中央にして左側に位置する絶縁層5bに発生する静電容量CdLとスルーホール7を中央にして右側に位置する絶縁層5bに発生する静電容量CdRとが異なる。この場合、第3導体層9cはスルーホール7の内壁7Lに設けられた凹部7LCに入り込んだ状態である。第3導体層9cがスルーホール7から凹部7LCの中の方に入り込んだ位置にある場合には、そのキャパシタンスはスルーホール導体11Lの端部11tLから凹部7LCを回り込んで第3導体層9cまでの長さの分も含めるようになる。スルーホール導体11Rと第7導体層9gとの間においても同様に、スルーホール導体11Rの端部11tRから凹部7RCを回り込んで第7導体層9gまでの長さの分も含むようになる。こうして、印刷配線板Aでは、スルーホール7を中央にしたときに、印刷配線板Aの左側の領域ALと右側の領域ARとでは、インピーダンスに寄与するキャパシタンスが異なってくる。これにより、印刷配線板Aにおいて、スルーホール7を中央にして、左側の領域ALと右側の領域ARとのそれぞれでインピーダンスの調整を行うことができる。 In the case of the printed wiring board A, as described above, the distance dL from the end portion 11tL of the first through-hole conductor 11L to the third conductor layer 9c is from the end portion 11tR of the through-hole conductor 11R to the seventh conductor layer 9g. It is shorter than the interval dR. Due to the difference in spacing between the spacing dL and the spacing dR, the capacitance CdL generated in the insulating layer 5b located on the left side with the through hole 7 in the center and the insulating layer 5b located on the right side with the through hole 7 in the center. It is different from the capacitance CdR generated in. In this case, the third conductor layer 9c is in a state of entering the recess 7LC provided in the inner wall 7L of the through hole 7. When the third conductor layer 9c is located in the recess 7LC from the through hole 7, its capacitance goes around the recess 7LC from the end 11tL of the through hole conductor 11L to the third conductor layer 9c. Will also include the length of. Similarly, between the through-hole conductor 11R and the 7th conductor layer 9g, the length from the end 11tR of the through-hole conductor 11R to the recess 7RC and up to the 7th conductor layer 9g is included. In this way, in the printed wiring board A, when the through hole 7 is centered, the capacitance contributing to the impedance differs between the region AL on the left side and the region AR on the right side of the printed wiring board A. As a result, in the printed wiring board A, the impedance can be adjusted in each of the left region AL and the right region AR with the through hole 7 in the center.
 この場合、印刷配線板Aは、スルーホール7を中央にして領域ALと領域ARとの間においてインダクタンスの差を有していても良い。印刷配線板Aの領域ALにおけるインダクタンスは、第1絶縁層5aを挟むように配置されている第1導体層9a、第2導体層9bおよび第1スルーホール導体11Lが電気的に接続されている長さに依存する。印刷配線板Aの領域ARにおけるインダクタンスは、第1絶縁層5aを挟むように配置されている第5導体層9e、第6導体層9fおよび第2スルーホール導体11Rが電気的に接続されている長さに依存する。印刷配線板Aは、領域ALにおけるインダクタンスと領域ARにおけるインダクタンスとの間に差を有する構造であっても良い。 In this case, the printed wiring board A may have a difference in inductance between the area AL and the area AR with the through hole 7 in the center. The inductance in the region AL of the printed wiring board A is such that the first conductor layer 9a, the second conductor layer 9b, and the first through-hole conductor 11L arranged so as to sandwich the first insulating layer 5a are electrically connected. Depends on length. The inductance of the printed wiring board A in the region AR is such that the fifth conductor layer 9e, the sixth conductor layer 9f, and the second through-hole conductor 11R arranged so as to sandwich the first insulating layer 5a are electrically connected. Depends on length. The printed wiring board A may have a structure having a difference between the inductance in the region AL and the inductance in the region AR.
 図2は、実施形態の印刷配線板におけるスルーホール導体の他の態様を示す模式図である。図2に示すように、スルーホール導体12は、その形状が円筒状であってもよい。図2に示すスルーホール導体12を有する印刷配線板を、以下では印刷配線板Bと記す。スルーホール導体12は、その端部12tの切り口が楕円状である。スルーホール導体12の場合も、スルーホール7内に配置されているスルーホール導体12のうち対向する部分の長さが異なる。スルーホール導体12は、第2開口8bに近い端面が、スルーホール7の中心軸Zに対し傾いている。図2において、スルーホール導体12の左側の部分の長さLLは、スルーホール導体12の右側の部分の長さLRよりも長い。このような構造においても、上記した印刷配線板Aの場合と同様にインピーダンスを調整することが可能になる。 FIG. 2 is a schematic view showing another aspect of the through-hole conductor in the printed wiring board of the embodiment. As shown in FIG. 2, the through-hole conductor 12 may have a cylindrical shape. The printed wiring board having the through-hole conductor 12 shown in FIG. 2 is hereinafter referred to as a printed wiring board B. The through-hole conductor 12 has an elliptical cut end at the end 12t. Also in the case of the through-hole conductor 12, the lengths of the opposing portions of the through-hole conductor 12 arranged in the through-hole 7 are different. The end face of the through-hole conductor 12 near the second opening 8b is inclined with respect to the central axis Z of the through-hole 7. In FIG. 2, the length LL of the left side portion of the through-hole conductor 12 is longer than the length LR of the right portion of the through-hole conductor 12. Even in such a structure, the impedance can be adjusted in the same manner as in the case of the printed wiring board A described above.
 この場合も、上記した印刷配線板Aでは、スルーホール導体11は、図1に示したように、絶縁基板1を縦断面視したときに、スルーホール7の左右の領域AL、ARにおいて、同数の導体層9と電気的に接続されているのがよい。スルーホール導体11がスルーホール7の左右の領域AL、ARにおいて、同数の導体層9と電気的に接続されている構造であると、スルーホール導体11の形状またはサイズ(長さ)の違いによって発生するキャパシタンスの変化を同じ絶縁層5(図1の場合、絶縁層5c)において調整することが可能になる。これにより印刷配線板A、Bのインピーダンスを微調整することが可能になる。なお、図2に示したスルーホール導体12の場合も、絶縁基板1を縦断面視したときに、スルーホール7の左右の領域AL、ARにおいて、同数の導体層9と電気的に接続されているがよい。 Also in this case, in the printed wiring board A described above, as shown in FIG. 1, the number of through-hole conductors 11 is the same in the left and right regions AL and AR of the through-hole 7 when the insulating substrate 1 is viewed in a vertical cross section. It is preferable that the conductor layer 9 is electrically connected to the conductor layer 9. If the through-hole conductor 11 has a structure in which the same number of conductor layers 9 are electrically connected in the left and right regions AL and AR of the through hole 7, the shape or size (length) of the through-hole conductor 11 is different. The change in the generated capacitance can be adjusted in the same insulating layer 5 (in the case of FIG. 1, the insulating layer 5c). This makes it possible to finely adjust the impedance of the printed wiring boards A and B. In the case of the through-hole conductor 12 shown in FIG. 2, when the insulating substrate 1 is viewed in a vertical cross section, it is electrically connected to the same number of conductor layers 9 in the left and right regions AL and AR of the through-hole 7. It is good to be there.
 図3は、実施形態の印刷配線板におけるスルーホール導体の他の態様を示す模式図である。図3に示す印刷配線板Cは、スルーホール導体11の形状が図1の印刷配線板Aと異なる。図3の印刷配線板Cは、図1に示した印刷配線板Aのうちスルーホール導体11、導体層9(第1導体層9a、第2導体層9b、第5導体層9e、第6導体層9f)およびその周辺に存在する絶縁基板1に対応する部分を描いたものである。 FIG. 3 is a schematic view showing another aspect of the through-hole conductor in the printed wiring board of the embodiment. In the printed wiring board C shown in FIG. 3, the shape of the through-hole conductor 11 is different from that of the printed wiring board A in FIG. The printed wiring board C of FIG. 3 is a through-hole conductor 11 and a conductor layer 9 (first conductor layer 9a, second conductor layer 9b, fifth conductor layer 9e, sixth conductor) of the printed wiring board A shown in FIG. The portion corresponding to the insulating substrate 1 existing in the layer 9f) and its surroundings is drawn.
 以下の説明は、印刷配線板Cのスルーホール7の左側に位置するスルーホール導体11Lについて説明するが、スルーホール7の右側に位置するスルーホール導体11Rについても鏡像の関係となる。この場合も、図1に示した印刷配線板Aと同様、スルーホール導体11Lはスルーホール導体11Rよりも長さは長い。また、図3に示す印刷配線板Cの場合には、スルーホール導体11Lは、スルーホール7の内壁7L側の表面を外表面11LAとし、外表面11LAとは反対側の表面を内表面11LBとしたときに、外表面11LAは内表面111LBよりも絶縁基板1の厚み方向の長さが長い。図3に示した表記を用いると、スルーホール導体11Lの外表面11LAの長さLLAは、内表面11LBの長さLLBよりも長い。言い換えると、図3に示すスルーホール導体11は、スルーホール7の内壁7L側にあたる第1面(外表面11LA)が、第1面(外表面11LA)の反対に位置する第2面(内表面11LB)よりも第2開口8bの近くに位置する。スルーホール導体11の外表面11LAの長さLLAが内表面11LBの長さLLBよりも長いと、この外表面11LAの長さLLAと内表面11LBの長さLLBとの違いによってもこの部分のインダクタンスを変化させることができる。この場合、図3に示すように、スルーホール導体11Lの端部11tLは、外縁端11LAtから内縁端11LBtにかけて次第に短くなるように傾斜しているのがよい。外縁端11LAtから内縁端11LBtに至る端面は傾斜面となっているのがよい。スルーホール導体11Lの端部11tLの断面が外縁端11LAtから内縁端11LBtにかけて傾斜していると、スルーホール導体11Lの長さの方向に発生するインダクタンスおよびキャパシタンスによるインピーダンスのばらつき、または変化、あるいはその両方を小さくすることが可能になる。 The following description describes the through-hole conductor 11L located on the left side of the through-hole 7 of the printed wiring board C, but the through-hole conductor 11R located on the right side of the through-hole 7 also has a mirror image relationship. In this case as well, the through-hole conductor 11L is longer than the through-hole conductor 11R, as in the printed wiring board A shown in FIG. Further, in the case of the printed wiring board C shown in FIG. 3, the surface of the through-hole conductor 11L on the inner wall 7L side of the through hole 7 is the outer surface 11LA, and the surface opposite to the outer surface 11LA is the inner surface 11LB. When the outer surface 11LA is formed, the length of the insulating substrate 1 in the thickness direction is longer than that of the inner surface 111LB. Using the notation shown in FIG. 3, the length LLA of the outer surface 11LA of the through-hole conductor 11L is longer than the length LLB of the inner surface 11LB. In other words, in the through-hole conductor 11 shown in FIG. 3, the first surface (outer surface 11LA) corresponding to the inner wall 7L side of the through hole 7 is located on the opposite side of the first surface (outer surface 11LA). It is located closer to the second opening 8b than 11LB). If the length LLA of the outer surface 11LA of the through-hole conductor 11 is longer than the length LLB of the inner surface 11LB, the inductance of this portion also depends on the difference between the length LLA of the outer surface 11LA and the length LLB of the inner surface 11LB. Can be changed. In this case, as shown in FIG. 3, the end portion 11tL of the through-hole conductor 11L may be inclined so as to be gradually shortened from the outer edge end 11LAt to the inner edge end 11LBt. The end face from the outer edge end 11LAt to the inner edge end 11LBt is preferably an inclined surface. When the cross section of the end portion 11tL of the through-hole conductor 11L is inclined from the outer edge end 11LAt to the inner edge end 11LBt, the impedance varies or changes due to the inductance and capacitance generated in the direction of the length of the through-hole conductor 11L, or the change thereof. Both can be made smaller.
 また、上述した各種の印刷配線板A、Cは、導体層9のなかで、スルーホール導体11と電気的に接続していない導体層9(第3導体層9c、第7導体層9g)を有していた。以下、第3導体層9c、第7導体層9gのことを非接続導体層9c、9gと表記する。ここで、スルーホール導体11と電気的に接続していない導体層9を非接続導体層としたときに、非接続導体層9c、9gは、スルーホール7を挟んで配置されたこれらの2つの間で絶縁層5の面に沿う方向の長さが異なるものであってもよい。このような場合にも非接続導体層9cと非接続導体層9gとの間で絶縁層5の面に対する被覆面積が異なることに起因してキャパシタンスを変化させることができる。これにより、印刷配線板A、Cの領域ALと領域ARとの間におけるインピーダンスの調整を図ることが可能になる。上記した効果は、印刷配線板Bについても同様に得られることは言うまでもない。 Further, the various printed wiring boards A and C described above have a conductor layer 9 (third conductor layer 9c, seventh conductor layer 9g) that is not electrically connected to the through-hole conductor 11 among the conductor layers 9. Had had. Hereinafter, the third conductor layer 9c and the seventh conductor layer 9g will be referred to as a non-connecting conductor layer 9c and 9g. Here, when the conductor layer 9 that is not electrically connected to the through-hole conductor 11 is used as the non-connecting conductor layer, the non-connecting conductor layers 9c and 9g are arranged so as to sandwich the through-hole 7. The length in the direction along the surface of the insulating layer 5 may be different between the two. Even in such a case, the capacitance can be changed due to the difference in the covering area with respect to the surface of the insulating layer 5 between the non-connecting conductor layer 9c and the non-connecting conductor layer 9g. This makes it possible to adjust the impedance between the regions AL and the regions AR of the printed wiring boards A and C. Needless to say, the above effect can be obtained for the printed wiring board B as well.
 以下の構成は図1を用いて説明する。また、上記した非接続導体9c、9gは、少なくとも一方が、その端9ct、9gtがスルーホール7の内壁7L、7Rから凹んだ位置にあってもよい。非接続導体層9cの端9ctがスルーホール7の内壁7Lから凹んだ位置にあると、例えば、スルーホール導体11Lと非接続導体層9cの端9ctとの間の間隔が広くなる。これによりスルーホール導体11Lと非接続導体層9cの端9ctとの間の絶縁性をより高めることが可能になる。その結果、スルーホール導体11Lと非接続導体層9cとの間におけるキャパシタンス成分の変化やばらつきを小さくかつ安定化することができる。上記した効果は、スルーホール導体11Rと非接続導体層9gとの間においても同様である。 The following configuration will be described with reference to FIG. Further, at least one of the above-mentioned non-connecting conductors 9c and 9g may be at a position where its ends 9ct and 9gt are recessed from the inner walls 7L and 7R of the through hole 7. When the end 9ct of the non-connecting conductor layer 9c is recessed from the inner wall 7L of the through hole 7, for example, the distance between the through-hole conductor 11L and the end 9ct of the non-connecting conductor layer 9c becomes wide. This makes it possible to further improve the insulating property between the through-hole conductor 11L and the end 9ct of the non-connecting conductor layer 9c. As a result, changes and variations in the capacitance component between the through-hole conductor 11L and the non-connecting conductor layer 9c can be made small and stable. The above effect is the same between the through-hole conductor 11R and the non-connecting conductor layer 9g.
 次に、実施形態の印刷配線板Aの製造方法について説明する。図4は、実施形態の印刷配線板Aの製造方法に用いる多層基板の断面図である。まず、多層基板20を用意する。多層基板20は絶縁基板21と導体部23とを有する。多層基板20は厚み方向にスルーホール25を有する。絶縁基板21は複数の絶縁層27を含む。図4に示す絶縁基板21は、厚み方向の上側から第1絶縁層27a、第2絶縁層27bおよび第3絶縁層27cによって構成される。ここでは、3層の絶縁層27によって形成された絶縁基板21を用いているが、絶縁層27の積層数はこれに限らない。上述したように、絶縁基板27は、用途によっては、さらに多層の構造となっていてもよい。導体部23は複数の導体層29とスルーホール導体原体31とを含む。導体層29は、第1導体層29a、第2導体層29b、第3導体層29c、第4導体層29d、第5導体層29e、第6導体層29f、第7導体層29gおよび第8導体層29hによって構成される。上記したそれぞれの導体層29は、絶縁層27の各層の同一面上で一体化された状態であってもよい。 Next, the manufacturing method of the printed wiring board A of the embodiment will be described. FIG. 4 is a cross-sectional view of a multilayer board used in the method for manufacturing the printed wiring board A of the embodiment. First, the multilayer board 20 is prepared. The multilayer board 20 has an insulating board 21 and a conductor portion 23. The multilayer board 20 has through holes 25 in the thickness direction. The insulating substrate 21 includes a plurality of insulating layers 27. The insulating substrate 21 shown in FIG. 4 is composed of a first insulating layer 27a, a second insulating layer 27b, and a third insulating layer 27c from the upper side in the thickness direction. Here, the insulating substrate 21 formed by the three-layer insulating layer 27 is used, but the number of laminated insulating layers 27 is not limited to this. As described above, the insulating substrate 27 may have a further multi-layered structure depending on the application. The conductor portion 23 includes a plurality of conductor layers 29 and a through-hole conductor bulk material 31. The conductor layer 29 includes a first conductor layer 29a, a second conductor layer 29b, a third conductor layer 29c, a fourth conductor layer 29d, a fifth conductor layer 29e, a sixth conductor layer 29f, a seventh conductor layer 29g, and an eighth conductor. It is composed of layers 29h. Each of the above-mentioned conductor layers 29 may be integrated on the same surface of each layer of the insulating layer 27.
 絶縁層27の各層の同一面上で一体化された導体層29のペアは、以下の通りである。第1絶縁層27aの上面側には、第1導体層29aおよび第5導体層29eが配置される。第1絶縁層27aと第2絶縁層27bとの間には、第2導体層29bおよび第6導体層29fが配置される。第2絶縁層27bと第3絶縁層27cとの間には、第3導体層29cおよび第7導体層29gが配置される。第3絶縁層27cの下面側には、第4導体層29dおよび第8導体層29hが配置される。スルーホール導体原体31は、スルーホール25の内壁25L、内壁25Rの全面を覆っている。スルーホール導体原体31は、第1導体層29a、第2導体層29b、第3導体層29c、第4導体層29d、第5導体層29e、第6導体層29f、第7導体層29gおよび第8導体層29hに電気的に接続された状態である。この場合、図4に示すように、多層基板20の縦断面図において、スルーホール25を挟んで分れて見えるスルーホール導体原体31を左右2つに分けて符号を付し表記する。スルーホール25の左側に位置するスルーホール導体原体31の符号は31GLである。スルーホール25の右側に位置するスルーホール導体原体31の符号は31GRである。 The pair of conductor layers 29 integrated on the same surface of each layer of the insulating layer 27 is as follows. The first conductor layer 29a and the fifth conductor layer 29e are arranged on the upper surface side of the first insulating layer 27a. A second conductor layer 29b and a sixth conductor layer 29f are arranged between the first insulating layer 27a and the second insulating layer 27b. A third conductor layer 29c and a seventh conductor layer 29g are arranged between the second insulating layer 27b and the third insulating layer 27c. The fourth conductor layer 29d and the eighth conductor layer 29h are arranged on the lower surface side of the third insulating layer 27c. The through-hole conductor bulk material 31 covers the entire inner wall 25L and inner wall 25R of the through-hole 25. The through-hole conductor base 31 includes a first conductor layer 29a, a second conductor layer 29b, a third conductor layer 29c, a fourth conductor layer 29d, a fifth conductor layer 29e, a sixth conductor layer 29f, a seventh conductor layer 29g, and the like. It is in a state of being electrically connected to the eighth conductor layer 29h. In this case, as shown in FIG. 4, in the vertical cross-sectional view of the multilayer substrate 20, the through-hole conductor bulk material 31 that appears to be separated across the through-hole 25 is divided into two parts on the left and right, and is indicated by a reference numeral. The code of the through-hole conductor bulk material 31 located on the left side of the through-hole 25 is 31GL. The code of the through-hole conductor bulk material 31 located on the right side of the through-hole 25 is 31GR.
 図5は、図4に示した多層基板20に保護層33を形成した印刷配線板加工体を示す断面図である。次に、図5に示す工程では、用意した多層基板20に形成したスルーホール導体原体31(31GL、31GR)の内表面31LA、31RAに保護層33を形成する。ここで、保護層33を形成した多層基板20のことを、以下、印刷配線板加工体20Aと表記する。保護層33は、絶縁基板21の最表面に形成された第1導体層29a、第4導体層29d、第5導体層29e、第8導体層29hの表面にも形成される。保護層33は、スルーホール導体原体31(31GL)、第1導体層29aおよび第4導体層29dに接している。保護層33は、スルーホール導体原体31(31GL)、第1導体層29aおよび第4導体層29dの表面に接している。保護層33は、スルーホール導体原体31(31GR)、第5導体層29eおよび第8導体層29hに接している。保護層33は、スルーホール導体原体31(31GR)、第5導体層29eおよび第8導体層29hの表面に接している。保護層33に用いる材料としては、例えば、錫またはED膜が好適である。このような材料によって形成される保護層33は、錫は電解めっき法、ED膜は電着法によって形成するのがよい。 FIG. 5 is a cross-sectional view showing a printed wiring board processed body in which the protective layer 33 is formed on the multilayer substrate 20 shown in FIG. Next, in the step shown in FIG. 5, the protective layer 33 is formed on the inner surfaces 31LA and 31RA of the through-hole conductor bulk material 31 (31GL, 31GR) formed on the prepared multilayer substrate 20. Here, the multilayer board 20 on which the protective layer 33 is formed is hereinafter referred to as a printed wiring board processed body 20A. The protective layer 33 is also formed on the surfaces of the first conductor layer 29a, the fourth conductor layer 29d, the fifth conductor layer 29e, and the eighth conductor layer 29h formed on the outermost surface of the insulating substrate 21. The protective layer 33 is in contact with the through-hole conductor bulk material 31 (31GL), the first conductor layer 29a, and the fourth conductor layer 29d. The protective layer 33 is in contact with the surfaces of the through-hole conductor bulk material 31 (31GL), the first conductor layer 29a, and the fourth conductor layer 29d. The protective layer 33 is in contact with the through-hole conductor bulk material 31 (31GR), the fifth conductor layer 29e, and the eighth conductor layer 29h. The protective layer 33 is in contact with the surfaces of the through-hole conductor bulk material 31 (31GR), the fifth conductor layer 29e, and the eighth conductor layer 29h. As the material used for the protective layer 33, for example, tin or an ED film is suitable. The protective layer 33 formed of such a material is preferably formed by an electrolytic plating method for tin and an electrodeposition method for an ED film.
 図6は、図5に示した印刷配線板加工体20Aに設けたスルーホール導体原体31の部分を切削加工する状態を示す断面図である。図7は、スルーホール導体原体31を部分的に切削加工した後の印刷配線板加工体20Aの状態を示す断面図である。図6に示す工程では、印刷配線板加工体20Aに設けたスルーホール導体原体31に切削加工を行い、スルーホール導体原体31および保護層33の一部を除去する。スルーホール導体原体31および保護層33は、切削加工用の治具によってその一部を除去する。切削加工用の治具としてはドリル加工機を一例として挙げることができる。図6には、ドリル加工機の先端部分を模式的に示している。ドリル加工機の先端部分のことを、以下、ドリル35と表記する。ドリル35は、先端部35Aの径(直径または最大径)がスルーホール導体原体31の内径よりも大きいものを用いる。スルーホール導体原体31の内径は、図6において、両矢印に符号DTを付した部分である。ドリル35の先端部35Aの径は、図6において、太い両矢印に符号DDを付した部分である。ドリル35は、先端部35Aがやや先細りの形状であるものを用いる。また、ドリル35による切削加工の工程では、ドリル35の軸心39をスルーホール導体原体31の中心軸Zからずらすようにする。 FIG. 6 is a cross-sectional view showing a state in which a portion of the through-hole conductor bulk material 31 provided in the printed wiring board processed body 20A shown in FIG. 5 is cut. FIG. 7 is a cross-sectional view showing a state of the printed wiring board processed body 20A after the through-hole conductor original body 31 is partially cut. In the step shown in FIG. 6, the through-hole conductor base 31 provided in the printed wiring board processed body 20A is cut to remove a part of the through-hole conductor base 31 and the protective layer 33. A part of the through-hole conductor bulk material 31 and the protective layer 33 is removed by a jig for cutting. As an example of a jig for cutting, a drilling machine can be mentioned. FIG. 6 schematically shows the tip portion of the drilling machine. The tip portion of the drill processing machine is hereinafter referred to as a drill 35. As the drill 35, a drill 35 having a tip portion 35A having a diameter (diameter or maximum diameter) larger than the inner diameter of the through-hole conductor bulk material 31 is used. The inner diameter of the through-hole conductor bulk material 31 is the portion where the double-headed arrow is designated by the symbol DT in FIG. The diameter of the tip portion 35A of the drill 35 is a portion in which a thick double-headed arrow is designated by a reference numeral DD in FIG. As the drill 35, a drill 35 having a slightly tapered tip portion 35A is used. Further, in the process of cutting with the drill 35, the axis 39 of the drill 35 is displaced from the central axis Z of the through-hole conductor original body 31.
 ドリル35の先端部35Aがやや先細りの形状であり、ドリル35の軸心39をスルーホール導体原体31の中心軸Zからずらすようにすると、図6から分かるように、切削加工した後のスルーホール導体原体31のスルーホール25を間に挟んだ両側で長さに違いを生じさせることができる。スルーホール導体原体31における長さの違いは、スルーホール導体加工体31GLとスルーホール導体加工体31GRとの間である。図6および図7では、スルーホール導体原体31から残ったスルーホール導体加工体31GLの長さは、符号LTLで表している。また、スルーホール導体原体31から残ったスルーホール導体加工体31GRの長さは、符号LTRで表している。ここで、切削加工後に残った部分というのは、スルーホール導体加工体31GLにおいて第1導体層29aからドリル35の先端部35Aが接している部分までとする。また、スルーホール導体加工体31GRにおいて、第5導体層29eからドリル35の先端部35Aが接している部分までとする。切削加工後に切削されていない部分であるスルーホール導体加工体31GLの長さLTLは、同じく切削加工後に切削されていない部分であるスルーホール導体加工体31GRの長さLTRよりも長くなっている。 When the tip 35A of the drill 35 has a slightly tapered shape and the axis 39 of the drill 35 is displaced from the central axis Z of the through-hole conductor original body 31, as can be seen from FIG. 6, the through after cutting is performed. Differences in length can be made on both sides of the through hole 25 of the hole conductor original body 31 sandwiched between them. The difference in length in the through-hole conductor bulk material 31 is between the through-hole conductor processed body 31GL and the through-hole conductor processed body 31GR. In FIGS. 6 and 7, the length of the through-hole conductor processed body 31GL remaining from the through-hole conductor bulk material 31 is represented by the reference numeral LTL. Further, the length of the through-hole conductor processed body 31GR remaining from the through-hole conductor bulk material 31 is represented by the reference numeral LTR. Here, the portion remaining after the cutting process is the portion of the through-hole conductor processed body 31GL from the first conductor layer 29a to the portion in contact with the tip portion 35A of the drill 35. Further, in the through-hole conductor processed body 31GR, the range is from the fifth conductor layer 29e to the portion where the tip portion 35A of the drill 35 is in contact. The length LTL of the through-hole conductor processed body 31GL, which is a portion not cut after cutting, is longer than the length LTR of the through-hole conductor processed body 31GR, which is also a portion not cut after cutting.
 図8は、図7に示した印刷配線板加工体20Aにエッチング処理を施した後の状態を示す断面図である。図9は、図8に示した印刷配線板加工体20Aから保護層33を除去した後の状態を示す断面図である。図8の工程は、切削加工した後に残ったスルーホール導体加工体31GL、スルーホール導体加工体31GRに対してエッチング処理を行う工程である。この場合に用いるエッチング液はスルーホール導体原体31に用いている金属(銅)は溶解するが、保護層33は溶解しないものである。エッチング液としては、例えば、塩化第二銅水溶液または塩化第二鉄水溶液を挙げることができる。このようなエッチング処理のことをハーフエッチング処理という。図8に示すように、スルーホール導体加工体31GLおよびスルーホール導体加工体31GRに対してエッチング処理を行うと、スルーホール導体加工体31GLおよびスルーホール導体加工体31GRがドリル35を挿入した方向から所定の長さだけさらに除かれる。この場合、エッチング後のスルーホール導体加工体31GLの長さLTLは、このスルーホール導体加工体31GLに接している保護層33よりも長さが短くなる。エッチング後のスルーホール導体加工体31GRの長さLTRもスルーホール導体加工体31GRに接している保護層33よりも長さが短くなる。このとき、同時に、保護層33に覆われていない第3導体層29c、第4導体層29d、第7導体層29gおよび第8導体層29hも部分的に除かれる。第3導体層29cおよび第7導体層29gは、スルーホール25の内壁25L、内壁25Rから奥に向かって部分的に除去される。第3導体層29cの端部29ctおよび第7導体層29gの端部29gtは、スルーホール25の内壁25L、内壁25Rから凹んだ位置となる。この後、図9に示すように、印刷配線板加工体20Aから保護層33を除去する。保護層33が錫の金属膜である場合には、その金属膜の除去には、エンストリップ(メルテックス社製)、メックリムーバ(メック社製)などを用いる。こうして得られた印刷配線板加工体20Aは、図9に示すように、スルーホール導体加工体31GLの長さLTLがスルーホール導体加工体31GRの長さLTRよりも長くなっている。この後、必要に応じて、スルーホール25およびスルーホール導体加工体31GL、スルーホール導体加工体31GRが存在する空隙に充填材を埋め込む。また、必要に応じて、印刷配線板加工体20Aの表面にさらに回路パターンを形成し、その後、ソルダーレジストを塗布し、露出した導体部23の表面に、金、白金、ニッケルの群から選ばれる少なくとも1種の材料を主成分とする金属膜を形成する。金属膜にはめっき膜を適用するのがよい。印刷配線板Aは、以上の工程により得ることができる。 FIG. 8 is a cross-sectional view showing a state after etching the printed wiring board processed body 20A shown in FIG. 7. FIG. 9 is a cross-sectional view showing a state after the protective layer 33 is removed from the printed wiring board processed body 20A shown in FIG. The step of FIG. 8 is a step of etching the through-hole conductor processed body 31GL and the through-hole conductor processed body 31GR remaining after the cutting process. The etching solution used in this case dissolves the metal (copper) used in the through-hole conductor bulk material 31, but does not dissolve the protective layer 33. Examples of the etching solution include an aqueous solution of cupric chloride or an aqueous solution of ferric chloride. Such an etching process is called a half etching process. As shown in FIG. 8, when the through-hole conductor processed body 31GL and the through-hole conductor processed body 31GR are subjected to the etching process, the through-hole conductor processed body 31GL and the through-hole conductor processed body 31GR are viewed from the direction in which the drill 35 is inserted. It is further removed by a predetermined length. In this case, the length LTL of the through-hole conductor processed body 31GL after etching is shorter than the protective layer 33 in contact with the through-hole conductor processed body 31GL. The length LTR of the through-hole conductor processed body 31GR after etching is also shorter than the protective layer 33 in contact with the through-hole conductor processed body 31GR. At this time, at the same time, the third conductor layer 29c, the fourth conductor layer 29d, the seventh conductor layer 29g, and the eighth conductor layer 29h, which are not covered by the protective layer 33, are also partially removed. The third conductor layer 29c and the seventh conductor layer 29g are partially removed from the inner wall 25L and the inner wall 25R of the through hole 25 toward the back. The end portion 29ct of the third conductor layer 29c and the end portion 29gt of the seventh conductor layer 29g are recessed from the inner wall 25L and the inner wall 25R of the through hole 25. After that, as shown in FIG. 9, the protective layer 33 is removed from the printed wiring board processed body 20A. When the protective layer 33 is a tin metal film, Enstrip (manufactured by Meltex Inc.), Meckli Mover (manufactured by MEC), or the like is used to remove the metal film. In the printed wiring board processed body 20A thus obtained, as shown in FIG. 9, the length LTL of the through-hole conductor processed body 31GL is longer than the length LTR of the through-hole conductor processed body 31GR. After that, if necessary, the filler is embedded in the voids where the through-hole 25, the through-hole conductor processed body 31GL, and the through-hole conductor processed body 31GR are present. Further, if necessary, a circuit pattern is further formed on the surface of the printed wiring board processed body 20A, and then a solder resist is applied, and the surface of the exposed conductor portion 23 is selected from the group of gold, platinum, and nickel. A metal film containing at least one kind of material as a main component is formed. A plating film should be applied to the metal film. The printed wiring board A can be obtained by the above steps.
 図10は、他の態様の印刷配線板の製造方法を示すものであり、保護層33を形成した印刷配線板加工体に対してスルーホール導体原体31の部分を切削加工する状態を示す断面図である。図11は、スルーホール導体原体31を部分的に切削加工した後の印刷配線板加工体の状態を示す断面図である。図12は、図11に示した印刷配線板加工体にエッチング処理を施した後の状態を示す断面図である。図13は、図12に示した印刷配線板加工体から保護層33を除去した後の状態を示す断面図である。図10~図13に示した印刷配線板加工体については符号Bを用いて、印刷配線板加工体20Bとする。図10に示す工程の場合も、スルーホール25の中心軸Zに対してドリル35の軸心39をずらしている。図10~図13に示す工程と図6~図12に示した工程との違いは、ドリル35の形状が異なることである。ここで用いるドリル35は、先端部35Aの形状が円錐型である。ドリル35の先端部35Aが円錐型であるものを用いることによって、切削加工後およびエッチング後に残るスルーホール導体加工体31GLの長さLTLは、スルーホール導体加工体31GRの長さLTRよりも長いものにできる。また、スルーホール導体加工体31GL、およびスルーホール導体加工体31GRの端部31tL、31tRの形状を図3に示した傾斜した形状にすることができる。 FIG. 10 shows a method of manufacturing a printed wiring board of another aspect, and shows a cross section showing a state in which a portion of the through-hole conductor original body 31 is cut with respect to the printed wiring board processed body on which the protective layer 33 is formed. It is a figure. FIG. 11 is a cross-sectional view showing a state of the printed wiring board processed body after the through-hole conductor original body 31 is partially cut. FIG. 12 is a cross-sectional view showing a state after etching the printed wiring board processed body shown in FIG. FIG. 13 is a cross-sectional view showing a state after the protective layer 33 is removed from the printed wiring board processed body shown in FIG. The printed wiring board processed body shown in FIGS. 10 to 13 is designated as a printed wiring board processed body 20B by using reference numeral B. Also in the step shown in FIG. 10, the axial center 39 of the drill 35 is shifted with respect to the central axis Z of the through hole 25. The difference between the steps shown in FIGS. 10 to 13 and the steps shown in FIGS. 6 to 12 is that the shape of the drill 35 is different. The drill 35 used here has a conical tip 35A. By using a drill 35 having a conical tip 35A, the length LTL of the through-hole conductor processed body 31GL remaining after cutting and etching is longer than the length LTR of the through-hole conductor processed body 31GR. Can be done. Further, the shapes of the through-hole conductor processed body 31GL and the end portions 31tL and 31tR of the through-hole conductor processed body 31GR can be made into the inclined shape shown in FIG.
 次に、図4に示した多層基板20を用意し、図5~図9の工程を用いて、具体的に、印刷配線板を作製した。また、図4に示した多層基板20を用意し、図10~図13の工程を用いて、具体的に、印刷配線板を作製した。多層基板は、絶縁層にFR-4材(ガラス布基材エポキシ樹脂)を用いた。導体層には銅箔または銅箔に電解銅めっきしたものを用いた。ここで、図5~図9の工程を用いて作製した印刷配線板を試料1とする。図10~図13の工程を用いて作製した印刷配線板を試料2とする。図14に、作製した印刷配線板を平面視したときのスルーホール導体の形状および表面に形成した第1導体層および第5導体層の形状を示した。スルーホール導体Lおよびスルーホール導体Rは、スルーホールの内壁に絶縁する部分を設けて対向された配置である。絶縁層および第1~第8導体層の配置は、基本的に図1に示した4層の構造である。第1~第8導体層の形状も図1に示したような短冊状である。各絶縁層上に形成されている導体層の面積、長さおよび厚みは同じである。スルーホール導体Lに相当する部分の長さはスルーホール導体Rに相当する部分の長さよりも長くした。試料1における第2導体層と第3導体層との間のキャパシタンスが、第6導体層と第7導体層との間のキャパシタンスに比較して大きくなるように作製した。試料2のスルーホール導体は、円筒状であり、その端部が傾斜した形状である。 Next, the multilayer board 20 shown in FIG. 4 was prepared, and specifically, a printed wiring board was produced by using the steps of FIGS. 5 to 9. Further, the multilayer board 20 shown in FIG. 4 was prepared, and specifically, a printed wiring board was produced by using the steps of FIGS. 10 to 13. For the multilayer substrate, FR-4 material (glass cloth base material epoxy resin) was used for the insulating layer. For the conductor layer, a copper foil or a copper foil plated with electrolytic copper was used. Here, the printed wiring board produced by using the steps of FIGS. 5 to 9 is used as sample 1. The printed wiring board produced by using the steps of FIGS. 10 to 13 is used as sample 2. FIG. 14 shows the shape of the through-hole conductor and the shapes of the first conductor layer and the fifth conductor layer formed on the surface of the produced printed wiring board when viewed in a plan view. The through-hole conductor L and the through-hole conductor R are arranged so as to be opposed to each other by providing an insulating portion on the inner wall of the through hole. The arrangement of the insulating layer and the first to eighth conductor layers is basically a four-layer structure shown in FIG. The shapes of the first to eighth conductor layers are also strip-shaped as shown in FIG. The area, length and thickness of the conductor layer formed on each insulating layer are the same. The length of the portion corresponding to the through-hole conductor L was made longer than the length of the portion corresponding to the through-hole conductor R. It was prepared so that the capacitance between the second conductor layer and the third conductor layer in Sample 1 was larger than the capacitance between the sixth conductor layer and the seventh conductor layer. The through-hole conductor of sample 2 has a cylindrical shape and an inclined end portion thereof.
 作製した印刷配線板についてのインピーダンス測定は、インピーダンスアナライザを用いて測定した。インピーダンスアナライザは、横河・ヒューレットパッカード社製の4192Aを用いた。測定周波数は1MHzから10MHzの範囲とした。インピーダンスは、1MHzから10MHzの範囲から得られた値の平均値を用いた。測定は、第1導体層と第3導体層との間、および第5導体層と第7導体層との間の回路をそれぞれ測定した。第1導体層と第3導体層との間の回路の平均のインピーダンスに対する第5導体層と第7導体層との間の回路のインピーダンスの比をそれぞれ求めた。比較例として、スルーホール導体が円筒状で、スルーホール導体L側の長さとスルーホール導体R側の長さの差が同じ(0.01μm以下)の試料についても同様の評価を行った。比較例の試料の第1導体層と第3導体層との間の回路の平均のインピーダンスに対する第5導体層と第7導体層との間の回路のインピーダンスの比を1としたときに、試料1のインピーダンス比は、比較例の試料よりも大きく、また試料2のインピーダンス比は試料1よりも大きい傾向を示した。 The impedance of the manufactured printed wiring board was measured using an impedance analyzer. As the impedance analyzer, 4192A manufactured by Yokogawa Hewlett-Packard Co., Ltd. was used. The measurement frequency was in the range of 1 MHz to 10 MHz. For the impedance, the average value of the values obtained from the range of 1 MHz to 10 MHz was used. The measurement measured the circuits between the first conductor layer and the third conductor layer, and between the fifth conductor layer and the seventh conductor layer, respectively. The ratio of the impedance of the circuit between the 5th conductor layer and the 7th conductor layer to the average impedance of the circuit between the 1st conductor layer and the 3rd conductor layer was determined, respectively. As a comparative example, the same evaluation was performed on a sample in which the through-hole conductor was cylindrical and the difference between the length on the through-hole conductor L side and the length on the through-hole conductor R side was the same (0.01 μm or less). When the ratio of the impedance of the circuit between the 5th conductor layer and the 7th conductor layer to the average impedance of the circuit between the 1st conductor layer and the 3rd conductor layer of the sample of the comparative example is 1, the sample The impedance ratio of sample 1 tended to be larger than that of the sample of Comparative Example, and the impedance ratio of sample 2 tended to be larger than that of sample 1.
 本開示は、印刷配線板およびその製造方法に利用することができる。 This disclosure can be used for printed wiring boards and methods for manufacturing them.
A、B、C・・・・・・印刷配線板
1、21・・・・・・・絶縁基板
3、23・・・・・・・導体部
5、27・・・・・・・絶縁層
7、25・・・・・・・スルーホール
8a・・・・・・・・・第1開口
8b・・・・・・・・・第2開口
9、29・・・・・・・導体層
11、31・・・・・・スルーホール導体
20・・・・・・・・・多層基板
33・・・・・・・・・保護層
Z・・・・・・・・・・中心軸
A, B, C ... Printed wiring board 1, 21 ... Insulation substrate 3, 23 ... Conductor part 5, 27 ... Insulation layer 7, 25 ... Through hole 8a ..... 1st opening 8b ........... 2nd opening 9, 29 ..... Conductor layer 11, 31 ・ ・ ・ ・ ・ ・ ・ ・ Through-hole conductor 20 ・ ・ ・ ・ ・ ・ ・ ・ ・ Multi-layer board 33 ・ ・ ・ ・ ・ ・ ・ ・ Protective layer Z ・ ・ ・ ・ ・ ・ ・ ・ Central axis

Claims (10)

  1.  絶縁基板と、該絶縁基板の少なくとも内部に配置された導体部とを有し、
     前記絶縁基板は、積層された複数の絶縁層と、第1開口から第2開口に厚み方向に貫通するスルーホールと、を有し、
     前記導体部は、複数の導体層とスルーホール導体と、を有し、
     前記複数の導体層は、前記絶縁層のそれぞれに面方向に沿うように位置し、
     前記スルーホール導体は、前記第1開口から前記第2開口に向かって延びる筒状であり、存在位置において前記複数の導体層の一部と電気的に接続され、
     前記複数の導体層は、前記スルーホール導体よりも前記第2開口の近くに、前記スルーホール導体と接していない非接続導体層を少なくとも1層有し、
     前記スルーホール導体は、前記スルーホールの中心軸に沿った断面視において、前記第2開口に近い2つの端部である、第1端部と第2端部との厚み方向における位置が異なる、
    印刷配線板。
    It has an insulating substrate and a conductor portion arranged at least inside the insulating substrate.
    The insulating substrate has a plurality of laminated insulating layers and through holes penetrating from the first opening to the second opening in the thickness direction.
    The conductor portion has a plurality of conductor layers and a through-hole conductor.
    The plurality of conductor layers are located along the plane direction in each of the insulating layers.
    The through-hole conductor has a cylindrical shape extending from the first opening toward the second opening, and is electrically connected to a part of the plurality of conductor layers at an existing position.
    The plurality of conductor layers have at least one non-connecting conductor layer that is not in contact with the through-hole conductor near the second opening of the through-hole conductor.
    The through-hole conductor has two ends close to the second opening in a cross-sectional view along the central axis of the through-hole, and the positions of the first end and the second end in the thickness direction are different.
    Printed wiring board.
  2.  絶縁基板と、該絶縁基板の少なくとも内部に配置された導体部とを有し、
     前記絶縁基板は、積層された複数の絶縁層と、第1開口から第2開口に厚み方向に貫通するスルーホールと、を有し、
     前記導体部は、複数の導体層とスルーホール導体と、を有し、
     前記複数の導体層は、前記絶縁層のそれぞれに面方向に沿うように位置し、
     前記スルーホール導体は、前記第1開口から前記第2開口に向かって延びる筒状であり、存在位置において前記複数の導体層の一部と電気的に接続され、
     前記複数の導体層は、前記スルーホール導体よりも前記第2開口の近くに、前記スルーホール導体と接していない非接続導体層を少なくとも1層有し、
     前記スルーホール導体は、前記第2開口に近い端面が、前記スルーホールの中心軸に対し傾いている、印刷配線板。
    It has an insulating substrate and a conductor portion arranged at least inside the insulating substrate.
    The insulating substrate has a plurality of laminated insulating layers and through holes penetrating from the first opening to the second opening in the thickness direction.
    The conductor portion has a plurality of conductor layers and a through-hole conductor.
    The plurality of conductor layers are located along the plane direction in each of the insulating layers.
    The through-hole conductor has a cylindrical shape extending from the first opening toward the second opening, and is electrically connected to a part of the plurality of conductor layers at an existing position.
    The plurality of conductor layers have at least one non-connecting conductor layer that is not in contact with the through-hole conductor near the second opening of the through-hole conductor.
    The through-hole conductor is a printed wiring board in which an end surface close to the second opening is inclined with respect to the central axis of the through-hole.
  3.  前記スルーホール導体は、前記絶縁基板を縦断面視したときに、前記スルーホールの左右の領域において、同数の導体層と電気的に接続されている、請求項1または2に記載の印刷配線板。 The printed wiring board according to claim 1 or 2, wherein the through-hole conductor is electrically connected to the same number of conductor layers in the left and right regions of the through-hole when the insulating substrate is viewed in a vertical cross section. ..
  4.  前記スルーホール導体は、前記スルーホールの内壁側にあたる第1面が、該第1面の反対に位置する第2面よりも前記第2開口の近くに位置する、請求項1~3のうちいずれかに記載の印刷配線板。 The through-hole conductor has any one of claims 1 to 3, wherein the first surface corresponding to the inner wall side of the through hole is located closer to the second opening than the second surface located opposite to the first surface. Printed wiring board described in Crab.
  5.  前記非接続導体層は、前記面方向の長さが異なる部分を有する、請求項1~4のうちいずれかに記載の印刷配線板。 The printed wiring board according to any one of claims 1 to 4, wherein the non-connecting conductor layer has portions having different lengths in the plane direction.
  6.  前記非接続導体層の端は、前記スルーホールの内壁から凹んだ位置にある、請求項5に記載の印刷配線板。 The printed wiring board according to claim 5, wherein the end of the non-connecting conductor layer is recessed from the inner wall of the through hole.
  7.  複数の絶縁層が積層された絶縁基板と、前記絶縁層の面に沿うように設けられた導体層と、前記絶縁基板を厚み方向に貫通するスルーホールの内壁を覆う銅のスルーホール導体原体と、を有する多層基板を準備する工程と、
    該多層基板に設けられた前記スルーホール導体原体の内壁の全面に、前記銅のエッチング液では溶解しない保護層を形成する工程と、
    前記スルーホール導体原体の内径よりも径が大きく、且つ先端部が先細りの形状を有している切削加工用の治具を用い、
    該治具の軸心を前記スルーホールの中心軸からずれた位置に配置して、前記スルーホール導体原体および前記保護層を、前記多層基板の一方の表面側から前記多層基板の厚み方向の途中の位置まで切削加工して、
    前記スルーホール導体原体が少なくとも2層の導体層と電気的に接続された状態とする工程と、を含む印刷配線板の製造方法。
    An insulating substrate in which a plurality of insulating layers are laminated, a conductor layer provided along the surface of the insulating layer, and a copper through-hole conductor base covering the inner wall of the through hole penetrating the insulating substrate in the thickness direction. And the process of preparing a multilayer board with
    A step of forming a protective layer that is not dissolved by the copper etching solution on the entire inner wall of the through-hole conductor bulk material provided on the multilayer substrate.
    Using a jig for cutting, which has a diameter larger than the inner diameter of the through-hole conductor bulk material and has a tapered tip.
    The axis of the jig is arranged at a position deviated from the central axis of the through hole, and the through hole conductor original body and the protective layer are placed in the thickness direction of the multilayer substrate from one surface side of the multilayer substrate. Cut to the middle position,
    A method for manufacturing a printed wiring board, which comprises a step of making the through-hole conductor bulk material electrically connected to at least two conductor layers.
  8.  前記治具として、先端の形状が円錐型の加工治具を備えたものを用いる、請求項7に記載の印刷配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 7, wherein the jig is provided with a processing jig having a conical tip shape.
  9.  前記保護層として錫膜を用いる、請求項7または8に記載の印刷配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 7 or 8, wherein a tin film is used as the protective layer.
  10.  前記錫膜を剥離した後に、前記スルーホール導体原体をハーフエッチング処理する、請求項9に記載の印刷配線板の製造方法。 The method for manufacturing a printed wiring board according to claim 9, wherein the through-hole conductor original body is half-etched after the tin film is peeled off.
PCT/JP2021/013285 2020-03-30 2021-03-29 Printed wiring board and method for manufacturing same WO2021200820A1 (en)

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JP2008066544A (en) * 2006-09-08 2008-03-21 Nec Corp Multilayer printed circuit board and its manufacturing method
US20130025919A1 (en) * 2010-03-31 2013-01-31 Flextronics Ap, Llc Method for backdrilling via stubs of multilayer printed circuit boards with reduced backdrill diameters
JP2013143461A (en) * 2012-01-11 2013-07-22 Nec Corp Multilayer printed circuit board and manufacturing method used for the same
JP2016527725A (en) * 2013-08-02 2016-09-08 北大方正集▲団▼有限公司Peking University Founder Group Co., Ltd Method for manufacturing back drill hole on PCB substrate and PCB substrate
JP2017098433A (en) * 2015-11-25 2017-06-01 京セラ株式会社 Intermediate body of printed wiring board and printed wiring board, method of manufacturing printed wiring board
JP2017216327A (en) * 2016-05-31 2017-12-07 三菱電機株式会社 Multilayer printed wiring board and manufacturing method thereof
JP2019071318A (en) * 2017-10-06 2019-05-09 日立化成株式会社 Multilayer wiring board and manufacturing method therefor

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JP2008066544A (en) * 2006-09-08 2008-03-21 Nec Corp Multilayer printed circuit board and its manufacturing method
US20130025919A1 (en) * 2010-03-31 2013-01-31 Flextronics Ap, Llc Method for backdrilling via stubs of multilayer printed circuit boards with reduced backdrill diameters
JP2013143461A (en) * 2012-01-11 2013-07-22 Nec Corp Multilayer printed circuit board and manufacturing method used for the same
JP2016527725A (en) * 2013-08-02 2016-09-08 北大方正集▲団▼有限公司Peking University Founder Group Co., Ltd Method for manufacturing back drill hole on PCB substrate and PCB substrate
JP2017098433A (en) * 2015-11-25 2017-06-01 京セラ株式会社 Intermediate body of printed wiring board and printed wiring board, method of manufacturing printed wiring board
JP2017216327A (en) * 2016-05-31 2017-12-07 三菱電機株式会社 Multilayer printed wiring board and manufacturing method thereof
JP2019071318A (en) * 2017-10-06 2019-05-09 日立化成株式会社 Multilayer wiring board and manufacturing method therefor

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