CN220173481U - Multilayer circuit board and electronic equipment - Google Patents
Multilayer circuit board and electronic equipment Download PDFInfo
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- CN220173481U CN220173481U CN202321577984.0U CN202321577984U CN220173481U CN 220173481 U CN220173481 U CN 220173481U CN 202321577984 U CN202321577984 U CN 202321577984U CN 220173481 U CN220173481 U CN 220173481U
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- 229910052705 radium Inorganic materials 0.000 claims description 33
- HCWPIIXVSYCSAN-UHFFFAOYSA-N radium atom Chemical compound [Ra] HCWPIIXVSYCSAN-UHFFFAOYSA-N 0.000 claims description 33
- 239000004020 conductor Substances 0.000 claims description 19
- 238000000576 coating method Methods 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 8
- 238000010304 firing Methods 0.000 description 6
- 238000007747 plating Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 5
- 239000004809 Teflon Substances 0.000 description 5
- 229920006362 Teflon® Polymers 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 239000011152 fibreglass Substances 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 5
- 239000010931 gold Substances 0.000 description 5
- 239000011810 insulating material Substances 0.000 description 5
- 238000005553 drilling Methods 0.000 description 4
- 230000000149 penetrating effect Effects 0.000 description 4
- 239000007769 metal material Substances 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
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- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The utility model discloses a multilayer circuit board and electronic equipment, wherein the multilayer circuit board comprises a first outer layer, a second outer layer and an intermediate layer, the intermediate layer comprises a third circuit layer, a first insulating layer, a fourth circuit layer, a second insulating layer, a fifth circuit layer, a third insulating layer and a sixth circuit layer which are sequentially stacked, the third circuit layer is tightly attached to the first outer layer, and the sixth circuit layer is tightly attached to the second outer layer; the intermediate layer is provided with a first laser perforation and a second laser perforation, the first laser perforation extends from the surface of the third circuit layer to the second insulating layer, the second laser perforation extends from the surface of the sixth circuit layer to the second insulating layer, and the first laser perforation is communicated with the first laser perforation. In the utility model, the apertures of the first laser perforation and the second laser perforation are smaller, so that the circuit layer has larger space for routing.
Description
Technical Field
The utility model belongs to the technical field of electronics, and particularly relates to a multilayer circuit board and electronic equipment.
Background
In the related art, for the middle layer 300 of the multi-layer circuit board, a functional hole penetrating through the middle layer 300 is generally disposed by mechanical hole rotation. However, in machining in a mechanical hole turning manner, the hole turning tool such as a drill bit is larger in submission, so that the finally formed functional hole is larger, and further more space of the multilayer circuit board is occupied, which is not beneficial to wiring of the multilayer circuit board.
Disclosure of Invention
The embodiment of the utility model provides a multilayer circuit board and electronic equipment, which are convenient for wiring of the multilayer circuit board.
In a first aspect, an embodiment of the present utility model provides a multilayer circuit board, including:
a first outer layer comprising at least one first circuit layer;
the second outer layer is arranged at intervals opposite to the first outer layer and comprises at least one second circuit layer; and
the intermediate layer comprises a third circuit layer, a first insulating layer, a fourth circuit layer, a second insulating layer, a fifth circuit layer, a third insulating layer and a sixth circuit layer which are sequentially stacked, wherein the third circuit layer is tightly attached to the first outer layer, and the sixth circuit layer is tightly attached to the second outer layer;
the intermediate layer is provided with a first laser perforation and a second laser perforation, the first laser perforation extends from the surface of the third circuit layer to the second insulating layer, the second laser perforation extends from the surface of the sixth circuit layer to the second insulating layer, and the first laser perforation is communicated with the first laser perforation.
Optionally, an aperture of an end of the first laser hole away from the second laser hole is greater than or equal to 240 microns and less than or equal to 270 microns.
Optionally, the aperture of the end of the first laser hole near the second laser hole is greater than or equal to 140 micrometers and less than or equal to 170 micrometers.
Optionally, the first radium perforation is filled with a first conductive material; or alternatively
The inner wall of the first radium perforation is provided with a first conductive coating.
Optionally, an aperture of an end of the second laser hole away from the first laser hole is greater than or equal to 240 microns and less than or equal to 270 microns.
Optionally, the aperture of the end of the second laser hole near the first laser hole is greater than or equal to 140 micrometers and less than or equal to 170 micrometers.
Optionally, the second radium perforation is filled with a second conductive material; or alternatively
And a second conductive coating is arranged on the inner wall of the second laser perforation.
Optionally, the number of first circuit layers is the same as the number of second circuit layers.
Optionally, the total thickness of the multilayer circuit board is less than or equal to 0.7 millimeters.
In a second aspect, an embodiment of the present utility model further provides an electronic device, including a circuit board as any one of the above.
In the embodiment of the utility model, the first laser perforation and the second laser perforation are holes manufactured through a laser burning-through process, and the holes of the first laser perforation and the second laser perforation can be made smaller because a drill bit for mechanical drilling is not required for laser burning-through, so that more space is provided for wiring on the multilayer circuit board. Furthermore, since the laser burning-through process cannot burn through the multi-layer circuit layer at one time, in the embodiment of the utility model, the first laser perforation and the second laser perforation are respectively processed from different surfaces of the intermediate layer, so that the first laser perforation and the second laser perforation can be ensured to be spliced to form a through hole penetrating through the intermediate layer, and the finished product rate of the intermediate layer processing is finally ensured.
Drawings
The technical solution of the present utility model and its advantageous effects will be made apparent by the following detailed description of the specific embodiments of the present utility model with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a first structure of a multi-layer circuit board according to an embodiment of the present utility model.
Fig. 2 is a schematic diagram of a second structure of a multi-layer circuit board according to an embodiment of the present utility model.
Fig. 3 is a schematic diagram of a third structure of a multi-layer circuit board according to an embodiment of the present utility model.
Fig. 4 is a schematic diagram of a fourth structure of a multi-layer circuit board according to an embodiment of the present utility model.
The reference numerals in the figures are respectively:
100. a first outer layer;
11. a first circuit layer; 12. a fourth insulating layer; 13. a first via;
200. a second outer layer;
21. a second circuit layer; 22. a fifth insulating layer; 23. a second via;
300. an intermediate layer;
31. a third circuit layer; 32. a first insulating layer; 33. a fourth line layer; 34. a second insulating layer; 35. a fifth wiring layer; 36. a third insulating layer; 37. a sixth wiring layer; 381. a first radium perforation; 382. a second radium perforation; 391. a first conductive material; 392. a first conductive coating; 393. a second conductive material; 394. and a second conductive coating.
Detailed Description
Embodiments of the present utility model are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present utility model and are not to be construed as limiting the present utility model.
In order to enable those skilled in the art to better understand the solution of the present utility model, the following description will make clear and complete descriptions of the technical solution of the present utility model in the embodiments of the present utility model with reference to the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
In the embodiment of the utility model, at least one refers to one or more; plural means two or more. In the description of the present utility model, the words "first," "second," "third," and the like are used solely for the purpose of distinguishing between descriptions and not necessarily for the purpose of indicating or implying a relative importance or order.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the utility model. Thus, the terms "comprising," "including," "having," and variations thereof herein mean "including but not limited to," unless expressly specified otherwise.
It should be noted that in embodiments of the present utility model, "connected" may be understood as electrically connected, and two electrical components may be connected directly or indirectly between the two electrical components. For example, a may be directly connected to B, or indirectly connected to B via one or more other electrical components.
Referring to fig. 1, fig. 1 is a schematic diagram of a first structure of a multi-layer circuit board according to an embodiment of the utility model. The embodiment of the utility model provides a multilayer circuit board. The multi-layered circuit board may include a first outer layer 100, a second outer layer 200, and an intermediate layer 300.
The first outer layer 100 includes at least one first wiring layer 11. The second outer layer 200 is disposed opposite to the first outer layer 100, and the second outer layer 200 includes at least one second wiring layer 21. The intermediate layer 300 includes a third wiring layer 31, a first insulating layer 32, a fourth wiring layer 33, a second insulating layer 34, a fifth wiring layer 35, a third insulating layer 36, and a sixth wiring layer 37, which are stacked in this order. The third circuit layer 31 is closely adhered to the first outer layer 100, and the sixth circuit layer 37 is closely adhered to the second outer layer 200.
Then, taking the horizontal placement of the multilayer circuit board as an example, the first outer layer 100 may be an outer layer at the top of the multilayer circuit board, the second outer layer 200 may be an outer layer at the bottom of the multilayer circuit board, or the second outer layer 200 may be an outer layer at the top of the multilayer circuit board, and the first outer layer 100 may be an outer layer at the bottom of the multilayer circuit board, so that the first outer layer 100, the intermediate layer 300 and the second outer layer 200 stacked in sequence are composited to form a complete multilayer circuit board.
In the related art, for the middle layer 300 of the multi-layer circuit board, a functional hole penetrating through the middle layer 300 is generally disposed by mechanical hole rotation. However, in machining in a mechanical hole turning manner, the hole turning tool such as a drill bit is larger in submission, so that the finally formed functional hole is larger, and further more space of the multilayer circuit board is occupied, which is not beneficial to wiring of the multilayer circuit board.
Based on this, in an embodiment of the present utility model, intermediate layer 300 is provided with first laser perforation 381 and second laser perforation 382. The first laser perforation 381 extends from the surface of the third wiring layer 31 to the second insulating layer 34, the second laser perforation 382 extends from the surface of the sixth wiring layer 37 to the second insulating layer 34, and the first laser perforation 381 communicates with the first laser perforation 381.
It will be appreciated that the first and second laser holes 381, 382 are holes made by a laser firing process, and since the laser firing does not require a mechanical drill, the apertures of the first and second laser holes 381, 382 can be made smaller, thereby allowing more space on the multi-layer circuit board for routing, facilitating miniaturization of the multi-layer circuit board. Further, since the laser burning-through process cannot burn through the multi-layer circuit layer at one time, in the embodiment of the present utility model, the first laser perforation 381 and the second laser perforation 382 are processed from different surfaces of the intermediate layer 300, or the first laser perforation 381 and the second laser perforation 382 are processed from two sides of the intermediate layer 300 respectively, so that it is ensured that the first laser perforation 381 and the second laser perforation 382 can be spliced to form a through hole penetrating through the intermediate layer 300, and the yield of the processing of the intermediate layer 300 is finally ensured.
In addition, because the apertures of the first laser perforation 381 and the second laser perforation 382 are smaller, under the condition of a certain size, more space is available on the multilayer circuit board for routing. For example, the multi-layer circuit board can be applied to a planar power supply, so that the multi-layer circuit board can be more convenient for punching and wiring of the planar power supply.
In some embodiments, the aperture of the end of first laser perforation 381 distal to second laser perforation 382 is greater than or equal to 240 microns and less than or equal to 270 microns.
For example, the aperture of the end of first laser perforation 381 distal to second laser perforation 382 may be 240 microns, 241 microns, 241.7 microns, 245 microns, 246.1 microns, 248.4 microns, 249.7 microns, 253.7 microns, 254.1 microns, 257.9 microns, 259.4 microns, 260 microns, 262.4 microns, 267.7 microns, 270 microns, or the like, as embodiments of the present utility model are not limited in this respect.
In contrast, depending on the size of the drill bit itself, the hole sites through the intermediate layer 300 typically have a diameter of greater than or equal to 400 microns if a mechanical drilling process is employed.
In some embodiments, the aperture of first laser perforation 381 near the end of second laser perforation 382 is greater than or equal to 140 microns and less than or equal to 170 microns.
For example, the aperture of first laser perforation 381 near the end of second laser perforation 382 may be 140 microns, 141 microns, 141.7 microns, 145 microns, 146.1 microns, 148.4 microns, 149.7 microns, 153.7 microns, 154.1 microns, 157.9 microns, 159.4 microns, 160 microns, 162.4 microns, 167.7 microns, 170 microns, or the like, which is not limited by the embodiments of the present utility model.
Specifically, since the first laser perforation 381 is prepared by a laser firing process, the first laser perforation 381 may be a tapered hole.
It is to be understood that the first laser holes 381 may be used to connect with the metallized holes of the corresponding circuit layer, or may be non-metallized holes used for positioning, which is not limited in the embodiment of the present utility model.
Illustratively, the first radium perforation 381 is filled with a first conductive material 391, such as conductive rubber or the like, such that the third and fourth line layers 31 and 33 may be conducted through the first conductive material 391 in the first radium perforation 381.
Alternatively, the first radium perforation 381 may also be provided with a first conductive plating 392. So that the third and fourth wiring layers 31 and 33 can be conducted through the first conductive plating 392 in the first radium perforation 381.
The foregoing is illustrative of some of the first laser perforations 381 of the present embodiments, and some of the alternative configurations of the second laser perforations 382 of the present embodiments are further illustrated and described below.
In some embodiments, the aperture of the end of second laser perforation 382 distal from first laser perforation 381 is greater than or equal to 240 microns and less than or equal to 270 microns.
For example, the aperture of the end of second laser perforation 382 distal from first laser perforation 381 may be 240 microns, 241 microns, 241.7 microns, 245 microns, 246.1 microns, 248.4 microns, 249.7 microns, 253.7 microns, 254.1 microns, 257.9 microns, 259.4 microns, 260 microns, 262.4 microns, 267.7 microns, 270 microns, or the like, as embodiments of the present utility model are not limited in this respect.
In some embodiments, the aperture of the end of second radium perforation 382 proximate to first radium perforation 381 is greater than or equal to 140 microns and less than or equal to 170 microns.
For example, the aperture of second laser perforation 382 near the end of first laser perforation 381 may be 140 microns, 141 microns, 141.7 microns, 145 microns, 146.1 microns, 148.4 microns, 149.7 microns, 153.7 microns, 154.1 microns, 157.9 microns, 159.4 microns, 160 microns, 162.4 microns, 167.7 microns, 170 microns, or the like, as embodiments of the present utility model are not limited in this respect.
Specifically, since second laser perforation 382 is fabricated by a laser firing process, second laser perforation 382 may be a tapered hole.
It is understood that the second laser holes 382 may be used to connect with the metallized holes of the corresponding circuit layer, or may be non-metallized holes used for positioning, which is not limited by the embodiment of the present utility model.
Illustratively, second radium perforation 382 is filled with a second conductive material 393, such as conductive rubber, so that fifth wire layer 35 and sixth wire layer 37 may be conducted through second conductive material 393 in second radium perforation 382.
Alternatively, please refer to fig. 2, fig. 2 is a schematic diagram illustrating a second structure of the multi-layer circuit board according to the embodiment of the present utility model. Second laser perforation 382 may also be provided with a second conductive plating 394. So that fifth wiring layer 35 and sixth wiring layer 37 may be conducted through second conductive plating 394 in second radium perforation 382.
In some embodiments, the first conductive material 391 and the second conductive material 393 may be connected, such as integrally formed, so that the third wiring layer 31, the fourth wiring layer 33, the fifth wiring layer 35, and the sixth wiring layer 37 may be electrically connected.
In some embodiments, the first conductive plating 392 and the second conductive plating 394 may be connected, such as integrally formed, so that the third wiring layer 31, the fourth wiring layer 33, the fifth wiring layer 35, and the sixth wiring layer 37 may be electrically connected.
The foregoing is illustrative and description of some of second laser perforations 382 in an embodiment of the present utility model.
The third circuit layer 31 may be made of a conductive metal material such as copper or gold, and the third circuit layer 31 may be made of a conductive material such as conductive ink, which is not limited in the embodiment of the present utility model.
The fourth circuit layer 33 may be made of a conductive metal such as copper or gold, and the third circuit layer 31 may be made of a conductive material such as conductive ink, which is not limited in the embodiment of the present utility model.
The fifth circuit layer 35 may be made of a conductive metal such as copper or gold, and the third circuit layer 31 may be made of a conductive material such as conductive ink, which is not limited in the embodiment of the present utility model.
The first insulating layer 32 may be made of an insulating material such as epoxy, fiberglass, or teflon, which is not limited in the embodiment of the present utility model.
The second insulating layer 34 may be made of an insulating material such as epoxy, fiberglass, or teflon, which is not limited in the embodiment of the present utility model.
The third insulating layer 36 may be made of an insulating material such as epoxy, fiberglass, or teflon, which is not limited in the embodiment of the present utility model.
The foregoing is a few examples and illustrations of an intermediate layer 300 in embodiments of the present utility model. In the following, the technical solution of the embodiment of the present utility model will be further illustrated by continuing to combine some structures of the first outer layer 100 and the second outer layer 200.
With continued reference to fig. 3 and fig. 4, fig. 3 is a schematic diagram of a third structure of the multi-layer circuit board according to the embodiment of the present utility model, and fig. 4 is a schematic diagram of a fourth structure of the multi-layer circuit board according to the embodiment of the present utility model. In some embodiments, the number of first wiring layers 11 is the same as the number of second wiring layers 21. That is, when the numbers of the first circuit layer 11 and the second circuit layer 21 are N, N is an integer greater than zero, the multi-layer circuit board is a multi-layer structure of n+4+n. For example, when N is equal to 1, a multi-layer circuit board may be understood as a six-layer circuit board; as shown in fig. 1 and 2, when N is equal to 2, the multi-layer circuit board can be understood as an eight-layer circuit board; as shown in fig. 3 and 4, when N is equal to 3, the multi-layered circuit board can be understood as a ten-layered circuit board.
In some embodiments, when N is equal to 3, the aperture of the end of the first radium perforation 381 distal to the second radium perforation 382 is 250 microns, the aperture of the end of the first radium perforation 381 proximal to the second radium perforation 382 is 150 microns, the aperture of the end of the second radium perforation 382 distal to the first radium perforation 381 is 250 microns, and the aperture of the end of the second radium perforation 382 proximal to the first radium perforation 381 is 150 microns, which may result in an LLC test yield of the multi-layer circuit board of 95% or more.
In some embodiments, when N is equal to 2, the aperture of the end of the first radium perforation 381 distal to the second radium perforation 382 is 260 microns, the aperture of the end of the first radium perforation 381 proximal to the second radium perforation 382 is 160 microns, the aperture of the end of the second radium perforation 382 distal to the first radium perforation 381 is 260 microns, and the aperture of the end of the second radium perforation 382 proximal to the first radium perforation 381 is 160 microns, which may result in an LLC test yield of the multi-layer circuit board of 100% or more.
In some embodiments, the total thickness of the multilayer circuit board is less than 0.72 millimeters. Therefore, by controlling the total thickness of the multi-layer circuit board, the thickness of the intermediate layer 300 can be ensured, so as to avoid the situation that the first laser perforation 381 and the second laser perforation 382 are not burnt in place and are not communicated due to the excessively thick intermediate layer 300.
Specifically, the total thickness of the multilayer circuit board may be less than or equal to 0.7 millimeters. For example, the total thickness of the multi-layer circuit board may be 0.7 mm, 0.67 mm, 0.61 mm, or 0.57 mm, etc., which is not limited by the embodiment of the present utility model.
The technical scheme of the embodiment of the utility model is further explained and illustrated by one of the processing flows of the multilayer circuit board.
A first step of preparing a third wiring layer 31 and a fourth wiring layer 33 on both sides of the first insulating layer 32, respectively, and preparing a fifth wiring layer 35 and a sixth wiring layer 37 on both sides of the third insulating layer 36, respectively; second, the first insulating layer 32, the second insulating layer 34 and the third insulating layer 36 are laminated to form an intermediate layer 300; next, the intermediate layer 300 is subjected to a blackening process; third, first laser perforation 381 and second laser perforation 382 are fabricated by a laser firing process; fourth, electroplating the inner walls of the first and second laser holes 381, 382 to form first and second conductive coatings 392, 394, or filling conductive materials into the first and second laser holes 381, 382 to form first and second conductive materials 391, 393; fifth, the first outer layer 100 and the second outer layer 200 are prepared on the surface of the intermediate layer 300.
In the step of manufacturing the first laser perforation 381 and the second laser perforation 382 through the laser firing process, the positioning may be performed by adopting a CCD imaging manner, so as to improve the position accuracy of the first laser perforation 381 and the second laser perforation 382.
It will also be appreciated that embodiments of the present utility model may save processing time for a multilayer circuit board by 8 hours and reduce processing costs by 3% to 4% compared to using mechanical drilling to replace the first and second laser holes 381, 382.
It can be understood that based on the multi-layer circuit board with the structure, the AOI test yield of each circuit layer is more than 93%, and parameters such as LLC test yield, impedance, resistance and high temperature resistance of each circuit layer can reach the standard.
And, compared with the mechanical drilling to replace the first laser perforation 381 and the second laser perforation 382, the high-frequency insertion loss corresponding to the embodiment of the utility model is smaller.
In some embodiments, the first outer layer 100 may further include a fourth insulating layer 12. A fourth insulating layer 12 is interposed between two adjacent first wiring layers 11. And the first outer layer 100 is closely adhered to the third wiring layer 31 through a fourth insulating layer 12.
The first circuit layer 11 may be made of a conductive metal material such as copper or gold, and the first circuit layer 11 may also be made of a conductive material such as conductive ink, which is not limited in the embodiment of the present utility model.
The fourth insulating layer 12 may be made of an insulating material such as epoxy, fiberglass, or teflon, which is not limited in the embodiment of the present utility model.
In some embodiments, the adjacent first line layer 11 or the first line layer 11 and the third line layer 31 may be electrically connected through the first via 13.
In some embodiments, the second outer layer 200 may further include a fifth insulating layer 22. A fifth insulating layer 22 is interposed between two adjacent second wiring layers 21. And the second outer layer 200 is closely adhered to the sixth wiring layer 37 through a fifth insulating layer 22.
The second circuit layer 21 may be made of a conductive metal material such as copper or gold, and the second circuit layer 21 may also be made of a conductive material such as conductive ink, which is not limited in the embodiment of the present utility model.
The fifth insulating layer 22 may be made of an insulating material such as epoxy, fiberglass, or teflon, which is not limited in the embodiment of the present utility model.
In some embodiments, the electrical connection between the adjacent second wiring layer 21 or the second wiring layer 21 and the sixth wiring layer 37 may be achieved through the second via 23.
The embodiment of the utility model also provides electronic equipment which can contain the multilayer circuit board. Since the volume of the above-described multilayer circuit board can be made smaller, the volume of the electronic device can also be made more compact.
The multi-layer circuit board and the electronic device provided by the embodiments of the present utility model are described in detail, and specific examples are applied to illustrate the principles and embodiments of the present utility model, and the description of the above embodiments is only used to help understand the method and core idea of the present utility model; meanwhile, as those skilled in the art will vary in the specific embodiments and application scope according to the ideas of the present utility model, the present description should not be construed as limiting the present utility model in summary.
Claims (10)
1. A multilayer circuit board, comprising:
a first outer layer comprising at least one first circuit layer;
the second outer layer is arranged at intervals with the first outer layer, and comprises at least one second circuit layer; and
the intermediate layer comprises a third circuit layer, a first insulating layer, a fourth circuit layer, a second insulating layer, a fifth circuit layer, a third insulating layer and a sixth circuit layer which are sequentially stacked, wherein the third circuit layer is tightly attached to the first outer layer, and the sixth circuit layer is tightly attached to the second outer layer;
the intermediate layer is provided with a first laser perforation and a second laser perforation, the first laser perforation extends from the surface of the third circuit layer to the second insulating layer, the second laser perforation extends from the surface of the sixth circuit layer to the second insulating layer, and the first laser perforation is communicated with the first laser perforation.
2. The circuit board of claim 1, wherein an aperture of an end of the first laser hole remote from the second laser hole is greater than or equal to 240 microns and less than or equal to 270 microns.
3. The circuit board of claim 2, wherein an aperture of an end of the first laser hole proximate to the second laser hole is greater than or equal to 140 microns and less than or equal to 170 microns.
4. The circuit board of claim 1, wherein the circuit board is configured to,
the first radium perforation is filled with a first conductive material; or alternatively
The inner wall of the first radium perforation is provided with a first conductive coating.
5. The circuit board of any one of claims 1 to 4, wherein an aperture of an end of the second laser aperture remote from the first laser aperture is greater than or equal to 240 microns and less than or equal to 270 microns.
6. The circuit board of claim 5, wherein an aperture of the second laser hole near an end of the first laser hole is greater than or equal to 140 microns and less than or equal to 170 microns.
7. The circuit board of claim 1, wherein the circuit board is configured to,
the second radium perforation is filled with a second conductive material; or alternatively
And a second conductive coating is arranged on the inner wall of the second laser perforation.
8. The circuit board of claim 1, wherein the number of first circuit layers is the same as the number of second circuit layers.
9. The circuit board of claim 8, wherein the total thickness of the multilayer circuit board is less than or equal to 0.7 millimeters.
10. An electronic device comprising a circuit board according to any one of claims 1 to 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202321577984.0U CN220173481U (en) | 2023-06-19 | 2023-06-19 | Multilayer circuit board and electronic equipment |
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Application Number | Priority Date | Filing Date | Title |
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CN202321577984.0U CN220173481U (en) | 2023-06-19 | 2023-06-19 | Multilayer circuit board and electronic equipment |
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CN220173481U true CN220173481U (en) | 2023-12-12 |
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CN202321577984.0U Active CN220173481U (en) | 2023-06-19 | 2023-06-19 | Multilayer circuit board and electronic equipment |
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2023
- 2023-06-19 CN CN202321577984.0U patent/CN220173481U/en active Active
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