WO2021169284A1 - 一种Redriver芯片编码误改写监控系统及方法 - Google Patents

一种Redriver芯片编码误改写监控系统及方法 Download PDF

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WO2021169284A1
WO2021169284A1 PCT/CN2020/118306 CN2020118306W WO2021169284A1 WO 2021169284 A1 WO2021169284 A1 WO 2021169284A1 CN 2020118306 W CN2020118306 W CN 2020118306W WO 2021169284 A1 WO2021169284 A1 WO 2021169284A1
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smbus
chip
redriver
adc
controller
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PCT/CN2020/118306
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English (en)
French (fr)
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郭晓宇
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苏州浪潮智能科技有限公司
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Priority to US17/780,351 priority Critical patent/US11650872B2/en
Publication of WO2021169284A1 publication Critical patent/WO2021169284A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0787—Storage of error reports, e.g. persistent data storage, storage using memory protection
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1433—Saving, restoring, recovering or retrying at system level during software upgrading

Definitions

  • the invention relates to the technical field of signal transmission, and in particular to a monitoring system and method for rewriting errors of Redriver chip codes.
  • the Redriver chip There are three ways to set the parameters of the Redriver chip. The first is Pin mode, which is used to set the parameters through external pull-ups and pulls; the second is SMbus mode, which is controlled by the host through SMbus (system management bus); the third is It is EEPROM mode. Burn the required parameters in the EEPROM code. Each time the Redriver chip is powered on, the respective parameter information is loaded from the EEPROM. Using EEPROM, multiple Redriver chips can be configured at the same time without additional control. It is widely used for control.
  • the Redriver chip is connected to the controller to facilitate configuration through SMbus.
  • SMbus mode and EEPROM mode are compatible with each other.
  • the Redriver chip is used as SMbus Master mode to load parameter information from the EEPROM, and it will automatically convert to SMbus Slave mode.
  • the system controller can configure the Redriver. Therefore, after power-on for a period of time, the system's SMbus control The device cannot configure Redriver. In the absence of the SMbus monitoring mechanism in the normal operation of the system, there is a risk that the EEPROM or Redriver may be incorrectly rewritten by the system controller.
  • the purpose of the present invention is to provide a Redriver chip coding error rewrite monitoring system and method, which aims to solve the problem that the prior art lacks a monitoring mechanism for the SMbus bus, and the system controller easily causes the risk of error rewriting to the Redriver or EEPROM, and realizes real-time Monitor the risk of incorrect rewriting and improve the reliability of SMbus bus data.
  • the present invention provides a Redriver chip coding error rewriting monitoring system, the specific structure of the system is as follows:
  • Redriver chip is connected with EEPROM through SMbus bus;
  • the Redriver chip and the EEPROM are connected to the SMbus controller via the Switch chip, and a pull-up resistor is provided between the SMbus bus and the Switch chip;
  • the SMbus bus is also connected with an ADC, and the SMbus bus voltage is monitored through the ADC.
  • the SMbus bus is in a high level state.
  • the ADC monitoring voltage range is set to 2.8V to 3.5V.
  • the SMbus controller and the ADC are also connected through the SMbus bus, and the SMbus bus data is monitored through the ADC.
  • the present invention also provides a Redriver chip coding error rewriting monitoring method implemented by the system, and the method includes the following operations:
  • the Switch chip is in the off state, the SMbus bus is pulled up to a high level, the abnormal level is collected through the ADC, and an alarm signal is issued;
  • the Redriver chip sends an ALL_DONE signal to the SMbus controller, and the SMbus controller sends an enable signal to the Switch chip, turns on the Switch, and the SMbus controller accesses data to the Redriver chip and EEPROM, and shields the ADC alarm signal.
  • the alarm information issued by the ADC shielded by the SMbus controller is included in the system log.
  • the SMbus controller forcibly shuts down the Switch chip after receiving an alarm signal.
  • the SMbus controller receives the alarm signal and loads the ADC sampling data in real time through the SMbus bus during the shutdown period of the Switch chip, and counts it into the system after parsing Log.
  • the present invention monitors whether the EEPROM code of the Redriver chip is incorrectly rewritten through the ADC, uses the Switch chip to isolate the Redriver chip from the system SMbus controller, and uses a pull-up resistor to maintain the SMbus bus on the Redriver chip/EEPROM side Pull up, use the ADC to monitor the SMbus bus. When an abnormal low level is detected, an alarm signal is sent to the system SMbus controller to alarm the risk of incorrect rewriting.
  • the SMbus bus can also be connected between the SMbus controller and the high sampling rate ADC to monitor SMbus bus data.
  • Fig. 1 is a block diagram of a system for monitoring code error rewriting of a Redriver chip provided in an embodiment of the present invention
  • FIG. 2 is a block diagram of a Redriver chip code error rewriting monitoring system using a high sampling rate ADC provided in an embodiment of the present invention.
  • the present invention discloses a Redriver chip coding error rewriting monitoring system, the specific structure of the system is as follows:
  • Redriver chip is connected with EEPROM through SMbus bus;
  • the Redriver chip and the EEPROM are connected to the SMbus controller via the Switch chip, and a pull-up resistor is provided between the SMbus bus and the Switch chip;
  • the SMbus bus is also connected with an ADC, and the SMbus bus voltage is monitored through the ADC.
  • the ADC analog to digital converter
  • the Switch chip monitors whether the EEPROM code of the Redriver chip has been incorrectly rewritten, and the Switch chip is used to isolate the Redriver chip from the system SMbus controller, and the Redriver chip/EEPROM side SMbus bus remains up.
  • the SMbus bus is monitored through ADC, and when an abnormal low level is detected, an alarm signal is sent to the system SMbus controller to remind the Redriver chip that there is a risk of being overwritten by mistake.
  • the Redriver chip sets the parameter information from the EEPROM through SMbus. After loading, the ALL_DONE signal is sent to the SMbus controller, and the Redriver chip becomes the SMbus Slave mode.
  • the SMbus controller is not allowed to turn on the Switch chip before receiving the ALL_DONE signal to avoid bus competition.
  • the Switch chip is turned off, the SMbus bus is pulled up to a high level, and the ADC starts to monitor the voltage on the SMbus data line. When an abnormal voltage is detected, it will send an alarm to the controller through an alarm signal.
  • the SMbus controller After receiving the ALL_DONE signal, the SMbus controller can send the Enable signal to turn on the Switch chip according to the system needs, access the data in the Redriver chip and EEPROM, and read/write the data. During the period when the SMbus controller receives the system demand and turns on the Switch chip , The SMbus controller shields the alarm information sent by the ADC, but it is still included in the system log. In other cases, the SMbus controller forcibly closes the Switch chip after receiving the alarm signal and records it in the system log.
  • the embodiment of the present invention also discloses a method for monitoring wrong coding rewriting of a Redriver chip, and the method includes the following operations:
  • the Switch chip is in the off state, the SMbus bus is pulled up to a high level, the abnormal level is collected through the ADC, and an alarm signal is issued;
  • the Redriver chip sends an ALL_DONE signal to the SMbus controller, and the SMbus controller sends an enable signal to the Switch chip, turns on the Switch, and the SMbus controller accesses data to the Redriver chip and EEPROM, and shields the ADC alarm signal.
  • the present invention discloses a Redriver chip coding error rewriting monitoring system, the specific structure of the system is as follows:
  • Redriver chip is connected with EEPROM through SMbus1 bus;
  • the Redriver chip and the EEPROM are connected to the SMbus controller via the Switch chip, and a pull-up resistor is provided between the SMbus bus and the Switch chip;
  • the SMbus bus is also connected with an ADC, and the SMbus bus voltage is monitored through the ADC;
  • the SMbus controller and ADC are connected through the SMbus2 bus.
  • the embodiment of the present invention uses ADC to monitor whether the EEPROM code of the Redriver chip has been rewritten by mistake, and uses the Switch chip to isolate the Redriver chip from the system SMbus controller. When it reaches an abnormally low level, an alarm signal is sent to the system SMbus controller to remind the Redriver chip that there is a risk of being overwritten by mistake.
  • the SMbus2 bus is connected between the SMbus controller and the high sampling rate ADC.
  • the SMbus controller can read the monitoring data from the ADC in real time and analyze it through SMbus2. Then the monitoring of SMbus1 bus data can be realized.
  • the ADC sampling frequency is at least twice the rate of SMbus1.
  • the SMbus controller is connected to the high sampling rate ADC through the SMbus2 bus and pulled up to 3.3V, where the SMbus1 rate is 100K/S, the SMbus2 rate is 400K/S, and the ADC sampling rate is designed to be 400KHz.
  • the Redriver chip sets the parameter information from the EEPROM through SMbus. After loading, the ALL_DONE signal is sent to the SMbus controller, and the Redriver chip becomes the SMbus Slave mode.
  • the SMbus controller is not allowed to turn on the Switch chip before receiving the ALL_DONE signal to avoid bus competition.
  • the Switch chip is turned off, the SMbus bus is pulled up to a high level, and the ADC starts to monitor the SMbus data and CLK (CLOCK) voltage at the same time. When an abnormal voltage is detected, it will alarm the controller through an alarm signal.
  • the SMbus controller After receiving the ALL_DONE signal, the SMbus controller can send the Enable signal to turn on the Switch chip according to the system needs, access the data in the Redriver chip and EEPROM, and read/write the data. During the period when the SMbus controller receives the system demand and turns on the Switch chip , SMbus controller shields the alarm information sent by ADC, but it is still included in the system log. In other cases, after receiving the alarm signal, the SMbus controller loads the ADC sampling data in real time through the SMbus2 bus, and parses it and includes it in the system log.
  • the embodiment of the present invention also discloses a method for monitoring wrong coding rewriting of a Redriver chip, and the method includes the following operations:
  • the Switch chip is in the off state, the SMbus bus is pulled up to a high level, the abnormal level is collected through the ADC, and an alarm signal is sent;
  • the Redriver chip sends an ALL_DONE signal to the SMbus controller, and the SMbus controller sends an enable signal to the Switch chip, turns on the Switch, and the SMbus controller accesses data to the Redriver chip and EEPROM, and shields the ADC alarm signal.
  • the Redriver chip coding error rewriting monitoring system described in Embodiments 1 and 2 can be used to monitor whether the Redriver chip EEPROM code has been incorrectly rewritten through the ADC, and the Switch chip is used to isolate the Redriver chip from the system SMbus controller. , Keep the SMbus bus on the Redriver chip/EEPROM side pulled up through a pull-up resistor, and use ADC to monitor the SMbus bus. When an abnormal low level is detected, an alarm signal is sent to the system SMbus controller to alarm the risk of incorrect overwriting.
  • the SMbus bus can also be connected between the SMbus controller and the high sampling rate ADC to monitor SMbus bus data.

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Abstract

一种Redriver芯片编码误改写监控系统及方法，通过ADC对Redriver芯片EEPROM编码是否被误改写进行监控，利用Switch芯片将Redriver芯片与系统SMbus控制器进行隔离，通过上拉电阻将Redriver芯片/EEPROM端的SMbus总线保持上拉，利用ADC对SMbus总线进行监控，当监测到异常低电平时，即向系统SMbus控制器发出报警信号，对误改写风险进行报警。另外根据ADC采样率的不同，还可在SMbus控制器与高采样率ADC之间连接SMbus总线，实现对SMbus总线数据进行监测。

Description

一种Redriver芯片编码误改写监控系统及方法
本申请要求于2020年2月29日提交中国专利局、申请号为202010132976.X、发明名称为“一种Redriver芯片编码误改写监控系统及方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及信号传输技术领域，具体涉及一种Redriver芯片编码误改写监控系统及方法。
背景技术
在服务器领域，CPU需要与终端硬盘等设备进行频繁的信息交互，PCIe/SATA/SAS等协议都是使用较为普遍的高速信号传输协议。但是对于一些尺寸较大的服务器产品，因CPU与硬盘设备距离较远，可能会存在因链路超长而带来的信号质量下降问题。业界通用的解决方案有两种，一种是用Redriver(讯号中继器)芯片进行信号质量加强，一种是利用Retimer进行信号质量加强。其中Redriver不需要参考时钟，设计人员只需要对其进行相应的参数设置即可实现信号质量加强，硬件设计较为简单。
对于Redriver芯片的参数设置方式有三种，第一种是Pin模式，通过外部的上下拉进行参数设定；第二种是SMbus模式，通过SMbus(系统管理总线)由主机端进行控制；第三种是EEPROM模式，将所需要的参数烧录在EEPROM编码中，每次Redriver芯片上电后从EEPROM中加载各自的参数信息，采用EEPROM可以同时对多个Redriver芯片进行配置，且不需要额外的控制器进行控制，应用比较广泛。
但是采用EEPROM对Redriver芯片进行配置时，由于某些调试或远程升级EEPROM编码的需求，又会将Redriver芯片连接至控制器，便于通过SMbus进行配置，SMbus模式与EEPROM模式可以彼此兼容。每次上电后，Redriver芯片作为SMbus Master模式从EEPROM里面加载参数信息后会自动转化为SMbus Slave模式，此时系统控制器才能对Redriver进行配置，故在上电后一段时间，系统的SMbus控制器不能对Redriver进行配置。而在系统正常运行状态下缺乏SMbus的监控机制，存在系统控制器对EEPROM或 Redriver误改写的风险。
发明内容
本发明的目的是提供一种Redriver芯片编码误改写监控系统及方法，旨在解决现有技术中缺乏对SMbus总线的监控机制，系统控制器对Redriver或EEPROM容易造成误改写风险的问题，实现实时监测误改写风险，提高SMbus总线数据可靠性。
为达到上述技术目的，本发明提供了一种Redriver芯片编码误改写监控系统，所述系统具体结构如下：
Redriver芯片通过SMbus总线与EEPROM连接；
所述Redriver芯片与EEPROM一同经过Switch芯片连接至SMbus控制器，在SMbus总线与Switch芯片之间设置有上拉电阻；
所述SMbus总线还连接有ADC，通过ADC监控SMbus总线电压。
优选地，所述Switch芯片关闭期间，SMbus总线处于高电平状态。
优选地，所述ADC监测电压范围设置为2.8V至3.5V。
优选地，所述SMbus控制器与ADC之间还通过SMbus总线连接，通过ADC监测SMbus总线数据。
本发明还提供了一种利用所述系统实现的Redriver芯片编码误改写监控方法，所述方法包括以下操作：
通过引脚将Redriver芯片设置为SMbus模式，在系统上电后，Redriver芯片从EEPROM中加载参数信息，将Redriver芯片转为SMbus Slave模式；
Switch芯片处于关闭状态，SMbus总线上拉至高电平，通过ADC采集异常电平，发出报警信号；
Redriver芯片发送ALL_DONE信号至SMbus控制器，SMbus控制器发送使能信号至Switch芯片，将Switch打开，SMbus控制器对Redriver芯片以及EEPROM进行数据访问，并屏蔽ADC报警信号。
优选地，所述Switch芯片在打开期间，SMbus控制器屏蔽的ADC发出的报警信息被计入系统日志中。
优选地，所述Switch芯片在关闭期间，SMbus控制器收到报警信号后 强制关闭Switch芯片。
优选地，当所述SMbus控制器与ADC之间通过SMbus总线连接时，所述Switch芯片在关闭期间，SMbus控制器收到报警信号后通过SMbus总线将ADC采样数据实时加载，解析后计入系统日志。
发明内容中提供的效果仅仅是实施例的效果，而不是发明所有的全部效果，上述技术方案中的一个技术方案具有如下优点或有益效果：
与现有技术相比，本发明通过ADC对Redriver芯片EEPROM编码是否被误改写进行监控，利用Switch芯片将Redriver芯片与系统SMbus控制器进行隔离，通过上拉电阻将Redriver芯片/EEPROM端的SMbus总线保持上拉，利用ADC对SMbus总线进行监控，当监测到异常低电平时，即向系统SMbus控制器发出报警信号，对误改写风险进行报警。另外根据ADC采样率的不同，还可在SMbus控制器与高采样率ADC之间连接SMbus总线，实现对SMbus总线数据进行监测。
上述说明仅是本发明技术方案的概述，为了能够更清楚了解本发明的技术手段，而可依照说明书的内容予以实施，并且为了让本发明的上述和其它目的、特征和优点能够更明显易懂，以下特举本发明的具体实施方式。
附图说明
通过阅读下文优选实施方式的详细描述，各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的，而并不认为是对本发明的限制。而且在整个附图中，用相同的参考符号表示相同的部件。在附图中：
图1为本发明实施例中所提供的一种Redriver芯片编码误改写监控系统框图；
图2为本发明实施例中所提供的一种采用高采样率ADC的Redriver芯片编码误改写监控系统框图。
具体实施方式
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例，然而应当理解，可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反，提供这些实施例是为了能够更透彻地理解本公开，并且能够将本公开的范围完整的传达给本领域的技术人员。
下面结合附图对本发明实施例所提供的一种Redriver芯片编码误改写监控系统及方法进行详细说明。
实施例1
如图1所示，本发明公开了一种Redriver芯片编码误改写监控系统，所述系统具体结构如下：
Redriver芯片通过SMbus总线与EEPROM连接；
所述Redriver芯片与EEPROM一同经过Switch芯片连接至SMbus控制器，在SMbus总线与Switch芯片之间设置有上拉电阻；
所述SMbus总线还连接有ADC，通过ADC监控SMbus总线电压。
本发明实施例通过ADC(analog to digital converter，模数转换器)监测Redriver芯片EEPROM编码是否被误改写，利用Switch芯片将Redriver芯片与系统SMbus控制器进行隔离，Redriver芯片/EEPROM端SMbus总线保持上位，通过ADC对SMbus总线进行监控，当检测到异常低电平时，向系统SMbus控制器发出报警信号，提示Redriver芯片存在被误改写风险。
按照图1所示设计线路，将Redriver芯片与EEPROM通过SMbus连接，并一同经过Switch芯片连接至SMbus控制器，Switch芯片默认为关闭状态，SMbus总线在Switch芯片与SMbus中间上拉至3.3V。
通过引脚将Redriver芯片设置为SMbus模式，并为ADC正常监测电压范围设置为2.8V至3.5V。系统上电后Redriver芯片通过SMbus自EEPROM中加载参数信息，加载结束后发出ALL_DONE信号至SMbus控制器，Redriver芯片变为SMbus Slave模式。SMbus控制器在收到ALL_DONE信号之前不允许将Switch芯片打开，以免出现总线竞争。在Switch芯片关闭期间，SMbus总线上拉至高电平，ADC开始监控SMbus数据线上电压，当监测到异常电压时，即会通过报警信号对控制器进行报 警。
收到ALL_DONE信号后，SMbus控制器可根据系统需要发出Enable信号打开Switch芯片，访问Redriver芯片与EEPROM中的数据，对数据进行读取/写入，在SMbus控制器收到系统需求打开Switch芯片期间，SMbus控制器屏蔽ADC发出的报警信息，但依旧计入系统日志中，其余情况下，SMbus控制器收到报警信号后强制关闭Switch芯片并计入系统日志。
本发明实施例还公开了一种Redriver芯片编码误改写监控方法，所述方法包括以下操作：
通过引脚将Redriver芯片设置为SMbus模式，在系统上电后，Redriver芯片从EEPROM中加载参数信息，将Redriver芯片转为SMbus Slave模式；
Switch芯片处于关闭状态，SMbus总线上拉至高电平，通过ADC采集异常电平，发出报警信号；
Redriver芯片发送ALL_DONE信号至SMbus控制器，SMbus控制器发送使能信号至Switch芯片，将Switch打开，SMbus控制器对Redriver芯片以及EEPROM进行数据访问，并屏蔽ADC报警信号。
实施例2
如图2所示，本发明公开了一种Redriver芯片编码误改写监控系统，所述系统具体结构如下：
Redriver芯片通过SMbus1总线与EEPROM连接；
所述Redriver芯片与EEPROM一同经过Switch芯片连接至SMbus控制器，在SMbus总线与Switch芯片之间设置有上拉电阻；
所述SMbus总线还连接有ADC，通过ADC监控SMbus总线电压；
所述SMbus控制器与ADC之间通过SMbus2总线连接。
本发明实施例通过ADC监测Redriver芯片EEPROM编码是否被误改写，利用Switch芯片将Redriver芯片与系统SMbus控制器进行隔离，Redriver芯片/EEPROM端SMbus总线保持上位，通过ADC对SMbus总线进行监控，当检测到异常低电平时，向系统SMbus控制器发出报警信号，提示Redriver芯片存在被误改写风险。
按照图2所示设计线路，将Redriver芯片与EEPROM通过SMbus1总线连接，并一同经过Switch芯片连接SMbus控制器。Switch芯片在默认状态下为关闭状态，SMbus总线在Switch芯片与SMbus中间上拉至3.3V。
由于当ADC采样率足够高时，可以对SMbus总线数据进行监测，在SMbus控制器与高采样率ADC之间连接SMbus2总线，SMbus控制器可通过SMbus2从ADC中实时读取监测数据并进行解析，即可实现对SMbus1总线数据的监测，此时ADC采样频率至少为SMbus1速率的两倍。在本实施例中将SMbus控制器通过SMbus2总线与高采样率ADC相连，上拉至3.3V，其中SMbus1速率为100K/S，SMbus2速率为400K/S，ADC采样率设计为400KHz。
通过引脚将Redriver芯片设置为SMbus模式，并为ADC正常监测电压范围设置为2.8V至3.5V。系统上电后Redriver芯片通过SMbus自EEPROM中加载参数信息，加载结束后发出ALL_DONE信号至SMbus控制器，Redriver芯片变为SMbus Slave模式。SMbus控制器在收到ALL_DONE信号之前不允许将Switch芯片打开，以免出现总线竞争。在Switch芯片关闭期间，SMbus总线上拉至高电平，ADC开始同时监控SMbus数据与CLK(CLOCK，时钟脉冲)电压，当监测到异常电压时，即会通过报警信号对控制器进行报警。
收到ALL_DONE信号后，SMbus控制器可根据系统需要发出Enable信号打开Switch芯片，访问Redriver芯片与EEPROM中的数据，对数据进行读取/写入，在SMbus控制器收到系统需求打开Switch芯片期间，SMbus控制器屏蔽ADC发出的报警信息，但依旧计入系统日志中，其余情况下，SMbus控制器收到报警信号后通过SMbus2总线将ADC采样数据实时加载，解析后计入系统日志。
本发明实施例还公开了一种Redriver芯片编码误改写监控方法，所述方法包括以下操作：
通过引脚将Redriver芯片设置为SMbus模式，在系统上电后，Redriver芯片从EEPROM中加载参数信息，将Redriver芯片转为SMbus Slave模式；
Switch芯片处于关闭状态，SMbus总线上拉至高电平，通过ADC采 集异常电平，发出报警信号；
Redriver芯片发送ALL_DONE信号至SMbus控制器，SMbus控制器发送使能信号至Switch芯片，将Switch打开，SMbus控制器对Redriver芯片以及EEPROM进行数据访问，并屏蔽ADC报警信号。
由上所述，通过实施例1、2中所述Redriver芯片编码误改写监控系统可实现通过ADC对Redriver芯片EEPROM编码是否被误改写进行监控，利用Switch芯片将Redriver芯片与系统SMbus控制器进行隔离，通过上拉电阻将Redriver芯片/EEPROM端的SMbus总线保持上拉，利用ADC对SMbus总线进行监控，当监测到异常低电平时，即向系统SMbus控制器发出报警信号，对误改写风险进行报警。另外根据ADC采样率的不同，还可在SMbus控制器与高采样率ADC之间连接SMbus总线，实现对SMbus总线数据进行监测。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (9)

  1. 一种Redriver芯片编码误改写监控系统，其特征在于，所述系统具体结构如下：
    Redriver芯片通过SMbus总线与EEPROM连接；
    所述Redriver芯片与EEPROM一同经过Switch芯片连接至SMbus控制器，在SMbus总线与Switch芯片之间设置有上拉电阻；
    所述SMbus总线还连接有ADC，通过ADC监控SMbus总线电压，当SMbus总线电压为低电平时，Redriver芯片编码存在误改写。
  2. 根据权利要求1所述的一种Redriver芯片编码误改写监控系统，其特征在于，所述Switch芯片关闭期间，SMbus总线处于高电平状态。
  3. 根据权利要求1所述的一种Redriver芯片编码误改写监控系统，其特征在于，所述ADC监测电压范围设置为2.8V至3.5V。
  4. 根据权利要求1所述的一种Redriver芯片编码误改写监控系统，其特征在于，所述SMbus控制器与ADC之间还通过SMbus总线连接，通过ADC监测SMbus总线数据。
  5. 一种利用权利要求1-4任意一项所述系统实现的Redriver芯片编码误改写监控方法，其特征在于，所述方法包括以下操作：
    通过引脚将Redriver芯片设置为SMbus模式，在系统上电后，Redriver芯片从EEPROM中加载参数信息，将Redriver芯片转为SMbus Slave模式；
    Switch芯片处于关闭状态，SMbus总线上拉至高电平，通过ADC采集SMbus总线电压，当SMbus总线电压为低电平时，Redriver芯片编码存在误改写，向SMbus控制器发出报警信号。
  6. 根据权利要求5所述的Redriver芯片编码误改写监控方法，其特征在于，所述Redriver芯片加载参数信息后，发送ALL_DONE信号至SMbus控制器，SMbus控制器发送使能信号至Switch芯片，将Switch打开，SMbus控制器对Redriver芯片以及EEPROM进行数据访问，并屏蔽ADC报警信号。
  7. 根据权利要求5所述的Redriver芯片编码误改写监控方法，其特征在于，所述Switch芯片在打开期间，SMbus控制器屏蔽的ADC发出的报 警信息被计入系统日志中。
  8. 根据权利要求5所述的Redriver芯片编码误改写监控方法，其特征在于，所述Switch芯片在关闭期间，SMbus控制器收到报警信号后强制关闭Switch芯片。
  9. 根据权利要求5所述的Redriver芯片编码误改写监控方法，其特征在于，当所述SMbus控制器与ADC之间通过SMbus总线连接时，所述Switch芯片在关闭期间，SMbus控制器收到报警信号后通过SMbus总线将ADC采样数据实时加载，解析后计入系统日志。
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