WO2021168907A1 - 一种伺服驱动器及其缓冲回路保护电路 - Google Patents

一种伺服驱动器及其缓冲回路保护电路 Download PDF

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Publication number
WO2021168907A1
WO2021168907A1 PCT/CN2020/078520 CN2020078520W WO2021168907A1 WO 2021168907 A1 WO2021168907 A1 WO 2021168907A1 CN 2020078520 W CN2020078520 W CN 2020078520W WO 2021168907 A1 WO2021168907 A1 WO 2021168907A1
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Prior art keywords
buffer
circuit
pin
protection circuit
photocoupler
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PCT/CN2020/078520
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English (en)
French (fr)
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王存
屈江民
陈建权
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浙江禾川科技股份有限公司
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Publication of WO2021168907A1 publication Critical patent/WO2021168907A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/327—Testing of circuit interrupters, switches or circuit-breakers

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  • the invention relates to the field of circuit protection, in particular to a buffer loop protection circuit, and the invention also relates to a servo drive.
  • the main circuit of a servo drive or inverter usually includes a buffer circuit and an energy storage capacitor connected to the buffer circuit.
  • the energy storage capacitor can store DC power and provide stable DC power to the back-end load.
  • the buffer circuit includes a buffer resistor.
  • the controllable switch connected in parallel with the buffer resistor. At the moment of power-on, because the energy storage capacitor is equivalent to a short circuit, the controllable switch can be controlled to be in the off state at the moment of power-on. At this time, the buffer resistor can be used in the charging process of the energy storage capacitor.
  • the controllable switch can be controlled to close after the power of the energy storage capacitor reaches a certain level to short-circuit the buffer resistor. On the one hand, it can prevent the buffer resistor from continuously consuming power, and on the other hand, it can also Protect the snubber resistor.
  • controllable switch has the possibility of failure.
  • the controllable switch fails, the user cannot know it. This will cause the snubber resistor to be continuously connected to the charging circuit of the energy storage capacitor, which not only consumes a lot of electric energy, but also reduces The service life of the snubber resistor has the risk of further expansion of the fault.
  • the present invention provides a buffer loop protection circuit, including:
  • the voltage detection module connected to the buffer circuit is used to detect the voltage value at both ends of the buffer circuit
  • a processing device connected to the voltage detection module is used to control a prompter to prompt a controllable switch failure in the buffer loop when the power-on time reaches a preset time period and the voltage value is higher than a preset threshold;
  • the reminder connected to the processing device.
  • the processing device includes:
  • the input terminal is respectively connected to the input terminal of the buffer circuit and the protection circuit connected to the output terminal of the buffer circuit for preprocessing the voltage at both ends of the buffer circuit, so as to protect the photocoupler;
  • Both the first pin and the second pin are connected to the output terminal of the protection circuit, and the photocoupler whose third pin is grounded is used to conduct itself when the voltage value is higher than the preset threshold
  • the potential pull-up modules respectively connected to the fourth pin of the photocoupler and the detection terminal of the processor are used to turn on the third pin and the fourth pin of the photocoupler when the The detection terminal of the processor is set to a high potential;
  • the processor is configured to control the prompter to prompt the controllable switch in the buffer loop to fail when the low potential is detected at the detection terminal of the processor.
  • the protection circuit includes:
  • the first terminal is connected to the input terminal of the buffer circuit, and the second terminal is connected to the first input terminal of the rectifier circuit.
  • the first current limiting resistor is used to limit the current in the circuit;
  • the first terminal is connected to the output terminal of the buffer circuit, and the second terminal is connected to the second input terminal of the rectifier circuit, and a second current limiting resistor is used to limit the current in the circuit;
  • the first output terminal is connected to the first pin of the photocoupler, and the second output terminal is connected to the second pin of the photocoupler.
  • the rectifier circuit is used to filter out the AC component in the loop. Used to provide a higher reverse breakdown voltage to protect the optocoupler.
  • the rectifier circuit is a half-wave rectifier circuit.
  • the processing device further includes:
  • the capacitor connected in parallel between the third pin and the fourth pin of the photocoupler is used to filter the electrical signal output by the photocoupler, which is convenient for the processor to process.
  • the potential pull-up module includes:
  • the first end is respectively connected to the fourth pin of the photocoupler and the detection end of the processor, and the second end is connected to a pull-up resistor connected to a pull-up power supply;
  • the pull-up power supply is used to provide a DC voltage of a preset voltage.
  • the reminder is a display or a buzzer.
  • the processor is an ARM processor.
  • controllable switch in the buffer loop includes:
  • the driving circuit connected with the thyristor switch is used to control the thyristor switch to be turned on at a preset rate when the power-on time reaches the preset period of time, so as to short-circuit the buffer circuit.
  • the present invention provides a servo driver, which includes the buffer circuit protection circuit as described in any one of the above.
  • the present invention provides a buffer loop protection circuit, considering that the controllable switch in the buffer loop cannot be successfully closed when a fault occurs.
  • the voltage detection module detects the higher voltage across the buffer resistor.
  • This application can control the prompter to indicate the controllable switch failure when the power-on time reaches the preset period and the voltage value at both ends of the buffer circuit is higher than the preset threshold. , It is convenient for the staff to know and perform maintenance, to prevent the buffer resistor from being damaged due to excessive power consumption, and to avoid further expansion of the fault.
  • the present invention also provides a servo driver, which has the same beneficial effects as the above-mentioned buffer loop protection circuit.
  • Figure 1 is a schematic structural diagram of a buffer loop protection circuit provided by the present invention
  • FIG. 2 is a schematic structural diagram of a processing device provided by the present invention.
  • Figure 3 is a schematic structural diagram of a buffer circuit provided by the present invention.
  • FIG. 4 is a schematic structural diagram of a driving circuit provided by the present invention.
  • FIG. 1 is a schematic structural diagram of a buffer loop protection circuit provided by the present invention.
  • the buffer loop protection circuit includes:
  • the voltage detection module 1 connected to the buffer circuit is used to detect the voltage value at both ends of the buffer circuit;
  • the processing device 2 connected to the voltage detection module 1 is used to control the prompter 3 to prompt the controllable switch failure in the buffer circuit when the power-on time reaches a preset time period and the voltage value is higher than the preset threshold;
  • the power-on time reaching the preset period of time can mean that the energy storage capacitor is charged to a sufficient amount after power-on, and the time point when the controllable switch in the buffer loop is controlled to be closed is considered.
  • the voltage value detected by the voltage detection module 1 is the voltage value at both ends of the controllable switch, and its partial voltage is less, so the detected voltage value In theory, it should be very small, that is, lower than the preset threshold, but when the controllable switch cannot be successfully closed due to a fault, the voltage detected by the voltage detection module 1 is equivalent to the voltage across the buffer resistor R96.
  • the voltage value of the buffer resistor R96 is usually higher, that is, higher than the preset threshold. Therefore, in the embodiment of the present invention, the power-on time can reach the preset period and When the voltage value is higher than the preset threshold, the control reminder 3 prompts the controllable switch fault in the buffer circuit, which is convenient for the staff to quickly learn the fault condition of the controllable switch through the prompt content and perform maintenance, and prevent the buffer resistor R96 from working waste for a long time The electric energy also prevents the breakdown caused by the damage of the snubber resistor from further expanding.
  • the voltage detection module 1 can be of multiple types, for example, it can be two wires connected to the input end and the output end of the buffer circuit, through which the voltage at both ends of the buffer circuit can be detected.
  • the structure is simple and cost-effective. It is lower, and the embodiment of the present invention is not limited here.
  • the preset time period can be set by itself according to the charging speed of the energy storage capacitor, for example, it can be set to 2 ms, etc., which is not limited in the embodiment of the present invention.
  • the preset threshold value can also be set independently, for example, it can be set to 3V, etc., which is not limited in the embodiment of the present invention.
  • the specific manner of prompting may be multiple, for example, prompting in the form of a fault code, etc., which is not limited in the embodiment of the present invention.
  • the present invention provides a buffer loop protection circuit, considering that the controllable switch in the buffer loop cannot be successfully closed when a fault occurs.
  • the voltage detection module detects the higher voltage across the buffer resistor R96.
  • This application can control the prompter to prompt the controllable switch when the power-on time reaches the preset period and the voltage value at both ends of the buffer circuit is higher than the preset threshold. Failures are easy for the staff to know and perform maintenance, to prevent the buffer resistor from being damaged due to excessive power consumption, and to avoid further expansion of the failure.
  • FIG. 2 is a schematic structural diagram of a processing device 2 provided by the present invention.
  • the processing device 2 includes:
  • the protection circuit 21 whose input terminal is connected to the input terminal of the buffer circuit and the output terminal of the buffer circuit respectively is used for preprocessing the voltage at both ends of the buffer circuit to protect the photocoupler U24;
  • the first pin and the second pin are both connected to the output terminal of the protection circuit 21, and the photocoupler U24 whose third pin is grounded is used to turn on its third pin when the voltage value is higher than the preset threshold.
  • the fourth pin in order to set the detection terminal of the processor to a low potential;
  • the potential pull-up module 22 respectively connected to the fourth pin of the photocoupler U24 and the detection terminal of the processor is used to connect the third pin and the fourth pin of the photocoupler U24 to the processor when the The detection terminal is set to high potential;
  • the processor is used to control the prompter 3 to prompt the controllable switch failure in the buffer loop when the low potential is detected at the detection terminal of the processor.
  • the voltage detection module 1 may detect a higher voltage across the buffer circuit, the high voltage may damage the photocoupler U24. Therefore, in the embodiment of the present invention, the voltage across the buffer circuit can be detected by the protection circuit 21. Carry out preprocessing to protect the photocoupler U24.
  • the controllable switch in the case that the controllable switch is normally closed, since the voltage value at both ends of the buffer circuit is low, the light emitting diode between the first pin and the second pin of the photocoupler U24 will not be turned on at this time , The third pin and the fourth pin of the photocoupler U24 will not be conducted, and due to the existence of the potential pull-up module 22, the BUS_ERR signal of the processor’s detection terminal presents a high potential.
  • the processing device 2 in the embodiment of the present invention has a simple structure, low cost, and high reliability.
  • processing device 2 may also be of various other types, which are not limited in the embodiment of the present invention.
  • the protection circuit 21 includes:
  • the first terminal is connected to the input terminal of the buffer circuit, and the second terminal is connected to the first input terminal of the rectifier circuit 213, and the first current limiting resistor 211 is used to limit the current in the circuit;
  • the first terminal is connected to the output terminal of the buffer circuit, and the second terminal is connected to the second input terminal of the rectifier circuit 213, and the second current limiting resistor 212 is used to limit the current in the circuit;
  • the first output terminal is connected to the first pin of the photocoupler U24, and the second output terminal is connected to the second pin of the photocoupler U24.
  • the rectifier circuit 213 is used to filter out the AC component in the loop and also to provide Higher reverse breakdown voltage in order to protect the photocoupler U24.
  • the first current-limiting resistor 211 and the second current-limiting resistor 212 can both function as current-limiting resistors, and both can be composed of single or multiple resistors.
  • the first current-limiting resistor 211 in FIG. 2 includes R97 and R98
  • the second current-limiting resistor 212 include R99 and R100.
  • two current-limiting resistors can achieve a better current-limiting effect.
  • the reverse voltage may break down the light-emitting diode in the photocoupler U24, so the invention provides a rectifier circuit 213. On the one hand, it can filter the AC component, and on the other hand, it can also provide a higher reverse direction through the diode in the rectifier circuit 213. The breakdown voltage prevents the reverse voltage from passing through the rectifier circuit 213, which also protects the photocoupler U24.
  • the rectifier circuit 213 is a half-wave rectifier circuit 213.
  • the half-wave rectifier circuit 213 has the advantages of simple structure, small size, and low cost.
  • the rectifier circuit 213 may also be of various other types, which are not limited in the embodiment of the present invention.
  • the processing device 2 further includes:
  • the capacitor connected in parallel between the third pin and the fourth pin of the photocoupler U24 is used to filter the electrical signal output by the photocoupler U24 to facilitate processing by the processor.
  • the capacitor can filter the electrical signal output by the photocoupler U24, so as to ensure that the processor detects a pure digital signal, and also improves the accuracy of the controllable switch failure detection.
  • the capacitor may be of multiple types, for example, it may be an electrolytic capacitor, etc., which is not limited in the embodiment of the present invention.
  • the embodiment of the present invention can also connect a resistor R101 in parallel with the output terminal of the rectifier circuit 213, where R101 can improve the turn-off speed of the photocoupler U24 and prevent the photocoupler U24 from malfunctioning.
  • R101 can improve the turn-off speed of the photocoupler U24 and prevent the photocoupler U24 from malfunctioning. The role of.
  • the potential pull-up module 22 includes:
  • the first end is respectively connected to the fourth pin of the photocoupler U24 and the detection end of the processor, and the second end is connected to the pull-up resistor R102 of the pull-up power supply;
  • the pull-up power supply is used to provide a DC voltage with a preset voltage.
  • the structure of the potential pull-up module 22 in the embodiment of the present invention is simple and the cost is low.
  • the potential pull-up module 22 may also be of various other types, which are not limited in the embodiment of the present invention.
  • the reminder 3 is a display or a buzzer.
  • the display has the advantages of intuitive prompt effect
  • the buzzer has the advantages of large prompt range, small size and low cost.
  • the reminder 3 can also be of various other types, which are not limited in the embodiment of the present invention.
  • the processor is an ARM processor.
  • the ARM processor has the advantages of fast processing speed, small size, and low cost.
  • the processor may also be of various other types, which are not limited in the embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a buffer loop provided by the present invention
  • FIG. 4 is a schematic structural diagram of a driving circuit provided by the present invention.
  • the controllable switch in the buffer loop includes:
  • Thyristor switch U23
  • the driving circuit connected with the SCR U23 is used to control the SCR U23 to be turned on at a preset rate when the power-on time reaches the preset period of time, so as to short-circuit the buffer circuit.
  • the controllable switch in the prior art is a relay
  • the switch in this application is a thyristor switch U23
  • the thyristor switch U23 can be controlled to turn on at a preset speed through the drive circuit. Since the thyristor switch U23 can be controlled to slowly turn on, there will be no longer arc phenomenon, prolong the service life, improve safety and reliability.
  • the thyristor switch U23 may be of various types, for example, an IGBT (Insulated Gate Bipolar Transistor, insulated gate bipolar transistor), etc., which are not limited in the embodiment of the present invention.
  • IGBT Insulated Gate Bipolar Transistor, insulated gate bipolar transistor
  • the resistor R106 is a current-limiting resistor to prevent damage to the optocoupler diode; the isolated optocoupler U25 is shown to drive the optocoupler, which will isolate the weak electricity while improving the driving ability of the signal; the capacitor C57 is the power supply Decoupling capacitor; resistor R166 is the drive resistance of the drive signal BUS_ON; diode D39 is a clamping diode to prevent the BUS_ON signal voltage from damaging the IGBT (SCR U23); resistor R117 is the turn-off resistance of the drive signal, together with D38 It forms the turn-off circuit of the drive signal, and the function of D38 is to accelerate the turn-off of the IGBT;
  • the BUS signal can be given by the processor. After the buffer resistor R96 charges the bus capacitor DC15, the ARM sends out a BUS signal with a gradually increasing duty cycle. At this time, the output of the optocoupler accounts for The BUS_ON drive signal with an increasing empty ratio until the bus IGBT U23 is fully turned on; when the processor detects that the BUS_ERR signal is valid, it immediately pulls the BUS signal high and disconnects the drive signal of the bus IGBT U23.
  • the present invention provides a servo driver including the buffer circuit protection circuit as in the foregoing embodiment.

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Abstract

一种缓冲回路保护电路及一种伺服驱动器，考虑到缓冲回路中的可控开关在故障时便无法被成功闭合，此种情况下，在储能电容充电完成，需要对可控开关进行闭合的时候电压检测模块（1）检测到的是缓冲电阻（R96）两端较高的电压，该电路和该驱动器可以通过在上电时间达到预设时段时且缓冲回路两端的电压值高于预设阈值时控制提示器（3）提示可控开关故障，便于工作人员获知并进行检修，防止缓冲电阻（R96）因消耗过量电能而损坏，也避免故障进一步扩大。

Description

一种伺服驱动器及其缓冲回路保护电路
本申请要求于2020年02月26日提交至中国专利局、申请号为202010122209.0、发明名称为“一种伺服驱动器及其缓冲回路保护电路”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电路保护领域，特别是涉及一种缓冲回路保护电路，本发明还涉及一种伺服驱动器。
背景技术
伺服驱动器或者变频器等装置的主回路通常都包括缓冲回路以及与缓冲回路连接的储能电容，其中，储能电容可以将直流电储存起来并向后端负载提供稳定的直流电，缓冲回路包括缓冲电阻以及与缓冲电阻并联的可控开关，在上电的瞬间由于储能电容相当于短路，因此在上电瞬间可以控制可控开关处于断开状态，此时缓冲电阻可以在储能电容的充电过程中进行分压以便对电路进行保护，在储能电容的电量达到一定程度之后便可以控制可控开关闭合从而将缓冲电阻短接掉，一方面可以防止缓冲电阻持续耗电，另一方面也可以对缓冲电阻进行保护。
但是可控开关存在故障的可能性，当可控开关出现故障时，用户无法知情，这样便会导致缓冲电阻持续地接在储能电容的充电回路中，不但耗费了大量的电能，而且降低了缓冲电阻的使用寿命，存在故障进一步扩大的风险。
因此，如何提供一种解决上述技术问题的方案是本领域技术人员目前需要解决的问题。
发明内容
本发明的目的是提供一种缓冲回路保护电路，防止缓冲电阻因消耗过量电能而损坏，也避免故障进一步扩大；本发明的另一目的是提供一种包括上述缓冲回路保护电路的伺服驱动器，防止缓冲电阻因消耗过量电能而 损坏，也避免故障进一步扩大。
为解决上述技术问题，本发明提供了一种缓冲回路保护电路，包括：
与缓冲回路连接的电压检测模块，用于检测所述缓冲回路两端的电压值；
与所述电压检测模块连接的处理装置，用于在上电时间达到预设时段且所述电压值高于预设阈值时控制提示器提示所述缓冲回路中的可控开关故障；
与所述处理装置连接的所述提示器。
优选地，所述处理装置包括：
输入端分别与所述缓冲回路的输入端以及所述缓冲回路的输出端连接的保护电路，用于对所述缓冲回路两端的电压进行预处理，以便对光电耦合器进行保护；
第一引脚以及第二引脚均与所述保护电路的输出端连接，第三引脚接地的所述光电耦合器，用于在所述电压值高于所述预设阈值时导通自身的第三引脚以及第四引脚，以便将处理器的检测端置为低电位；
分别与所述光电耦合器的第四引脚以及所述处理器的检测端连接的电位上拉模块，用于在所述光电耦合器的第三引脚以及第四引脚未导通时将所述处理器的检测端置为高电位；
所述处理器，用于在自身的检测端检测到低电位时控制提示器提示所述缓冲回路中的可控开关故障。
优选地，所述保护电路包括：
第一端与所述缓冲回路的输入端连接，第二端与整流电路的第一输入端连接的第一限流电阻，用于限制回路中的电流；
第一端与所述缓冲回路的输出端连接，第二端与所述整流电路的第二输入端连接的第二限流电阻，用于限制回路中的电流；
第一输出端与所述光电耦合器的第一引脚连接，第二输出端与所述光电耦合器的第二引脚连接的所述整流电路，用于过滤掉回路中的交流分量，还用于提供较高的反向击穿电压，以便对所述光电耦合器进行保护。
优选地，所述整流电路为半波整流电路。
优选地，所述处理装置还包括：
并联在所述光电耦合器的第三引脚以及第四引脚之间的电容，用于对所述光电耦合器输出的电信号进行滤波，便于处理器进行处理。
优选地，所述电位上拉模块包括：
第一端分别与所述光电耦合器的第四引脚以及所述处理器的检测端连接，第二端与上拉电源连接的上拉电阻；
所述上拉电源，用于提供预设电压的直流电压。
优选地，所述提示器为显示器或蜂鸣器。
优选地，所述处理器为ARM处理器。
优选地，所述缓冲回路中的可控开关包括：
可控硅开关；
与所述可控硅开关连接的驱动电路，用于在上电时间达到所述预设时段时以预设速率控制所述可控硅开关导通，以便将所述缓冲电路短接。
为解决上述技术问题，本发明提供了一种伺服驱动器，包括如上任一项所述的缓冲回路保护电路。
本发明提供了一种缓冲回路保护电路，考虑到缓冲回路中的可控开关在故障时便无法被成功闭合，此种情况下，在储能电容充电完成，需要对可控开关进行闭合的时候电压检测模块检测到的是缓冲电阻两端较高的电压，本申请可以通过在上电时间达到预设时段时且缓冲回路两端的电压值高于预设阈值时控制提示器提示可控开关故障，便于工作人员获知并进行检修，防止缓冲电阻因消耗过量电能而损坏，也避免故障进一步扩大。
本发明还提供了一种伺服驱动器，具有如上缓冲回路保护电路相同的有益效果。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对现有技术和实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明提供的一种缓冲回路保护电路的结构示意图；
图2为本发明提供的一种处理装置的结构示意图；
图3为本发明提供的一种缓冲回路的结构示意图；
图4为本发明提供的一种驱动电路的结构示意图。
具体实施方式
本发明的核心是提供一种缓冲回路保护电路，防止缓冲电阻因消耗过量电能而损坏，也避免故障进一步扩大；本发明的另一目的是提供一种包括上述缓冲回路保护电路的伺服驱动器，防止缓冲电阻因消耗过量电能而损坏，也避免故障进一步扩大。
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参考图1，图1为本发明提供的一种缓冲回路保护电路的结构示意图，该缓冲回路保护电路包括：
与缓冲回路连接的电压检测模块1，用于检测缓冲回路两端的电压值；
与电压检测模块1连接的处理装置2，用于在上电时间达到预设时段且电压值高于预设阈值时控制提示器3提示缓冲回路中的可控开关故障；
与处理装置2连接的提示器3。
具体的，上电时间达到预设时段可以指的是：在上电后储能电容被充电到足量，并且到达了缓冲回路中的可控开关被控制闭合的时间点，考虑到在这一时间点，在正常情况下，可控开关若成功被控制闭合，那么电压检测模块1检测到的电压值便是可控开关两端的电压值，其分压较少，因此检测到的该电压值理论上来讲应该是非常小的，也即低于预设阈值，但是当该可控开关因为故障无法被成功闭合的时候，此时电压检测模块1检测到的电压值相当于缓冲电阻R96两端的电压值，由于缓冲电阻R96的阻 值一般较大，因此该电压值通常也会较高，也即会高于预设阈值，因此，本发明实施例中可以在上电时间达到预设时段且电压值高于预设阈值时控制提示器3提示缓冲回路中的可控开关故障，便于工作人员通过提示的内容快速得知可控开关的故障情况并进行检修，防止缓冲电阻R96长时间工作浪费电能，也防止缓冲电阻损坏导致的故障进一步扩大。
具体的，电压检测模块1可以为多种类型，例如可以为分别连接在缓冲回路输入端以及输出端的两根导线，通过这两根导线便可以对缓冲回路两端的电压进行检测，结构简单且成本较低，本发明实施例在此不做限定。
其中，预设时段可以根据储能电容的充电速度自行进行设定，例如可以设置为2ms等，本发明实施例在此不做限定。
其中，预设阈值也可以进行自主设定，例如可以设定为3V等，本发明实施例在此不做限定。
具体的，提示的具体方式可以为多种，例如通过故障代码的方式进行提示等，本发明实施例在此不做限定。
本发明提供了一种缓冲回路保护电路，考虑到缓冲回路中的可控开关在故障时便无法被成功闭合，此种情况下，在储能电容充电完成，需要对可控开关进行闭合的时候电压检测模块检测到的是缓冲电阻R96两端较高的电压，本申请可以通过在上电时间达到预设时段时且缓冲回路两端的电压值高于预设阈值时控制提示器提示可控开关故障，便于工作人员获知并进行检修，防止缓冲电阻因消耗过量电能而损坏，也避免故障进一步扩大。
在上述实施例的基础上：
为了更好地对本发明实施例进行说明，请参考图2，图2为本发明提供的一种处理装置2的结构示意图，作为一种优选的实施例，处理装置2包括：
输入端分别与缓冲回路的输入端以及缓冲回路的输出端连接的保护电路21，用于对缓冲回路两端的电压进行预处理，以便对光电耦合器U24进行保护；
第一引脚以及第二引脚均与保护电路21的输出端连接，第三引脚接地的光电耦合器U24，用于在电压值高于预设阈值时导通自身的第三引脚以及第四引脚，以便将处理器的检测端置为低电位；
分别与光电耦合器U24的第四引脚以及处理器的检测端连接的电位上拉模块22，用于在光电耦合器U24的第三引脚以及第四引脚未导通时将处理器的检测端置为高电位；
处理器，用于在自身的检测端检测到低电位时控制提示器3提示缓冲回路中的可控开关故障。
具体的，考虑到电压检测模块1可能检测到缓冲回路两端较高的电压，高电压可能会对光电耦合器U24造成损坏，因此本发明实施例中可以通过保护电路21对缓冲回路两端的电压进行预处理，以便对光电耦合器U24进行保护。
其中，在可控开关被正常闭合的情况下，由于缓冲回路两端的电压值较低，此时并不会使得光电耦合器U24的第一引脚以及第二引脚之间的发光二极管导通，光电耦合器U24的第三引脚以及第四引脚之间便也不会导通，而由于电位上拉模块22的存在，处理器的检测端的BUS_ERR信号呈现高电位，处理器在此时并不会控制提示器3进行动作；在可控开关没有被正常闭合的情况下，由于缓冲回路两端的电压值即为缓冲电阻R96两端的高电压值，此时该高电压值会使得光电耦合器U24的第一引脚以及第二引脚之间的发光二极管导通，光电耦合器U24的第三引脚以及第四引脚之间便会导通，由于第三引脚接地，因此处理器检测端的BUS_ERR信号便呈现低电位，处理器在此种情况下便可以控制提示器3提示可控开关故障。
具体的，本发明实施例中的处理装置2的结构简单、成本较低且可靠性较强。
当然，除了上述处理装置2的具体形式外，处理装置2还可以为其他多种类型，本发明实施例在此不做限定。
作为一种优选的实施例，保护电路21包括：
第一端与缓冲回路的输入端连接，第二端与整流电路213的第一输入端连接的第一限流电阻211，用于限制回路中的电流；
第一端与缓冲回路的输出端连接，第二端与整流电路213的第二输入端连接的第二限流电阻212，用于限制回路中的电流；
第一输出端与光电耦合器U24的第一引脚连接，第二输出端与光电耦合器U24的第二引脚连接的整流电路213，用于过滤掉回路中的交流分量，还用于提供较高的反向击穿电压，以便对光电耦合器U24进行保护。
具体的，第一限流电阻211以及第二限流电阻212均可以起到限流的作用，且二者均可以由单个或多个电阻组成，例如图2中的第一限流电阻211包括R97以及R98，第二限流电阻212包括R99以及R100，本发明实施例中采用两个限流电阻能起到更好地限流作用。
具体的，考虑到虽然经过了一次整流，但是采样得到的缓冲回路两端的电能依然可能存在一些交流分量，而且考虑到在可控开关被闭合的时候可能会产生较强的反向电压，该反向电压可能会击穿光电耦合器U24中的发光二极管，因此发明设置了整流电路213，一方面可以进行交流分量的滤波，另一方面还可以通过整流电路213中的二极管提供较高的反向击穿电压，使得反向电压不会通过整流电路213，也即对光电耦合器U24形成了保护。
作为一种优选的实施例，整流电路213为半波整流电路213。
具体的，半波整流电路213具有结构简单、体积小以及成本低等优点。
当然，除了半波整流电路213外，整流电路213还可以为其他多种类型，本发明实施例在此不做限定。
作为一种优选的实施例，处理装置2还包括：
并联在光电耦合器U24的第三引脚以及第四引脚之间的电容，用于对光电耦合器U24输出的电信号进行滤波，便于处理器进行处理。
具体的，电容可以对光电耦合器U24输出的电信号进行滤波，以便保证处理器检测到的是纯净的数字信号，也提高了可控开关故障检测的准确性。
其中，电容可以为多种类型，例如可以为电解电容等，本发明实施例在此不做限定。
具体的，如图2所示，本发明实施例还可以在整流电路213的输出端并联一个电阻R101，R101在此可以起到提高光电耦合器U24的关断速度以及防止光电耦合器U24误动作的作用。
作为一种优选的实施例，电位上拉模块22包括：
第一端分别与光电耦合器U24的第四引脚以及处理器的检测端连接，第二端与上拉电源连接的上拉电阻R102；
上拉电源，用于提供预设电压的直流电压。
具体的，本发明实施例中电位上拉模块22的结构简单且成本较低。
当然，除了上述的电位上拉模块22外，电位上拉模块22还可以为其他多种类型，本发明实施例在此不做限定。
作为一种优选的实施例，提示器3为显示器或蜂鸣器。
具体的，显示器具有提示效果直观的优点，蜂鸣器具有提示范围大、体积小以及成本低的优点。
当然，除了上述形式外，提示器3还可以为其他多种类型，本发明实施例在此不做限定。
作为一种优选的实施例，处理器为ARM处理器。
具体的，ARM处理器具有处理速度快、体积小以及成本低等优点。
当然，除了ARM处理器外，处理器还可以为其他多种类型，本发明实施例在此不做限定。
为了更好地对本发明实施例进行说明，请参考图3以及图4，图3为本发明提供的一种缓冲回路的结构示意图，图4为本发明提供的一种驱动电路的结构示意图，作为一种优选的实施例，缓冲回路中的可控开关包括：
可控硅开关U23；
与可控硅开关U23连接的驱动电路，用于在上电时间达到预设时段时以预设速率控制可控硅开关U23导通，以便将缓冲电路短接。
具体的，考虑到现有技术中的可控开关为继电器，由于瞬时相应的特性，在闭合继电器的瞬间可能会产生拉弧从而对继电器造成损坏，而本申请中的开关为可控硅开关U23，并且可以通过驱动电路控制可控硅开关 U23以预设速度导通，由于可以控制可控硅开关U23缓慢导通，因此不会再产生拉弧现象，延长了使用寿命，提高了安全性以及可靠性。
其中，可控硅开关U23可以为多种类型，例如可以为IGBT(Insulated Gate Bipolar Transistor，绝缘栅双极型晶体管)等，本发明实施例在此不做限定。
具体的，在图4中，电阻R106为限流电阻，防止光耦二极管损坏；所示隔离光耦U25为驱动光耦，将将弱电隔离开的同时提高信号的驱动能力；电容C57为电源的去耦电容；电阻R166为驱动信号BUS_ON的驱动电阻；二极管D39为嵌位二极管，防止BUS_ON信号电压过高损坏IGBT(可控硅开关U23)；电阻R117为驱动信号的关断电阻，和D38一起构成驱动信号的关断电路，D38的作用为加速IGBT关断；
其中，图4的电路工作原理：BUS信号可以由处理器给出，当缓冲电阻R96给母线电容DC15充电完成后，由ARM发出占空比逐渐增大的BUS信号，此时光耦输出端输出占空比逐渐增大的BUS_ON驱动信号，直至母线IGBT U23完全打开；当处理器检测到BUS_ERR信号有效时，立即将BUS信号拉高，将母线IGBT U23的驱动信号断开。
为解决上述技术问题，本发明提供了一种伺服驱动器，包括如前述实施例中的缓冲回路保护电路。
对于本发明实施例提供的伺服驱动器的介绍请参照前述缓冲回路保护电路的实施例，本发明实施例在此不再赘述。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。
还需要说明的是，在本说明书中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而 使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个......”限定的要素，并不排除在包括该要素的过程、方法、物品或者设备中还存在另外的相同要素。
对所公开的实施例的上述说明，使本领域专业技术人员能够实现或使用本发明。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的，本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下，在其他实施例中实现。因此，本发明将不会被限制于本文所示的这些实施例，而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (10)

  1. 一种缓冲回路保护电路，其特征在于，包括：
    与缓冲回路连接的电压检测模块，用于检测所述缓冲回路两端的电压值；
    与所述电压检测模块连接的处理装置，用于在上电时间达到预设时段且所述电压值高于预设阈值时控制提示器提示所述缓冲回路中的可控开关故障；
    与所述处理装置连接的所述提示器。
  2. 根据权利要求1所述的缓冲回路保护电路，其特征在于，所述处理装置包括：
    输入端分别与所述缓冲回路的输入端以及所述缓冲回路的输出端连接的保护电路，用于对所述缓冲回路两端的电压进行预处理，以便对光电耦合器进行保护；
    第一引脚以及第二引脚均与所述保护电路的输出端连接，第三引脚接地的所述光电耦合器，用于在所述电压值高于所述预设阈值时导通自身的第三引脚以及第四引脚，以便将处理器的检测端置为低电位；
    分别与所述光电耦合器的第四引脚以及所述处理器的检测端连接的电位上拉模块，用于在所述光电耦合器的第三引脚以及第四引脚未导通时将所述处理器的检测端置为高电位；
    所述处理器，用于在自身的检测端检测到低电位时控制提示器提示所述缓冲回路中的可控开关故障。
  3. 根据权利要求2所述的缓冲回路保护电路，其特征在于，所述保护电路包括：
    第一端与所述缓冲回路的输入端连接，第二端与整流电路的第一输入端连接的第一限流电阻，用于限制回路中的电流；
    第一端与所述缓冲回路的输出端连接，第二端与所述整流电路的第二输入端连接的第二限流电阻，用于限制回路中的电流；
    第一输出端与所述光电耦合器的第一引脚连接，第二输出端与所述光电耦合器的第二引脚连接的所述整流电路，用于过滤掉回路中的交流分量，还用于提供较高的反向击穿电压，以便对所述光电耦合器进行保护。
  4. 根据权利要求3所述的缓冲回路保护电路，其特征在于，所述整流电路为半波整流电路。
  5. 根据权利要求3所述的缓冲回路保护电路，其特征在于，所述处理装置还包括：
    并联在所述光电耦合器的第三引脚以及第四引脚之间的电容，用于对所述光电耦合器输出的电信号进行滤波，便于处理器进行处理。
  6. 根据权利要求2所述的缓冲回路保护电路，其特征在于，所述电位上拉模块包括：
    第一端分别与所述光电耦合器的第四引脚以及所述处理器的检测端连接，第二端与上拉电源连接的上拉电阻；
    所述上拉电源，用于提供预设电压的直流电压。
  7. 根据权利要求1所述的缓冲回路保护电路，其特征在于，所述提示器为显示器或蜂鸣器。
  8. 根据权利要求2所述的缓冲回路保护电路，其特征在于，所述处理器为ARM处理器。
  9. 根据权利要求1至8任一项所述的缓冲回路保护电路，其特征在于，所述缓冲回路中的可控开关包括：
    可控硅开关；
    与所述可控硅开关连接的驱动电路，用于在上电时间达到所述预设时段时以预设速率控制所述可控硅开关导通，以便将所述缓冲电路短接。
  10. 一种伺服驱动器，其特征在于，包括如权利要求1至9任一项所述的缓冲回路保护电路。
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