WO2021167567A1

WO2021167567A1 - A comparison circuit with increased sensitivity

Info

Publication number: WO2021167567A1
Application number: PCT/TR2021/050129
Authority: WO
Inventors: Ali BOZBEY; Pascal FEBVRE
Original assignee: Tobb Ekonomi Ve Teknoloji Universitesi
Priority date: 2020-02-17
Filing date: 2021-02-15
Publication date: 2021-08-26
Also published as: TR202002360A2

Abstract

The invention relates to a comparison circuit (1) used in addressing circuits, sensor (S) measurement pre-comparison circuits, that converts the analog signal from sensor (S) into multiple digital signals to improve the sensitivity of the sensor (S) measurement according to majority vote.

Description

DESCRIPTION

A COMPARISON CIRCUIT WITH INCREASED SENSITIVITY

Technical Field

The invention relates to a comparison circuit used in addressing circuits, sensor measurement pre-comparison circuits, and which improves the sensitivity of sensor measurement.

Prior Art

Currently, signal processing and communication methods are used in many technological applications. Medical systems, electronic systems or defense industry systems can be leading in these areas. Communication systems refer to the expression that carries information about the properties and behavior of signal physical variants in signal processing, electrical-electronics engineering, mathematically represented as a function. Also, in the physical world, it features changes in time or space in a system and allows us to process signals by representing them as mathematical functions. Analog signals are signals that evolve in a continuous way with time and can take any possible value. Analog systems are physical structures that operate with an analog signal. Digital signals are called discrete time signals. Unlike for analog signals, digital signals are represented by a finite set of values, taken at regular intervals and not continuously. Therefore, discrete time signals are not continuous like analog signals. They can consist of sampling continuous analog signals at specific time intervals or digitizing them as a sequence of numbers. The main difference between analog signals and digital signals is that analog signals have a continuous structure, whereas digital signals have a non-continuous finite structure. Although almost all modem signal processing and communication methods include digital technologies, our world is analog As a result, analog signals must be transformed to digital signals. The transformation base of analog signals to digital signals is carried out with analog-to-digital converter equipment. In present embodiments, an analog-to-digital converter connected to the sensor converts the analog signal received from the sensor to digital and transmits it to the relevant signal processing circuit. However, during the use of the said singular converter, the sensitivity and transmission speed of the signals can affect the said signal transmission. Currently used analog-to-digital converters only have a certain level of sensitivity. One of the most critical parts of analog-to-digital transformers is front-end comparison circuits. However, these circuits should be operated close to each other in order to increase the sensitivity of the said transformers. In the said circuits, there is a small port that converts analog signals to digital signals. This port is used in analog-to-digital transformers or detector readout circuits. Within the said analog-to-digital transformer, there is a comparator. The said comparator converts the signal from the sensor to digital data if it is above a certain threshold. The said comparators can be connected, for example, to each pixel in a 100-pixel detector reader. Each analog signal from the said 100 pixels in the example is converted to a digital signal with the help of a comparator. Comparators are used in sensor readout circuits or analog-to-digital transformers. The said sensors can be used in the medical field, defense, space field. Comparators are used in the same field with the other sensors. Generally, sensors are used as particle sensor or image sensor. If a comparator used as an analog-to-digital transformer has a sensitive structure, it gets close to the noise limit due to the thermal noise it generates. In all circuits where sensors and transformers are used, physical or thermal noises may occur. When the said comparator approaches the noise limit, it cannot give a correct value of exactly "0" or " 1 " in a certain region. It has been observed in the studies that 20% of misleading values are obtained due to thermal or physical noise in the circuits. In this case, when a single comparator is used in present embodiments, incorrect results occur due to the error rate. In this case, there is a need for different analog-to-digital transformer systems to decrease the error rate of analog-to-digital transformers.

In the state of art, the United States patent document, numbered US4879488 (A) and with priority dated 06.05.1988, discloses a circuit which is used for converting analog data to digital. In the application in the said document, it is stated that N-l comparison circuits are used. According to the information in the description, it is stated that the data is evaluated from 1 to 0 with 2 counters (58-60- 92a-b) and a flip-flop circuit. Therefore, it was predicted that the speed of data acquisition was increased. However, no information was provided about the threshold level for the metrics used in the study. In the inventive comparison circuit with increased sensitivity, there is usually an odd number of at least three comparators. The said comparators are adapted to connect to a single sensor and receive the same analog signal from the sensor. The comparators transmit the analog signals they receive from the sensor to a majority port by turning them into a digital signal. The inventive majority port is connected to collect digital signals from the comparator. Digital signals from the comparators are collected at the majority port, and the processing of voting of the data is carried out. The majority port outputs a single signal to the output, depending on the majority of signals coming from the jammers. Thus, the transmission of the correct data to signal processing circuits is improved.

In the state of art, the United States patent document, numbered US5400026 (A) and with priority dated 23.08.1993, discloses a SQUID circuit which does the cyclic process from analog to digital. The study in the said document uses N-numbered comparison circuits to enable conversion according to Josephson logic. It was noted that the N circuits used will produce more sensitive solutions, the comparison circuits are identical and have different threshold levels. The information in the said document does not describe the presence of a TFF-enabled comparison circuit. In the inventive comparison circuit with increased sensitivity, there is usually an odd number of at least three comparators. The said comparators are adapted to connect to a single sensor and receive the same analog signal from the sensor. The comparators transmit the analog signals they receive from the sensor to a majority port by turning them into a digital signal. The inventive majority port is connected to collect digital signals from the comparator. Digital signals from the comparators are collected at the majority port, and the processing of voting of the data is carried out. The majority port outputs a single signal to the output, depending on the majority of signals coming from the jammers. Thus, the transmission of the correct data to signal processing circuits is improved.

In the state of art, in the United States patent document numbered US4584566 (A) and with priority dated 21.12.1984, an analog-digital converter is included. In the application in the said document, a flip-flop circuit is used in combination with a single comparator. The circuit responds to the values obtained between the specified +- threshold values, thus allowing the transformation to take place. However, the features included in the application, such as using multiple comparison circuits and choosing different threshold levels, have not been found in the said document. In the inventive comparison circuit with increased sensitivity there is usually an odd number of at least three comparators. The said comparators are adapted to connect to a single sensor and receive the same analog signal from the sensor. The comparators transmit the analog signals they receive from the sensor to a majority port by turning them into a digital signal. The inventive majority port is connected to collect digital signals from the comparator. Digital signals from the comparators are collected at the majority port, and the processing of voting of the data is carried out. The majority port outputs a single signal to the output, depending on the majority of signals coming from the jammers. Thus, the transmission of the correct data to signal processing circuits is improved.

In the inventive comparison circuit with increased sensitivity, there is usually an odd number of at least three comparators. The said comparators are adapted to connect to a single sensor and receive the same analog signal from the sensor. The comparators transmit the analog signals they receive from the sensor to a majority port by turning them into a digital signal. The inventive majority port is connected to collect digital signals from the comparator. Digital signals from the comparators are collected at the majority port, and the processing of voting of the data is carried out. The majority port outputs a single signal to the output, depending on the majority of signals coming from the jammers. Thus, the transmission of the correct data to signal processing circuits is improved.

The present state of the art does not include technical characteristics in the invention and a description of the technical implications of the invention. In the present embodiments a comparison circuit which has an odd number of at least three comparator circuit elements, where the said comparators are connected to receive the same signal from a single sensor and transmit the output signals to the majority port. It allows the data with the majority to be output by voting after digital signals passing through the jammers are transferred to the majority port. It is observed that the error rate due to noise is reduced.

Objects of the Invention

The object of this invention is to realize a comparison circuit with increased sensitivity that provides analog to digital conversion process with low error rate in addressing and signal processing circuits.

Another object of this invention is to realize a comparison circuit with increased sensitivity that allows the signal to be output depending on the majority of the output signals using more than three comparators.

Summary of the Invention

A comparison circuit with increased sensitivity that is realized to achieve the aim of this invention, as defined in the first claim and other claims dependent on this claim, is comprised of the first comparator, the second comparator, the third comparator and a majority port. The first comparator, the second comparator, the third comparator are adapted to connect an output of a sensor. The first comparator, the second comparator, the third comparator are connected to the sensor output from one end and to the majority port at the other ends. The first comparator, the second comparator, the third comparator convert the analog signal coming from the sensor into a digital signal. The same analog signal coming from the sensor is transmitted to the first comparator, the second comparator and the third comparator. The signals transformed in the first comparator, the second comparator and the third comparator are digitally transmitted to the majority port. Digital signals transmitted to the majority port are voted depending on the majority within the majority port. The majority of the digital signals voted on the majority port are given to the output of the majority port. Thus, it is possible to reduce the rate of error in comparators.

Detailed Description of the Invention

The comparison circuit realized to fulfill the object of this invention is shown in the attached figures, in which;

Figure 1. It is a schematic view of the comparison circuit with increased sensitivity.

The parts in the figures are numbered one by one, and the equivalents of these numbers are given below.

1. Comparison circuit

2. The first comparator

2.1. The first analog input

2.2. The first digital output

3. The second comparator

3.1. The second analog input

3.2. The second digital output

4. The third comparator 4.1. The third analog input

4.2. The third digital output

5. The last comparator

5.1. The last analog input

5.2. The last digital output

6. Majority port

6.1. Multiple signal input

6.2. Single signal uutput S. Sensor

A comparison circuit (1) used in addressing circuits, sensor (S) measurement pre comparison circuits, that converts the analog signal from each sensor (S) into multiple digital signals to improve the sensitivity of the sensor (S) measurement according to majority vote comprises, at least one first comparator (2) that converts and transmits the analog input signal received from sensor (S) into a digital signal, at least one second comparator (3) that takes the same analog signal that the first comparator (2) receives from sensor (S) and converts it into a digital signal, at least one third comparator (4) that receives the same analog signal received from sensor (S) of the first comparator (2) and the second comparator (3) and converts it into a digital signal, at least one majority port (6) that receives digital signals from first comparator (2), second comparator (3) and third comparator (4), thus collects the digital signal values of the analog signal coming from the same sensor (S) from different comparators, that detects which signal is the majority value in the said digital signals and according to this voting result, that gives the digital signal value corresponding to the majority to the output.

The inventive comparison circuit (1) with increased sensitivity is used in addressing circuits or in pre-comparison circuits for sensor (S) measurement. Sensors (S), where the inventive comparison circuit (1) is generally used, are used in medical fields, electrical electronics or defense industry. In the measurement of sensors (S), the measurement value of each sensor (S) is measured by sensor measurement cards (circuits) or analog signal transformers and transformed into digital signals. In the inventive comparison circuit with increased sensitivity (1), the analog signal received from sensor (S) is transformed into a digital signal by more than one comparator (2, 3, 4, 5) and the majority port (6) gives a digital signal according to the majority of the said digital signals.

The comparison circuit (1) improves the sensitivity of the sensor (S) measurement according to the majority vote by converting the analog signal coming from each sensor (S) into more than one digital signal through separate semi-comparators. The comparison circuit (1) is generally used in addressing circuits or in sensor (S) measurement pre-comparison circuits for converting analog signals to digital signals. However, the comparison circuit (1) makes majority voting by converting the same analog signal coming from the sensor (S) into a digital signal separately. Thus, the comparison circuit (1) can convert the analog signal coming from sensor (S) into a digital signal by reducing the error rate. The comparison circuit (1) comprises the first comparator (2), the second comparator (3), the third comparator (4), the last comparator (5) and the majority port (6).

The first comparator (2) in an embodiment of the present invention transmits the analog input signal it receives from sensor (S) by converting it to a digital signal. The first comparator (2) comprises the first analog input (2.1) and the first digital output (2.2). The first comparator (2) converts the analog signal it receives from sensor (S) to a digital signal and transmits it to the majority port (6). The first comparator (2) is connected to sensor (S) from the first analog input (2.1) and the majority port (6) from the digital output (2.2). The first comparator (2) converts the analog signal coming from the first analog input (2.1) to a digital signal and transmits it to the majority port (6) from the first digital output (2.2). The second comparator (3) in an embodiment of the present invention receives the same analog signal that the first comparator (2) receives from sensor (S). The second comparator (3) takes the same analog signal that the first comparator (2) receives from sensor (S) and converts it into a digital signal. The second comparator

(3) comprises the second analog input (3.1) and the second digital output (3.2). The second comparator (3) converts the analog signal it receives from sensor (S) to a digital signal and transmits it to the majority port (6). The second comparator (3) is connected to sensor (S) from the second analog input (3.1) and the majority port (6) from the second digital output (3.2). The second comparator (3) converts the analog signal coming from the second analog input (3.1) to a digital signal and transmits it to the majority port (6) from the second digital output (3.2).

The third comparator (4) in an embodiment of the present invention receives the same analog signal that the first comparator (2) and the second comparator (3) receive from sensor (S). The third comparator (4) takes the same analog signal that the first comparator (2) and the second comparator (3) receive from sensor (S) and converts it into a digital signal. The third comparator (4) comprises the third analog input (4.1) and the third digital output (4.2). The third comparator (4) converts the analog signal it receives from sensor (S) to a digital signal and transmits it to the majority port (6). The third comparator (4) is connected to sensor (S) from the third analog input (4.1) and the majority port (6) from the third digital output (4.2). The third comparator (4) converts the analog signal coming from the third analog input (4.1) to a digital signal and transmits it to the majority port (6) from the third digital output (4.2).

The last comparator (5) in an embodiment of the present invention can be used as well as the first comparator (2), the second comparator (3) and the third comparator

(4). The last comparator (5) can be used as one or more. In addition to the first comparator (2), the second comparator (3) and the third comparator (4), more than one last comparator (5) can be used in such a way that their total number is odd. In the comparison circuit (1), when the first comparator (2), the second comparator (3) and the third comparator (4) are used together with the last comparator (5) in such a way that their total number is odd, during majority determination, equal results can be prevented. The last comparator (5) receives the same analog signal that the first comparator (2), the second comparator (3) and the third comparator (4) receive from sensor (S). The last comparator (5) receives the same analog signal that the first comparator (2), the second comparator (3) and the third comparator (4) receive from sensor (S), and works in that way. The last comparator (5) is used to reduce the possibility of incorrect conversion when converting the analog signal from sensor (S) to digital. The last comparator (5) comprises the last analog input (5.1) and the last digital output (5.2). The last comparator (5) receives the same analog signal that the first comparator (2), the second comparator (3) and the third comparator (4) receive from sensor (S) and converts it to the digital signal. The last comparator (5) converts the analog signal it receives from sensor (S) to a digital signal and transmits it to the majority port (6). The last comparator (5) is connected to sensor (S) from the last analog input (5.1) and the majority port (6) from the last digital output (5.2). The last comparator (5) converts the analog signal coming from the last analog input (5.1) to a digital signal and transmits it to the majority port (6) from the last digital output (5.2).

The majority port (6) in an embodiment of the present invention receives the digital signals coming from the first comparator (2), the second comparator (3) and the third comparator (4). In the case where the majority port (6) is used in addition to the first comparator (2), the second comparator (3) and the third comparator (4), also receives the digital signal from the last comparator (5). The majority port (6) takes the digital signals from the first comparator (2), the second comparator (3) and the third comparator (4), thus collecting the digital signal values of the analog signal coming from the same sensor (S) from different comparators. Majority port (6) determines which signal is majority value in the said digital signals. The majority port (6) outputs the digital signal value corresponding to the majority according to the result of this voting made to determine the majority value. The majority port (6) includes multiple signal input (6.1) and single signal output (6.2). The majority port (6) is used to determine the majority value of the digital signals output from the first comparator (2), the second comparator (3), the third comparator (4) and, when used, the last comparator (5). Majority port (6) is connected to first comparator (2), second comparator (3) and third comparator (4) from the multiple input signal (6.1) The majority port (6) is connected from the multiple signal input (6.1) to the first digital output (2.2) of the first comparator (2). The majority port (6) is connected from the multiple signal input (6.1) to the second digital output (3.2) of the second comparator (3). The majority port (6) is connected from the multiple signal input (6.1) to the third digital output (4.2) of the third comparator (4). In the case where the last comparator (5) is used, majority port (6) is connected to the last digital output (5.2) from the multiple signal input (6.1). The majority port (6) receives the digital signal from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2) from the multiple signal input (6.1). The majority port (6) determines the digital signal that provides the majority among the digital signals output from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2). The majority port (6) gives the said signal from the single signal output (6.2) after determining the digital signal that provides the majority among the digital signals output from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2). The majority port (6) evaluates the digital signals output from the first digital output (2.2), second digital output (3.2) and third digital output (4.2) and can detect the digital signal that is in the majority among the output digital signals. The majority port (6) can be used by connecting to the signal processing circuit from the single signal output (6.2) depending on the area to be used. The majority port (6) can preferably detect digital signals from at least the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2) according to the majority and mostly can detect the first digital output (2.2), the second digital output (3.2) and the digital signals from the third digital output (4.2), as well as the signals output from more than one last digital output (5.2) by voting according to the majority. In another embodiment of the invention, there are a number N of first comparators (2), second comparators (3), third comparators (4) and last comparators (5). The number N of the first comparator (2), the second comparator (3), the third comparator (4) and the last comparator (5) is adjusted so that the total number of comparators is odd. The Nth first comparator (2), second comparator (3), third comparator (4) and last comparator (5) are connected to the multiple signal input (6.1) of the majority port (6). Majority port (6) votes the digital signals from the Nth first comparator (2), second comparator (3), third comparator (4) and last comparator (5) according to the majority. The digital signal detected after the digital signal determination process based on the majority that takes place at the majority port (6) is given from the single signal output (6.2).

In another embodiment of the invention, when the "0" signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4), the following events occur. When the "0" signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4), the said “0” signal values are transmitted to the majority port (6) from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2). Digital “0” signals input from the multiple signal input (6.1) of the majority port (6) are counted in the majority port (6). As a result, the "0" digital signal value is determined by the majority port (6) and the said "0" digital signal value is output from the single signal output (6.2).

In another embodiment of the present invention, in the case that the "0" signal value is digitally output from the first comparator (2) and the second comparator (3), the " 1" signal value is output from the third comparator (4) or the first comparator (2), the second comparator (3) and the third comparator (4) have a "0" signal value digitally, the following events may occur. In the case that the “0” signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4), and the “1” digital signal value is output from the other, the said “,0” or “1” signal values are transmitted to the majority port (6) from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2). Digital “0” or “1” signals input from the multiple signal input (6.1) of the majority port (6) are counted in the majority port (6). As a result, the "0" digital signal value is determined by the majority port (6) and the said "0" digital signal value is output from the single signal output (6.2).

In another embodiment of the present invention, in the case that the “ 1 " signal value is digitally output from the first comparator (2) and the second comparator (3), the “0" signal value is output from the third comparator (4) or the first comparator (2), the second comparator (3) and the third comparator (4) have a “1" signal value digitally, the following events may occur. In the case that the “1” signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4), and the “0” digital signal value is output from the other, the said “,0” or “1” signal values are transmitted to the majority port (6) from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2). Digital “0” or “1” signals input from the multiple signal input (6.1) of the majority port (6) are counted in the majority port (6). As a result, the "1" digital signal value is determined by the majority port (6) and the said "1" digital signal value is output from the single signal output (6.2).

In another embodiment of the invention, when the "1" signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4), the following events occur. When the "1" signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4), the said “1” signal values are transmitted to the majority port (6) from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2). Digital “1” signals input from the multiple signal input (6.1) of the majority port (6) are counted in the majority port (6). As a result, the "1" digital signal value is determined by the majority port (6) and the said " 1 " digital signal value is output from the single signal output (6.2). The use of the comparison circuit (1) in this embodiment of the invention is carried out as follows. In the comparison circuit (1), the first comparator (2), the second comparator (3) and the third comparator (4) are connected to sensor (S) and the majority port (5). The first comparator (2) is connected to sensor (S) from the first analog input (2.1) and to the multiple signal input (5.1) of the majority port (5) from the first digital output (2.2). The second comparator (3) is connected to sensor (S) from the second analog input (3.1) and the multiple signal input (5.1) of the majority port (5) from the second digital output (3.2). The third comparator (4) is connected to sensor (S) from the third analog input (4.1) and the multiple signal input (5.1) of the majority port (5) from the third digital output (4.2). The first comparator (2), the second comparator (3) and the third comparator (4) convert the analog signals from sensor (S) into digital signals by taking the first analog input (2.1), the second analog input (3.1) and the third analog input (4.1) and transmits it from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2) to the majority port (5). The digital signals output from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2) are input through the multiple signal input (5.1) of the majority port (5). Digital signals input from the multi-signal input (5.1) are counted by voting within the majority port (5). The digital signal that has the majority as a result of the voting made in the majority port (5) is output from the single signal output (5.2) of the majority port (5) to be used in signal processing. Thus, the same analog signal output from the comparison circuit (2) and sensor (S) can be transformed into a digital signal in more than one way, voting and transmitting according to the majority.

Claims

1. A comparison circuit (1) used in addressing circuits, sensor (S) measurement pre-comparison circuits, that converts the analog signal from each sensor (S) into multiple digital signals to improve the sensitivity of the sensor (S) measurement according to majority vote, at least one first comparator (2) that converts and transmits the analog input signal received from sensor (S) into a digital signal, at least one second comparator (3) that takes the same analog signal that the first comparator (2) receives from sensor (S) and converts it into a digital signal, at least one third comparator (4) that receives the same analog signal received from - sensor (S) of the first comparator (2) and the second comparator (3) and converts it into a digital signal, the comparison circuit (1) characterized by at least one majority port (6) that receives digital signals from first comparator (2), second comparator (3) and third comparator (4), thus, collects the digital signal values of the analog signal coming from the same sensor (S) from different comparators, that detects which signal is the majority value in the said digital signals and according to this voting result, that gives the digital signal value corresponding to the majority to the output.

2. Comparison circuit (1) of claim 1, characterized by the first comparator (2) that includes the first analog input (2.1) and the first digital output (2.2), connected to the sensor (S) from the first analog input (2.1), and to the majority port (6) from the first digital output (2.2), converts the analog signal received from sensor (S) into a digital signal and transmits it to the majority port (6).

3. Comparison circuit (1) of claim 1, characterized by the second comparator (3) that includes the second analog input (3.1) and the second digital output (3.2), connected to sensor (S) from the second analog input (3.1) and to the majority port (6) from the second digital output (3.2), converts the analog signal coming from the second analog input (3.1) into a digital signal and transmits it from the second digital output (3.2) to the majority port (6).

4. Comparison circuit (1) of claim 1, characterized by the third comparator (4) that includes the third analog input (4.1) and the third digital output (4.2), connected to sensor (S) from the third analog input (4.1) and to the majority port (6) from the third digital output (4.2), converts the analog signal coming from the third analog input (4.1) into a digital signal and transmits it from the third digital output (4.2) to the majority port (6).

5. Comparison circuit (1) of claim 1, characterized by the last comparator (5) in addition to use of the first comparator (2), the second comparator (3) and the third comparator (4).

6. Comparison circuit (1) of claim 1, characterized by more than one last comparator (5) in addition to the first comparator (2), the second comparator (3) and the third comparator (4), which can be used in such a way that their sums are odd.

7. Comparison circuit (1) of claim 1, characterized by the last comparator (5), when used with the first comparator (2), the second comparator (3) and the third comparator (4) with an odd number, that prevents an equal result during majority determination (5).

8. Comparison circuit ( 1 ) of claim 1 , characterized by the last comparator (5) that receives the same analog signal that the second comparator (3) and the third comparator (4) receive from sensor (S) and used to reduce the possibility of incorrect conversion of the analog signal coming from sensor (S) to digital.

9. Comparison circuit ( 1 ) of claim 1 , characterized by the last comparator (5) that includes the last analog input (5.1) and the last digital output (5.2), connected to sensor (S) from the last analog input (5.1) and to the majority port (6) from the last digital output (5.2), converts the analog signal coming from the last analog input (5.1) into a digital signal and transmits it from the last digital output

(5.2) to the majority port (6).

10. Comparison circuit (1) of claim 1, characterized by the majority port (6) that includes multiple signal input (6.1) and single signal output (6.2), used to determine the majority value of the digital signals output from the first comparator (2), the second comparator (3), the third comparator (4) and, when used, the last comparator (5).

11. Comparison circuit (1) of claim 1, characterized by the majority port (6) that is connected to the first comparator (2), the second comparator (3) and the third comparator (4) from the multiple input signal (6.1).

12. Comparison circuit (1) of claim 1, characterized by the majority port (6) connected to the first digital output (2.2) of the first comparator (2), the second digital output (3.2) of the second comparator (3) and the third digital output

(4.2) of the third comparator (4) from the multiple signal input (6.1)

13. Comparison circuit (1) of claim 1, characterized by the majority port (6) that receives the digital signal from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2) from the multiple signal input (6.1).

14. Comparison circuit (1) of claim 1, characterized by the majority port (6) that determines the digital signal providing the majority among the digital signals output from the first digital output (2.2), second digital output (3.2) and third digital output (4.2).

15. Comparison circuit (1) of claim 1, characterized by the majority port (6) that outputs the specified signal from the single signal output (6.2) after determining the digital signal that provides the majority among the digital signals output from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2).

16. Comparison circuit (1) of claim 1, characterized by the majority port (6) that evaluates the digital signals output from the first digital output (2.2), the second digital output (3.2) and the third digital output (4.2) and detects the majority digital signal among the output digital signals.

17. Comparison circuit (1) of claim 1, characterized by the majority port (6) that detects digital signals from at least first digital output (2.2), second digital output (3.2) and third digital output (4.2) according to the majority, and mostly that can detect the first digital output (2.2), the second digital output (3.2) and the digital signals from the third digital output (4.2), as well as the signals output from more than one last digital output (5.2) by voting according to the majority.

18. Comparison circuit (1) of claim 1, characterized by the majority port (6) that determines that the majority signal is the “0” digital signal value by counting the digital “0” signals input from the multi-signal input (6.1) in case the “0” signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4) and provides the output of the said “0” digital signal value from single signal output (6.2).

19. Comparison circuit (1) of claim 1, characterized by the majority port (6) that counts the signal values of "0" and "1" input from multiple signal input (6.1) in case the "0" signal value is digitally output from the first comparator (2) and the second comparator (3), and the signal value "1" from the third comparator (4) and determines that the majority “0” digital signal value and provides the output of the said “0” digital signal value from the single signal output (6.2).

20. Comparison circuit (1) of claim 1, characterized by the majority port (6) that counts the signal values of "1" and "1" input from multiple signal input (6.1) in case the “ 1 " signal value is digitally output from the first comparator (2) and the second comparator (3), and the signal value “0" from the third comparator (4) and determines that the majority “1” digital signal value and provides the output of the said “1” digital signal value from the single signal output (6.2).

21. Comparison circuit (1) of claim 1, characterized by the majority port (6) that determines that the majority signal is the “1” digital signal value by counting the digital “1” signals input from the multi-signal input (6.1) in case the “1” signal value is digitally output from the first comparator (2), the second comparator (3) and the third comparator (4) and provides the output of the said “1” digital signal value from single signal output (6.2).