WO2021167155A1

WO2021167155A1 - Small broadband amplifier circuit

Info

Publication number: WO2021167155A1
Application number: PCT/KR2020/003817
Authority: WO
Inventors: 변철우
Original assignee: 원광대학교산학협력단
Priority date: 2020-02-20
Filing date: 2020-03-20
Publication date: 2021-08-26
Also published as: KR102487060B1; KR20210106247A

Abstract

The present invention relates to a small broadband amplifier circuit. The amplifier circuit according to the present invention comprises: a first amplification stage which includes a first transistor and a second transistor that form a differential pair, and which amplifies and outputs a differential input signal inputted through a first input terminal and a second input terminal; a second amplification stage which includes a third transistor and a fourth transistor that form a differential pair, and which amplifies a signal output from the first amplification stage so as to output same through the first and second output terminals; a first feedforward capacitor for connecting the first input terminal and the first output terminal; and a second feedforward capacitor for connecting the second input terminal and the second output terminal. According to the present invention, provided is the small amplifier circuit, which can implement a wide bandwidth without degradation in chip area, parasitic capacitor, nonlinearity, noise, and power consumption characteristics.

Description

Miniature Broadband Amplifier Circuit

The present invention relates to an amplifier circuit, and more particularly, to a small wideband amplifier circuit using a feedforward capacitor.

Recently, data traffic is increasing due to the increase in the use of mobile phones and smart phones, and the number of connected devices such as the Internet of Things is increasing. Currently, 4G LTE is widely distributed and is in the initial stage of 5G. As new business and production data increase exponentially in the future, it is expected that the demand for 5G mobile communication will accelerate and the demand for 6G mobile communication will increase.

1 shows a schematic configuration of a conventional transmission/reception circuit.

Referring to FIG. 1 , in RF, optical, and wired communication, the transmitting side transmits a signal amplified through the broadband amplifier 10 through the transmitting unit 20 . In addition, the receiving side amplifies the signal received through the receiving unit 30 through the wideband amplifier 40 and processes the amplified signal.

2 is a circuit diagram of a common source differential amplifier used in a conventional wideband amplifier.

A typical conventional common-source differential amplifier as illustrated in FIG. 2 has normal linearity and gain characteristics, but has a limited bandwidth.

3 shows an amplifier circuit proposed in US Patent No. 8593207 using an inductive peaking technique using an inductor to improve a limited bandwidth. However, there is a problem that the inductor consumes a large chip area.

FIG. 4 is an amplifier circuit presented in US Patent No. 6784749, and an active inductor using a transistor is proposed to reduce the chip area. However, the active inductor consumes a small chip area, but increases the load capacitance and non-linearity and additional noise characteristics.

5 shows a Cherry-Hooper amplifier, which is an amplifier circuit presented in US Patent No. 8729452, and uses an additional transistor to improve the bandwidth, but there is a problem in that the bandwidth is improved but power consumption is increased.

As such, conventionally, there have been problems such as an increase in chip area, an increase in parasitic capacitors, a nonlinear characteristic, a deterioration in noise, and an increase in power consumption according to the implemented broadband amplifier technology.

Accordingly, the technical problem to be solved by the present invention is to provide a miniature broadband amplifier circuit that improves conventional problems such as an increase in chip area, an increase in parasitic capacitors, nonlinear characteristics, deterioration of noise, and characteristics of increasing power consumption.

An amplifier circuit according to the present invention includes a first transistor and a second transistor forming a differential pair, a first amplifying stage for amplifying and outputting a differential input signal input through the first input terminal and the second input terminal, and forming a differential pair a second amplification stage including a third transistor and a fourth transistor, amplifying a signal output from the first amplifying stage and outputting the signal through a first output terminal and a second output terminal, and connecting the first input terminal and the first output terminal a first feedforward capacitor, and a second feedforward capacitor connecting the second input terminal and the second output terminal.

The first input terminal is connected to the first terminal of the first transistor, the second input terminal is connected to the first terminal of the second transistor, and the second terminal of the first transistor and the first terminal of the third transistor are connected. a terminal is connected, a second terminal of the second transistor is connected to a first terminal of the fourth transistor, the first output terminal is connected to a second terminal of the third transistor, and the second output terminal is connected to the first terminal 4 may be connected to the second terminal of the transistor.

The first to fourth transistors may be metal oxide semiconductor field effect transistors (MOSFETs).

The first feedforward capacitor connects the gate terminal of the first transistor and the drain terminal of the third transistor, and the second feedforward capacitor connects the gate terminal of the second transistor and the drain terminal of the fourth transistor. can

The first amplification stage and the second amplification stage may be configured as a common-source amplifier.

Each source terminal of the first transistor and the second transistor is connected to a first current source for generating a constant current, and each source terminal of the third transistor and the fourth transistor is connected to a second current source for generating a constant current, Each drain terminal of the first transistor and the second transistor is connected to a first load resistor and a second load resistor connected to a driving voltage source, and each drain terminal of the third transistor and the fourth transistor is connected to a driving voltage source may be connected to a third load resistor and a fourth load resistor.

As capacitances of the first feedforward capacitor and the second feedforward capacitor increase, a 3-dB bandwidth may increase and a damping factor may decrease.

According to the present invention, it is possible to provide a small amplifier circuit capable of realizing a wide bandwidth without deterioration of chip area, parasitic capacitor, nonlinearity, noise, and power consumption characteristics.

2 is a common-source differential amplifier circuit used in a conventional wideband amplifier.

3 is an amplifier circuit presented in US Patent No. 8593207.

4 is an amplifier circuit presented in US Patent No. 6784749.

5 is an amplifier circuit presented in US Pat. No. 8729452.

6 is a miniature broadband amplifier circuit according to the present invention.

7 is a half-circuit differential mode equivalent circuit of the broadband amplifier circuit of FIG.

8 is a graph illustrating a bandwidth change according to a change in the feed-forward capacitor capacity of the amplifier circuit according to the present invention.

9 is a graph showing a bandwidth change according to the presence or absence of a feed forward capacitor of the amplifier circuit according to the present invention.

10 is a diagram illustrating a manufacturing circuit and a layout according to an embodiment of a broadband amplifier circuit according to the present invention.

11 is a graph illustrating an increase in the bandwidth of a receiver using a broadband amplifier circuit according to the present invention.

Hereinafter, with reference to the accompanying drawings, a preferred embodiment in which a person of ordinary skill in the art to which the present invention pertains can easily practice the present invention will be described in detail. However, these examples are for explaining the present invention in more detail, it will be apparent to those skilled in the art that the scope of the present invention is not limited thereby.

The configuration of the invention for clarifying the solution of the problem to be solved by the present invention will be described in detail with reference to the accompanying drawings based on a preferred embodiment of the present invention, but the same in assigning reference numbers to the components of the drawings For the components, even if they are on different drawings, the same reference numbers are given, and it is noted in advance that the components of other drawings can be cited when necessary in the description of the drawings. In addition, when it is determined that detailed descriptions of well-known functions or configurations related to the present invention and other matters may unnecessarily obscure the gist of the present invention in explaining the principle of operation of the preferred embodiment of the present invention in detail, A detailed description thereof will be omitted.

In addition, throughout the specification, when a part is 'connected' with another part, it is not only 'directly connected' but also 'indirectly connected' with another element interposed therebetween. include As used herein, the singular also includes the plural unless specifically stated otherwise in the phrase. As used herein, “comprises” or “comprising” excludes the presence or addition of one or more other components, steps, acts, or elements in addition to the stated elements, steps, acts, or elements. I never do that.

Referring to FIG. 6 , the small broadband amplifier circuit according to the present invention includes a first amplification stage 100 , a second amplification stage 200 , a first feedforward capacitor C _F1 and a second feedforward capacitor C _F2 ). may include.

The first amplification stage 100 amplifies the differential input signal V _IN1 -V _IN2 _{input through the first input terminal BB IN1} and the second input terminal BB _IN12 and outputs the amplified signal V _OUT1 -V _OUT2 . 2 can be output to the amplification stage 200 . The second amplifier stage 200 has a first output terminal _(OUT1 BB) the amplification stage 100 a signal (V _OUT1 _OUT2 -V) signal (V _OUT3 _OUT4 -V) which amplifies the output from the second output terminal ( It can be output through BB _{OUT2 ).}

The first amplification stage 100 and the second amplification stage 200 may be configured as a common-source amplifier.

The first amplification stage 100 includes a first transistor M ₁ , a second transistor M ₂ , a first current source I ₁ , a first load resistor R _D1 , and a second load resistor R _D2 . may include

The first transistor M ₁ and the second transistor M ₂ may be implemented as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) forming a differential pair.

Each gate terminal of the first transistor M ₁ and the second transistor M ₂ is connected to the first input terminal BB _IN1 and the second input terminal BB _IN12 , respectively, and a differential input signal V _IN1 -V _IN2 ) can be input.

_{A first current source I 1} generating a constant current may be commonly connected to each source terminal of the first transistor M ₁ and the second transistor M _{2 .}

_{A first load resistor R D1} and a second load resistor R _D2 connected to the driving voltage source V _DD may be connected to respective drain terminals of the first transistor M ₁ and the second transistor M ₂ , respectively. have.

The first load resistor R _D1 and the second load resistor R _D2 may have the same resistance value.

The second amplification stage 200 includes a third transistor M ₃ , a fourth transistor M ₄ , a second current source I ₂ , a third load resistor R _D3 , and a fourth load resistor R _D4 . may include

The third transistor M ₃ and the fourth transistor M ₄ may be implemented as MOSFETs forming a differential pair.

A second current source I ₂ generating a constant current may be commonly connected to each source terminal of the third transistor M ₃ and the fourth transistor M _{4 .}

_{A third load resistor R D3} and a fourth load resistor R _D4 connected to the driving voltage source V _DD may be respectively connected to the drain terminals of the third transistor M ₃ and the fourth transistor M ₄ , respectively. have.

The third load resistor R _D3 and the fourth load resistor R _D4 may have the same resistance value.

Each gate terminal of the third transistor M ₃ and the fourth transistor M ₄ is connected to respective drain terminals of _{the first transistor M 1} and the second transistor M _{2 , the first amplification stage 100} A signal (V _OUT1 -V _OUT2 ) obtained by amplifying the differential input signal (V _IN1 -V _IN2 ) may be received.

Each drain terminal of the third transistor M ₃ and the fourth transistor M ₄ is connected to the first output terminal BB _OUT1 and the second output terminal BB _OUT2 , and the signal amplified in the second amplification stage 200 . (V _OUT3 -V _OUT4 ) can be output.

The first feedforward capacitor C _F1 may connect the first input terminal BB _IN1 and the first output terminal BB _{OUT1 .} That is, the first feedforward capacitor C _F1 may connect the gate terminal of the first transistor M ₁ and the drain terminal of the third transistor M _{3 .}

The second feedforward capacitor C _F2 may connect the second input terminal BB _IN2 and the second output terminal BB _{OUT2 .} That is, the second feedforward capacitor C _F2 may connect the gate terminal of the second transistor M ₂ and the drain terminal of the fourth transistor M _{4 .}

The first feedforward capacitor C _F1 and the second feedforward capacitor C _F2 may be implemented _{as capacitors C F} having the same capacitance.

The voltage gain of the wideband amplifier according to the present invention is obtained using the equivalent circuit illustrated in FIG. 7 , as shown in Equation 1 below.

[Equation 1]

Here, the DC voltage gain is

, and a, b, and c are as follows.

g _m1 , g _m3 are transconductances of the first transistor M ₁ and the third transistor M ₃ , and C _D1 , C _D3 are the first transistor M ₁ and the third transistor M ₃ . is a load capacitor at the drain of R _D1 , R _D3 is the load resistance at the drains of the _first and third transistors _{M 1 and M 3} _{, and C F} , C _IN , R _S are the feedforward capacitors and input capacitances and source resistance.

As illustrated in the equation (2) from the gain value calculated on the bottom by the feed-forward capacitor (C _F), 2 single pole complex (complex pole) (

,

), one real pole (

) and two complex zeros (

,

) is formed on the left-half-plane.

[Equation 2]

here

,

is located outside the bandwidth, and the X and Y values are as shown in Equation 3 below.

[Equation 3]

Therefore, the bandwidth of the amplifier circuit according to the present invention is two complex poles (

,

) is determined by the damping factor (

) and the natural frequency (

), the 3-dB bandwidth of the amplifier can be determined, as shown in Equation 4 below.

[Equation 4]

That is, the amplifier according to the present invention can determine the 3-dB bandwidth of the amplifier by adjusting the damping factor and natural frequency by adding a _{feedforward capacitor (CF ).} As shown in Figure 8 is the bandwidth of the amplifier, the bandwidth increases and with increasing capacity of the feed-forward capacitor (C _F), the damping factor decreases. If the damping factor value is selected so that the amplifier can operate stably without oscillation, it is possible to realize a wide bandwidth without increasing the chip area, increasing parasitic capacitors, non-linear characteristics, deterioration of noise, and increasing power consumption.

Referring to FIG. 9 , it can be seen that the bandwidth of the amplifier circuit according to the present invention is increased. It can be seen that when a damping factor of 0.52 is selected, the 3-dB bandwidth increases from 7.82 GHz to 11.75 GHz.

10 is an example in which the broadband amplifier according to the present invention is utilized in an RF receiver. Feed-forward capacitor (C _F) shows that to be realized by utilizing the free space between the transistor and the connection lines, a possible implementation without consuming additional chip area.

Referring to FIG. 11 , it can be seen that the 3-dB bandwidth of the RF receiver to which the broadband amplifier according to the present invention shown in FIG. 10 is applied increases from 5.9 GHz to 8.5 GHz.

The small broadband amplifier circuit according to the present invention can be utilized not only for 5G mobile communication but also for 6G mobile communication, wireless LAN, optical communication, and wired communication. It can be used in broadband amplifiers such as RF transmitters and receivers, wired communication transceivers, and baseband transceivers.

Although the preferred embodiment of the present invention has been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art using the basic concept of the present invention as defined in the following claims are also provided. is within the scope of the

Claims

A first amplification stage comprising a first transistor and a second transistor forming a differential pair, and amplifying and outputting a differential input signal input through the first input terminal and the second input terminal;

a second amplification stage comprising a third transistor and a fourth transistor forming a differential pair, amplifying a signal output from the first amplification stage and outputting it through a first output terminal and a second output terminal;

a first feedforward capacitor connecting the first input terminal and the first output terminal; and

a second feedforward capacitor connecting the second input terminal and the second output terminal

includes,

The first input terminal is connected to the first terminal of the first transistor, the second input terminal is connected to the first terminal of the second transistor, and the second terminal of the first transistor and the first terminal of the third transistor are connected. a terminal is connected, a second terminal of the second transistor is connected to a first terminal of the fourth transistor, the first output terminal is connected to a second terminal of the third transistor, and the second output terminal is connected to the first terminal 4 Amplifier circuit connected with the second terminal of the transistor.
In claim 1,

and the first to fourth transistors are metal oxide semiconductor field effect transistors (MOSFETs).
In claim 2,

The first feedforward capacitor connects the gate terminal of the first transistor and the drain terminal of the third transistor,

The second feedforward capacitor is an amplifier circuit connecting the gate terminal of the second transistor and the drain terminal of the fourth transistor.
In claim 3,

and the first amplification stage and the second amplification stage are configured as common-source amplifiers.
In claim 4,

Each source terminal of the first transistor and the second transistor is connected to a first current source for generating a constant current,

Each source terminal of the third transistor and the fourth transistor is connected to a second current source for generating a constant current,

Each drain terminal of the first transistor and the second transistor is connected to a first load resistor and a second load resistor connected to a driving voltage source,

and a drain terminal of each of the third transistor and the fourth transistor is connected to a third load resistor and a fourth load resistor connected to a driving voltage source.
In claim 5,

An amplifier circuit in which 3-dB bandwidth increases and a damping factor decreases as capacitances of the first feedforward capacitor and the second feedforward capacitor increase.