WO2021165483A1 - Module semi-conducteur de puissance - Google Patents

Module semi-conducteur de puissance Download PDF

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Publication number
WO2021165483A1
WO2021165483A1 PCT/EP2021/054188 EP2021054188W WO2021165483A1 WO 2021165483 A1 WO2021165483 A1 WO 2021165483A1 EP 2021054188 W EP2021054188 W EP 2021054188W WO 2021165483 A1 WO2021165483 A1 WO 2021165483A1
Authority
WO
WIPO (PCT)
Prior art keywords
wide bandgap
semiconductor circuits
bandgap material
power semiconductor
module
Prior art date
Application number
PCT/EP2021/054188
Other languages
English (en)
Inventor
Chunlei Liu
Jürgen Schuderer
Fabian MOHN
Marco Bellini
Peter Karl STEIMER
Original Assignee
Abb Power Grids Switzerland Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abb Power Grids Switzerland Ag filed Critical Abb Power Grids Switzerland Ag
Priority to CN202190000307.5U priority Critical patent/CN219040456U/zh
Priority to JP2022600123U priority patent/JP3240772U/ja
Priority to DE212021000316.8U priority patent/DE212021000316U1/de
Publication of WO2021165483A1 publication Critical patent/WO2021165483A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62—Protection against overvoltage, e.g. fuses, shunts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L2224/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips

Definitions

  • the invention relates to the field of power semiconductor devices.
  • the invention relates to a power semiconductor module for such devices.
  • Power semiconductor devices such as converters, electrical drives etc. are usually assembled of a plurality of power semiconductor modules, each of which mechanically and electrically connects one or more power semiconductor elements.
  • HVDC high voltage DC
  • a series connection of multiple power semiconductor modules is usually required to fulfil high voltage and high current requirements.
  • a power semiconductor module that in case of a failure becomes permanently conducting may have great advantages in such series connections, because the remaining modules can share the blocking voltage.
  • SCFM short circuit failure mode
  • One existing packaging technology which has the ability to achieve SCFM is the press-pack technology, which was developed e.g.
  • a metal preform may be formed on an electrode of a Si chip which is adapted to form a low melting eutectic alloy with the Si material of the chip and which creates a conducting path to carry the full current load through the failure point.
  • the eutectic reaction between Si and Al (aluminium) at a relative low temperature (577° C) enables such an intrinsic failure compensation. Due to their high blocking capabilities, semiconductor modules with semiconductor elements based on SiC (silicon carbide) and other wide bandgap substrates are more and more employed in high voltage applications.
  • WO 2018/ 141811 A1 discloses a power semiconductor device comprising a Si (silicon) chip providing a Si switch and a wide bandgap material chip providing a wide bandgap material switch, wherein the Si switch and the wide bandgap material switch are electrically connected in parallel.
  • WO 2018/ 065317 A1 discloses a semiconductor module comprising a semiconductor chip comprising a Si base layer and a SiC (silicon carbide) epitaxy layer on the Si base layer, the SiC epitaxy layer comprising a semiconductor element; an electrical conducting top layer for providing an electrical contact of the semiconductor module on a side of the SiC epitaxy layer; an electrical conducting bottom layer for providing an electrical contact of the semiconductor module on a side of the Si base layer; and a failure mode layer in contact with the SiC epitaxy layer and arranged between the top layer and the bottom layer, the failure mode layer comprising a metal material adapted for forming a eutectic alloy with the Si base layer, to short-circuit the semiconductor module.
  • a power semiconductor module comprises a baseplate, a wide bandgap material die comprising an array of multiple semiconductor circuits in the wide bandgap material die attached to the base plate, wherein the semiconductor circuits are separated by an edge termination area from each other, a metal preform pressed against each of the multiple semiconductor circuits to electrically contact each of the multiple semiconductor circuits and being adapted to form an at least temporary conducting path through the wide bandgap material die, when heated by an overcurrent.
  • the semiconductor circuits are connected in parallel via the base plate and the metal preform.
  • the wide bandgap material comprises silicon carbide (SiC).
  • the metal preform comprises at least one of Mo (Molybdenum), W (Wolfram), Cu (Copper) or an alloy thereof.
  • the base plate comprises at least one of Mo, W, Cu or an alloy thereof.
  • At least one of the multiple semiconductor circuits comprises at least one of an IGBT (Insulated Gate BipolarTransistor), a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor) or a diode.
  • the array of multiple semiconductor circuits comprises four semiconductor circuits connected in parallel with each other.
  • the power semiconductor module further comprises at least one press pin pressing the metal preform against each of the multiple semiconductor circuits.
  • the power semiconductor module further comprises an electrically conducting top plate connected to the at least one press pin.
  • the at least one press pin comprises a spring element.
  • a power semiconductor module comprises a baseplate, at least two module portions, at least two wide bandgap material dies each arranged in one of the at least two module portions and each comprising an array of multiple semiconductor circuits in the wide bandgap material die attached to the base plate, wherein the semiconductor circuits are separated by an edge termination area from each other.
  • the power semiconductor module further comprises at least two metal preforms each pressed against each of the multiple semiconductor circuits to electrically contact each of the multiple semiconductor circuits and being adapted to form an at least temporary conducting path through the wide bandgap material die, when heated by an overcurrent, wherein the semiconductor circuits of each of the at least two wide bandgap material dies are connected in parallel via the base plate and one of the at least two metal preforms.
  • the power semiconductor module further comprises at least two press pins pressing each of the metal preforms against each of the multiple semiconductor circuits of each of the at least two wide bandgap material dies, an electrically conducting top plate connected to the at least two press pins.
  • the at least two module portions are arranged in one package.
  • Figure 1 schematically shows an example of an embodiment of a power semiconductor module.
  • Figure 2 schematically shows another example of an embodiment of a power semiconductor module.
  • Example embodiments are provided so that this disclosure will be thorough, and will fully convey the scope to those who are skilled in the art. Numerous specific details are set forth such as examples of specific components, devices, and methods, to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to those skilled in the art that specific details need not be employed, that example embodiments may be embodied in many different forms and that neither should be construed to limit the scope of the disclosure. In some example embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.
  • SCFM Short Circuit Failure Mode
  • the invention relates to a power semiconductor module.
  • the invention relates to a High current power module design with SCFM (Short Circuit Failure Mode) formation capability.
  • SCFM Short Circuit Failure Mode
  • a new chip structure enables a high current module with SCFM.
  • the term "power” may relate to the ability to process currents of more than 10 A and/or more than 1.000 V.
  • a power semiconductor module in general may be a device mechanically supporting and providing terminals for one or more power semiconductor elements such as transistors, thyristors, diodes, etc.
  • a power semiconductor module may comprise a housing providing the terminals, in which the one or more power semiconductor elements are accommodated.
  • a power semiconductor module comprises a baseplate 10, a wide bandgap material die 12 comprising an array of multiple semiconductor circuits 11 in the wide bandgap material die 12 attached to the base plate 10, wherein the semiconductor circuits 11 are separated by an edge termination area 16 from each other.
  • the wide bandgap material may comprise silicon carbide (SiC).
  • the wide bandgap material may also be GaN, etc. It may be characterized with a semiconductor bandgap wider than that of Silicon (Si), e.g. wider than 1,1 eV.
  • a metal preform 14 is pressed against each of the multiple semiconductor circuits 11 to electrically contact each of the multiple semiconductor circuits 11 and being adapted to form an at least temporary conducting path through the wide bandgap material die 12, when heated by an overcurrent. Such an overcurrent might appear in a failure situation when one of the semiconductor circuits 11 fails.
  • the failure mode of a power electronic component can be classified as open-circuit failure or short-circuit failure.
  • Semiconductor components which fail to an open circuit are unsuitable for applications requiring series connection. Especially, in some high-power applications, the modules must be designed such that when a failure occurs, the failed module keeps carrying the load current by the formation of a stable short circuit, while the remaining modules share the blocking voltage.
  • the semiconductor circuits 11 are connected in parallel via the base plate 10 and the metal preform 14.
  • a wide bandgap material die 12 with a new chip structure with multiple small semiconductor circuits 11, being separated by an edge termination area 16 from each other, can be realized as one single large chip unit which maintains the high yield of small individual chips.
  • At least one of the multiple semiconductor circuits 11 may comprise at least one of an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor) or a diode.
  • the multiple semiconductor circuits 11 are electrically connected in parallel via the base plate and the metal preform 14 for high current classification and to guarantee Short Circuit Failure Mode (SCFM). Furthermore the multi-pin preform concept supports a uniform pressure over the complete area of the wide bandgap material die 12.
  • the metal preform 14 and / or the base plate 10 may comprise at least one of Mo (Molybdenum), W (Wolfram), Cu (Copper) or an alloy thereof. Mo may be beneficial, because it has a similar coefficient of thermal expansion as SiC or other wide bandgap materials. Furthermore, also Mo may form with the wide bandgap substrate of the wide bandgap material die 12 under higher temperature at least temporarily a conducting path.
  • the multiple semiconductor circuits 11 are connected in parallel within the power semiconductor module.
  • the semiconductor circuit 11 may be a completely passive element and/or layer only providing a rather high resistance for the current path along the metal preform 14. I.e. it may be that during normal operation no current flows through the semiconductor circuit 11 at all.
  • the metal preform 14 is adapted for forming at least a temporary conducting path through the semiconductor circuit 11, when heated by an overcurrent caused e.g. by a chip failure.
  • an overcurrent may be a current so high that the wide bandgap material, e.g. SiC, decomposes.
  • the temporary conducting path through the wide bandgap material may degrade due to the materials formed for the conducting path.
  • a SiC substrate and a metal preform may form electrically conducting substances.
  • the term "temporary" may relate to a time span much smaller than a "permanent" time span. For example a temporary time span may be shorter than 1 second.
  • the wide bandgap material die and the melted metal preform 14 form no alloy, because e.g SiC only melts at highertemperatures.
  • the low-ohmic path is formed by decomposition (e.g. by arcing) of the wide bandgap material.
  • the multiple small semiconductor circuits 11 are separated by an edge termination area 16 from each other, but are still on one single die, the necessary space for dicing the chips can be saved as well as a low resistance current path can be ensured in case of a circuit failure.
  • the array of multiple semiconductor circuits 11 may comprise e.g. three or four semiconductor circuits 11 connected in parallel with each other. With these number of semiconductor circuits 11, the yield can be maintained high while ensuring a high power application. Furthermore, a higher number of semiconductor circuits 11 on the wide bandgap material die 12 results in an increase of the active area because of saving the termination area between the semiconductor circuits 11.
  • the power semiconductor module 1 may further comprise at least one press pin 18 pressing the metal preform 14 against each of the multiple semiconductor circuits 11. A pressing force may be applied by the electrically conducting press pin 18 which is pressed against the respective metal preform 14.
  • the power semiconductor module may further comprise an electrically conducting top plate 20 connected to the at least one press pin 18.
  • the at least one press pin 18 may comprise a spring element 22, which, for example, may comprise a disc spring, a leaf spring or a coil spring.
  • the metal preform 14, the press pins 18 and/orthe spring elements 22 may be accommodated between the wide bandgap material die 12 and the top plate 20.
  • the spring element 22 further supports a uniform pressure distribution over the complete area of the wide bandgap material die 12.
  • the top plate 20 is part of the press pin 18.
  • Fig. 2 shows another embodiment of the present invention, illustrating a multichip power semiconductor module comprising two wide bandgap material dies, one in each of the module portions 31 and 32.
  • the two wide bandgap material dies are arranged on one single baseplate 10.
  • the number of dies is not limited to one or two. In one embodiment, e.g. three or six dies may be combined in one module 1. Multiple modules 1 may be combined in one package to form one single product.
  • two or more metal preforms 14 may be used to contact respective arrays of multiple semiconductor circuits 11 in a single, wide bandgap material die attached to a base plate 10 (not shown).

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Inverter Devices (AREA)

Abstract

La présente divulgation concerne un module semi-conducteur de puissance comprenant une plaque de base, une puce de matériau à large bande interdite comprenant un réseau de multiples circuits semi-conducteurs dans la puce de matériau à large bande interdite fixée à la plaque de base, les circuits semi-conducteurs étant séparés par une zone de terminaison de bord les uns des autres, une préforme métallique pressée contre chacun des multiples circuits à semi-conducteurs pour entrer en contact électrique avec chacun des multiples circuits à semi-conducteurs et conçue pour former un trajet conducteur au moins temporaire à travers la puce de matériau à large bande interdite, lorsqu'elle est chauffée par une surintensité, les circuits semi-conducteurs étant connectés en parallèle par l'intermédiaire de la plaque de base et de la préforme métallique.
PCT/EP2021/054188 2020-02-20 2021-02-19 Module semi-conducteur de puissance WO2021165483A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202190000307.5U CN219040456U (zh) 2020-02-20 2021-02-19 功率半导体模块
JP2022600123U JP3240772U (ja) 2020-02-20 2021-02-19 パワー半導体モジュール
DE212021000316.8U DE212021000316U1 (de) 2020-02-20 2021-02-19 Leistungshalbleitermodul

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP20158565.0 2020-02-20
EP20158565 2020-02-20

Publications (1)

Publication Number Publication Date
WO2021165483A1 true WO2021165483A1 (fr) 2021-08-26

Family

ID=69713961

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2021/054188 WO2021165483A1 (fr) 2020-02-20 2021-02-19 Module semi-conducteur de puissance

Country Status (4)

Country Link
JP (1) JP3240772U (fr)
CN (1) CN219040456U (fr)
DE (1) DE212021000316U1 (fr)
WO (1) WO2021165483A1 (fr)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130107600A1 (en) * 2011-10-03 2013-05-02 Panasonic Corporation Semiconductor device, power converter and method for controlling the power converter
US20160020276A1 (en) * 2014-07-15 2016-01-21 Fuji Electric Co., Ltd. Semiconductor device and method for manufacturing the same
EP3306649A1 (fr) * 2015-05-26 2018-04-11 Mitsubishi Electric Corporation Dispositif à semi-conducteur à contact par pression
WO2018065317A1 (fr) 2016-10-05 2018-04-12 Abb Schweiz Ag Module semi-conducteur à base de sic-sur-si à mode de défaillance de court-circuit
US20180151481A1 (en) * 2016-11-29 2018-05-31 Infineon Technologies Austria Ag Semiconductor Device Including a Bidirectional Switch
WO2018141811A1 (fr) 2017-02-01 2018-08-09 Abb Schweiz Ag Dispositif à semiconducteur de puissance avec mode actif de défaillance de court-circuit
WO2019011717A1 (fr) * 2017-07-13 2019-01-17 Abb Schweiz Ag Dispositif à thyristor de dérivation avec cavité d'expansion de gaz
EP3462479A1 (fr) * 2017-10-02 2019-04-03 General Electric Technology GmbH Ensemble semi-conducteur comportant protection contre les défauts électriques

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130107600A1 (en) * 2011-10-03 2013-05-02 Panasonic Corporation Semiconductor device, power converter and method for controlling the power converter
US20160020276A1 (en) * 2014-07-15 2016-01-21 Fuji Electric Co., Ltd. Semiconductor device and method for manufacturing the same
EP3306649A1 (fr) * 2015-05-26 2018-04-11 Mitsubishi Electric Corporation Dispositif à semi-conducteur à contact par pression
WO2018065317A1 (fr) 2016-10-05 2018-04-12 Abb Schweiz Ag Module semi-conducteur à base de sic-sur-si à mode de défaillance de court-circuit
US20180151481A1 (en) * 2016-11-29 2018-05-31 Infineon Technologies Austria Ag Semiconductor Device Including a Bidirectional Switch
WO2018141811A1 (fr) 2017-02-01 2018-08-09 Abb Schweiz Ag Dispositif à semiconducteur de puissance avec mode actif de défaillance de court-circuit
WO2019011717A1 (fr) * 2017-07-13 2019-01-17 Abb Schweiz Ag Dispositif à thyristor de dérivation avec cavité d'expansion de gaz
EP3462479A1 (fr) * 2017-10-02 2019-04-03 General Electric Technology GmbH Ensemble semi-conducteur comportant protection contre les défauts électriques

Also Published As

Publication number Publication date
DE212021000316U1 (de) 2022-11-16
CN219040456U (zh) 2023-05-16
JP3240772U (ja) 2023-02-03

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