WO2021163940A1 - 阵列基板、其制作方法、显示面板及显示装置 - Google Patents

阵列基板、其制作方法、显示面板及显示装置 Download PDF

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Publication number
WO2021163940A1
WO2021163940A1 PCT/CN2020/075907 CN2020075907W WO2021163940A1 WO 2021163940 A1 WO2021163940 A1 WO 2021163940A1 CN 2020075907 W CN2020075907 W CN 2020075907W WO 2021163940 A1 WO2021163940 A1 WO 2021163940A1
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WIPO (PCT)
Prior art keywords
base substrate
electrode structure
spacer
protective film
array substrate
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PCT/CN2020/075907
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English (en)
French (fr)
Inventor
刘冬妮
玄明花
郑皓亮
肖丽
陈亮
陈昊
张振宇
陈蕾
Original Assignee
京东方科技集团股份有限公司
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Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202080000146.XA priority Critical patent/CN114667604A/zh
Priority to PCT/CN2020/075907 priority patent/WO2021163940A1/zh
Publication of WO2021163940A1 publication Critical patent/WO2021163940A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

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  • the present disclosure relates to the field of display technology, and in particular to an array substrate, a manufacturing method thereof, a display panel, and a display device.
  • the borderless design of the display panel can be realized by fabricating circuit structures on both the front and back of the substrate.
  • embodiments of the present disclosure provide a manufacturing method of an array substrate, which includes:
  • Electrode structure Forming an electrode structure on the first surface of the base substrate, the electrode structure being configured to be electrically connected to a light emitting device;
  • the base substrate is turned over again, and the first protection structure is patterned to expose the electrode structure.
  • the forming the first protection structure on the side of the electrode structure away from the base substrate specifically includes:
  • a plurality of first spacers are formed on the side of the electrode structure away from the base substrate, the orthographic projection of the first spacers on the base substrate and the electrode structure on the base substrate The orthographic projections do not overlap each other;
  • a first protective film is formed on the side of the first spacer away from the base substrate.
  • the patterning of the first protection structure specifically includes:
  • the first protective film is patterned to expose at least part of the surface of the electrode structure.
  • the method before the base substrate is turned over again, the method further includes:
  • a second protection structure is formed on the side of the binding terminal away from the base substrate.
  • the forming a second protection structure on the side of the binding terminal away from the base substrate specifically includes:
  • a second spacer is formed on the side of the binding terminal away from the base substrate, and the orthographic projection of the second spacer on the base substrate and the binding terminal on the base substrate The orthographic projections do not overlap each other;
  • the second protective film is patterned to expose at least part of the surface of the binding terminal.
  • embodiments of the present disclosure also provide an array substrate, which includes:
  • An electrode structure the electrode structure is located on the first surface of the base substrate, and the electrode structure is configured to be electrically connected to a light emitting device;
  • a binding terminal is located on a second surface of the base substrate, and the second surface is disposed opposite to the first surface;
  • a first protection structure the first protection structure is located on a side of the electrode structure away from the base substrate, and the first protection structure exposes at least a part of the surface of the electrode structure.
  • the first protection structure includes:
  • a plurality of first spacers located on the side of the electrode structure away from the base substrate, and a first protective film located on the side of the first spacers away from the base substrate;
  • the orthographic projection of the first spacer on the base substrate and the orthographic projection of the electrode structure on the base substrate do not overlap each other;
  • the first protective film has a first opening area, and the orthographic projection of the electrode structure on the base substrate at least covers the orthographic projection of the first opening area on the base substrate.
  • the height of the first spacer ranges from 1 ⁇ m to 30 ⁇ m;
  • the thickness of the first protective film ranges from 1 ⁇ m to 5 ⁇ m.
  • the array substrate provided by the embodiment of the present disclosure further includes: a second protection structure
  • the second protection structure is located on a side of the binding terminal away from the base substrate.
  • the second protection structure includes:
  • the second spacer, the second spacer is located on the side of the binding terminal away from the base substrate, the orthographic projection of the second spacer on the base substrate and the binding The orthographic projections of the terminals on the base substrate do not overlap each other;
  • a second protective film is located on the side of the second spacer away from the base substrate, and the second protective film has a second opening area, and the second opening area exposes the At least part of the surface of the binding terminal.
  • embodiments of the present disclosure also provide a display panel, which includes the array substrate provided in any embodiment of the second aspect, and a plurality of light-emitting devices electrically connected to the array substrate.
  • the display panel provided by the embodiment of the present disclosure further includes: a flexible circuit board, and the flexible circuit board is electrically connected to the binding terminal.
  • the light-emitting device includes:
  • a micro light emitting device the micro light emitting device is electrically connected to the electrode structure.
  • embodiments of the present disclosure also provide a display device, including the display panel provided by any one of the embodiments of the third aspect, and an integrated circuit.
  • FIG. 1 is a schematic diagram of the structure of an array substrate in the related art
  • FIG. 2 is a schematic structural diagram of a driving pixel circuit provided by an embodiment of the disclosure.
  • 3a to 3e are structural schematic diagrams during the manufacturing process of the array substrate provided by the embodiments of the disclosure.
  • FIG. 4 is a schematic diagram of a structure of an array substrate provided by an embodiment of the disclosure.
  • FIG. 5 is a schematic top view of the structure of an array substrate provided by an embodiment of the disclosure.
  • FIG. 6 is a schematic diagram of another structure of an array substrate provided by an embodiment of the disclosure.
  • FIG. 7 is a schematic structural diagram of a display panel provided by an embodiment of the disclosure.
  • the display panel includes a display area and a frame area surrounding the display area, and a connection terminal (PAD) usually used for binding with an IC is provided in the frame area of the display panel.
  • PID connection terminal
  • the related technology proposes to realize the borderless display technology through the front and back process of the substrate, that is, the front side is the backplane design of the pixel driving circuit, and the reverse side is the binding terminal design.
  • the front side is the backplane design of the pixel driving circuit
  • the reverse side is the binding terminal design.
  • the substrate Since the circuit structure is designed on both sides of the substrate, after the circuit structure on one side is fabricated, the substrate needs to be turned over to fabricate the circuit structure on the other side. At this time, the side where the circuit structure is made needs to be in contact with the machine stage, and it needs to pass through multiple process stages to absorb and transport the machine stage, which will result in the circuit structure film on the side that is in contact with the machine stage. The layer is severely scratched.
  • FIG. 1 the structure of the array substrate in the related art is shown in FIG. 1, including: a substrate 01, each film structure on the front surface of the substrate 01, including an electrode 02 for connecting with the micro light emitting device; and the reverse side of the substrate 1 includes a binding Fixed structure 03, used for binding with flexible circuit boards, etc.
  • a protective film 04 is usually attached to the entire film structure, and after the reverse circuit structure is fabricated, the substrate is turned over and the protective film 04 is removed. Bonding of micro light emitting devices.
  • the protective film 04 will adhere to the electrode 02, etc., which affects the performance, and requires matching film tearing equipment, which will increase the production cost.
  • FIG. 1 is only described as a possible embodiment of an array substrate in the related art, and its specific structure is not specifically limited here.
  • the embodiments of the present disclosure propose an array substrate, a manufacturing method thereof, a display panel, and a display device.
  • specific implementations of the array substrate, the manufacturing method thereof, the display panel, and the display device provided by the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the preferred embodiments described below are only used to illustrate and explain the present disclosure, and are not used to limit the present disclosure. And if there is no conflict, the embodiments in the application and the features in the embodiments can be combined with each other.
  • the embodiments of the present disclosure provide a manufacturing method of an array substrate, including:
  • Electrode structure Forming an electrode structure on the first surface of the base substrate, the electrode structure being configured to be electrically connected to the light emitting device;
  • the base substrate is turned over again, and the first protection structure is patterned to expose the electrode structure.
  • an electrode structure electrically connected to the light emitting device is formed on the first surface of the base substrate, and a first protection structure is formed on the electrode structure to After turning over, the first protection structure is brought into contact with the carrier to protect the electrode structure on the first surface of the base substrate.
  • the base substrate is turned over again, The second surface of the base substrate is brought into contact with the carrier platform; then, the first protection structure is patterned to expose the covered electrode structure, thereby facilitating electrical connection with the light-emitting device later.
  • the electrode structure on the first surface of the base substrate is protected to avoid damage to the electrode structure, and there is no need to tear off the first protective structure, which simplifies the manufacturing process and saves production costs. .
  • the light-emitting device described in the embodiments of the present disclosure may be a miniature light-emitting diode chip, such as a Micro LED chip or a ⁇ LED chip or a Mini LED chip.
  • a driving pixel circuit for providing driving signals to the electrode structure is also provided between the electrode structure and the base substrate.
  • the structure and layout of the driving pixel circuit are the same as those of the driving pixel circuit in the related art, such as driving
  • the structure of the pixel circuit may be as shown in FIG. 2, including: a first transistor T1, the gate of the first transistor T1 is electrically connected to the light emission control terminal EM, and the first electrode of the first transistor T1 is connected to the first reference voltage signal terminal VDD.
  • the second electrode of the first transistor T1 is electrically connected to the first electrode of the driving transistor DT; the second transistor T2, the gate of the second transistor T2 is electrically connected to the light emission control terminal EM, and the first electrode of the second transistor T2
  • the second electrode of the driving transistor DT is electrically connected, the second electrode of the second transistor T2 is electrically connected to the first electrode of the fourth transistor T4; the third transistor T3, the gate of the third transistor T3 is electrically connected to the second scan control
  • the terminal G_B is electrically connected, the first electrode of the third transistor T3 is electrically connected to the second data signal terminal D_B, the second electrode of the third transistor T3 is electrically connected to the gate of the fourth transistor T4; the fourth transistor T4 is electrically connected to the fourth transistor T4.
  • the second electrode of the transistor T4 is electrically connected to the anode of the light emitting device L, and the cathode of the light emitting device L is electrically connected to the second reference voltage signal terminal VSS; the fifth transistor T5, the gate of the fifth transistor T5 is connected to the first scan control
  • the terminal G_A is electrically connected, the first electrode of the fifth transistor T5 is electrically connected to the first data signal terminal D_A, the second electrode of the fifth transistor T5 is electrically connected to the first electrode of the driving transistor DT, and the gate of the driving transistor DT is electrically connected to the first electrode of the driving transistor DT.
  • a voltage signal terminal V1 is electrically connected, the gate signal provided by the first voltage signal terminal V1 generates a driving current for driving the light emitting device L; a first capacitor C, the first electrode of the first capacitor C and the fourth transistor T4 The gate is electrically connected, the second electrode of the first capacitor C is electrically connected to the second voltage signal terminal V2, and the second voltage signal terminal V2 is grounded to the ground terminal GND.
  • the layout of the driving pixel circuit on the base substrate can be as shown in FIG. 3a. Of course, the structure and layout of the driving pixel circuit shown in FIGS. 2 and 3a are only described as one of the embodiments. The specific driving pixel circuit The structure and layout are not specifically limited here.
  • the pixel driving circuit and the electrode structure on the first surface of the base substrate are manufactured first, and then the binding of the second surface of the base substrate is manufactured.
  • the terminal is due to the large number of film layers located on the first surface of the base substrate, and each film layer needs to be formed through multiple processes, which requires the adsorption and transfer of the carrier through multiple process stages; and the substrate The number of film layers on the second surface of the substrate is small, and the process is simpler than that of the structure on the first surface.
  • each film layer on the first surface of the base substrate is formed first, and then each film layer on the second surface is formed.
  • the manufacturing method of the array substrate provided by the embodiment of the present disclosure, it is preferable to form the first protection structure on one side of the first surface of the base substrate because the pixel driving circuit and the electrode located on the first surface of the base substrate
  • the graphic size of the structure is small, and a slight damage may have a greater impact on the display performance.
  • forming the first protection structure on the side of the electrode structure away from the base substrate specifically includes:
  • a plurality of first spacers are formed on the side of the electrode structure away from the base substrate, and the orthographic projection of the first spacers on the base substrate and the orthographic projection of the electrode structure on the base substrate do not overlap each other;
  • a first protective film is formed on the side of the first spacer away from the base substrate.
  • the first spacers 31 can be arranged on adjacent sub-structures. In the gap area of the pixel, the first spacer 31 can be arranged between every two adjacent rows or two columns of sub-pixels, or the first spacers 31 can be arranged at intervals of two rows/columns of sub-pixels. Of course, the first spacers 31 can also be arranged at intervals. Multiple rows/columns of sub-pixels are provided with first spacers 31.
  • the structure shown in FIG. 4 is described as an example where one sub-pixel requires two electrode structures 2 to be driven. Of course, a case where one sub-pixel only needs one electrode structure 2 to be driven is also within the protection scope of the present disclosure.
  • first spacer is arranged regularly for description.
  • orthographic projection of the first spacer on the base substrate and the orthographic projection of the electrode structure on the base substrate do not overlap each other, including the irregular arrangement of the first spacers, are also within the protection scope of the present disclosure , There is no specific limitation here.
  • the first protective structure includes a first spacer and a first protective film, and the first spacer is arranged so that the first spacer of the base substrate Keep a certain distance between the film layers on the surface and the carrier platform to prevent particles from damaging the film layers.
  • the arrangement of the first protective film can cover the area where each film layer is located, and affect the first surface of the base substrate. Each layer is fully protected.
  • the orthographic projection of the first spacer on the base substrate needs to not overlap with the orthographic projection of the electrode structure on the base substrate, so as not to overlap. Shield the electrode structure. If the first spacer is arranged to overlap the electrode structure, it will not only cause difficulty in patterning the first protection structure later, but also affect the arrangement of the light emitting device.
  • the first protection structure may also include only the first protection film.
  • the specific selection can be determined according to the actual environment of the base substrate and the design parameters of the panel, which is not specifically limited here.
  • placing the first protection structure on the side away from the carrier platform and patterning the first protection structure specifically includes:
  • the first protective film is patterned to expose at least part of the surface of the electrode structure.
  • the first protective film covers the electrode structure. Therefore, the first protective film covers the electrode structure.
  • the film is patterned, at least part of the surface of the electrode structure can be exposed, so that the electrode structure can be bound to the light-emitting device to provide driving current to the light-emitting device.
  • FIGS. 3a to 3e The manufacturing method of the array substrate provided in the above embodiment will be described below by taking FIGS. 3a to 3e as an example:
  • a base substrate 1 is provided, the base substrate 1 is placed on the carrier table 10, and corresponding pixel driving circuits are sequentially formed on the base substrate 1, and located on the pixel driving circuits, And the electrode structure 2 electrically connected to the pixel driving circuit;
  • the pixel driving circuit may include a semiconductor layer P, a gate layer (G1/G2), a source and drain electrode layer (SD/DA/VDD/VSS), and an insulating layer located between the above-mentioned adjacent film layers, wherein, Only the structure of the pixel driving circuit shown in FIG. 3a is taken as an example for description, and the structure of the pixel driving circuit is not specifically limited here.
  • the first spacer 31 and the first protective film 32 are sequentially formed on the electrode structure 2, which includes the patterning process of the first spacer 31, which will not be described in detail here.
  • the base substrate 1 is turned over so that the first protective film 32 is in contact with the carrier table 10.
  • a binding terminal 4 is formed on the second surface of the base substrate 1;
  • a gate driving circuit GOA is provided between the bonding terminal 4 and the base substrate 1, and the gate driving circuit GOA is electrically connected to the bonding terminal 4 to receive
  • the gate driving circuit GOA is also electrically connected to the gate line provided on the first surface of the base substrate 1, which can be implemented by providing via holes or peripheral wiring.
  • the specific method to be used for driving can be selected according to the actual usage, which is not specifically limited here.
  • the base substrate 1 is turned over again so that the binding terminals 4 are in contact with the carrier table 10, and the first protective film 32 is patterned to expose at least part of the surface of the electrode structure 4, as shown in FIG. The array substrate shown.
  • the manufacturing method in order to protect each film layer on the second surface of the base substrate, before the base substrate is turned over again, the manufacturing method further includes:
  • a second protection structure is formed on the side of the binding terminal away from the base substrate.
  • the corresponding light-emitting device needs to be manufactured or bound at the corresponding position of the electrode structure. Therefore, it is also necessary to pass through a plurality of carrier machines.
  • the movement and adsorption process of the stage may cause damage to the film layers that have been formed on the second surface of the base substrate.
  • the second protection structure By arranging the second protection structure on the binding terminal, the film on the second surface of the base substrate can be damaged. The layer is protected, thereby improving the performance of each film layer on the second surface of the base substrate.
  • forming the second protection structure on the side of the binding terminal away from the base substrate specifically includes:
  • a second spacer is formed on the side of the binding terminal away from the base substrate, and the orthographic projection of the second spacer on the base substrate and the orthographic projection of the bound terminal on the base substrate do not overlap each other;
  • the second protective film is patterned to expose at least part of the surface of the binding terminal.
  • the second spacer and the second protective film may be sequentially formed on the binding terminals, and the second protective film The film is patterned, and the binding terminals are exposed, so that the binding terminals can be bound with the flexible circuit board or the like.
  • an embodiment of the present disclosure further provides an array substrate, including:
  • the electrode structure 2 is located on the first surface of the base substrate 1, and the electrode structure is configured to be electrically connected to the light emitting device;
  • the binding terminal 4 is located on the second surface of the base substrate 1, and the second surface is arranged opposite to the first surface;
  • the first protection structure 3 is located on the side of the electrode structure 2 away from the base substrate 1, and the first protection structure 3 exposes at least part of the surface of the electrode structure 2.
  • each film on the first surface of the base substrate can be The layer is protected to avoid damage to each layer.
  • the first protection structure has a first opening area, which can expose at least part of the surface of the electrode structure, so that the electrode structure is bound to the light-emitting device, so that the first protection structure does not need to be torn off, which simplifies the manufacturing process at the same time. , It also saves production costs.
  • the first protection structure 3 includes:
  • the orthographic projection of the first spacer 31 on the base substrate 1 and the orthographic projection of the electrode structure 2 on the base substrate 1 do not overlap each other;
  • the first protective film 32 has a first opening area, and the orthographic projection of the electrode structure 2 on the base substrate at least covers the orthographic projection of the first opening area on the base substrate, that is, a part of the surface of the electrode structure 2 is exposed.
  • the arrangement of the first spacer through the arrangement of the first spacer, it is possible to keep a certain distance between the film layers on the first surface of the base substrate and the carrier platform to avoid The particulate matter causes damage to each film layer, and the arrangement of the first protective film can cover the area where each film layer is located, and comprehensively protect each film layer on the first surface of the base substrate.
  • the first protective structure 3 may also only include the first protective film, the material of the first protective film is organic resin, and the first protective film 32 has a first opening area to expose the electrode. Part of the surface of structure 2.
  • the height of the first spacer ranges from 1 ⁇ m to 30 ⁇ m;
  • the thickness of the first protective film ranges from 1 ⁇ m to 5 ⁇ m.
  • the height of the first spacer can be based on the environment in which the array substrate is located.
  • the height of the first spacer can be set higher, for example, it can be set to be between 20 ⁇ m and 30 ⁇ m to ensure the yield of the product; if the particles that may exist in the bearing machine during the manufacturing process are small, the first spacer can be reduced.
  • the height of the spacer for example, can be set to be between 5 ⁇ m and 10 ⁇ m, which can not only ensure the product yield and the stability of the array substrate on the carrier platform, but also increase the production capacity.
  • the details can be selected according to actual needs, and there is no specific limitation here.
  • the thickness of the first protective film can be set to 1 ⁇ m to 5 ⁇ m to fully protect the electrode structure in each region.
  • the thickness of the first protective film can be selected according to actual use conditions and is not specifically limited here. It can be understood that the thickness of the first protective film is almost the same everywhere, but the distance between the first protective film and the base substrate at different positions on the surface away from the base substrate is different.
  • the first spacer and the first protective film can be formed of organic resin, which has the advantages of high temperature resistance, transparency, and high stability, and has strong adaptability to various processes.
  • the array substrate provided by the embodiment of the present disclosure, as shown in FIG. 6, further includes: a second protection structure 5;
  • the second protection structure 5 is located on the side of the binding terminal 4 away from the base substrate 1.
  • the corresponding light-emitting device needs to be fabricated or bound at the position corresponding to the electrode structure, and therefore, it needs to be moved by multiple loaders. And the adsorption process may cause damage to the film layers that have been formed on the second surface of the base substrate.
  • the film layers on the second surface of the base substrate can be protected. , Thereby improving the performance of each film layer on the second surface of the base substrate.
  • the second protection structure 5 includes:
  • the second spacer 51, the second spacer 51 is located on the side of the binding terminal 4 away from the base substrate 1, the orthographic projection of the second spacer 51 on the base substrate 1 and the binding terminal 4 on the base substrate
  • the orthographic projections on 1 do not overlap each other;
  • the second protective film 52 is located on the side of the second spacer 51 away from the base substrate 1, and the second protective film 52 has a second opening area that exposes at least part of the binding terminal 4 surface.
  • the peripheral circuit in order to realize the borderless or narrow border display of the display panel, the peripheral circuit may be fabricated on the non-display side of the base substrate, that is, the second surface of the base substrate. .
  • a second spacer and a second protective film may be fabricated on the second surface of the base substrate. Since less circuit structures are formed on the second surface of the base substrate, the space is sufficient, and a plurality of second spacers can be provided to ensure the stability of the array substrate.
  • the orthographic projection of the second spacer on the base substrate may not overlap with the orthographic projection of the first spacer on the base substrate, and an appropriate position can be selected for production according to the structure formed on the second surface of the base substrate.
  • the space on the second surface of the base substrate is relatively sufficient, and the cross-sectional size of the second spacer can be set to be relatively large, thereby reducing the number of second spacers. Of course, it can also be set to a smaller cross-sectional size.
  • the second spacer, but the increase or decrease of the number of the second spacer can be selected according to actual needs, which is not specifically limited here.
  • the second spacer when designing the position of the second spacer, it is necessary to reserve the position where the flexible circuit board is bound, so as not to affect the binding of the flexible circuit board, that is, the second spacer is on the base substrate.
  • the orthographic projection and the preset flexible circuit board area do not overlap each other.
  • the area occupied by the flexible circuit board is between 100 ⁇ m 2 and 1000 ⁇ m 2 .
  • the uniformity and flatness of the height of the second spacer should be within an acceptable range to ensure the yield of subsequent bonding of the light-emitting device.
  • the second protective film needs to be patterned before the base substrate is turned over to expose the binding terminals to facilitate subsequent binding with the flexible circuit board. That is, after patterning the second protective film, the base substrate is turned over.
  • the binding terminals are already exposed after being turned over, because the second spacer and the second protective film themselves have a certain thickness, they can support the base substrate to a certain extent, and it can also ensure that the substrate is transferred to Play a protective role in the next process.
  • embodiments of the present disclosure also provide a display panel, including: the array substrate provided in any of the above embodiments, and a plurality of light-emitting devices electrically connected to the array substrate.
  • the display panel provided by the embodiment of the present disclosure further includes: a flexible circuit board, and the flexible circuit board is electrically connected to the binding terminal.
  • the light emitting device includes:
  • the micro light emitting device is electrically connected to the electrode structure.
  • the micro light emitting device L includes two electrode pins L1 and L2 to be bound to two electrode structures 2 respectively, wherein the electrode pin L1 receives the data signal from the SD electrode, and the electrode pin L2 receives the data signal from the SD electrode. Low voltage or voltage to ground from the VSS electrode.
  • the micro light emitting device when the light emitting device is a micro light emitting device, the micro light emitting device can be directly bound to the electrode structure, and the process is simple.
  • the light-emitting device may also be an organic electroluminescence device, that is, a film layer such as a light-emitting layer is formed on the electrode structure.
  • a film layer such as a light-emitting layer is formed on the electrode structure.
  • the specific type of light-emitting device used can be selected according to actual use conditions, and is not specifically limited here.
  • embodiments of the present disclosure also provide a display device, which includes the display panel provided by any of the above-mentioned embodiments, and a driving IC.
  • the display panel and the display device have all the advantages of the array substrate provided by the above-mentioned embodiments, which can be implemented with reference to the above-mentioned embodiments of the array substrate, and will not be repeated here.
  • the embodiments of the present disclosure provide an array substrate, a manufacturing method thereof, a display panel, and a display device.
  • the manufacturing method adopts forming an electrode structure electrically connected to a light emitting device on a first surface of a base substrate, and forming a first electrode structure on the electrode structure.
  • the protective structure is used to make the first protective structure contact with the carrier table after being turned over to protect the electrode structure on the first surface of the base substrate.
  • the first protective structure is turned over again
  • the base substrate makes the second surface of the base substrate contact the carrier; then, the first protection structure is patterned to expose the covered electrode structure to facilitate subsequent electrical connection with the light-emitting device.
  • the electrode structure on the first surface of the base substrate is protected to avoid damage to the electrode structure, and there is no need to tear off the first protective structure, which simplifies the manufacturing process and saves production costs. .

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Abstract

阵列基板、其制作方法、显示面板及显示装置，阵列基板的制作方法包括：提供一衬底基板(1)；在衬底基板(1)的第一表面依次形成电极结构(2)；在电极结构(2)背离衬底基板(1)一侧形成覆盖衬底基板(1)的第一保护结构(3)；翻转衬底基板(1)，使第一保护结构(3)贴附于承载机台上；在衬底基板(1)的第二表面形成绑定端子(4)，第二表面与第一表面相对设置；再次翻转衬底基板(1)，对第一保护结构(3)进行构图，暴露出电极结构(2)。通过该制作方法，既对衬底基板(1)第一表面的电极结构(2)进行了保护，以免对电极结构(2)产生损伤，也无需对第一保护结构(3)进行撕除，简化了制作工艺的同时，也节约了生产成本。

Description

阵列基板、其制作方法、显示面板及显示装置 技术领域
本公开涉及显示技术领域，尤其涉及阵列基板、其制作方法、显示面板及显示装置。
背景技术
随着显示技术的发展，全面屏显示日益受到人们的青睐，可以通过在基板的正反面均制作电路结构，来实现显示面板的无边框设计。
发明内容
第一方面，本公开实施例提供了阵列基板的制作方法，其中，包括：
提供一衬底基板；
在所述衬底基板的第一表面形成电极结构，所述电极结构被配置为与发光器件电连接；
在所述电极结构背离所述衬底基板一侧形成覆盖所述衬底基板的第一保护结构；
翻转所述衬底基板；
在所述衬底基板的第二表面形成绑定端子，所述第二表面与所述第一表面相对设置；
再次翻转所述衬底基板，对所述第一保护结构进行构图，暴露出所述电极结构。
在一种可能的实施方式中，在本公开实施例提供的阵列基板的制作方法中，所述在所述电极结构背离所述衬底基板一侧形成第一保护结构，具体包括：
在所述电极结构背离所述衬底基板一侧形成多个第一隔垫物，所述第一 隔垫物在所述衬底基板上的正投影与所述电极结构在所述衬底基板上的正投影互不重叠；
在所述第一隔垫物背离所述衬底基板一侧形成第一保护膜。
在一种可能的实施方式中，在本公开实施例提供的阵列基板的制作方法中，所述对所述第一保护结构进行构图，具体包括：
对所述第一保护膜进行构图，以暴露所述电极结构的至少部分表面。
在一种可能的实施方式中，在本公开实施例提供的阵列基板的制作方法中，在再次翻转所述衬底基板之前，还包括：
在所述绑定端子背离所述衬底基板一侧形成第二保护结构。
在一种可能的实施方式中，在本公开实施例提供的阵列基板的制作方法中，所述在所述绑定端子背离所述衬底基板一侧形成第二保护结构，具体包括：
在所述绑定端子背离所述衬底基板一侧形成第二隔垫物，所述第二隔垫物在所述衬底基板上的正投影与所述绑定端子在所述衬底基板上的正投影互不重叠；
在所述第二隔垫物上形成第二保护膜；
对所述第二保护膜进行构图，以暴露所述绑定端子的至少部分表面。
第二方面，本公开实施例还提供了一种阵列基板，其中，包括：
衬底基板；
电极结构，所述电极结构位于所述衬底基板的第一表面，所述电极结构被配置为与发光器件电连接；
绑定端子，所述绑定端子位于所述衬底基板的第二表面，所述第二表面与所述第一表面相对设置；
第一保护结构，所述第一保护结构位于所述电极结构背离所述衬底基板一侧，所述第一保护结构暴露所述电极结构的至少部分表面。
在一种可能的实施方式中，在本公开实施例提供的阵列基板中，所述第一保护结构包括：
位于所述电极结构背离所述衬底基板一侧的多个第一隔垫物，以及位于所述第一隔垫物背离所述衬底基板一侧的第一保护膜；
所述第一隔垫物在所述衬底基板上的正投影与所述电极结构在所述衬底基板上的正投影互不重叠；
所述第一保护膜具有第一开口区域，所述电极结构在所述衬底基板上的正投影至少覆盖所述第一开口区域在所述衬底基板上的正投影。
在一种可能的实施方式中，在本公开实施例提供的阵列基板中，所述第一隔垫物的高度的取值范围在1μm～30μm；
所述第一保护膜的厚度的取值范围在1μm～5μm。
在一种可能的实施方式中，在本公开实施例提供的阵列基板中，还包括：第二保护结构；
所述第二保护结构位于所述绑定端子背离所述衬底基板的一侧。
在一种可能的实施方式中，在本公开实施例提供的阵列基板中，所述第二保护结构包括：
第二隔垫物，所述第二隔垫物位于所述绑定端子背离所述衬底基板一侧，所述第二隔垫物在所述衬底基板上的正投影与所述绑定端子在所述衬底基板上的正投影互不重叠；
第二保护膜，所述第二保护膜位于所述第二隔垫物背离所述衬底基板一侧，且所述第二保护膜具有第二开口区域，所述第二开口区域暴露所述绑定端子的至少部分表面。
第三方面，本公开实施例还提供了一种显示面板，其中，包括第二方面任一实施例提供的阵列基板，以及与所述阵列基板电连接的多个发光器件。
在一种可能的实施方式中，在本公开实施例提供的显示面板中，还包括：柔性电路板，所述柔性电路板与所述绑定端子电连接。
在一种可能的实施方式中，在本公开实施例提供的显示面板中，所述发光器件包括：
微型发光器件，所述微型发光器件与所述电极结构电连接。
第四方面，本公开实施例还提供了一种显示装置，包括第三方面任一实施例提供的显示面板，以及集成电路。
附图说明
图1为相关技术中的阵列基板的结构示意图；
图2为本公开实施例提供的一种驱动像素电路的结构示意图；
图3a至图3e为本公开实施例提供的阵列基板制作过程中的结构示意图；
图4为本公开实施例提供的阵列基板的一种结构示意图；
图5为本公开实施例提供的阵列基板的俯视结构示意图；
图6为本公开实施例提供的阵列基板的另一种结构示意图；
图7为本公开实施例提供的显示面板的结构示意图。
具体实施方式
相关技术中，显示面板包括显示区域和围绕显示区域的边框区域，通常用于与IC绑定的接线端子(PAD)设置在显示面板的边框区域。而全屏无边框的显示产品，可以使用户获得更好的观看体验，日益受到用户的青睐。
为了实现无边框显示，相关技术中提出通过基板的正反面工艺实现无边框显示技术，即正面为像素驱动电路的背板设计，反面为绑定端子设计，通过在基板上设置通孔，再在通孔中填入金属实现正反面信号的连接。
由于基板的正反两面均存在电路结构的设计，因此在制作完一面的电路结构以后，需要将基板进行翻转，以制作另一面的电路结构。此时，制作有电路结构的一面需要与机台载台接触，并且需要经过多个工艺段的机台载台的吸附及传送，会导致与机台载台接触一面上已制作的电路结构膜层刮伤严重。
其中，相关技术中的阵列基板的结构如图1所示，包括：基板01，位于基板01正面的各膜层结构，包括电极02，用于与微型发光器件连接；而基板1的反面包括绑定结构03，用于与柔性电路板等进行绑定。为在制作反面电 路结构之前对正面膜层结构进行保护，通常会在整面膜层结构上方贴附保护膜04，并在反面电路结构制作完成后，再翻转基板撕除该保护膜04，以进行微型发光器件的绑定。但是，该种方式保护膜04会与电极02等存在粘连影响使用性能，并且需要配套的撕膜设备，会增加生产成本。
需要说明的是，图1仅作为相关技术中一种可能的阵列基板实施例进行说明，针对其具体结构在此不作具体限定。
基于相关技术中存在的上述问题，本公开实施例提出了阵列基板、其制作方法、显示面板及显示装置。为了使本公开的目的，技术方案和优点更加清楚，下面结合附图，对本公开实施例提供的阵列基板、其制作方法、显示面板及显示装置的具体实施方式进行详细地说明。应当理解，下面所描述的优选实施例仅用于说明和解释本公开，并不用于限定本公开。并且在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
除非另外定义，本公开使用的技术用语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
附图中各部件的形状和大小不反应真实比例，目的只是示意说明本公开内容。
具体地，本公开实施例提供了一种阵列基板的制作方法，包括：
提供一衬底基板；
在该衬底基板的第一表面形成电极结构，该电极结构被配置为与发光器件电连接；
在该电极结构背离衬底基板一侧形成覆盖衬底基板的第一保护结构；
翻转衬底基板；
在该衬底基板的第二表面形成绑定端子，其中，第二表面与第一表面相对设置；
再次翻转衬底基板，对第一保护结构进行构图，暴露出电极结构。
具体地，在本公开实施例提供的阵列基板的制作方法中，首先，在衬底基板的第一表面形成与发光器件电连接的电极结构，并在该电极结构上形成第一保护结构，以在翻转后使第一保护结构与承载机台接触，对衬底基板的第一表面的电极结构进行保护，在衬底基板的第二表面制作完绑定端子之后，再次翻转该衬底基板，使衬底基板的第二表面与承载机台接触；然后，对第一保护结构进行构图，以暴露被覆盖的电极结构，从而便于之后与发光器件电连接。通过该制作方法，既对衬底基板第一表面的电极结构进行了保护，以免对电极结构产生损伤，也无需对第一保护结构进行撕除，简化了制作工艺的同时，也节约了生产成本。
本公开实施例说描述的发光器件，可以为微型发光二极管芯片，如Micro LED芯片或μLED芯片或Mini LED芯片。
其中，在电极结构与衬底基板之间还设置有用于向电极结构提供驱动信号的驱动像素电路，该驱动像素电路的结构及布局与相关技术中的驱动像素电路的结构及布局相同，如驱动像素电路的结构可以如图2所示，包括：第一晶体管T1，该第一晶体管T1的栅极与发光控制端EM电连接，第一晶体管T1的第一极与第一参考电压信号端VDD电连接，第一晶体管T1的第二极与驱动晶体管DT的第一极电连接；第二晶体管T2，该第二晶体管T2的栅极与发光控制端EM电连接，第二晶体管T2的第一极与驱动晶体管DT的第二极电连接，第二晶体管T2的第二极与第四晶体管T4的第一极电连接；第三晶体管T3，该第三晶体管T3的栅极与第二扫描控制端G_B电连接，第三晶体管T3的第一极与第二数据信号端D_B电连接，第三晶体管T3的第二极与第四晶体管T4的栅极电连接；第四晶体管T4，该第四晶体管T4的第二极与 发光器件L的阳极电连接，该发光器件L的阴极与第二参考电压信号端VSS电连接；第五晶体管T5，该第五晶体管T5的栅极与第一扫描控制端G_A电连接，第五晶体管T5的第一极与第一数据信号端D_A电连接，第五晶体管T5的第二极与驱动晶体管DT的第一极电连接，驱动晶体管DT的栅极与第一电压信号端V1电连接，第一电压信号端V1提供的栅极信号生成用于驱动发光器件L的驱动电流；第一电容C，该第一电容C的第一电极与第四晶体管T4的栅极电连接，第一电容C的第二电极与第二电压信号端V2电连接，第二电压信号端V2接地端GND。驱动像素电路在衬底基板上的布局可以如图3a中所示，当然，上述图2和图3a所示的驱动像素电路的结构和布局仅作为其中一个实施例进行说明，具体驱动像素电路的结构及布局在此不作具体限定。
需要说明的是，在本公开实施例提供的阵列基板的制作方法中，采用先制作衬底基板的第一表面的像素驱动电路和电极结构，然后再制作衬底基板的第二表面的绑定端子，是由于位于衬底基板的第一表面的膜层数目较多，每个膜层需要经过多道工艺形成，从而需要经过多个工艺段的承载机台的吸附及传送；而位于衬底基板的第二表面的膜层数目较少，其工艺过程相对于第一表面上的结构的制作简单。若先制作衬底基板第二表面的各膜层，再制作第一表面的各膜层，第二表面的各膜层则需要经过多个工艺段的承载机台的吸附及传送，从而会造成第二表面的各膜层的严重损伤。因此，采用先形成衬底基板的第一表面的各膜层，再形成第二表面的各膜层。
其中，在本公开实施例提供的阵列基板的制作方法中，优选在衬底基板的第一表面的一侧形成第一保护结构，是因为位于衬底基板的第一表面的像素驱动电路及电极结构的图形尺寸均较小，出现轻微的损伤即可能对显示性能产生较大的影响。
可选地，在本公开实施了提供的阵列基板的制作方法中，在电极结构背离衬底基板一侧形成第一保护结构，具体包括：
在电极结构背离衬底基板一侧形成多个第一隔垫物，第一隔垫物在衬底 基板上的正投影与电极结构在衬底基板上的正投影互不重叠；
在第一隔垫物背离衬底基板一侧形成第一保护膜。
如图4和图5所示，为了使第一隔垫物31不对各电极结构2产生遮挡，保证正常显示的同时提高显示面板的分辨率，可以将第一隔垫物31设置在相邻子像素的间隙区域处，其中，可以在每相邻两行或两列子像素之间均设置第一隔垫物31，也可以间隔两行/列子像素设置第一隔垫物31，当然也可以间隔多行/列子像素设置第一隔垫物31。其中图4所示的结构是以一个子像素需要两个电极结构2进行驱动为例进行说明的，当然一个子像素只需一个电极结构2进行驱动的情况，也在本公开的保护范围内。
需要说明的是，图4和图5所示第一隔垫物与电极结构之间的相对位置关系，仅作为一种实施例进行说明，即是以第一隔垫物进行规律排列进行说明，其他第一隔垫物在衬底基板上的正投影与电极结构在衬底基板上的正投影互不重叠的情况，包括第一隔垫物不规则排列的情况也在本公开的保护范围内，在此不作具体限定。
具体地，在本公开实施例提供的阵列基板的制作方法中，该第一保护结构包括第一隔垫物和第一保护膜，该第一隔垫物的设置可以使衬底基板的第一表面的各膜层与承载机台之间保持一定的距离，以避免颗粒物对各膜层产生损伤，该第一保护膜的设置可以覆盖各膜层所在的区域，对衬底基板第一表面的各膜层进行全面的保护。
需要说明的是，在本公开实施例提供的阵列基板的制作方法中，该第一隔垫物在衬底基板上的正投影需要与电极结构在衬底基板上的正投影互不重叠，以免对电极结构进行遮挡。若将该第一隔垫物设置为与电极结构存在交叠，不仅给之后的对第一保护结构的构图造成困难，还会影响发光器件的设置。
在具体实施时，第一保护结构也可以仅包括第一保护膜，具体如何选择可根据衬底基板实际所处的环境，及对面板的设计参数来确定，在此不作具体限定。
可选地，在本公开实施例提供的阵列基板的制作方法中，将第一保护结构置于背离承载机台的一侧，并对第一保护结构进行构图，具体包括：
对第一保护膜进行构图，以暴露电极结构的至少部分表面。
具体地，在本公开实施例提供的阵列基板的制作方法中，由于第一隔垫物与电极结构不存在交叠区域，仅第一保护膜对电极结构进行覆盖，因此，通过对第一保护膜进行构图，即可暴露电极结构的至少部分表面，以使该电极结构与发光器件进行绑定，向发光器件提供驱动电流。
下面以图3a至图3e为例对上述实施例提供的阵列基板的制作方法进行说明：
如图3a所示，提供一衬底基板1，将该衬底基板1放置于承载机台10上，并在该衬底基板1上依次形成对应的像素驱动电路，以及位于像素驱动电路上，且与该像素驱动电路电连接的电极结构2；
其中，该像素驱动电路可以包括半导体层P，栅极层(G1/G2)，源漏电极层(SD/DA/VDD/VSS)，以及位于上述相邻膜层之间的绝缘层，其中，仅是以图3a所示的像素驱动电路的结构为例进行说明，在此并不对像素驱动电路的结构进行具体限定。
如图3b所示，在电极结构2上依次形成第一隔垫物31和第一保护膜32，其中，包括对第一隔垫物31的构图过程，在此不再详述。
如图3c所示，将衬底基板1进行翻转，使该第一保护膜32与承载机台10接触。
如图3d所示，在衬底基板1的第二表面形成绑定端子4；
需要说明的是，在本公开实施例提供的阵列基板中，在采用驱动芯片进行驱动时，则无需在绑定端子4与衬底基板1之间设置栅极驱动电路GOA，驱动芯片可以直接向各栅线提供驱动信号；而如图3d所示，在绑定端子4与衬底基板1之间设置有栅极驱动电路GOA，该栅极驱动电路GOA与绑定端子4电连接，以接收所绑定的柔性电路板提供的信号，该栅极驱动电路GOA还与衬底基板1的第一表面设置的栅线存在电连接，具体可以通过设置过孔 或周边走线的方式实现。具体采用何种方式进行驱动可根据实际使用情况进行选择，在此不作具体限定。
如图3e所示，将衬底基板1进行再次翻转，使绑定端子4与承载机台10接触，对第一保护膜32进行构图，以暴露电极结构4的至少部分表面，形成如图4所示的阵列基板。
可选地，在本公开实施例提供的阵列基板的制作方法中，为了对衬底基板的第二表面的各膜层进行保护，在再次翻转衬底基板之前，该制作方法还包括：
在绑定端子背离衬底基板一侧形成第二保护结构。
具体地，在本公开实施例提供的阵列基板的制作方法中，在暴露出电极结构以后，还需要在电极结构对应的位置制作或者绑定相应的发光器件，因此，还需要经过多个承载机台的移动和吸附的过程，可能对衬底基板的第二表面已经形成的各膜层产生损伤，通过在绑定端子上设置第二保护结构，可以对衬底基板位于第二表面的各膜层进行保护，从而提高衬底基板的第二表面的各膜层的使用性能。
可选地，在本公开实施例提供的阵列基板的制作方法中，在绑定端子背离衬底基板一侧形成第二保护结构，具体包括：
在绑定端子背离衬底基板一侧形成第二隔垫物，第二隔垫物在衬底基板上的正投影与绑定端子在衬底基板上的正投影互不重叠；
在第二隔垫物上形成第二保护膜；
对第二保护膜进行构图，以暴露绑定端子的至少部分表面。
具体地，在本公开实施例提供的阵列基板的制作方法中，在形成完绑定端子之后，可以在绑定端子上依次形成第二隔垫物和第二保护膜，并通过对第二保护膜进行构图，暴露绑定端子，以便于绑定端子与柔性电路板等进行绑定。
基于同一发明构思，如图4所示，本公开实施例还提供了一种阵列基板，包括：
衬底基板1；
电极结构2，电极结构2位于衬底基板1的第一表面，该电极结构被配置为与发光器件电连接；
绑定端子4，绑定端子4位于衬底基板1的第二表面，第二表面与第一表面相对设置；
第一保护结构3，第一保护结构3位于电极结构2背离衬底基板1一侧，第一保护结构3暴露电极结构2的至少部分表面。
具体地，在本公开实施例提供的阵列基板中，通过第一保护结构的设置，可以在衬底基板的第一表面朝向承载机台时，对位于衬底基板的第一表面上的各膜层进行保护，以免使各膜层产生损伤。并且该第一保护结构存在第一开口区域，可以暴露电极结构的至少部分表面，以便该电极结构与发光器件进行绑定，从而不必对该第一保护结构进行撕除，简化了制备工艺的同时，也节约了生产成本。
可选地，在本公开实施例提供的阵列基板中，如图4所示，该第一保护结构3包括：
位于电极结构2背离衬底基板1一侧的多个第一隔垫物31，以及位于第一隔垫物31背离衬底基板1一侧的第一保护膜32；
第一隔垫物31在衬底基板1上的正投影与电极结构2在衬底基板1上的正投影互不重叠；
第一保护膜32具有第一开口区域，电极结构2在衬底基板上的正投影至少覆盖第一开口区域在衬底基板上的正投影，即暴露出电极结构2的部分表面。
具体地，在本公开实施例提供的阵列基板中，通过该第一隔垫物的设置，可以使衬底基板的第一表面的各膜层与承载机台之间保持一定的距离，以避免颗粒物对各膜层产生损伤，该第一保护膜的设置可以覆盖各膜层所在的区域，对衬底基板第一表面的各膜层进行全面的保护。
在本公开提供的另一些实施例中，第一保护结构3也可以只包括第一保 护膜，第一保护膜的材料为有机树脂，第一保护膜32具有第一开口区域，以暴露出电极结构2的部分表面。
可选地，在本公开实施例提供的阵列基板中，第一隔垫物的高度的取值范围在1μm～30μm；
第一保护膜的厚度的取值范围在1μm～5μm。
具体地，在本公开实施例提供的阵列基板中，该第一隔垫物的高度可根据该阵列基板所处的环境，如在制作过程中承载机台可能存在较大的颗粒物时，需要将第一隔垫物的高度设置的高一些，如可设置为在20μm～30μm之间，以保证产品的良率；若在制作过程中承载机台可能存在的颗粒物较小，则可以降低第一隔垫物的高度，如可以设置为在5μm～10μm之间，既可以保证产品的良率以及阵列基板在承载机台上的稳定性，也可以增加产能。具体可根据实际需要进行选择，在此不作具体限定。同理，可将第一保护膜的厚度设置为1μm～5μm，以对各区域的电极结构进行全面的保护，该第一保护膜的厚度可根据实际使用情况进行选择，在此不作具体限定。可以理解的是，第一保护膜在各处的厚度几乎一致，但第一保护膜在远离衬底基板的表面在不同位置处与衬底基板之间的距离是不一样的。
其中，该第一隔垫物和第一保护膜可采用有机树脂形成，其具有耐高温、透明、稳定性高等优点，对各工艺的适应性强。
可选地，在本公开实施例提供的阵列基板中，如图6所示，还包括：第二保护结构5；
第二保护结构5位于绑定端子4背离衬底基板1的一侧。
具体地，在本公开实施例提供的阵列基板中，在暴露出电极结构以后，还需要在电极结构对应的位置制作或者绑定相应的发光器件，因此，还需要经过多个承载机台的移动和吸附的过程，可能对衬底基板的第二表面已经形成的各膜层产生损伤，通过在绑定端子上设置第二保护结构，可以对衬底基板位于第二表面的各膜层进行保护，从而提高衬底基板的第二表面的各膜层的使用性能。
可选地，在本公开实施例提供的阵列基板中，如图6所示，第二保护结构5包括：
第二隔垫物51，第二隔垫物51位于绑定端子4背离衬底基板1一侧，第二隔垫物51在衬底基板1上的正投影与绑定端子4在衬底基板1上的正投影互不重叠；
第二保护膜52，第二保护膜52位于第二隔垫物51背离衬底基板1一侧，且第二保护膜52具有第二开口区域，第二开口区域暴露绑定端子4的至少部分表面。
具体地，在本公开实施例提供的阵列基板中，为了实现显示面板的无边框或窄边框显示，可以将周边电路的部分制作在衬底基板的非显示侧，即衬底基板的第二表面。为了对位于衬底基板上的第二表面的各膜层进行保护，可以在衬底基板的第二表面制作第二隔垫物和第二保护膜。由于衬底基板的第二表面所形成电路结构较少，因此空间比较充足，可以设置多个第二隔垫物以保证阵列基板的稳定性。
其中，第二隔垫物在衬底基板的正投影可以不与第一隔垫物在衬底基板的正投影重合，可根据衬底基板第二表面形成的结构选择恰当的位置进行制作，由于衬底基板的第二表面的空间比较充足，第二隔垫物截面的尺寸可以设置的相对较大，从而减小第二隔垫物的个数设置，当然也可以设置为较小截面尺寸的第二隔垫物，但是增减第二隔垫物设置的数量，可根据实际需要进行选择，在此不作具体限定。
需要说明的是，设计第二隔垫物所在的位置时，需要将绑定柔性电路板的位置进行预留，从而不影响柔性电路板的绑定，即第二隔垫物在衬底基板上的正投影与预设的柔性电路板所在区域互不重叠。其中，该柔性电路板所占区域在100μm 2～1000μm 2之间。此外，第二隔垫物高度的均一性和平整性应该在可接受的范围内，以保证后续绑定发光器件的良率。
具体地，在依次形成第二隔垫物和第二保护膜后，在翻转衬底基板之前需要对第二保护膜进行构图，以暴露出绑定端子，便于后期与柔性电路板进 行绑定。即在对第二保护膜进行构图后在对衬底基板进行翻转。虽然在翻转后绑定端子已经处于暴露状态，但是，由于第二隔垫物和第二保护膜本身具有一定的厚度，对衬底基板起到一定的支撑作用，也可以保证基板在被传送至下一工艺中起到保护作用。
基于同一发明构思，本公开实施例还提供了一种显示面板，包括：上述任一实施例提供的阵列基板，以及与阵列基板电连接的多个发光器件。
可选地，在本公开实施例提供的显示面板中，还包括：柔性电路板，柔性电路板与绑定端子电连接。
可选地，在本公开实施例提供的显示面板中，该发光器件包括：
微型发光器件，微型发光器件与电极结构电连接。
如图7所示，该微型发光器件L包括两个电极引脚L1、L2分别与两个电极结构2进行绑定，其中，电极引脚L1接收来自SD电极的数据信号，电极引脚L2接收来自VSS电极提供的低电压或对地电压。
其中，当该发光器件为微型发光器件时，可以直接将该微型发光器件与电极结构进行绑定，工艺简单。
当然，该发光器件也可以为有机电致发光器件，即在电极结构上形成发光层等膜层，具体采用哪种类型的发光器件，可以根据实际使用情况进行选择，在此不作具体限定。
基于同一发明构思，本公开实施例还提供了一种显示装置，该显示装置包括上述任一实施例提供的显示面板，以及驱动IC。
其中，该显示面板和显示装置具有上述实施例提供的阵列基板的全部优点，可参见上述阵列基板的实施例进行实施，在此不再赘述。
本公开实施例提供了阵列基板、其制作方法、显示面板及显示装置，该制作方法采用在衬底基板的第一表面形成与发光器件电连接的电极结构，并在该电极结构上形成第一保护结构，以在翻转后使第一保护结构与承载机台接触，对衬底基板的第一表面的电极结构进行保护，在衬底基板的第二表面制作完绑定端子之后，再次翻转该衬底基板，使衬底基板的第二表面与承载 机台接触；然后，对第一保护结构进行构图，以暴露被覆盖的电极结构，从而便于之后与发光器件电连接。通过该制作方法，既对衬底基板第一表面的电极结构进行了保护，以免对电极结构产生损伤，也无需对第一保护结构进行撕除，简化了制作工艺的同时，也节约了生产成本。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (14)

  1. 一种阵列基板的制作方法，其中，包括：
    提供一衬底基板；
    在所述衬底基板的第一表面形成电极结构，所述电极结构被配置为与发光器件电连接；
    在所述电极结构背离所述衬底基板一侧形成覆盖所述衬底基板的第一保护结构；
    翻转所述衬底基板；
    在所述衬底基板的第二表面形成绑定端子，所述第二表面与所述第一表面相对设置；
    再次翻转所述衬底基板，对所述第一保护结构进行构图，暴露出所述电极结构。
  2. 如权利要求1所述的阵列基板的制作方法，其中，所述在所述电极结构背离所述衬底基板一侧形成第一保护结构，具体包括：
    在所述电极结构背离所述衬底基板一侧形成多个第一隔垫物，所述第一隔垫物在所述衬底基板上的正投影与所述电极结构在所述衬底基板上的正投影互不重叠；
    在所述第一隔垫物背离所述衬底基板一侧形成第一保护膜。
  3. 如权利要求2所述的阵列基板的制作方法，其中，所述对所述第一保护结构进行构图，具体包括：
    对所述第一保护膜进行构图，以暴露所述电极结构的至少部分表面。
  4. 如权利要求1所述的阵列基板的制作方法，其中，在再次翻转所述衬底基板之前，还包括：
    在所述绑定端子背离所述衬底基板一侧形成第二保护结构。
  5. 如权利要求4所述的阵列基板的制作方法，其中，所述在所述绑定端子背离所述衬底基板一侧形成第二保护结构，具体包括：
    在所述绑定端子背离所述衬底基板一侧形成第二隔垫物，所述第二隔垫物在所述衬底基板上的正投影与所述绑定端子在所述衬底基板上的正投影互不重叠；
    在所述第二隔垫物上形成第二保护膜；
    对所述第二保护膜进行构图，以暴露所述绑定端子的至少部分表面。
  6. 一种阵列基板，其中，包括：
    衬底基板；
    电极结构，所述电极结构位于所述衬底基板的第一表面，所述电极结构被配置为与发光器件电连接；
    绑定端子，所述绑定端子位于所述衬底基板的第二表面，所述第二表面与所述第一表面相对设置；
    第一保护结构，所述第一保护结构位于所述电极结构背离所述衬底基板一侧，所述第一保护结构暴露所述电极结构的至少部分表面。
  7. 如权利要求6所述的阵列基板，其中，所述第一保护结构包括：
    位于所述电极结构背离所述衬底基板一侧的多个第一隔垫物，以及位于所述第一隔垫物背离所述衬底基板一侧的第一保护膜；
    所述第一隔垫物在所述衬底基板上的正投影与所述电极结构在所述衬底基板上的正投影互不重叠；
    所述第一保护膜具有第一开口区域，所述电极结构在所述衬底基板上的正投影至少覆盖所述第一开口区域在所述衬底基板上的正投影。
  8. 如权利要求7所述的阵列基板，其中，所述第一隔垫物的高度的取值范围在1μm～30μm；
    所述第一保护膜的厚度的取值范围在1μm～5μm。
  9. 如权利要求6所述的阵列基板，其中，还包括：第二保护结构；
    所述第二保护结构位于所述绑定端子背离所述衬底基板的一侧。
  10. 如权利要求9所述的阵列基板，其中，所述第二保护结构包括：
    第二隔垫物，所述第二隔垫物位于所述绑定端子背离所述衬底基板一侧， 所述第二隔垫物在所述衬底基板上的正投影与所述绑定端子在所述衬底基板上的正投影互不重叠；
    第二保护膜，所述第二保护膜位于所述第二隔垫物背离所述衬底基板一侧，且所述第二保护膜具有第二开口区域，所述第二开口区域暴露所述绑定端子的至少部分表面。
  11. 一种显示面板，其中，包括权利要求6-10任一项所述的阵列基板，以及与所述阵列基板电连接的多个发光器件。
  12. 如权利要求11所述的显示面板，其中，还包括：柔性电路板，所述柔性电路板与所述绑定端子电连接。
  13. 如权利要求11所述的显示面板，其中，所述发光器件包括：
    微型发光器件，所述微型发光器件与所述电极结构电连接。
  14. 一种显示装置，其中，包括权利要求11-13任一项所述的显示面板，以及集成电路。
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