WO2021149962A1 - Circuit de détection de capacité - Google Patents

Circuit de détection de capacité Download PDF

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Publication number
WO2021149962A1
WO2021149962A1 PCT/KR2021/000438 KR2021000438W WO2021149962A1 WO 2021149962 A1 WO2021149962 A1 WO 2021149962A1 KR 2021000438 W KR2021000438 W KR 2021000438W WO 2021149962 A1 WO2021149962 A1 WO 2021149962A1
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WO
WIPO (PCT)
Prior art keywords
constant current
voltage
signal
during
period
Prior art date
Application number
PCT/KR2021/000438
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English (en)
Korean (ko)
Inventor
송청담
Original Assignee
송청담
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 송청담 filed Critical 송청담
Priority to US17/793,170 priority Critical patent/US20230341450A1/en
Publication of WO2021149962A1 publication Critical patent/WO2021149962A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605—Measuring capacitance
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/94—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the way in which the control signals are generated
    • H03K17/945—Proximity switches
    • H03K17/955—Proximity switches using a capacitive detector
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/96—Touch switches
    • H03K2217/9607—Capacitive touch switches
    • H03K2217/96071—Capacitive touch switches characterised by the detection principle
    • H03K2217/96073—Amplitude comparison
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/94—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00 characterised by the way in which the control signal is generated
    • H03K2217/96—Touch switches
    • H03K2217/9607—Capacitive touch switches
    • H03K2217/960735—Capacitive touch switches characterised by circuit details
    • H03K2217/96074—Switched capacitor

Definitions

  • the present invention relates to a capacitance detection circuit, and more particularly, to a capacitance detection circuit using a sample-and-hold circuit to simplify the circuit configuration and improve variations in device characteristics and temperature characteristics.
  • a method for detecting a change in capacitance a method using a conventional bridge circuit, a method using a charge/discharge time of a capacitor, a method using an oscillation circuit, and the like are used.
  • the detection sensitivity is improved by peak detection of the detection signal.
  • the conventional electrostatic sensor circuit 10 includes a CV converter 11, a sensor 12, two peak detectors 13-1 and 13-2, a DC amplifier 14, and a low-pass It is composed of a filter (LPF) 15 and a comparator 16, and the CV converter 11 charges and discharges the first capacitor C1 and the second capacitor C2 according to a clock signal from two constant current sources, respectively, to generate a sawtooth wave. to generate voltage.
  • LPF filter
  • the technical problem to be solved by the present invention is to simplify the circuit configuration by using a sample hold circuit, reduce the number of parts, and use the operation of each of a plurality of identical circuits as a single circuit.
  • An object of the present invention is to provide a capacitance detection circuit with improved deviation and temperature characteristics.
  • the present embodiment discloses a capacitance detection circuit in which variations in device characteristics and temperature characteristics are improved by combining the operation of each of a plurality of identical circuits as one circuit.
  • the capacitance detection circuit disclosed in the present invention includes a constant current unit supplying a charging constant current for generating a sawtooth wave voltage, a sawtooth wave generating unit generating a sawtooth wave voltage by charging a capacitor by the constant current unit and discharging it by a clock, and a sensor.
  • a sensing unit that changes the capacitor capacitance of the sawtooth wave generator when the capacitance of an object is sensed, and a peak value of a sawtooth voltage in a no-signal period input from the sawtooth generator and a peak value of a sawtooth voltage in a detection period is disposed between a peak value detector for detecting , a constant current automatic control comparator for providing a negative feedback loop for generating a reference voltage when there is no signal to the constant current unit, and the peak value detector and the constant current automatic control comparator a sample and hold unit for connecting the negative feedback loop in a no-signal period and blocking the negative feedback loop during a sensing period and then providing a sample-holding voltage to the constant current automatic control comparator; and the output of the peak value detector an AC amplifier for AC amplifying an AC amplifier, a zero volt clamp detector for detecting a peak value of an AC signal by synchronously detecting the output of the AC amplifier, and a reference voltage for detecting the output of the zero voltage clamp detector
  • the capacitance detection circuit may further include a low-pass filter for low-pass filtering the output of the zero voltage clamp detector.
  • the constant current unit cuts off the connection between the constant current source, the current control unit, and the constant current source during a no-signal period according to the constant current source, the current control unit, and the first sample and hold clock CP1.
  • the current control unit is connected to the constant current source. It includes an offset control switch for adding a current to the constant current unit by connecting it so that the sawtooth voltage reaches the non-signal voltage in the absence of a detection object during the sensing period.
  • the sensing unit connects the correction capacitor and the correction capacitor to the sawtooth wave generator during the no-signal period according to the first sample and hold clock CP1.
  • the sensor is connected to the sawtooth wave generator so that the total capacity of the sawtooth wave generator is the sensor. It includes a sensor switch that allows it to be changed by
  • the sample and hold unit includes a first operational amplifier (OP Amplifier) that functions as a temperature compensation and buffer, a sample hold switch that receives a second sample hold clock, and an output of the peak value detector during a non-signal period when the sample hold switch is turned on.
  • OP Amplifier operational amplifier
  • a sample hold capacitor holding the sampled value during a detection period in which the sample hold switch is turned off after sampling , and a signal transmitted from the sample hold switch during a no-signal period is transferred to a constant current automatic control comparator, and the sample is transferred during a detection period.
  • a second operational amplifier for transferring the held signal of the hold capacitor to the constant current automatic control comparator.
  • the sensor is an element that detects the capacitance of an object when the object approaches, and may be an electrode having a predetermined area or a capacitor including two electrodes with an insulator interposed therebetween.
  • the circuit configuration used is simplified and the number of parts is reduced, and variations in element characteristics and temperature characteristics are improved.
  • the signal sensed by the sample-and-hold method is converted into an AC signal by switching the sensing voltage and the no-signal voltage, respectively, so that AC amplification is possible, and thus there is a strong advantage in hum noise.
  • the sensing sensitivity may not decrease by adjusting the offset so that the sensing voltage approaches the no-signal voltage.
  • FIG. 1 is a block diagram showing a capacitance detection circuit according to an embodiment of the present invention.
  • FIG. 2 is a detailed circuit diagram of the sample and hold circuit shown in FIG. 1;
  • FIG. 3 is an example of a clock timing diagram for sample hold according to an embodiment of the present invention.
  • FIG. 5 is an example of a waveform for explaining the operation of the capacitance detection circuit according to the embodiment of the present invention.
  • FIG. 6 is an example showing a conventional electrostatic sensor circuit.
  • FIG. 1 is a block diagram illustrating a capacitance detection circuit according to an embodiment of the present invention
  • FIG. 2 is a detailed circuit diagram of the sample and hold circuit shown in FIG. 1
  • FIG. 3 is a sample hold circuit according to an embodiment of the present invention. This is an example of a timing diagram for a clock.
  • the capacitance detection circuit 100 includes a constant current source 112, a current control unit 114, an offset control switch 116, a first capacitor C1, Clock switch 122, sensor 132, sensor switch 134, correction capacitor C2, AC amplifier 170, zero voltage clamp detector 180, low-pass filter 182, voltage comparator 190, Consists of coupling (coupling) capacitors (171, 172).
  • the sensor 132 is an electrode having a predetermined area or a capacitor including two electrodes with an insulating layer interposed therebetween.
  • reference numeral 110 denotes a constant current unit including a constant current source 112 , a current control unit 114 , and an offset control switch 116
  • 120 denotes a first capacitor C1 and a clock switch 122 .
  • the sawtooth wave generator 130 is a sensing unit (sensor unit) including the sensor 132 , the sensor switch 134 , and the correction capacitor C2 .
  • a system clock CL for generating a sawtooth waveform voltage by controlling the clock switch 122 becomes high during a no-signal period and low during a detection period.
  • the first sample hold clock CP1 and the first sample and hold clock CP1 are out of phase to become low during the no-signal period and become high during the detection period.
  • the first sample and hold clock CP1 becomes high during the no-signal period as shown in FIG. 3A , and the offset control switch 116 is connected to b to turn off the current control unit 114, and the sensor switch ( 134) is connected to b so that the correction capacitor C2 is connected in parallel to the first capacitor C1.
  • the offset control switch 116 is connected to a to connect the current control unit 114 to the constant current source 112, and the sensor switch 134 to a. connected so that the sensor 132 is connected in parallel to the first capacitor C1.
  • the second sample and hold clock CP2 becomes low during the no-signal period and becomes high during the sensing period, so that the sample-and-hold unit 150 connects the negative feedback loop during the no-signal period and detects it.
  • the sample-holding voltage is provided to the constant current automatic control comparator 160 .
  • the system clock CL may be approximately 125 KHz, and the sample and hold clocks CP1 and CP2 may be 3.9 KHz.
  • a negative feedback loop is implemented so that the constant current becomes a reference when making a no-signal voltage in the constant current circuit that generates a sawtooth voltage for sensing (sensing).
  • the detection signal tracks the no-signal voltage by the negative feedback loop of the constant current circuit, making it difficult to distinguish the difference between the no-signal output and the sensed output. Therefore, in the embodiment of the present invention, the negative feedback loop is formed during the no-signal period, the negative feedback loop is cut during the sensing period, and the negative feedback voltage at that time is sampled and held to maintain the same voltage. In this way, the current generating the sawtooth voltage becomes constant, and the wave peak value of the sawtooth voltage in the sensing period and the no-signal period is different, so that it can be detected.
  • the constant current generated by the negative feedback loop can obtain a stable constant current because the peak value of the sawtooth voltage is the same as Vref (reference voltage) and is made by configuring the negative feedback loop.
  • Vref reference voltage
  • this constant current is created in a state in which the sensor 132 is not connected, it is necessary to correct the capacitance to some extent in order to approach the capacitance generated by the sensor itself.
  • correction is performed by connecting the correction capacitor C2 to the first capacitor C1 through the sensor switch 134 during the no-signal period as will be described later. Accordingly, when the capacitance of the circuit elements connected to the periphery is neglected, the total capacitance at the time of no signal can be regarded as approximately C1 + C2.
  • the constant current unit 110 is composed of a constant current source 112 , a current control unit 114 , and an offset control switch 116 , and supplies a charging constant current for generating a sawtooth wave to the sawtooth wave generating unit 120 . .
  • the sensing circuit and the sensing unit are mounted on a case
  • the voltage during the no-signal period and the voltage when there is no object during the sensing period do not necessarily match. It arises from the subtle difference between the total capacity during no signal and the total capacity during sensing. In order to improve this, it is necessary to adjust the offset so that the sensing voltage reaches the no-signal voltage in the absence of a sensing object during the sensing period.
  • the offset control switch 116 cuts off the current control unit 114 in the no-signal period according to the first sample and hold clock CP1 (connected to b to turn it off), and during the sensing period, the current control unit 114 is turned off.
  • 114 is connected to the constant current source 112 to add current to the constant current unit 110 so that the sawtooth voltage reaches the no-signal voltage in the absence of a detection object during the sensing period. That is, in the embodiment of the present invention, the offset is adjusted so that the sensing voltage approaches the no-signal voltage so that the sensing sensitivity does not decrease.
  • the sawtooth wave generator 120 is composed of a first capacitor C1 and a clock switch 122 to charge the first capacitor C1 by the charging constant current i of the constant current unit 110, and the system clock CL. by discharging the first capacitor CP1 to generate a sawtooth waveform voltage.
  • t is determined by the time of the system clock, which is preferably generated by dividing the crystal oscillation for precision.
  • the peak value of the sawtooth voltage is changed as C is changed to detect an object.
  • the sensing unit 130 is composed of a sensor 132 , a sensor switch 134 , and a correction capacitor C2 .
  • the sensor switch 134 connects the correction capacitor C2 to the first capacitor C1 in parallel to the first capacitor C1 in the no-signal period according to the first sample and hold clock CP1, and then connects the sensor 132 to the first capacitor C1 in the detection period.
  • C1 the total capacity C of the sawtooth wave generator 120 can be changed by the sensor 132 .
  • the sawtooth wave generator 120 generates a detection voltage close to the non-signal voltage when the object is not detected by the sensor 132 during the detection period, and when the object is detected by the detection unit 130, the total capacity (C ) increases, the sensing voltage decreases, and the object is detected by the voltage difference.
  • the peak value detector 140 detects the sawtooth voltage peak value of the no-signal period input from the sawtooth wave generator 120 and the sawtooth wave voltage peak value of the detection time.
  • the sample and hold unit 150 includes a first op amp 152 , a sample hold switch 156 , a sample holding capacitor Csh , a second op amp 158 , a resistor R1 , It is composed of R2, R3) and diodes D1, D2.
  • the output of the peak value detector 140 is connected to the constant current automatic control comparator 160 to form a negative feedback loop.
  • the constant current automatic control comparator 160 compares the output of the sample and hold unit 150 with the reference voltage Vref and feeds it back to the constant current unit 110 .
  • the first op amp 152 has a temperature compensation and buffer function
  • the second op amp 158 is for sample hold
  • the sample hold capacitor Csh is a sample hold switch 156 . After sampling the output of the peak value detector 140 in the no-signal period that is turned on, the sampled value is held during the detection period in which the sample hold switch 156 is turned off.
  • a resistor R3 for temperature compensation is connected to the -input terminal of the first operational amplifier 152, and temperature compensation diodes 154 (D1, D2) are connected to the output terminal and -input terminal.
  • the output of the peak value detector 140 is input to the + input terminal of the first operational amplifier 152 .
  • the voltage divider resistors R1 and R2 for sample hold are connected to the output terminal of the first operational amplifier 152, and the sample hold switch 156 is connected between the voltage divider resistors R1 and R2 and the sample hold capacitor Csh. there is.
  • the second operational amplifier 158 transfers the signal transmitted from the sample and hold switch 156 to the constant current automatic control comparator 160 during the no-signal period, and transfers the signal held by the sample and hold capacitor Csh to the constant current automatic control comparator during the detection period. forward to (160).
  • the AC amplifier 170 AC amplifies the output of the peak detector 140 , and the zero voltage clamp detector 180 synchronously detects the output of the AC amplifier 170 to obtain a peak value ( peak value) is detected. At this time, the output of the sensing voltage is clamped to zero voltage so that the voltage increases when there is a sensing signal.
  • the coupling capacitors 171 and 172 are for transmitting an AC signal.
  • a noise component of a low frequency (0 to several hundred Hz) is removed by directly converting a direct current to an alternating current (eg, 3.9 kHz) by applying a sample hold, so that the signal processing is strong against hum noise. becomes possible
  • general DC amplification affects the characteristics even if there is a slight error, AC amplification is easy to configure and can improve stability.
  • the low-pass filter 182 low-pass filters the output of the zero-voltage clamp detector 180, and the voltage comparator 190 compares the low-pass-filtered output of the zero-voltage clamp detector 180 with the detection reference voltage E for detection. output a signal.
  • FIG. 4 is an example of a sawtooth wave and a peak detection signal waveform according to an embodiment of the present invention
  • FIG. 5 is an example of a waveform for explaining the operation of the capacitance detection circuit according to the embodiment of the present invention.
  • (A) is a waveform diagram showing the sawtooth voltage at point A of FIG. 1 , where P1 is the peak value of the sawtooth wave in the Non Signal Period, and P2 is the peak value of the sawtooth wave in the Sensing Period am.
  • (b) is an output waveform of the peak value detector 140, and an object can be detected by the difference ( ⁇ V) between the voltage during the no-signal period and the voltage during the detection period.
  • (A) is a timing diagram of the first sample and hold clock (CP1)
  • (B) is a waveform diagram of the output voltage of the peak value detector 140
  • (C) is a zero voltage clamp (zero volt clamp) ) is an output voltage waveform diagram of the detector 180 .
  • the signal-free period and the detection period are repeated by the first sample and hold clock CP1, and when an object is detected during the detection period and the detection unit 130 starts to react, the detection period voltage of the peak value detector 140 gradually decreases. It can be seen that the output voltage of the zero voltage clamp detector 180 gradually increases.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

La présente invention se rapporte à un circuit de détection de capacité, dans lequel une caractéristique de température est améliorée et une configuration de circuit est simplifiée à l'aide d'un circuit de maintien d'échantillon. Le circuit de détection de capacité de la présente invention comprend : une unité à courant constant ; une unité de génération d'onde en dents de scie permettant le chargement d'un condensateur par l'unité à courant constant et le déchargement du condensateur par une horloge de façon à générer une tension d'onde en dents de scie ; une unité de détection ; un détecteur de valeur de pic permettant de détecter une valeur de pic de tension d'onde en dents de scie pendant une période hors signal et une valeur de pic de tension d'onde en dents de scie pendant une période de détection, entrées à partir de l'unité de génération d'onde en dents de scie ; un comparateur de commande automatique à courant constant permettant de fournir à l'unité à courant constant une boucle de rétroaction négative afin de générer une tension de référence en l'absence de signal ; une unité de maintien d'échantillon disposée entre le détecteur de valeur de pic et le comparateur de commande automatique à courant constant, qui connecte la boucle de rétroaction négative pendant la période hors signal, déconnecte la boucle de rétroaction négative pendant la période de détection, et fournit ensuite au comparateur de commande automatique à courant constant une tension à maintien d'échantillon ; un amplificateur de courant alternatif ; un détecteur de calage de tension nulle ; et un comparateur de tension permettant de comparer une sortie du détecteur de calage de tension nulle à une tension de référence de détection et d'émettre en sortie un signal de détection.
PCT/KR2021/000438 2020-01-23 2021-01-13 Circuit de détection de capacité WO2021149962A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/793,170 US20230341450A1 (en) 2020-01-23 2021-01-13 Capacitance detection circuit

Applications Claiming Priority (2)

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KR1020200009295A KR102212201B1 (ko) 2020-01-23 2020-01-23 정전용량 검출회로
KR10-2020-0009295 2020-01-23

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07243863A (ja) * 1994-03-02 1995-09-19 Murata Mfg Co Ltd 容量型センサ
JP2005030971A (ja) * 2003-07-08 2005-02-03 Kansai Ootomeishiyon Kk 静電容量式レベル検出装置
JP2006078292A (ja) * 2004-09-08 2006-03-23 Omron Corp 容量計測装置および方法、並びにプログラム
KR101879285B1 (ko) * 2017-08-01 2018-07-17 송청담 고감도 정전 센서 회로
KR20190101217A (ko) * 2018-02-22 2019-08-30 송청담 멀티 채널 정전 터치 센서 회로

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07243863A (ja) * 1994-03-02 1995-09-19 Murata Mfg Co Ltd 容量型センサ
JP2005030971A (ja) * 2003-07-08 2005-02-03 Kansai Ootomeishiyon Kk 静電容量式レベル検出装置
JP2006078292A (ja) * 2004-09-08 2006-03-23 Omron Corp 容量計測装置および方法、並びにプログラム
KR101879285B1 (ko) * 2017-08-01 2018-07-17 송청담 고감도 정전 센서 회로
KR20190101217A (ko) * 2018-02-22 2019-08-30 송청담 멀티 채널 정전 터치 센서 회로

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US20230341450A1 (en) 2023-10-26
KR102212201B1 (ko) 2021-02-03

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