WO2021143523A1 - 阵列基板、其制作方法、显示面板及显示装置 - Google Patents

阵列基板、其制作方法、显示面板及显示装置 Download PDF

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Publication number
WO2021143523A1
WO2021143523A1 PCT/CN2020/141035 CN2020141035W WO2021143523A1 WO 2021143523 A1 WO2021143523 A1 WO 2021143523A1 CN 2020141035 W CN2020141035 W CN 2020141035W WO 2021143523 A1 WO2021143523 A1 WO 2021143523A1
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Prior art keywords
array substrate
base substrate
pixel defining
insulating
electrode
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PCT/CN2020/141035
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English (en)
French (fr)
Inventor
李伟
夏晶晶
周斌
杜生平
张扬
宋威
郭清化
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京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司
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Priority to US17/414,751 priority Critical patent/US11957002B2/en
Publication of WO2021143523A1 publication Critical patent/WO2021143523A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing

Definitions

  • the present disclosure relates to the field of display technology, and in particular to an array substrate, a manufacturing method thereof, a display panel, and a display device.
  • Organic electroluminescence display is to achieve the purpose of light emission and display by driving an organic semiconductor thin film with electric current.
  • the light-emitting layer of the organic electroluminescent device can be formed by inkjet printing, which can be applied to macromolecular light-emitting materials and small-molecule light-emitting materials, and has low equipment cost, and is suitable for large-scale production.
  • an array substrate provided by an embodiment of the present disclosure includes: a base substrate, a drive circuit structure located on the base substrate, and a side of the drive circuit structure that is located in turn away from the base substrate A planarization layer and multiple electrode structures; also including:
  • An insulating structure the insulating structure is located in a gap area between adjacent electrode structures, and the thickness of the insulating structure is not less than the thickness of the electrode structure;
  • the pixel defining structure is located on a side of the insulating structure away from the base substrate, and the orthographic projection of the pixel defining structure on the base substrate at least completely covers the insulating structure.
  • the pixel defining structure includes an opening area, and the opening area is arranged in a one-to-one correspondence with the electrode structure;
  • the opening area exposes at least a part of the electrode structure.
  • the shape of the electrode structure includes a rectangular portion, and the opening area of the pixel defining structure is an ellipse or a rectangle with rounded corners;
  • the opening area is orthographically projected on the base substrate in the orthographic projection of the electrode structure on the base substrate.
  • the thickness of the insulating structure is greater than the thickness of the electrode structure
  • the pixel defining structure includes: a first structure unit and a second structure unit, the first structure unit extending in the row direction and sequentially arranged in the column direction, and the second structure unit extending in the column direction and sequentially arranged in the row direction arrangement;
  • Each of the opening regions is surrounded by two parts of the first structural unit and two parts of the second structural unit, and the central axis of the part of the first structural unit and the part of the second structural unit Connected to form a closed pattern surrounding the opening area;
  • the distance between the upper surface of the pixel defining structure and the base substrate sequentially increases.
  • the shape of the insulating structure is a trapezoid, and an area of a surface close to the base substrate is larger than an area of a surface away from the base substrate.
  • the cross-sectional shape of the pixel defining structure is semicircular.
  • the base substrate includes: a display area and a non-display area surrounding the display area;
  • the non-display area includes an alignment structure, and the alignment structure is configured to perform alignment when forming the electrode structure;
  • the alignment structure and the insulating structure are provided in the same layer and the same material.
  • the hydrophilicity of the planarization layer, the hydrophilicity of the insulating structure, and the hydrophilicity of the pixel defining structure decrease in order.
  • the material of the planarization layer is an organosiloxane resin material
  • the material of the pixel defining structure is a super-hydrophobic acrylic material.
  • the electrode structure is a reflective metal electrode.
  • the material of the insulating structure is a light-shielding material.
  • the thickness of the electrode structure is 50 nm to 200 nm;
  • the thickness of the insulating structure is 500 nm to 1000 nm.
  • the embodiments of the present disclosure also provide a manufacturing method of the array substrate, including:
  • the thickness of the insulating structure is greater than the thickness of the electrode structure
  • a pixel defining structure is formed on the side of the insulating structure away from the base substrate, so that the orthographic projection of the pixel defining structure on the base substrate covers the insulating structure and the edge of the electrode structure on the substrate Orthographic projection on the substrate.
  • the method when the insulating structure is formed in the gap region between the adjacent electrode structures, the method further includes:
  • the alignment structure is formed in the non-display area of the base substrate through the same process.
  • embodiments of the present disclosure also provide a display panel, including the array substrate provided in any one of the embodiments of the first aspect.
  • the embodiments of the present disclosure also provide a display device, including the display panel provided in the embodiment of the third aspect.
  • FIG. 1 is a schematic diagram of a planar structure of a related art array substrate
  • Figure 2 is a schematic cross-sectional structure view of Figure 1 along the A-A1 direction;
  • FIG. 3 is one of the schematic structural diagrams of the array substrate provided by the embodiments of the disclosure.
  • 6a to 6c are structural schematic diagrams of the formation process of the array substrate provided by the embodiments of the disclosure.
  • a vacuum evaporation technique can be used, that is, a vacuum heating method is used in the presence of a mask to evaporate the light-emitting material and form a film in the pixel area.
  • This technology has the advantages of good film uniformity and no need for solvents, but it has disadvantages such as low material utilization, only suitable for small molecule light-emitting materials, large equipment investment, and unsuitable for large-size products.
  • the inkjet printing technology of the solution process can also be used to accurately drop the luminescent material solution into the pixel pits, and the solvent volatilizes to form a film.
  • inkjet printing is suitable for large-molecule luminescent materials and small-molecule luminescent materials, with high material utilization, low equipment costs, high productivity, and easier production of large-scale and large-scale products.
  • the drive circuit 04 is away from the substrate.
  • a flattening layer 05 is formed on the side of the substrate 01 to flatten the gap formed by the driving circuit 04, and then an electrode structure 02 and a pixel defining structure 03 are sequentially formed on the flattening layer 05.
  • the pixel defining structure 03 formed on the side of the electrode structure 02 away from the base substrate 01 has a recess a in the gap area.
  • embodiments of the present disclosure provide an array substrate, a manufacturing method thereof, a display panel, and a display device.
  • an array substrate, a manufacturing method thereof, a display panel and a display device provided by the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the preferred embodiments described below are only used to illustrate and explain the present disclosure, and are not used to limit the present disclosure. And if there is no conflict, the embodiments in the application and the features in the embodiments can be combined with each other.
  • an embodiment of the present disclosure provides an array substrate.
  • the array substrate includes: a base substrate 1, a drive circuit structure 2 located on the base substrate 1, and a drive circuit in turn.
  • the insulating structure 5 is located in the gap area between adjacent electrode structures 4, and the thickness of the insulating structure 5 is not less than the thickness of the electrode structure 4;
  • the pixel defining structure 6 is located on the side of the insulating structure 5 away from the base substrate 1, and the orthographic projection of the pixel defining structure 6 on the base substrate 1 at least completely covers the insulating structure 5.
  • the insulating structure is provided, and the thickness of the insulating structure is not less than the thickness of the electrode structure, so that when the pixel defining structure is formed, no recess is formed in the gap area. , The ink droplets forming the light-emitting layer cannot be stored, thereby alleviating the light leakage problem of the pixel.
  • the orthographic projection of the pixel defining structure on the base substrate at least covers the insulating structure.
  • the expression is that the pixel defining structure can only completely cover the insulating structure, and the pixel defining structure is also It is possible to cover part of the electrode structure while covering the insulating structure, so that the part of the electrode structure that is not covered is exposed, and the light-emitting layer is formed on the part of the electrode structure that is exposed.
  • the details can be selected according to the actual situation, and there is no specific limitation here.
  • the thickness of the insulating structure is greater than or equal to the thickness of the electrode structure, which can compensate for the gap formed by the electrode structure, so that when the pixel defining structure is formed, the The pixel defining structure in the gap area of the adjacent electrode structure does not appear recessed, which is beneficial to alleviate the problem of light leakage of the pixel.
  • the pixel defining structure 6 includes an opening area K, and the opening area K is arranged in a one-to-one correspondence with the electrode structure 4;
  • the opening area K exposes at least a part of the electrode structure 4.
  • the opening area of the pixel defining structure is the area where the pixel is located, and the opening area is used to hold the ink droplets of the light-emitting layer, and the ink droplets of the light-emitting layer are confined in the opening.
  • the opening area In the area, light is emitted under the driving of the electrode structure after the ink drop is formed.
  • the arrangement of this structure can not only reduce the light leakage of the pixel, but also avoid the light mixing phenomenon of adjacent pixels.
  • the shape of the electrode structure 4 includes a rectangular part, and the opening area of the pixel defining structure 6 is an ellipse or a rectangle with rounded corners;
  • the area of the orthographic projection of the electrode structure 4 on the base substrate 1 is larger than the area of the orthographic projection of the opening area K on the base substrate 1.
  • the shape of the electrode structure may be a rectangle.
  • the opening area is formed in an elliptical shape.
  • the area of the open area is smaller than the area of the electrode structure.
  • the main body of the electrode structure 4 is rectangular, and may also include electrode leads, the specific structure of which is not shown in the figure.
  • the thickness of the insulating structure 5 is greater than the thickness of the electrode structure 4;
  • the pixel defining structure 6 includes: a first structure unit 61 and a second structure unit 62.
  • the first structure unit 61 extends in the row direction and is sequentially arranged in the column direction
  • the second structure unit 62 extends in the column direction and is sequentially arranged in the row direction. arrangement;
  • Each opening area K is surrounded by two parts of the first structural unit 61 and two parts of the second structural unit 62, the central axis (61a/62a) of the part of the first structural unit 61 and the part of the second structural unit 62
  • the connection forms a closed figure to surround the opening area K;
  • the distance between the upper surface of the pixel defining structure 6 and the base substrate 1 increases sequentially.
  • the position of the insulating structure 4 is The height of the corresponding pixel defining structure 6 will be higher than that of other positions.
  • It may be in a slope shape, that is, in the direction in which the opening area K points to the central axis (61a/62a) of the gap area, the distance between the upper surface of the pixel defining structure 6 and the base substrate 1 increases sequentially. Based on the pixel-defining structure of this shape, when the light-emitting layer is formed, even if there are ink droplets falling on the pixel-defining structure, they will slide along the surface of the pixel-defining structure to the area where the pixel is located to form a corresponding light-emitting layer.
  • the shape of the insulating structure 5 is trapezoidal, and the area of the surface on the side close to the base substrate 1 is larger than that on the side away from the base substrate 1. area.
  • the insulating structure is set in a regular trapezoid shape, and the width of the insulating structure decreases in a direction away from the base substrate, and then a pixel defining structure is formed on the insulating structure At this time, obvious protrusions can be formed in the area where the insulating structure is located, which facilitates the formation of a pixel defining structure with a slope, so that the ink droplets used to form the light-emitting layer slide down into the opening area.
  • the cross-sectional shape of the pixel defining structure is semicircular.
  • the cross-sectional shape of the pixel defining structure is not a semicircle in the strict sense, and the shape of its upper surface can be arc-shaped, and it is symmetrically arranged with respect to the central axis, and its lower surface is connected to the electrode structure and the insulating structure.
  • whether the bottom surface is flat depends on whether the thickness of the insulating structure is the same as the thickness of the electrode structure.
  • the bottom surface of the pixel defining structure is flat.
  • the lower surface of the pixel defining structure is a structure with grooves.
  • the base substrate 1 includes: a display area AA and a non-display area BB surrounding the display area AA;
  • the non-display area BB includes an alignment structure 7, and the alignment structure 7 is configured to perform alignment when the electrode structure 4 is formed;
  • the alignment structure 7 and the insulating structure 5 are arranged in the same layer and the same material.
  • the exposure alignment mark is generally formed by patterning the first layer of metal (gate). Since the top-emission electroluminescent device forms the corresponding electrode structure after the planarization layer is formed, there is no pattern level difference contour as the alignment mark, which causes the electrode structure to be difficult to be aligned during exposure during the production process, and alignment alarms are likely to occur. Affect the production cycle and have a serious impact on product quality.
  • the alignment structure is formed in the non-display area on the base substrate when the insulating structure is formed, and the alignment mechanism and the insulating structure are formed by the same manufacturing process, and the electrodes are formed.
  • the alignment structure located in the non-display area can be identified, and the alignment accuracy can be improved.
  • Organosiloxane resin (SOG) with better leveling properties can be used for the production of the planarization layer, and its flatness is higher , which can meet the flatness required by electroluminescent devices.
  • Organosiloxane resin (SOG) is formed by heating, dehydration and cross-linking of small organic siloxane molecules. There are a large number of hydroxyl groups in its molecular structure and its hydrophilicity is relatively high.
  • the pixel defining structure is a layer of organic barrier between the pixel openings, and generally presents a regular trapezoidal structure with a narrow top and a wide bottom to restrict the ink for inkjet printing from overflowing around.
  • the manufacturing process generally includes processes such as coating, exposure, development, and curing of the pixel defining structure material, and removing the photoresist material in the pixel opening area to form the pixel opening area and the area where the pixel defining structure is located.
  • the pixel defining structure needs to be lyophobic with the solution.
  • the pixel-defining structure material has a low polarity, and is generally a fluorine-containing material.
  • the pixel defining structure and the planarization layer are directly contacted, and the bonding force between the two is low, which easily causes the pixel defining structure to fall off, causing pixel defects and affecting display quality.
  • the hydrophilicity of the planarization layer, the hydrophilicity of the insulating structure, and the hydrophilicity of the pixel defining structure decrease in order.
  • an insulating structure is provided between the planarization layer and the pixel defining structure, and the hydrophilicity of the insulating structure is designed so that the hydrophilicity is within the level of the planarization.
  • the layers and pixels define between the structure. Compared with the direct contact between the pixel defining structure and the planarization layer in the related art, this arrangement method greatly improves the bonding force of the pixel defining structure and the planarizing layer, and ensures the bonding stability of the various structures of the array substrate. To improve the display quality.
  • the material of the planarization layer may be an organosiloxane resin material
  • the material of the pixel defining structure can be a superhydrophobic acrylic material.
  • the organosiloxane resin material has higher fluidity and higher flatness, which can better meet the flatness required by the electroluminescent device.
  • the pixel-defining structure adopts super-hydrophobic materials, which can prevent the inkjet solution from sticking to the top of the pixel-defining structure and ensure the uniformity of the light-emitting layer.
  • the electrode structure may be a reflective metal electrode.
  • the electrode structure is set as a reflective metal electrode, which can reflect the light irradiated thereon, so as to prevent the light from irradiating the structure of the driving circuit and causing the performance degradation of the thin film transistor .
  • the material of the insulating structure may be a light-shielding material.
  • the insulating structure can be set as a light-shielding insulating structure, that is, the insulating structure is formed by using a light-shielding material, and this arrangement can perform light emission in the gap region between the electrode structures. Blocking to avoid affecting the performance of the thin film transistor in the gap area.
  • the light-shielding material can be an organic silicon light-shielding material or a black acrylic material. Of course, it can also be other light-shielding insulating materials, which are not specifically limited here.
  • the thickness of the electrode structure may be 50 nm to 200 nm;
  • the thickness of the insulating structure may be 500 nm to 1000 nm.
  • the thickness of the electrode structure and the thickness of the insulating structure meet the above conditions, it can be ensured that the subsequently formed pixel defining structure can form a structure with a middle height and a low edge.
  • the light-emitting layer is formed, ink droplets will not be stored in the pixel defining structure. In, the light leakage phenomenon of the pixel is reduced.
  • a base substrate 1 is provided, and a driving circuit structure 2 and a planarization layer 3 are formed on the base substrate 1; wherein, the manufacturing process of the driving circuit structure 2 and the planarization layer 3 and related technologies The same, I won't repeat them here.
  • the driving circuit structure may include a light-shielding metal layer, a buffer layer, an active layer, a gate insulating layer, a gate electrode, an interlayer dielectric layer, a source and drain electrode, a passivation layer, and the like.
  • the planarization layer is formed into a film by coating, pre-baking, post-baking and other processes.
  • an insulating structure 5 is formed by a photolithography process at a predetermined position, where the predetermined position is a gap area between two adjacent electrode structures;
  • the alignment structure (not specifically shown in the figure) can be formed in the non-display area through the same process, thereby reducing the manufacturing process and saving production costs.
  • the electrode structure 4 is formed with the alignment structure (not specifically shown in the figure) as the alignment mark.
  • the electrode structure 4 can be formed by film formation, exposure and development, Formed by etching and other processes.
  • the pixel defining structure 6 is formed on the base substrate 1.
  • the formation process is the same as the process of forming the pixel defining structure in the related art, which will not be repeated here.
  • the formed structure is shown in FIG. 4 .
  • embodiments of the present disclosure also provide a manufacturing method of an array substrate, including:
  • An electrode structure is arranged between adjacent insulating structures, and the thickness of the insulating structure is greater than the thickness of the electrode structure;
  • a pixel defining structure is formed on the side of the insulating structure away from the base substrate, so that the orthographic projection of the pixel defining structure on the base substrate covers the orthographic projection of the insulating structure and the edge of the electrode structure on the base substrate.
  • the method when the insulating structure is formed in the gap region between the adjacent electrode structures, the method further includes:
  • the alignment structure is formed in the non-display area of the base substrate through the same process.
  • embodiments of the present disclosure also provide a display panel, which includes the array substrate provided in any of the above embodiments, and a light-emitting layer located in the pixel area, and located on the side of the light-emitting layer away from the base substrate.
  • Drive electrode structure located in the pixel area, and located on the side of the light-emitting layer away from the base substrate.
  • the display panel also includes other necessary structures known to those skilled in the art, which will not be repeated here.
  • embodiments of the present disclosure also provide a display device, which includes the display panel provided by the above-mentioned embodiments.
  • the display panel and the display device have all the advantages of the array substrate provided by the above-mentioned embodiments, which can be implemented with reference to any embodiment of the array substrate, and will not be repeated here.
  • the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and so on.
  • a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and so on.
  • Other indispensable components of the display device are understood by those of ordinary skill in the art, and will not be repeated here, nor should they be used as a limitation to the present disclosure.
  • the implementation of the display device can be referred to the embodiment of the above-mentioned display panel, and the repetition will not be repeated.
  • the embodiments of the present disclosure provide an array substrate, a manufacturing method thereof, a display panel, and a display device.
  • the array substrate includes a base substrate, a drive circuit structure on the base substrate, and the drive circuit structure in sequence
  • the planarization layer on the side away from the base substrate and a plurality of electrode structures; further comprising: an insulating structure, the insulating structure is located in the gap area between the adjacent electrode structures, the thickness of the insulating structure is not less than The thickness of the electrode structure; the pixel defining structure, the pixel defining structure is located on the side of the insulating structure away from the base substrate, and the orthographic projection of the pixel defining structure on the base substrate at least completely covers the Insulation structure.
  • the thickness of the insulating structure is not less than the thickness of the electrode structure, so that when the pixel defining structure is formed again, no recesses are formed in the gap area, and the ink droplets forming the light-emitting layer cannot be stored, thereby alleviating the The light leakage problem.

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Abstract

一种阵列基板、其制作方法、显示面板及显示装置，该阵列基板包括：衬底基板（1），位于衬底基板（1）上的驱动电路结构（2），以及依次位于驱动电路结构（2）背离衬底基板（1）一侧的平坦化层（3）和多个电极结构（4）；还包括：绝缘结构（5），绝缘结构（5）位于相邻电极结构（4）之间的间隙区域，绝缘结构（5）的厚度不小于电极结构（4）的厚度；像素界定结构（6），像素界定结构（6）位于绝缘结构（5）背离衬底基板（1）一侧，且像素界定结构（6）在衬底基板（1）上的正投影至少完全覆盖绝缘结构（5）。通过绝缘结构的设置，并且使绝缘结构的厚度不小于电极结构的厚度，从而使得再形成像素界定结构时，在间隙区域处不再形成凹陷，无法存储形成发光层的墨滴，从而缓解了像素的漏光问题。

Description

阵列基板、其制作方法、显示面板及显示装置
相关申请的交叉引用
本申请要求在2020年01月17日提交中国专利局、申请号为202010053089.3、申请名称为“一种阵列基板、其制作方法、显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，尤其涉及阵列基板、其制作方法、显示面板及显示装置。
背景技术
有机电致发光显示是通过电流驱动有机半导体薄膜来达到发光和显示的目的。相关技术中，有机电致发光器件的发光层可以采用喷墨打印形成，可以适用于大分子发光材料和小分子发光材料，且设备成本低，适用于大尺寸生产。
发明内容
第一方面，本公开实施例提供的阵列基板，其中，包括：衬底基板，位于所述衬底基板上的驱动电路结构，以及依次位于所述驱动电路结构背离所述衬底基板一侧的平坦化层和多个电极结构；还包括：
绝缘结构，所述绝缘结构位于相邻所述电极结构之间的间隙区域，所述绝缘结构的厚度不小于所述电极结构的厚度；
像素界定结构，所述像素界定结构位于所述绝缘结构背离所述衬底基板一侧，且所述像素界定结构在所述衬底基板上的正投影至少完全覆盖所述绝缘结构。
可选地，在本公开实施例提供的阵列基板中，所述像素界定结构包括开 口区域，所述开口区域与所述电极结构一一对应设置；
所述开口区域至少暴露部分所述电极结构。
可选地，在本公开实施例提供的阵列基板中，所述电极结构的形状包括矩形部分，所述像素界定结构的开口区域为椭圆形或圆角矩形；
所述开口区域在所述衬底基板上正投影在所述电极结构在所述衬底基板上正投影内。
可选地，在本公开实施例提供的阵列基板中，所述绝缘结构的厚度大于所述电极结构的厚度；
所述像素界定结构包括：第一结构单元和第二结构单元，所述第一结构单元沿着行方向上延伸在列方向上依次排列，所述第二结构单元在列方向上延伸在行方向上依次排列；
每个所述开口区域被两个所述第一结构单元的部分和两个所述第二结构单元的部分包围，所述第一结构单元的部分和所述第二结构单元的部分的中心轴连接形成闭合图形包围所述开口区域；
在所述开口区域指向所述中心轴的方向上，所述像素界定结构的上表面与所述衬底基板之间的距离依次递增。
可选地，在本公开实施例提供的阵列基板中，所述绝缘结构的形状为梯形，且靠近所述衬底基板一侧表面的面积大于远离所述衬底基板一侧表面的面积。
可选地，在本公开实施例提供的阵列基板中，所述像素界定结构的截面形状为半圆形。
可选地，在本公开实施例提供的阵列基板中，所述衬底基板包括：显示区域和包围所述显示区域的非显示区域；
所述非显示区域包括对位结构，所述对位结构被配置为在形成所述电极结构进行对位；
其中，所述对位结构与所述绝缘结构同层同材料设置。
可选地，在本公开实施例提供的阵列基板中，所述平坦化层的亲水性、 所述绝缘结构的亲水性和所述像素界定结构的亲水性依次递减。
可选地，在本公开实施例提供的阵列基板中，所述平坦化层的材料为有机硅氧烷树脂材料；
所述像素界定结构的材料为超疏水亚克力材料。
可选地，在本公开实施例提供的阵列基板中，所述电极结构为反射金属电极。
可选地，在本公开实施例提供的阵列基板中，所述绝缘结构的材料为遮光材料。
可选地，在本公开实施例提供的阵列基板中，所述电极结构的厚度为50nm～200nm；
所述绝缘结构的厚度为500nm～1000nm。
第二方面，本公开实施例还提供了阵列基板的制作方法，包括：
提供一衬底基板；
依次在所述衬底基板上形成驱动电路结构和平坦化层；
在预定位置处形成绝缘结构；
在相邻所述绝缘结构之间设置电极结构，所述绝缘结构的厚度大于所述电极结构的厚度；
在所述绝缘结构背离所述衬底基板一侧形成像素界定结构，使所述像素界定结构在所述衬底基板上的正投影覆盖所述绝缘结构以及所述电极结构边缘在所述衬底基板上的正投影。
在一种可能的实施方式中，在本公开实施例提供的阵列基板的制作方法中，在相邻所述电极结构之间的间隙区域形成绝缘结构的同时，还包括：
通过同一工艺在所述衬底基板的非显示区域形成所述对位结构。
第三方面，本公开实施例还提供了显示面板，包括第一方面任一实施例提供的阵列基板。
第四方面，本公开实施例还提供了显示装置，包括第三方面实施例提供的显示面板。
附图说明
图1为相关技术阵列基板的平面结构示意图；
图2为图1沿A-A1方向的剖面结构示意图；
图3为本公开实施例提供的阵列基板的结构示意图之一；
图4为本公开实施例提供的阵列基板的结构示意图之二；
图5为本公开实施例提供的阵列基板的结构示意图之三；
图6a至图6c为本公开实施例提供的阵列基板形成过程的结构示意图。
具体实施方式
相关技术中的阵列基板，在形成有机电致发光器件的发光层时，可以采用真空蒸镀技术，即在掩膜版存在下采用真空加热的方法使发光材料蒸发，在像素区成膜。该技术优点是成膜均一性好、不需要溶剂，但存在材料利用率低、仅适用于小分子发光材料、设备投资大、不适用大尺寸产品等缺点。除上述之外还可以采用溶液制程的喷墨打印技术，将发光材料溶液精确滴入像素坑中，溶剂挥发成膜。相对于真空蒸镀技术，喷墨打印适用于大分子发光材料和小分子发光材料，且材料利用率高，设备成本低，高产能，更易于大规模、大尺寸产品的生产。
在采用喷墨打印的方式形成发光层时，为了提高发光层的成膜均匀性，如图1和图2所示，在衬底基板01上形成驱动电路04后，在驱动电路04背离衬底基板01一侧形成平坦化层05，以对驱动电路04形成的断差进行平坦，然后在平坦化层05上依次形成电极结构02和像素界定结构03。但是，由于所形成的电极结构02之间存在间隙区域，在电极结构02背离衬底基板01的一侧所形成的像素界定结构03在该间隙区域存在凹陷a，在形成发光层时，会存储一定量的墨滴，导致像素出现漏光现象。
基于相关技术中存在的上述问题，本公开实施例提供了一种阵列基板、其制作方法、显示面板及显示装置。为了使本公开的目的，技术方案和优点更加清楚，下面结合附图，对本公开实施例提供的一种阵列基板、其制作方 法、显示面板及显示装置的具体实施方式进行详细地说明。应当理解，下面所描述的优选实施例仅用于说明和解释本公开，并不用于限定本公开。并且在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。
除非另外定义，本公开使用的技术用语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
附图中各部件的形状和大小不反应真实比例，目的只是示意说明本公开内容。
具体地，本公开实施例提供了一种阵列基板，如图3和图4所示，该阵列基板包括：衬底基板1，位于衬底基板1上的驱动电路结构2，以及依次位于驱动电路结构2背离衬底基板1一侧的平坦化层3和多个电极结构4；还包括：
绝缘结构5，绝缘结构5位于相邻电极结构4之间的间隙区域，绝缘结构5的厚度不小于电极结构4的厚度；
像素界定结构6，像素界定结构6位于绝缘结构5背离衬底基板1一侧，且像素界定结构6在衬底基板1上的正投影至少完全覆盖绝缘结构5。
具体地，在本公开实施例提供的阵列基板中，通过绝缘结构的设置，并且使绝缘结构的厚度不小于电极结构的厚度，从而使得在形成像素界定结构时，在间隙区域处不再形成凹陷，无法存储形成发光层的墨滴，从而缓解了像素的漏光问题。
其中，在本公开实施例提供的阵列基板中，像素界定结构在衬底基板上 的正投影至少覆盖绝缘结构表述的是：该像素界定结构可以仅完全覆盖在绝缘结构上，该像素界定结构也可以在覆盖绝缘结构的同时覆盖部分电极结构，使未被覆盖的部分电极结构暴露，在暴露的部分电极结构上形成发光层。具体可根据实际情况进行选择，在此不作具体限定。
需要说明的是，在本公开实施例提供的阵列基板中，该绝缘结构的厚度在大于或等于电极结构的厚度，可以弥补由于电极结构形成的断差，从而使得在形成像素界定结构时，在相邻电极结构的间隙区域像素界定结构则不会出现凹陷，有利于缓解像素漏光的问题。
可选地，在本公开实施例提供的阵列基板中，如图4和图5所示，像素界定结构6包括开口区域K，开口区域K与电极结构4一一对应设置；
开口区域K至少暴露部分电极结构4。
具体地，在本公开实施例提供的阵列基板中，该像素界定结构的开口区域即为像素所在的区域，该开口区域用于盛放发光层的墨滴，将发光层的墨滴限定在开口区域内，在墨滴成膜后在电极结构的驱动下发光，该结构的设置不仅可以减少像素的漏光，还可以避免相邻像素出现混光现象。
可选地，在本公开实施例提供的阵列基板中，如图4和图5所示，电极结构4的形状包括矩形部分，像素界定结构6的开口区域为椭圆形或圆角矩形；
电极结构4在衬底基板1上正投影的面积大于开口区域K在衬底基板1上正投影的面积。
具体地，在本公开实施例提供的阵列基板中，电极结构的形状可以为矩形，在形成像素界定结构时，由于像素界定结构覆盖了部分电极结构，因此，开口区域形成了椭圆形，并且该开口区域的面积小于电极结构的面积。当然，根据不同阵列基板的像素排列的设计，各电极结构和开口区域可以呈现为不同的形状，只要满足上述设置原理的，均在本公开的保护范围内，其具体形状可根据实际需要进行选择，在此不作具体限定。
需要说明的是，在本公开实施例提供的阵列基板中，如图3和图4所示， 该电极结构4的主体部分为矩形，还可以包括电极引线，其具体结构在图形未示出。
可选地，在本公开实施例提供的阵列基板中，如图4和图5所示，该绝缘结构5的厚度大于电极结构4的厚度；
该像素界定结构6包括：第一结构单元61和第二结构单元62，第一结构单元61沿着行方向上延伸在列方向上依次排列，第二结构单元62在列方向上延伸在行方向上依次排列；
每个开口区域K被两个第一结构单元61的部分和两个第二结构单元62的部分包围，第一结构单元61的部分和第二结构单元62的部分的中心轴(61a/62a)连接形成闭合图形包围开口区域K；
在开口区域K指向间隙区域中心轴(61a/62a)的方向上，像素界定结构6的上表面与衬底基板1之间的距离依次递增。
具体地，在本公开实施例提供的阵列基板中，如图4和图5所示，当绝缘结构5的厚度大于电极结构4的厚度，在形成像素界定结构6时，与绝缘结构4所在位置对应的像素界定结构6的高度就会高于其他位置的高度，在对像素界定结构6进行构图后，围绕开口区域K的第一结构单元和第二结构单元在开口区域指向中心轴的方向上可以呈斜坡状，即在开口区域K指向间隙区域中心轴(61a/62a)的方向上，像素界定结构6的上表面与衬底基板1之间的距离依次递增。基于该种形状的像素界定结构，在形成发光层时，即使存在墨滴落在像素界定结构上，也会沿着像素界定结构的表面滑落至像素所在区域，形成对应的发光层。
可选地，在本公开实施例提供的阵列基板中，如图4所示，绝缘结构5的形状为梯形，且靠近衬底基板1一侧表面的面积大于远离衬底基板1一侧表面的面积。
具体地，在本公开实施例提供的阵列基板中，将该绝缘结构设置为正梯形，在远离衬底基板的方向上，该绝缘结构的宽度依次递减，再在该绝缘结构上形成像素界定结构时，可以在绝缘结构所在区域形成明显凸起，便于形 成具有斜坡的像素界定结构，以使用于形成发光层的墨滴滑落至开口区域内。
可选地，在本公开实施例提供的阵列基板中，如图4所示，像素界定结构的截面形状为半圆形。
其中，该像素界定结构的截面形状并非严格意义上的半圆形，其上表面的所呈的形状可以为圆弧形，且相对于中心轴呈对称设置，其下表面与电极结构和绝缘结构相接触，下表面是否为平面取决于绝缘结构的厚度是否与电极结构的厚度相同，当绝缘结构的厚度与电极结构的厚度相同时，像素界定结构的下表面为平面，当绝缘结构的厚度与电极结构的厚度不同时，像素界定结构的下表面则为具有凹槽的结构。
可选地，在本公开实施例提供的阵列基板中，如图5所示，该衬底基板1包括：显示区域AA和包围显示区域AA的非显示区域BB；
非显示区域BB包括对位结构7，对位结构7被配置为在形成电极结构4进行对位；
其中，该对位结构7与绝缘结构5同层同材料设置。
相关技术中的阵列基板，在形成电极结构时，曝光对位标记一般是首层金属图形化形成(栅极)。由于顶发射型电致发光器件，在形成平坦化层之后才形成对应的电极结构，则没有图形段差轮廓作为对位标记，导致电极结构制作过程中曝光时不易对位，易发生对位报警，影响生产节拍，并对产品质量产生严重影响。
具体地，在本公开实施例提供的阵列基板中，在形成绝缘结构时在衬底基板上的非显示区域形成对位结构，及该对位机构与绝缘结构通过同一制作工艺形成，在形成电极结构时，可以对位于非显示区域内的对位结构进行识别，提高对位准确性。
为提高平坦化层的性能，使其达到电致发光器件所要求的平坦度，可以采用流平性较好的有机硅氧烷树脂(SOG)用于平坦化层的制作，其平坦度更高，可满足电致发光器件所要求的平坦度。有机硅氧烷树脂(SOG)为硅氧烷有机小分子加热脱水交联而成，其分子结构中存在大量羟基，亲水性较 高。
而，像素界定结构是像素开口之间的一层有机阻挡物，一般呈现上窄下宽的正梯形结构，以限制喷墨打印的墨水向四周溢出。其制作工艺一般包括像素界定结构材料的涂覆、曝光、显影、固化等工艺，将像素开口区光阻材料去除，形成像素开口区以及像素界定结构所在区域。为避免喷墨溶液在像素界定结构顶部粘附，保证发光层的均匀性，像素界定结构需与溶液呈现疏液性质。因此像素界定结构材料极性较小，一般为一种含氟材料。然而，相关技术中直接将像素界定结构与平坦化层接触，两者的结合力较低，容易造成像素界定结构的脱落，造成像素不良，影响显示品质。
可选地，在本公开实施例提供的阵列基板中，平坦化层的亲水性、绝缘结构的亲水性和像素界定结构的亲水性依次递减。
具体地，在本公开实施例提供的阵列基板中，通过在平坦化层和像素界定结构之间设置绝缘结构，并对该绝缘结构的亲水性进行设计，使其亲水性介于平坦化层和像素界定结构之间。该种设置方式，相比于相关技术中直接将像素界定结构与平坦化层接触而言，极大的提高了像素界定结构与平坦化层的结合力，保证了阵列基板各结构的结合稳定性，以提高显示质量。
可选地，在本公开实施例提供的阵列基板中，该平坦化层的材料可以为有机硅氧烷树脂材料；
该像素界定结构的材料可以为超疏水亚克力材料。
具体地，在本公开实施例提供的阵列基板中，由于有机硅氧烷树脂材料，具有较高的流动性，其平坦度更高，可更好的满足电致发光器件所要求的平坦度。像素界定结构采用超疏水材料，可以避免喷墨溶液在像素界定结构顶部粘附，保证发光层的均匀性。
可选地，在本公开实施例提供的阵列基板中，该电极结构可以为反射金属电极。
具体地，在本公开实施例提供的阵列基板中，将电极结构设置为反射金属电极，可以对照射在其上的光进行反射，避免光照射在驱动电路的结构中， 造成薄膜晶体管的性能衰减。
可选地，在本公开实施例提供的阵列基板中，该绝缘结构的材料可以为遮光材料。
具体地，在本公开实施例提供的阵列基板中，可以将绝缘结构设置为遮光的绝缘结构，即采用遮光材料形成该绝缘结构，该种设置可以对电极结构之间的间隙区域内的光进行遮挡，避免影响该间隙区域内的薄膜晶体管的性能。其中，该遮光材料可以为有机硅遮光材料或黑色亚克力材料。当然也可以为其他遮光绝缘材料，在此不作具体限定。
可选地，在本公开实施例提供的阵列基板中，该电极结构的厚度可以为50nm～200nm；
该绝缘结构的厚度可以为500nm～1000nm。
其中，在电极结构的厚度和绝缘结构的厚度满足上述条件时，可以保证后续形成的像素界定结构能够形成中间高，边缘低的结构，在形成发光层时，墨滴不会存储在像素界定结构中，减少像素的漏光现象。
下面以图4以及图6a至6c为例，对阵列基板的制作过程进行说明：
如图6a所示，提供一衬底基板1，并在该衬底基板1上形成驱动电路结构2和平坦化层3；其中，该驱动电路结构2和平坦化层3的制作工艺与相关技术相同，在此不再赘述。
其中，该驱动电路结构可以包括遮光金属层、缓冲层、有源层、栅极绝缘层、栅极、层间介质层、源漏极、钝化层等。该平坦化层采用涂布、前烘、后烘等工艺成膜。
如图6b所示，在预定的位置通过光刻工艺形成绝缘结构5，其中，该预定位置为相邻两个电极结构之间的间隙区域；
需要说明的是，可以通过同一工艺在非显示区域形成对位结构(在图中未具体示出)，从而减少制作工艺，节约生产成本。
如图6c所示，在形成由绝缘结构5的衬底基板1上，以对位结构(在图中未具体示出)为对位标记形成电极结构4，具体可以通过成膜、曝光显影、 刻蚀等工艺形成。
在形成电极结构4之后，在衬底基板1上形成像素界定结构6，其形成工艺与相关技术中形成像素界定结构的工艺相同，在此不再赘述，其形成后的结构如图4所示。
基于同一发明构思，本公开实施例还提供了一种阵列基板的制作方法，包括：
提供一衬底基板；
依次在衬底基板上形成驱动电路结构和平坦化层；
在预定位置处形成绝缘结构；
在相邻绝缘结构之间设置电极结构，绝缘结构的厚度大于电极结构的厚度；
在绝缘结构背离衬底基板一侧形成像素界定结构，使像素界定结构在衬底基板上的正投影覆盖绝缘结构以及电极结构边缘在衬底基板上的正投影。
可选地，在本公开实施例提供的阵列基板的制作方法中，在相邻电极结构之间的间隙区域形成绝缘结构的同时，还包括：
通过同一工艺在衬底基板的非显示区域形成对位结构。
其中，本公开实施例提供的阵列基板的制作方法已经在上述实施例中进行了详细的阐述，可参考上述阵列基板的实施例进行实施，在此不再赘述。
基于同一发明构思，本公开实施例还提供了一种显示面板，该显示面板包括上述任一实施例提供的阵列基板，以及位于像素区域内的发光层，位于发光层背离衬底基板一侧的驱动电极结构。
该显示面板还包括本领域技术人员可知的其他必要结构，在此不再赘述。
基于同一发明构思，本公开实施例还提供了一种显示装置，该显示装置包括上述实施例提供的显示面板。
其中，该显示面板和显示装置具有上述实施例提供的阵列基板的全部优点，可以参见阵列基板的任一实施例进行实施，在此不再赘述。
该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、 数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。该显示装置的实施可以参见上述显示面板的实施例，重复之处不再赘述。
本公开实施例提供了一种阵列基板、其制作方法、显示面板及显示装置，该阵列基板包括：衬底基板，位于所述衬底基板上的驱动电路结构，以及依次位于所述驱动电路结构背离所述衬底基板一侧的平坦化层和多个电极结构；还包括：绝缘结构，所述绝缘结构位于相邻所述电极结构之间的间隙区域，所述绝缘结构的厚度不小于所述电极结构的厚度；像素界定结构，所述像素界定结构位于所述绝缘结构背离所述衬底基板一侧，且所述像素界定结构在所述衬底基板上的正投影至少完全覆盖所述绝缘结构。通过绝缘结构的设置，并且使绝缘结构的厚度不小于电极结构的厚度，从而使得再形成像素界定结构时，在间隙区域处不再形成凹陷，无法存储形成发光层的墨滴，从而缓解了像素的漏光问题。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (16)

  1. 一种阵列基板，其中，包括：衬底基板，位于所述衬底基板上的驱动电路结构，以及依次位于所述驱动电路结构背离所述衬底基板一侧的平坦化层和多个电极结构；还包括：
    绝缘结构，所述绝缘结构位于相邻所述电极结构之间的间隙区域，所述绝缘结构的厚度不小于所述电极结构的厚度；
    像素界定结构，所述像素界定结构位于所述绝缘结构背离所述衬底基板一侧，且所述像素界定结构在所述衬底基板上的正投影至少完全覆盖所述绝缘结构。
  2. 如权利要求1所述的阵列基板，其中，所述像素界定结构包括开口区域，所述开口区域与所述电极结构一一对应设置；
    所述开口区域至少暴露部分所述电极结构。
  3. 如权利要求2所述的阵列基板，其中，所述电极结构的形状包括矩形部分，所述像素界定结构的开口区域为椭圆形或圆角矩形；
    所述开口区域在所述衬底基板上正投影在所述电极结构在所述衬底基板上正投影内。
  4. 如权利要求2所述的阵列基板，其中，所述绝缘结构的厚度大于所述电极结构的厚度；
    所述像素界定结构包括：第一结构单元和第二结构单元，所述第一结构单元沿着行方向上延伸在列方向上依次排列，所述第二结构单元在列方向上延伸在行方向上依次排列；
    每个所述开口区域被两个所述第一结构单元的部分和两个所述第二结构单元的部分包围，所述第一结构单元的部分和所述第二结构单元的部分的中心轴连接形成闭合图形包围所述开口区域；
    在所述开口区域指向所述中心轴的方向上，所述像素界定结构的上表面与所述衬底基板之间的距离依次递增。
  5. 如权利要求4所述的阵列基板，其中，所述绝缘结构的形状为梯形，且靠近所述衬底基板一侧表面的面积大于远离所述衬底基板一侧表面的面积。
  6. 如权利要求4所述的阵列基板，其中，所述像素界定结构的截面形状为半圆形。
  7. 如权利要求1所述的阵列基板，其中，所述衬底基板包括：显示区域和包围所述显示区域的非显示区域；
    所述非显示区域包括对位结构，所述对位结构被配置为在形成所述电极结构进行对位；
    其中，所述对位结构与所述绝缘结构同层同材料设置。
  8. 如权利要求1所述的阵列基板，其中，所述平坦化层的亲水性、所述绝缘结构的亲水性和所述像素界定结构的亲水性依次递减。
  9. 如权利要求8所述的阵列基板，其中，所述平坦化层的材料为有机硅氧烷树脂材料；
    所述像素界定结构的材料为超疏水亚克力材料。
  10. 如权利要求1所述的阵列基板，其中，所述电极结构为反射金属电极。
  11. 如权利要求1所述的阵列基板，其中，所述绝缘结构的材料为遮光材料。
  12. 如权利要求1-11任一项所述的阵列基板，其中，所述电极结构的厚度为50nm～200nm；
    所述绝缘结构的厚度为500nm～1000nm。
  13. 一种如权利要求1-12任一项所述的阵列基板的制作方法，其中，包括：
    提供一衬底基板；
    依次在所述衬底基板上形成驱动电路结构和平坦化层；
    在预定位置处形成绝缘结构；
    在相邻所述绝缘结构之间设置电极结构，所述绝缘结构的厚度大于所述 电极结构的厚度；
    在所述绝缘结构背离所述衬底基板一侧形成像素界定结构，使所述像素界定结构在所述衬底基板上的正投影覆盖所述绝缘结构以及所述电极结构边缘在所述衬底基板上的正投影。
  14. 如权利要求13所述的阵列基板的制作方法，其中，在相邻所述电极结构之间的间隙区域形成绝缘结构的同时，还包括：
    通过同一工艺在所述衬底基板的非显示区域形成所述对位结构。
  15. 一种显示面板，其中，包括如权利要求1-12任一项所述的阵列基板。
  16. 一种显示装置，其中，包括如权利要求15所述的显示面板。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060220543A1 (en) * 2005-03-30 2006-10-05 Seiko Epson Corporation Organic electro luminescent device and method of manufacturing organic electro luminescent device
CN102082164A (zh) * 2009-11-30 2011-06-01 三星移动显示器株式会社 有机发光二极管显示设备及其制造方法
US20130330868A1 (en) * 2008-10-23 2013-12-12 Samsung Display Co., Ltd. Organic light emitting diode display device and method of manufacturing the same
CN111129105A (zh) * 2020-01-17 2020-05-08 合肥鑫晟光电科技有限公司 一种阵列基板、其制作方法、显示面板及显示装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904056A (en) * 1985-07-19 1990-02-27 General Electric Company Light blocking and cell spacing for liquid crystal matrix displays
JP5333176B2 (ja) * 2009-11-26 2013-11-06 株式会社リコー 画像表示装置、画像表示装置の製造方法及び電子機器
CN103928497B (zh) * 2014-04-01 2016-07-13 京东方科技集团股份有限公司 Oled显示器件及其制作方法、显示装置
CN104752490B (zh) 2015-04-16 2016-04-06 京东方科技集团股份有限公司 一种有机发光二极管显示面板及其制作方法、显示装置
CN105826358B (zh) * 2016-05-24 2019-02-05 京东方科技集团股份有限公司 一种显示基板及其制备方法、显示面板、显示装置
CN109860239B (zh) 2018-12-13 2021-03-16 武汉华星光电半导体显示技术有限公司 阵列基板及其制作方法、显示装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060220543A1 (en) * 2005-03-30 2006-10-05 Seiko Epson Corporation Organic electro luminescent device and method of manufacturing organic electro luminescent device
US20130330868A1 (en) * 2008-10-23 2013-12-12 Samsung Display Co., Ltd. Organic light emitting diode display device and method of manufacturing the same
CN102082164A (zh) * 2009-11-30 2011-06-01 三星移动显示器株式会社 有机发光二极管显示设备及其制造方法
CN111129105A (zh) * 2020-01-17 2020-05-08 合肥鑫晟光电科技有限公司 一种阵列基板、其制作方法、显示面板及显示装置

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