WO2021136185A1 - 天线阵列解耦方法、装置、系统和存储介质 - Google Patents

天线阵列解耦方法、装置、系统和存储介质 Download PDF

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Publication number
WO2021136185A1
WO2021136185A1 PCT/CN2020/140198 CN2020140198W WO2021136185A1 WO 2021136185 A1 WO2021136185 A1 WO 2021136185A1 CN 2020140198 W CN2020140198 W CN 2020140198W WO 2021136185 A1 WO2021136185 A1 WO 2021136185A1
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decoupling
channel
domain signal
array
antenna array
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PCT/CN2020/140198
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English (en)
French (fr)
Inventor
杜文豪
操砚茹
宁东方
戴征坚
张作锋
黄丘林
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中兴通讯股份有限公司
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Priority to US17/758,090 priority Critical patent/US11979216B2/en
Priority to EP20908781.6A priority patent/EP4080779A4/en
Publication of WO2021136185A1 publication Critical patent/WO2021136185A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/0413—MIMO systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
    • H04B7/0697—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using spatial multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/0413—MIMO systems
    • H04B7/0456—Selection of precoding matrices or codebooks, e.g. using matrices antenna weighting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
    • H04B7/0613—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using simultaneous transmission
    • H04B7/0615—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using simultaneous transmission of weighted versions of same signal
    • H04B7/0617—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using simultaneous transmission of weighted versions of same signal for beam forming
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • H04B7/0837—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using pre-detection combining
    • H04B7/0842—Weighted combining

Definitions

  • the embodiments of the present invention relate to the field of communication technologies, and in particular to an antenna array decoupling method, device, system, and storage medium.
  • 5G 5th Generation Wireless Systems
  • MIMO Multiple Input Multiple Output
  • the volume of the antenna array cannot be very large.
  • the physical size of the antenna array is limited, the mutual coupling and interference between multiple antenna elements will inevitably cause the degradation of antenna performance.
  • hardware decoupling methods are mostly used, such as setting up defective decoupling around the antenna, setting partitions, and decoupling networks.
  • the hardware decoupling scheme has certain decoupling limits, and decoupling is generally in tight coupling conditions. The efficiency is not high, and additional hardware needs to be set up, which increases the difficulty and pressure of antenna design.
  • an embodiment of the present invention provides an antenna array decoupling method, including: receiving predetermined digital domain signals of multiple channels, wherein each channel of the multiple channels corresponds to an element in the antenna array Determine the decoupling coefficient of the channel participating in the decoupling corresponding to each channel, where the decoupling coefficient is the coefficient obtained in advance according to the measured pattern information of each element in the antenna array; and according to The decoupling coefficient processes the predetermined digital domain signal of the channel participating in the decoupling corresponding to each channel to obtain the predetermined digital domain signal decoupled from each channel.
  • an embodiment of the present invention provides an antenna array decoupling device, including: a signal receiving module configured to receive predetermined digital domain signals of multiple channels, wherein each channel of the multiple channels is connected to the antenna array The data channel corresponding to an element in the array; the coefficient loading module is configured to determine the decoupling coefficient of the channel participating in the decoupling corresponding to each channel, where the decoupling coefficient is based on the measured antenna array in advance. The coefficient obtained by solving the pattern information in the element array; and the signal decoupling module is configured to process the predetermined digital domain signal of the channel participating in the decoupling corresponding to each channel according to the decoupling coefficient to obtain the decoupling of each channel. Coupled predetermined digital domain signal.
  • an embodiment of the present invention provides a communication system including: an antenna array decoupling coefficient memory configured to store the decoupling coefficient of the data channel corresponding to each element in the antenna array, and the decoupling coefficient is measured in advance based on The coefficients obtained by solving the in-array pattern information of each element in the antenna array; and the antenna array decoupling system, configured to receive predetermined digital domain signals of multiple channels, where each channel of the multiple channels is connected to the antenna array Corresponding to one of the array elements, determine the decoupling coefficient of the channel participating in decoupling corresponding to each channel, and process the predetermined digital domain signal of the channel participating in decoupling corresponding to each channel according to the decoupling coefficient to obtain A predetermined digital domain signal decoupled for each channel.
  • an embodiment of the present invention provides an antenna array decoupling system, including: a memory and a processor; the memory is configured to store a program; the processor is configured to read executable program code stored in the memory to execute The antenna array decoupling method described above.
  • an embodiment of the present invention provides a computer-readable storage medium that stores instructions in the computer-readable storage medium, where the instructions are configured to run on a computer to cause the computer to execute the antenna arrays of the foregoing aspects. Decoupling method.
  • FIG. 1 shows a schematic flowchart of an antenna array decoupling method according to an embodiment of the present invention.
  • Fig. 2 shows a schematic flow chart of constructing a decoupling matrix according to an embodiment of the present invention.
  • FIG. 3 shows a schematic structural diagram of a digital domain decoupling solution for an antenna array according to an exemplary embodiment of the present invention.
  • FIG. 4 shows a schematic diagram of a specific implementation location of a downlink frequency domain decoupling solution according to an embodiment.
  • FIG. 5 shows a schematic structural diagram of a decoupling module of a frequency domain decoupling scheme according to an embodiment.
  • Figure 6 shows a schematic diagram of a 64-element rectangular array of the base station antenna.
  • FIG. 7 shows a schematic structural diagram of the decoupling module 510 corresponding to channel 10 in the frequency domain decoupling solution.
  • FIG. 8 shows a schematic diagram of a specific implementation location of a downlink time domain decoupling solution according to an embodiment.
  • FIG. 9 shows a schematic structural diagram of a decoupling module of a time domain decoupling scheme according to an embodiment.
  • FIG. 10 shows a schematic structural diagram of a decoupling module corresponding to channel 10 in the frequency domain decoupling solution.
  • FIG. 11 shows a schematic structural diagram of an antenna array decoupling device according to an embodiment of the present invention.
  • Fig. 12 shows a structural diagram of an exemplary hardware architecture of a computing device that can implement the method and apparatus according to the embodiments of the present invention.
  • An antenna is a device used to transmit and receive electromagnetic energy.
  • An antenna array refers to an antenna system formed by multiple antenna elements arranged together regularly or randomly.
  • An antenna element refers to each independent antenna in the antenna array, which can also be referred to as an antenna element or an antenna element.
  • the antenna array can be called a planar array, and the antenna elements in the planar array can be arranged in different shapes, such as a circular array and a rectangular array.
  • the volume of the antenna array cannot be very large.
  • the mutual coupling and interference between multiple antenna elements will inevitably cause the degradation of the antenna performance, which can be mainly manifested in the following Several aspects: First, due to the high antenna sidelobe, it has a greater impact on the beam scanning capability of the array; second, due to the mutual interference between the antenna elements, the signal-to-noise ratio deteriorates, which directly affects the data Throughput rate: Third, due to the reduction of effective radiated energy, the gain of the antenna array is reduced and the energy utilization efficiency is low.
  • the embodiment of the present invention provides an antenna array decoupling method, which can perform decoupling in the digital domain without increasing the difficulty of antenna design, thereby effectively reducing the coupling effect of the antenna array and improving system performance.
  • FIG. 1 shows a schematic flowchart of an antenna array decoupling method according to an embodiment of the present invention.
  • the antenna array decoupling method may include steps S110-S130.
  • each channel of the multiple channels is a data channel corresponding to one element in the antenna array.
  • S120 Determine the decoupling coefficient of the channel participating in the decoupling corresponding to each channel, where the decoupling coefficient is a coefficient obtained in advance according to the measured array pattern information of each element in the antenna array.
  • S130 Process the predetermined digital domain signal of the channel participating in the decoupling corresponding to each channel according to the decoupling coefficient, to obtain a predetermined digital domain signal decoupled from each channel.
  • the decoupling coefficient of the antenna array can be obtained by testing the in-array pattern of each element in the base station antenna array in advance, and load the received digital domain signals of multiple channels.
  • the corresponding decoupling parameter realizes the decoupling operation.
  • the decoupling matrix of the antenna array in the method of the embodiment of the present invention is obtained through the pattern test, no additional hardware is required, and the high sidelobe level caused by the coupling of the base station antenna can be effectively solved without increasing the difficulty of antenna design.
  • Array beam scanning capability is reduced, effective radiation is reduced, and crosstalk between antenna elements is serious, which improves the system performance of 5G MIMO communication systems and 5G Massive MIMO communication systems.
  • the antenna array is decoupled, thereby reducing the impact of array coupling and improving system performance.
  • the in-array pattern of each array element represents the in-array pattern obtained by testing when only that array element in the array is excited, and other array elements are not excited. Since the elements in the measured antenna array are coupled with each other, the actually measured antenna array can be referred to as a coupled array.
  • S102 Calculate the pattern information of the elements in the ideal antenna array in the array of multiple sampling points under a predetermined frequency, where the ideal antenna array is an antenna array in a non-coupling condition simulated by the array layout of the antenna array.
  • the ideal antenna array can construct an antenna array with the same array layout in a simulation or simulation environment according to the array layout of the antenna array.
  • the in-array pattern of the ideal array includes the pattern of the isolated element unit and the pattern of the array factor caused by the array position of the element (the array position relative to the reference element).
  • S103 Use the pattern information of the elements in the ideal antenna array to correct the measured pattern information of the elements in the antenna array to obtain the decoupling of the elements in the antenna array at a predetermined frequency. coefficient.
  • the in-array pattern information of each element in the ideal antenna array is used to modify the in-array pattern information of each element in the coupled array to obtain the solution of each element in the antenna array at a predetermined frequency.
  • Coupling coefficient The method for solving the decoupling coefficient is applicable to various antenna models.
  • step S103 may specifically include the following steps.
  • S1031 Generate a first-array in-array pattern matrix according to the in-array pattern information of the elements in the antenna array measured at a predetermined frequency point.
  • S1032 Generate a second array directional pattern matrix according to the directional pattern information of the elements in the ideal antenna array at a predetermined frequency point.
  • S1033 Multiply the generalized inverse matrix of the pattern matrix in the first array by the pattern matrix in the second array to obtain a decoupling matrix of the antenna array at a predetermined frequency.
  • S1034 Extract the M decoupling coefficients of each element in the antenna array from the decoupling matrix, where the M decoupling coefficients correspond to the M elements in the antenna array, and M is an integer greater than or equal to 2.
  • a general antenna array can be configured with a set of decoupling coefficients every predetermined frequency interval.
  • the predetermined frequency point is a frequency point in a broadband environment where the antenna array in the base station operates, which is determined according to the signal bandwidth received by the antenna array and the predetermined frequency interval.
  • the minimum number of decoupling coefficients required in the system can be calculated from the ratio of the signal bandwidth to the predetermined frequency interval.
  • the preset predetermined frequency may be preset according to actual application scenarios. Exemplarily, taking the 2.6 GHz frequency band as an example, the signal bandwidth is 160 MHz in total, and the frequency interval is 40 MHz, and at least 4 sets of decoupling coefficients are required.
  • Fig. 2 shows a schematic flow chart of constructing a decoupling matrix according to an embodiment of the present invention.
  • the steps of constructing a decoupling matrix may specifically include:
  • step S201 test the in-array pattern of each element of the antenna array.
  • F' [F 1 ', F 2 ',...F M '], where F 1 ', F 2 ',...F M 'are respectively It shows the pattern of the array in each array.
  • the pattern of the array in one array means that only the array is excited, and the other arrays are not excited.
  • the in-array pattern of each element in the antenna array obtained by the test can be expressed as the in-array pattern matrix shown in the following expression (1).
  • N is the number of spatial sampling points of the pattern
  • each column represents the pattern of the pattern of each of the N sampling points in the space of one element of the antenna array actually tested or actually measured
  • ⁇ respectively represent the incident azimuth and elevation angle of the signal at the sampling point
  • M is the number of elements in the antenna array
  • M is an integer greater than or equal to 2.
  • S202 Construct an array pattern of the ideal array for each array.
  • step S202 through the array layout, the in-array pattern of each element in the ideal array is calculated.
  • the directional pattern of each element in the ideal array is formed into the directional pattern matrix Fd of the array, as shown in the following expression (2).
  • N is the number of spatial sampling points of the directional pattern
  • each column represents the in-array directional pattern of one element of the constructed ideal antenna array at each of the N sampling points in the space.
  • ⁇ respectively represent the incident azimuth and elevation angle of the signal at the sampling point
  • M is the number of elements in the antenna array, and M is an integer greater than or equal to 2.
  • S203 Calculate the decoupling matrix by using the in-array pattern of each element of the array and the in-array pattern of each element of the ideal array obtained by the test.
  • step S203 the following expression (3) is established according to the relationship between the in-array pattern matrix F′ of the coupled array, the in-array pattern matrix F d of the ideal array, and the decoupling matrix D.
  • pinv(F') represents the generalized inverse of the matrix F', and each element in the decoupling matrix D is the decoupling coefficient.
  • each element in the solved decoupling matrix D can be stored in a designated storage area, so as to facilitate subsequent decoupling processing of multiple elements in the antenna array.
  • the decoupling matrix of the array is solved by the pattern matrix in the joint array and the ideal array, and the antenna decoupling can be realized without changing the antenna hardware.
  • This method can effectively reduce the hardware decoupling in the small-scale array design. Coupled design pressure.
  • the predetermined digital domain signals received from multiple channels may be uplink or downlink frequency domain signals, and may also be uplink or downlink time domain signals.
  • FIG. 3 shows a schematic structural diagram of a digital domain decoupling solution for an antenna array according to an exemplary embodiment of the present invention. Figure 3 depicts two optional implementation positions of the antenna array decoupling in the digital domain, that is, the position of the decoupling module in the base station system.
  • the decoupling coefficient can be used in the frequency domain module of the base station system, which is called a frequency domain decoupling scheme.
  • the downlink frequency domain decoupling device 005 may be located in the antenna port mapping module 004 and the inverse fast Fourier transform (Inverse Fast Fourier Transform). Between the Transform (IFFT) module 006, the uplink frequency domain decoupling module 020 may be located between the Fast Fourier Transform (FFT) module 019 and the antenna port demapping module 021.
  • IFFT inverse fast Fourier transform
  • FFT Fast Fourier Transform
  • the antenna port mapping module 004 may be used to map the received downlink frequency domain signals of multiple channels to multiple antenna ports; the downlink frequency domain decoupling device 005 can perform the mapping of the multiple received signals from the antenna port mapping module 004 to multiple antenna ports.
  • the frequency domain signal of the channel is decoupled;
  • IFFT006 can be used to convert the frequency domain signals of multiple channels after decoupling into time domain signals.
  • the FFT module 019 can be used to convert the received time domain signals of multiple uplink channels into frequency domain signals; the uplink frequency domain decoupling module 020 is used to convert the multiple channels received from the FFT module 019 into frequency domain signals. The frequency domain signal is decoupled; the antenna port demapping module 021 is used to demap the frequency domain signals of the multiple channels after decoupling the FFT module 019 from the physical port.
  • the frequency domain signal when the predetermined digital domain signal is a frequency domain signal, the frequency domain signal includes the downlink frequency domain signal mapped by the antenna port, or the uplink frequency domain signal before being demapped by the antenna port.
  • the decoupling coefficient can be used in the time domain module of the base station system, which is called a time domain decoupling scheme.
  • the downlink time domain decoupling module 008 may be located in the cyclic prefix (CP) insertion module 007 and deep power reduction ( Between the Deep Power Down (DPD) module 009, the uplink time domain decoupling module 017 may be located between the Automatic Gain Control (AGC) module 016 and the CP removal module 018.
  • CP cyclic prefix
  • AGC Automatic Gain Control
  • the CP insertion module 007 is used to add a cyclic prefix to the received time-domain signals of multiple channels to achieve time pre-estimation and frequency synchronization;
  • the downlink time-domain decoupling module 008 is used to add a cyclic prefix The time-domain signals of multiple channels are decoupled;
  • the DPD module 009 is used to reduce the nonlinear distortion of the channels.
  • the AGC module 016 is used to adjust the gains of the uplink time-domain signals of multiple channels; the uplink time-domain decoupling module 017 is used to decompress the uplink time-domain signals of the multiple channels after gain adjustment. Coupling; CP removal module 018 is used to remove the cyclic prefix of the uplink time domain signals of the multiple channels after decoupling.
  • the time domain signal when the predetermined digital domain signal is a time domain signal, the time domain signal includes a downlink time domain signal with a cyclic prefix added, or an uplink time domain signal before the cyclic prefix is removed.
  • FIG. 3 also shows other main modules in the uplink and downlink of the base station system, such as the downlink transmission signal (TX signal), signal modulation module 002, layer mapping and precoding module 003, and digital-to-analog converter.
  • TX signal downlink transmission signal
  • signal modulation module 002 layer mapping and precoding module 003, and digital-to-analog converter.
  • DAC Digital-to-Analog Converter
  • the power amplifier module 011 After the (Digital-to-Analog Converter, DAC) module 010 and the power amplifier module 011 are processed in sequence, they reach the antenna module 013 through the duplex module 012, and the signal received by the antenna module 013 in the uplink is transmitted through the duplex module 012 and passed through the duplex module 012.
  • ADC analog-to-digital converter
  • the downlink transmission signal undergoes corresponding processing (for example, shielding of the underlying hardware platform and encapsulation of physical link operations) by the underlying Low Media Access Control (MAC) module 001, and then After the modules in the downlink in Figure 3 are processed, they reach the antenna module 013 through the duplexer (DPX) module 012; the signal received by the antenna module 013 is transmitted through the duplex module 012, and each function in the uplink is transmitted Module processing, and after processing by the Low MAC module 001, the uplink received signal (RX signal) is obtained.
  • DPX duplexer
  • the main modules in the base station system of the present invention are not limited to those described above and the specific modules shown in FIG. 3.
  • the architecture may only include some of the modules, that is, the The architecture of the base station system may include more flexible module configurations. The following describes the implementation devices of the two decoupling schemes of the present invention.
  • FIG. 4 shows a schematic diagram of a specific implementation location of a downlink frequency domain decoupling solution of an embodiment
  • FIG. 5 shows a schematic structural diagram of a decoupling module of a frequency domain decoupling solution of an embodiment.
  • the same or equivalent structures in Fig. 4, Fig. 5 and Fig. 3 use the same reference numerals.
  • the frequency domain decoupling scheme of the present invention can be implemented in the baseband frequency domain part.
  • the specific location of the downlink frequency domain decoupling device 005 may be located between the antenna port mapping module 004 and the antenna calibration module 025.
  • the downlink frequency domain decoupling device 005 decouples the received coupled multi-channel data by loading the decoupling coefficient in the frequency domain decoupling coefficient storage module 024.
  • the downlink frequency domain decoupling device 005 may specifically include: a routing module 500, multiple channel decoupling modules such as channel CH-1 decoupling module 501, CH-2 decoupling module 502, ..., CH- M decoupling module 50M, M is the number of antenna channels.
  • the uplink frequency domain decoupling device 020 and the downlink frequency domain decoupling device 005 have the same or equivalent structure.
  • the following multiple embodiments in this document are taken as an example of the following row frequency domain decoupling device 005
  • the decoupling scheme of uplink frequency domain signals is consistent with the decoupling scheme of downlink frequency domain signals.
  • the input signal 005a is the input signal of the frequency domain decoupling module.
  • the signal after the downlink antenna port mapping can be represented. If it is an uplink, it can be the signal after the antenna calibration module 025 or the signal before the uplink antenna port demapping; the output signal 005b is the output signal of the frequency domain decoupling module.
  • the routing module 500 can be used to distribute the input signals of each channel and distribute them to the decoupling modules of each channel for decoupling.
  • the routing module 500 shown in FIG. 5 distributes all channel data to the decoupling modules of each channel. However, it is generally believed that the antenna element only has strong coupling with the surrounding antennas. From the perspective of saving resources, the coupling effect with other elements is small and can be ignored.
  • the channels participating in the decoupling are a specified number of channels located around the targeted channel and determined in advance according to the array layout of the antenna array.
  • step S120 the following step may be further included: according to the array layout of the antenna array, a designated number of channels located around each channel are determined as channels participating in decoupling.
  • the routing module is to allocate the relevant channel data for each channel corresponding to its own channel decoupling module for decoupling.
  • each decoupling module corresponds to the channel decoupling module, each channel according to the channel data allocated by the routing module, and load the decoupling coefficient transmitted by the frequency domain decoupling coefficient storage module 024, and synthesize and output the channel Signal after decoupling.
  • Frequency domain decoupling coefficient storage module 024 which can be used to store frequency domain decoupling coefficients, which exist in the form of decoupling matrices at several frequency points. According to the variation characteristics of the decoupling coefficient with frequency, multiple decoupling matrices at different frequencies can be stored.
  • the step of determining the decoupling coefficient of the channel participating in the decoupling corresponding to each channel may specifically include: S121, determining the frequency point of the predetermined digital domain signal of each channel; S122 , Determine the decoupling coefficient of the channel participating in decoupling corresponding to each channel according to the frequency point.
  • step S122 firstly, the decoupling coefficient of each element in the antenna array at the frequency point can be obtained, and secondly, the decoupling coefficient of each element in the frequency point is used as the channel corresponding to each element in the frequency point.
  • the decoupling coefficient under the frequency point then, from the channel participating in the decoupling corresponding to each channel, the decoupling coefficient of the channel participating in the decoupling corresponding to each channel is obtained.
  • the corresponding decoupling matrix can be selected in the frequency domain decoupling coefficient storage module 024 according to the frequency of the currently received channel data.
  • the above step S130 may specifically include: S31, for the frequency domain signal of the channel participating in decoupling corresponding to each channel, respectively using the determined decoupling The decoupling coefficient corresponding to the channel is weighted to obtain the frequency domain signal of the decoupling channel corresponding to each channel after the weighting process; S32, combining the weighted processing of the decoupling channel corresponding to each channel The frequency domain signal of each channel is obtained, and the decoupled frequency domain signal of each channel is obtained.
  • decoupling of channel data in the frequency domain can be achieved by the following expression (5).
  • D i refers to the decoupling matrix at the frequency of the i-th Resource Block (RB).
  • RB is the smallest unit of data transmission resource allocation.
  • D i is the current frequency according to the received channel data, selects a corresponding frequency domain decoupling in the decoupling matrix coefficient storage module 024, data flow refers to the vector X i is the i-th RB frequency from antenna
  • the downstream output data stream of the port mapping module, or the data stream after the antenna calibration module 025, or the data stream before the upstream antenna port demapping, the data stream corresponds to the frequency domain signal 500a before decoupling in Figure 5;
  • data stream vector Y_i Refers to the RB data stream output by the decoupling module, corresponding to the frequency domain signal 500b after decoupling in FIG. 5.
  • the decoupling matrix D i in the expression (5) is an M*M dimensional matrix (M is the number of antennas in the array).
  • M is the number of antennas in the array.
  • the channel data of a certain antenna element is When decoupling, the antenna elements with weaker coupling relationship between each antenna element and the antenna element can be set to zero in the corresponding element of the decoupling matrix. Generally, only the specified number of antenna elements located around the certain antenna element are retained.
  • the decoupling coefficient for example, in the routing module 500, the channels outside the current period will not be routed to the input end of the corresponding decoupling channel of the current period.
  • the data channels participating in the decoupling of a certain channel are a specified number of channels located around the certain channel determined in advance according to the array layout of the antenna array. Therefore, when introducing the decoupling matrix of the channel according to the frequency point, it is only necessary to introduce the pre-set decoupling coefficient of the data channel participating in the decoupling of the channel in the decoupling matrix.
  • FIG. 6 shows a schematic diagram of a 64-element rectangular array of the base station antenna
  • Fig. 7 shows a schematic structural diagram of the decoupling module 510 corresponding to channel 10 in the frequency domain decoupling solution.
  • the same or equivalent structures in FIG. 6 and FIG. 7 and FIG. 4 and FIG. 5 use the same reference numerals.
  • the base station antenna is a 64-element rectangular array. There are a total of 9 coupled related arrays around the array of array 10, array 1, array 2, array 3, array 9, array 11, array 17, array 18, array 19, plus array 10 itself.
  • the channel 10 needs to introduce the channel data corresponding to the 9 periods when decoupling.
  • the channel data corresponding to the 9 arrays are respectively multiplied by the decoupling coefficient corresponding to channel 10 at the RB frequency point, and then combined for output.
  • the frequency domain signal 51001 allocated by routing is the RB input signal of each channel participating in decoupling at the i-th frequency point allocated by the routing module 500 to the decoupling module 510 corresponding to channel 10 (CH-10);
  • the input signals of each channel participating in the decoupling of channel 10 are x 1, i , x 2, i , x 3, i , x 9, i , x 10, i , x 11, i , x 17, i , x 18, i , x 19,i .
  • the multiplier module 51002 is used to multiply the input signal of each channel participating in the decoupling with the corresponding decoupling coefficient value.
  • the adder module 51003 is used to combine the input signals of each channel participating in the decoupling with the signals weighted (multiplied) by the decoupling coefficients.
  • the decoupled frequency domain signal module 51004 is used to output the decoupled frequency domain signal of channel 10.
  • the implementation process of the above-mentioned multiplier module 51002 and adder module 51003 can be expressed as the following expression (6).
  • i represents the i-th RB data being processed at this moment
  • y_(10,i) is the output value of the channel 10 decoupling module.
  • x 1,i , x 2,i , x 3,i , x 9,i , x 10,i , x 11,i , x 17,i , x 18,i , x 19,i respectively represent channel 1 , Channel 2, Channel 3, Channel 9, Channel 10, Channel 11, Channel 17, Channel 18, Channel 19 input data.
  • Each channel sequentially performs the decoupling process of the above-mentioned channel 10, and outputs the decoupling output value of each channel, so as to realize the decoupling operation of the antenna array.
  • FIG. 8 shows a schematic diagram of a specific implementation location of a downlink time domain decoupling solution according to an embodiment
  • FIG. 9 shows a schematic structural diagram of a decoupling module of the time domain decoupling solution according to an embodiment.
  • the same or equivalent structures in FIG. 8, FIG. 9 and FIG. 3 use the same reference numerals.
  • the time-domain decoupling scheme of the present invention can be implemented in the intermediate frequency or baseband part.
  • the specific location of the downlink time domain decoupling device 008 may be located between the CP insertion module 007 and the Crest Factor Reduction (CFR) module 027
  • the uplink time domain decoupling device 017 may be located between the CFR module 027 and the CP removal module. Between 018.
  • the time domain decoupling module device 008 may include: a routing module 800, multiple channel decoupling modules such as CH-1 decoupling module 801, CH-2 decoupling module 802,... ..., CH-M decoupling module 80M, M is the number of antenna channels.
  • the uplink time domain decoupling device 017 and the downlink time domain decoupling device 008 have the same or equivalent structure.
  • the following multiple embodiments in this document are taken as an example of the following time domain decoupling device 008
  • the decoupling scheme of the uplink time domain signal is consistent with the decoupling scheme of the downlink time domain signal.
  • the input signal 008a is the input signal of the time domain decoupling module.
  • it can represent the signal after the cyclic prefix insertion module in the downlink. If it is the uplink, it can be peak clipping.
  • the routing module 800 can be used for the module to realize the distribution of input signals of each channel, and the distribution to the decoupling module of each channel for decoupling.
  • the routing module 800 shown in Figure 8 can distribute all channel data to the decoupling modules of each channel, but in practical applications, in order to save resources, generally only the channel signal corresponding to the element with the larger element coupling is introduced for decoupling. .
  • the larger element coupled with any element can be a specified number of elements located around the element. Therefore, when the routing module distributes the input signal to the decoupling module of a certain period of time, it only needs to be responsible for distributing the input signals of the surrounding subchannels of that period to the decoupling module of that period.
  • the edge array is relatively small compared to the surrounding adjacent arrays in the array, so the routing module distributes different numbers of input signals to the decoupling modules of different channels.
  • each decoupling module is a decoupling module for each channel, and each channel inputs data according to the channel assigned by the routing module, loads the decoupling coefficient transmitted by the time domain decoupling coefficient storage module 025, and synthesizes the output The signal after the decoupling of the channel.
  • the signal transmitted by the mobile communication is a broadband signal, so the decoupling coefficient loading of the signal is implemented in the manner of convolution filtering.
  • the time domain decoupling coefficient storage module 025 can be used to store the time domain decoupling filter coefficient DF.
  • the coefficient is expressed in the form of a matrix of M*M dimensions (M is the number of elements of the base station antenna), but the matrix element df_( i, j) is not a simple constant, but a set of filter coefficients described by the following expression (7).
  • K in expression (7) represents the order of the filter.
  • the value of K can be determined according to bandwidth requirements or empirical values in actual application scenarios. As an example, according to the verification result, K takes 3 to meet the conventional bandwidth requirement.
  • the time domain decoupling coefficient storage module 025 in FIG. 8 can distribute all the corresponding decoupling filter coefficients for the decoupling modules (such as 801-80M) of each channel, but usually for the purpose of saving resources, the channel decoupling module (801-80M) In ), the nearest neighboring element will be decoupled, so when the time-domain decoupling coefficient storage module 025 transmits the filter coefficient, it only needs to transmit the filter coefficient corresponding to the nearest neighbor of the element.
  • the element is closest to the surrounding element, which means a predetermined number of antenna elements located around the element in the antenna array.
  • step S130 may specifically include the following steps.
  • S41 Determine the filter coefficient of the decoupling filter corresponding to each channel, where the filter coefficient is the time domain corresponding coefficient of the decoupling coefficient of the channel participating in the decoupling corresponding to each channel at different frequency points.
  • S42 Perform convolution filtering processing on the time domain signal of the channel participating in the decoupling corresponding to each channel according to the filter coefficient of the decoupling filter corresponding to the determined channel participating in the decoupling to obtain the participating channel corresponding to each channel.
  • step S42 may specifically include the following steps.
  • the channel participating in the decoupling in this step is the data channel participating in the decoupling of the i-th channel.
  • S4202 At intervals of a predetermined time delay, perform filter weighting processing again on the time domain signal of the i-th channel processed by convolution filtering until the number of filter weighting processing is equal to the predetermined number of times, and obtain the i-th signal processed by the predetermined number of filter weighting processing.
  • S4203 Synthesize the time-domain signal of the i-th channel that has undergone a predetermined number of filtering and weighting processes to obtain a convolution filtering-processed time-domain signal of the channel participating in the decoupling corresponding to the i-th channel.
  • the i-th channel is each of the multiple channels, i is an integer greater than or equal to 1, and i is less than or equal to the total number of multiple channels, and the predetermined number of times is based on the corresponding decoupling The number of times the filter order or the number of taps of the filter is determined.
  • the decoupling filter corresponding to the data channel participating in the decoupling of each channel may be a finite impulse response (Finite Impulse Response, FIR) filter, or FIR filter.
  • FIR Finite Impulse Response
  • the filter has a linear delay. If the order of a given FIR filter is T order, the FIR filter has T+1 taps, where T is an integer greater than or equal to 1.
  • the predetermined time delay of each interval may be a time delay value calculated according to the number of taps of the corresponding filter or the order of the corresponding filter, or may be a self-defined time delay value.
  • the order or the number of taps of the filter corresponding to each data channel participating in the decoupling can be the same or different, and the user can pre-set according to the filtering requirements in the actual application scenario.
  • the time-domain signal that can be decoupled for each channel needs to be decoupled for the first time, and the time-domain signal that is decoupled for the first time, and the time-domain signal that is decoupled every predetermined time delay.
  • the time-domain signal decoupled from the time-domain signal with a predetermined time delay is synthesized again, and the finally synthesized time-domain signal of each channel is used as the decoupled time-domain signal of each channel.
  • decoupling the channel data in the time domain can be achieved by the following expression (8).
  • y j (n) is the output data of the j-th decoupling channel
  • x 1 (n), x 2 (n),..., x m (n) are related to channel j M channel data (including j channel itself)
  • M is the number of elements of the antenna array
  • symbol * represents the signal convolution operation.
  • the antenna element generally only has a greater coupling with the nearest neighboring element.
  • the routing module 800 When decoupling, the routing module 800 generally only allocates the channels corresponding to the surrounding element.
  • the nearest neighboring element is a predetermined number of antenna elements located around the antenna element.
  • FIG. 10 shows a schematic structural diagram of a decoupling module corresponding to channel 10 in the frequency domain decoupling solution.
  • the channel 10 needs to introduce the channel data corresponding to the 9 periods when decoupling.
  • the channel data corresponding to the 9 arrays are respectively convolved with the corresponding decoupling filter coefficients, and then combined for output.
  • the time-domain signal module 81001 allocated by the route represents the input signals of each channel participating in decoupling allocated by the routing module 800 to the decoupling module 810 corresponding to channel 10 (CH-10);
  • the input signals of each channel are x 1 (n), x 2 (n), x 3 (n), x 9 (n), x 10 (n), x 11 (n), x 17 (n), x 18 (n), x 19 (n).
  • the filter module 81002 is used to perform convolution filtering on the input signals of each channel participating in decoupling with the corresponding decoupling coefficient filter, that is, convolution operation.
  • the adder module 81003 is used to combine the signals after convolution filtering of the input signals of the channels participating in the decoupling.
  • the decoupled time domain signal module 81004 is used to output the decoupled time domain signal of channel 10.
  • the implementation process of the filter module 81002 and the adder module 81003 can be expressed as the following expression (9).
  • y 10 (n) x 1 (n)*df 10,1 (n)+x 2 (n)*df 10,2 (n)+x 3 (n)*df 10,3 (n)
  • df 10,i represents the decoupling filter coefficient corresponding to the i-th channel when channel 10 is decoupled in the time domain
  • x i (n) represents the input signal of the i-th channel
  • y 10 (n) represents the output signal of the channel 10 decoupling module under the time domain decoupling scheme.
  • each channel sequentially performs the decoupling process of the above-mentioned channel 10, and outputs the output signal after the decoupling of each channel, so as to realize the decoupling operation of the antenna array.
  • the antenna decoupling can be achieved in the time domain upstream/downstream link or the frequency domain upstream/downstream link without changing the antenna hardware, and the decoupling is achieved.
  • the function is relatively independent and does not require the cooperation of other system modules. It provides the feasibility of implementing digital domain decoupling in the base station system, effectively solving the high sidelobe level caused by the base station antenna coupling, the decrease of the array beam scanning ability, the reduction of effective radiation, and the antenna There is a serious problem of crosstalk between units, thereby improving the system performance of the communication system.
  • FIG. 11 shows a schematic structural diagram of an antenna array decoupling device according to an embodiment of the present invention.
  • the antenna array decoupling device may include the following modules.
  • the signal receiving module 1110 is configured to receive predetermined digital domain signals of multiple channels, where each channel of the multiple channels is a data channel corresponding to an element in the antenna array;
  • the coefficient loading module 1120 is used to determine the decoupling coefficient of the channel participating in the decoupling corresponding to each channel, where the decoupling coefficient is a coefficient obtained in advance according to the measured pattern information of each element in the antenna array .
  • the signal decoupling module 1130 is configured to process the predetermined digital domain signal of the channel participating in the decoupling corresponding to each channel according to the decoupling coefficient to obtain the predetermined digital domain signal decoupled from each channel.
  • the antenna array decoupling device may further include the following modules.
  • the coupled array measurement module is used to measure the pattern information of the array elements in the antenna array at multiple sampling points in the space at a predetermined frequency. Among them, the pattern information of any element in the antenna array is only for any Pattern information measured when an array element is excited.
  • the ideal array measurement module is used to calculate the pattern information of the elements in the ideal antenna array in the array of multiple sampling points at a predetermined frequency, where the ideal antenna array is the non-coupling situation simulated by the array layout of the antenna array Antenna array under.
  • the decoupling coefficient calculation module is used to use the in-array pattern information of each element in the ideal antenna array to correct the measured in-array pattern information of each element in the antenna array to obtain that each element in the antenna array is in the predetermined Decoupling coefficient at frequency.
  • the decoupling coefficient calculation module may specifically include the following units.
  • the first matrix generating unit is configured to generate the first array pattern matrix according to the pattern information of the pattern elements of the antenna array measured at a predetermined frequency.
  • the second matrix generating unit is used to generate the second array directional pattern matrix according to the directional pattern information of the elements in the ideal antenna array at a predetermined frequency.
  • the generalized inverse matrix of the pattern matrix in the first array is multiplied by the pattern matrix in the second array to obtain the decoupling matrix of the antenna array at a predetermined frequency.
  • the matrix solving unit is used to extract the M decoupling coefficients of each element in the antenna array from the decoupling matrix, where the M decoupling coefficients correspond to the M elements in the antenna array, and M is greater than or equal to 2 Integer.
  • the predetermined frequency point is a frequency point determined according to the signal bandwidth received by the antenna array and the predetermined frequency interval.
  • the coefficient loading module 1120 can be specifically used to: determine the frequency point of a predetermined digital domain signal; respectively load the decoupling coefficient of the channel participating in the decoupling at the frequency point of the predetermined digital domain signal of each channel .
  • the channels participating in the decoupling are a specified number of channels located around the targeted channel and determined in advance according to the array layout of the antenna array.
  • the antenna array decoupling device may include: a decoupling-participating channel determination module, configured to determine a specified number of channels around each channel as the decoupling-participating channels according to the array layout of the antenna array in advance.
  • the frequency domain signal when the predetermined digital domain signal is a frequency domain signal, includes a downlink frequency domain signal mapped via an antenna port, or an uplink frequency domain signal before demapping via an antenna port.
  • the signal decoupling module 1130 may specifically include the following units.
  • the signal weighting processing unit is used to perform weighting processing on the frequency domain signals of the channels participating in the decoupling corresponding to each channel by using the decoupling coefficients corresponding to the determined decoupling channels to obtain the participating channels corresponding to each channel.
  • the frequency domain signal after the decoupled channel is weighted.
  • the frequency domain signal synthesis unit is used to combine the weighted frequency domain signals of the channels participating in the decoupling corresponding to each channel to obtain the decoupled frequency domain signal of each of the multiple channels.
  • the time domain signal when the predetermined digital domain signal is a time domain signal, the time domain signal includes a downlink time domain signal with a cyclic prefix added, or an uplink time domain signal before the cyclic prefix is removed.
  • the predetermined digital domain signal is a time domain signal
  • the signal decoupling module 1130 may specifically include the following units.
  • the filter coefficient determining unit is used to determine the filter coefficients of the decoupling filters respectively used for each channel, where the filter coefficients are the decoupling coefficients of the channels participating in the decoupling corresponding to each channel at different frequency points in the time domain The corresponding coefficient.
  • the convolution filtering unit is used to perform convolution filtering processing on the time domain signal of the channel participating in decoupling corresponding to each channel, respectively using the filter coefficients of the decoupling filter corresponding to the determined decoupling channel to obtain each channel.
  • the time-domain signal processed by convolution filtering of the channels participating in the decoupling corresponding to each channel.
  • the time-domain signal combining unit is used for combining the time-domain signals processed by the convolution filtering of the channels participating in the decoupling corresponding to each channel to obtain the decoupled time-domain signal of each of the multiple channels.
  • the convolution filtering unit may specifically include the following sub-units. .
  • the filter weighting subunit is used to perform a filter weighting process on the time domain signal of the i-th channel using the filter coefficients of the decoupling filter corresponding to the channel participating in the decoupling to obtain the volume
  • the time domain signal of the i-th channel processed by product filtering.
  • the filter weighting subunit is also used to perform the filter weighting process again on the time domain signal of the i-th channel processed by the convolution filtering process at every predetermined time delay until the number of filter weighting processes equals the predetermined number of times to obtain the predetermined time delay.
  • the post-filtering synthesis subunit is used to synthesize the time domain signal of the i-th channel subjected to a predetermined number of filtering and weighting processes to obtain the convolution-filtered time domain of the channel participating in the decoupling corresponding to the i-th channel signal.
  • the i-th channel is each of the multiple channels, i is an integer greater than or equal to 1, and i is less than or equal to the total number of multiple channels, and the predetermined number of times is based on the corresponding decoupling filter The number of times determined by the filter order or the number of taps of the filter.
  • the method for solving the decoupling matrix is suitable for various antenna models, and the antenna decoupling can be realized without changing the antenna hardware.
  • This method can effectively reduce the need for small-scale array design.
  • the design pressure of hardware decoupling has the advantages of small pattern distortion and high adaptability to the antenna model. Therefore, the antenna array can be decoupled without increasing the difficulty of antenna design, thereby reducing the influence of array coupling and improving system performance.
  • FIG. 12 is a structural diagram showing an exemplary hardware architecture of a computing device capable of implementing the antenna array decoupling method and device according to the embodiments of the present invention.
  • the computing device 1200 includes an input device 1201, an input interface 1202, a central processing unit 1203, a memory 1204, an output interface 1205, and an output device 1206.
  • the input interface 1202, the central processing unit 1203, the memory 1204, and the output interface 1205 are connected to each other through the bus 1210.
  • the input device 1201 and the output device 1206 are respectively connected to the bus 1210 through the input interface 1202 and the output interface 1205, and then to the computing device 1200.
  • the other components are connected.
  • the input device 1201 receives input information from the outside, and transmits the input information to the central processing unit 1203 through the input interface 1202; the central processing unit 1203 processes the input information based on computer executable instructions stored in the memory 1204 to generate output Information, the output information is temporarily or permanently stored in the memory 1204, and then the output information is transmitted to the output device 1206 through the output interface 1205; the output device 1206 outputs the output information to the outside of the computing device 1200 for the user to use.
  • the computing device 1200 shown in FIG. 12 may be implemented as an antenna array decoupling system.
  • the antenna array decoupling system may include: a memory configured to store a program; a processor configured to run A program stored in the memory to execute the antenna array decoupling method described in the above embodiment.
  • An embodiment of the present invention also provides a communication system, including: an antenna array decoupling coefficient memory, which is used to store the decoupling coefficient of the data channel corresponding to each element in the antenna array.
  • the decoupling coefficient is based on the measured antenna array in advance. The coefficient obtained by solving the pattern information in the array of the array element; the antenna array decoupling system is used to receive the predetermined digital domain signal of multiple channels, where each channel of the multiple channels is relative to one element in the antenna array.
  • the decoupling coefficient of each channel participating in the decoupling is determined, and the predetermined digital domain signal of each channel corresponding to the decoupling channel is processed according to the decoupling coefficient, and the decoupling of each channel is obtained. Predetermined digital domain signal.
  • the antenna array decoupling system and the antenna array decoupling device have the same modules, and can implement the antenna array decoupling method described in conjunction with the foregoing embodiments.
  • the specific working processes of the systems, modules, and units described above can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.
  • an embodiment of the present invention includes a computer program product, which includes a computer program tangibly embodied on a machine-readable medium, and the computer program includes program code for executing the method shown in the flowchart.
  • the computer program may be downloaded and installed from the network, and/or installed from a removable storage medium.
  • the decoupling coefficient of the antenna array can be calculated in advance by testing the in-array pattern of each element in the base station antenna array, and the decoupling coefficients of the antenna array can be obtained from the antenna array.
  • the decoupling operation is realized for the digital domain signals of each channel by loading the decoupling parameter.
  • the decoupling matrix of the antenna array is obtained through the pattern test.
  • the pattern distortion is small and the antenna model is highly adaptable. There is no need to set up additional hardware, which reduces the difficulty and pressure of antenna design, so it can be designed without increasing the antenna design. Under difficult circumstances, decouple the antenna array to reduce the influence of array coupling and improve system performance.
  • Such software may be distributed on a computer-readable medium, and the computer-readable medium may include a computer storage medium (or a non-transitory medium) and a communication medium (or a transitory medium).
  • the term computer storage medium includes volatile and non-volatile data implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Sexual, removable and non-removable media.
  • Computer storage media include but are not limited to RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or Any other medium used to store desired information and that can be accessed by a computer.
  • communication media usually contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as carrier waves or other transmission mechanisms, and may include any information delivery media. .

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Abstract

一种天线阵列解耦方法、装置、系统和存储介质。该方法包括：接收多个通道的预定数字域信号，其中，多个通道中的每个通道是与天线阵列中的一个阵元相对应的数据通道(S110)；确定每个通道所对应的参与解耦的通道的解耦系数，其中，解耦系数是预先根据测量的天线阵列中各阵元的阵中方向图信息求解得到的系数(S120)；以及根据解耦系数对每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到每个通道解耦合的预定数字域信号(S130)。

Description

天线阵列解耦方法、装置、系统和存储介质
相关申请的交叉引用
本申请基于申请号为201911409249.7、申请日为2019年12月31日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本发明实施例涉及通信技术领域，具体地涉及一种天线阵列解耦方法、装置、系统和存储介质。
背景技术
随着第五代移动通讯系统(The 5th Generation Wireless Systems，5G)技术快速成熟与应用，需要相比现在更快的数据传输速率、更低的传输延时以及更高的可靠性。在此背景下，5G大规模多输入输出技术(Multiple Input Multiple Output，MIMO)可以采用多天线在不增加通信带宽的基础上提高数据吞吐率以及通信的稳定性。
由于实际空间受限，天线阵的体积不能很大。天线阵物理尺寸受限的情况下，多个天线单元之间的互相耦合、干扰，必然会造成天线性能的下降。目前，多采用硬件解耦的方法，比如在天线周边设置缺陷地解耦、设置隔板、解耦网络等结构，但是硬件解耦方案存在一定的解耦极限，并且普遍在紧耦合情况解耦效率不高，并且需要设置额外的硬件，增加了天线设计难度与压力。
发明内容
第一方面，本发明实施例提供一种天线阵列解耦方法，包括：接收多个通道的预定数字域信号，其中，多个通道中的每个通道是与天线阵列中的一个阵元相对应的数据通道；确定每个通道所对应的参与解耦的通道的解耦系数，其中，解耦系数是预先根据测量的天线阵列中各阵元的阵中方向图信息求解得到的系数；以及根据解耦系数对每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到每个通道解耦合的预定数字域信号。
第二方面，本发明实施例提供一种天线阵列解耦装置，包括：信号接收模块，被配置为接收多个通道的预定数字域信号，其中，多个通道中的每个通道是与天线阵列中的一个阵元相对应的数据通道；系数加载模块，被配置为确定每个通道所对应的参与解耦的通道的解耦系数，其中，解耦系数是预先根据测量的天线阵列中各阵元的阵中方向图信息求解得到的系数；以及信号解耦模块，被配置为根据解耦系数对每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到每个通道解耦合的预定数字域信号。
第三方面，本发明实施例提供一种通信系统，包括：天线阵列解耦系数存储器，被配置为存储天线阵列中各阵元对应的数据通道的解耦系数，解耦系数是预先根据测量的天线阵列中各阵元的阵中方向图信息求解得到的系数；以及天线阵列解耦系统，被配置为接收多个通道的预定数字域信号，其中，多个通道中的每个通道与天线阵列中的一个阵元相对应，确定每个通道所对应的参与解耦的通道的解耦系数，根据解耦系数对每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到每个通道解耦合的预定数字域信号。
第四方面，本发明实施例提供一种天线阵列解耦系统，包括：存储器和处理器；该存储器被配置为存储程序；该处理器被配置为读取存储器中存储的可执行程序代码以执行上述的天线阵列解耦方法。
第五方面，本发明实施例提供一种计算机可读存储介质，该计算机可读存储介质中存储有指令，其中所述指令被配置为在计算机上运行时，使得计算机执行上述各方面的天线阵列解耦方法。
附图说明
附图是用来提供对本发明的进一步理解，并且构成说明书的一部分，与下面的具体实施方式一起用于解释本发明，但并不构成对本发明的限制。
图1示出本发明一实施例的天线阵列解耦方法的流程示意图。
图2示出本发明一实施例的构建解耦矩阵的流程示意图。
图3示出本发明示例性实施例的天线阵列的数字域解耦方案的架构示意图。
图4示出一实施例的下行频域解耦方案的具体实现位置框图示意图。
图5示出一实施例的频域解耦方案解耦模块的结构示意图。
图6示出基站天线为64元矩形面阵示意图。
图7示出频域解耦方案中通道10对应的解耦模块510的结构示意图。
图8示出一实施例的下行时域解耦方案的具体实现位置框图示意图。
图9示出一实施例的时域解耦方案解耦模块的结构示意图。
图10示出频域解耦方案中通道10对应的解耦模块的结构示意图。
图11示出本发明一实施例的天线阵列解耦装置的结构示意图。
图12示出可以实现根据本发明实施例的方法和装置的计算设备的示例性硬件架构的结构图。
具体实施方式
以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是，此处所描述的具体实施方式仅用于说明和解释本发明，并不用于限制本发明。对于本领域技术人员来说，本发明可以在不需要这些具体细节中的一些细节的情况下实施。下面对实施例的描述仅仅是为了通过示出本发明的示例来提供对本发明更好的理解。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括……”限定的要素，并不排除在包括要素的过程、方法、物品或者设备中还存在另外的相同要素。
天线是一种用于发射和接收电磁能量的设备。天线阵列是指多个天线单元规则或随机排列在一起形成的天线系统，天线单元是指天线阵列中每根独立的天线，也可以被称为是天线阵元或天线阵子。当天线阵列中的天线单元排列在同样一个平面内，该天线阵列可以称为平面阵，平面阵内的天线单元可以排列成不同的形状，例如圆形阵和矩形阵。
由于实际空间受限，天线阵列的体积不能很大，在天线阵物理尺寸受限的情况下，多个天线单元之间的互相耦合、干扰，必然会造成天线性能的下降，主要可以表现在以下几个方面：第一、由于天线副瓣较高，造成对阵列的波束扫描能力有较大的影响；第二、由于天线单元之间互相的干扰，造成信噪比变差，进而直接影响数据吞吐率；第三、由于有效辐射的能量减少，造成天线阵增益降低，能量利用效率低下。
因此，为了达到缩小天线阵体积，减小研发设计成本，又保持原有的天线阵性能的目的，现有的方案中多是采用硬件解耦的方法，比如在天线周边设置缺陷地解耦、设置隔板、解耦网络等结构，但是硬件解耦方案存在一定的解耦极限，并且普遍在紧耦合情况解耦效率不高，并且需要设置额外的硬件，增加了天线设计难度与压力。
本发明实施例提出一种天线阵列解耦方法，可以在不增加天线设计难度的情况下，在数字域进行解耦，从而有效减小天线阵列的耦合影响，提高系统性能。
图1示出本发明一实施例的天线阵列解耦方法的流程示意图。如图1所示，天线阵列解耦方法可以包括步骤S110-S130。
S110，接收多个通道的预定数字域信号，其中，多个通道中的每个通道是与天线阵列中的一个阵元相对应的数据通道。
S120，确定每个通道所对应的参与解耦的通道的解耦系数，其中，解耦系数是预先根据测量的天线阵列中各阵元的阵中方向图信息求解得到的系数。
S130，根据解耦系数对每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到每个通道解耦合的预定数字域信号。
在本发明实施例的天线阵列解耦方法中，可以预先通过测试基站天线阵列中各阵元的阵中方向图求解出天线阵列的解耦系数，对接收的多个通道的数字域信号，加载对应的解耦参数实现解耦操作。
由于本发明实施例的方法中求解天线阵列的解耦矩阵通过方向图测试得到，不需要设置额外的硬件，可以在不增加天线设计难度的情况下有效解决基站天线耦合导致的副瓣水平高、阵列波束扫描能力下降、有效辐射降低、天线单元之间串扰严重问题，从而提升5G MIMO通信系统和5G Massive MIMO通信系统的系统性能对天线阵列解耦，从而减小阵列耦合影响和提高系统性能。
下面结合具体实施例，描述解耦矩阵的构建过程。在一个实施例中，在上述步骤S110之前，还包括如下步骤。
S101，测量预定频点下天线阵列中的阵元在空间多个采样点的阵中方向图信息，其中，天线阵列中任一阵元的阵中方向图信息是在仅对任一阵元进行激励时测量的方向图信息。
在该步骤中，每个阵元的阵中方向图表示阵列中只该阵元进行激励，其它阵元不激励时测试得到的阵中方向图。由于测量的天线阵列中阵元之间互相耦合，所以该实测的天线阵列中可以称为是耦合阵列。
S102，在预定频点下，计算理想天线阵列中的阵元在多个采样点的阵中方向图信息，其中，理想天线阵列是通过天线阵列的阵列布局模拟的无耦合情况下的天线阵列。
在该步骤中，理想天线阵列可以根据天线阵列的阵列布局，在模拟或仿真环境下，构建相同阵列布局的天线阵列。理想阵列的阵中方向图包含孤立阵子单元的方向图以及该阵子所在阵列位置(相对参考阵子的阵列位置)引起的阵因子方向图。
S103，利用理想天线阵列中各阵元的阵中方向图信息，对测量的天线阵列中各阵元的阵中方向图信息进行修正，得到天线阵列中各阵元在预定频点下的解耦系数。
在本发明实施例中，利用理想天线阵列中各阵元的阵中方向图信息，修正耦合阵列中各阵元的阵中方向图信息，得到天线阵列中各阵元在预定频点下的解耦系数。该求解解耦系数的方法适用于各种天线模型。
在一个实施例中，上述步骤S103具体可以包括如下步骤。
S1031，根据预定频点下测量的天线阵列中阵元的阵中方向图信息，生成第一阵中方向图矩阵。
S1032，根据预定频点下理想天线阵列中阵元的阵中方向图信息，生成第二阵中方向图矩阵。
S1033，将第一阵中方向图矩阵的广义逆矩阵，与第二阵中方向图矩阵相乘，得到天线阵列在预定频点下的解耦矩阵。
S1034，从解耦矩阵中提取天线阵列中每个阵元的M个解耦系数，其中，M个解耦系数与天线阵列中的M个阵元相对应，M为大于等于2的整数。
在本发明实施中，由于解耦系数随频率的变化特性，一般天线阵列可以每间隔预定频率间隔配置一套解耦系数。
在上述实施例中的预定频点，是根据天线阵列接收的信号带宽和预定频率间隔确定的基站中天线阵列所工作的宽带环境下频点。
由于基站天线普遍工作在宽带的环境下，基站天线中各阵子的耦合关系会随着频点变化而变化，所以一般情况下为满足宽带解耦需求，需要为天线阵列测试不同频点下的若干套解耦矩阵。例如，系统中所需解耦系数的最少数量，可以由信号带宽和预定的频率间隔的比值计算得到。
示例性地，预设预定频率可以根据实际应用场景预先设定。示例性地，以2.6GHz的频段为例，信号带宽共160MHz，频率间隔40MHz，至少需要4套解耦系数。
下面通过图2，详细描述本发明示例性实施例的某频点下解耦矩阵的构建过程。图2示出本发明一实施例的构建解耦矩阵的流程示意图。如图2所示，构建解耦矩阵的步骤具体可以包括：
S201，测试阵列各阵子的阵中方向图。
在步骤S201，分别测试天线阵列各阵子的阵中方向图例如：F’＝[F 1’,F 2’,…F M’]，其中，F 1’,F 2’,…F M’分别表示各阵子的阵中方向图，一个阵子的阵中方向图，表示阵列中只该阵子进行激励，其它阵子不激励时测试得到的阵中方向图。该测试得到的天线阵列中各阵元的阵中方向图可以表示为如下表达式(1)所示的阵中方向图矩阵。
Figure PCTCN2020140198-appb-000001
在上述表达式(1)中，N为方向图的空间采样点数，每一列表示实际测试或实际测量的天线阵列的一个阵元在空间N个采样点中每个采样点的阵中方向图，每个采样点的阵中方向图中的
Figure PCTCN2020140198-appb-000002
和θ分别表示在该采样点信号的入射方位角和俯仰角，M为天线阵列中阵元的数目，且M是大于等于2的整数。
S202，构建理想阵列各阵子的阵中方向图。
在步骤S202，通过阵列布局，计算理想阵列中各阵子的阵中方向图。将理想阵列中各阵元的阵中方向图 组成阵中方向图矩阵Fd，如下表达式(2)式所示。
Figure PCTCN2020140198-appb-000003
在上述表达式(2)中，N为方向图的空间采样点数，每一列表示构建的理想天线阵列的一个阵元在空间N个采样点中每个采样点的阵中方向图。每个采样点的阵中方向图中的
Figure PCTCN2020140198-appb-000004
和θ分别表示在该采样点信号的入射方位角和俯仰角，M为天线阵列中阵元的数目，且M是大于等于2的整数。
S203，利用测试得到的阵列各阵子的阵中方向图与理想阵列各阵子的阵中方向图，计算解耦矩阵。
在步骤S203，根据耦合阵列的阵中方向图矩阵F’、理想阵列的阵中方向图矩阵F d与解耦矩阵D的关系，建立下述表达式(3)。
Figure PCTCN2020140198-appb-000005
通过上述表达式(3)求解得到解耦矩阵如下述表达式(4)所示。
Figure PCTCN2020140198-appb-000006
在上述表达式(4)中，pinv(F’)表示对矩阵F’求取广义逆，解耦矩阵D中各元素即为解耦系数。
S204，保存解耦矩阵。
在步骤S204，可以将求解到的解耦矩阵D中各元素保存到指定的存储区域，方便后续对天线阵列中多个阵元进行解耦处理。
在本发明实施例中，通过联合阵中方向图矩阵以及理想阵列求解阵列的解耦矩阵，可以在不改变天线硬件的基础上实现天线解耦，该方法可以有效减轻在小型阵列设计中硬件解耦的设计压力。
在本发明实施例中，步骤S110中，接收多个通道的预定数字域信号可以是上行或下行的频域信号，也可以是上行或下行的时域信号。图3示出本发明示例性实施例的天线阵列的数字域解耦方案的架构示意图。图3中描述了天线阵列在数字域解耦可选择的两种实现位置，即解耦模块在基站系统中的位置。
如图3中“数字域解耦可选实现方式位置1”所示，解耦系数可以在基站系统的频域模块中使用，称为频域解耦方案。
具体地，如图3中下行频域解耦装置005和上行频域解耦模块020所示，下行频域解耦装置005可以位于天线端口映射模块004和快速傅里叶逆变换(Inverse Fast Fourier Transform，IFFT)模块006之间，上行频域解耦模块020可以位于快速傅里叶变换(Fast Fourier Transform，FFT)模块019和天线端口解映射模块021之间。
在一个实施例中，天线端口映射模块004可以用于将接收的多个通道的下行频域信号映射到多个天线端口；下行频域解耦装置005对从天线端口映射模块004接收的多个通道的频域信号进行解耦；IFFT006，可以用于将解耦后的多个通道的频域信号转化为时域信号。
在一个实施例中，FFT模块019，可以用于将接收的上行的多个通道的时域信号转化为频域信号；上行频域解耦模块020，将从FFT模块019接收的多个通道的频域信号进行解耦；天线端口解映射模块021，用于将FFT模块019解耦后的多个通道的频域信号解除物理端口的映射。
也就是说，在该实施例中，预定数字域信号为频域信号时，频域信号包括经天线端口映射的下行频域信号，或经天线端口解映射之前的上行频域信号。
如图3中“数字域解耦可选实现方式位置2”所示，解耦系数可以在基站系统的时域模块中使用，称为时域解耦方案。
具体地，如图3中下行时域解耦模块008和上行时域解耦模块017所示，下行时域解耦模块008可以位于循环前缀(Cyclic prefix，CP)插入模块007与深度功率下降(Deep Power Down，DPD)模块009之间，上行时域解耦模块017可以位于自动增益控制(Automatic Gain Control，AGC)模块016与CP去除模块018之间。
在一个实施例中，CP插入模块007，用于将接收的多个通道的时域信号增加循环前缀，实现时间的预估计和频率同步；下行时域解耦模块008用于将增加循环前缀的多个通道的时域信号进行解耦处理；DPD模块009，用于降低通道的非线性失真。
在一个实施例中，AGC模块016用于对接收的多个通道的上行时域信号的增益进行调节；上行时域解耦模块017用于将增益调节后多个通道的上行时域信号进行解耦；CP去除模块018用于对解耦后的多个通道的上行时域信号进行循环前缀的去除。
也就是说，在该实施例中，预定数字域信号为时域信号时，时域信号包括加入循环前缀的下行时域信号，或去除循环前缀前的上行时域信号。
图3中还示出基站系统中上行链路和下行链路中其他主要模块，例如下行链路的发射信号(TX信号)、信号调制模块002、层映射与预编码模块003、数字模拟转换器(Digital-to-Analog Converter，DAC)模块010、功放模块011依次处理后，经双工模块012到达天线模块013，以及上行链路中天线模块013接收的信号经双工模块012传送，并经低噪放模块014、模拟数字转换器(Analog to Digital Converter，ADC)模块015、均衡模块022以及解调模块023。
示例性地，下行的发射信号(TX信号)经底层Low媒体接入控制(Media access control，MAC)模块001进行相应处理(例如对底层硬件平台的屏蔽和物理链路操作的封装)，再经图3中下行链路中的各模块处理后，经双工(Duplexer，DPX)模块012到达天线模块013；天线模块013接收的信号经双工模块012传送，并将上行链路中的各功能模块处理，以及经Low MAC模块001处理后，得到上行的接收信号(RX信号)。
应理解，但本发明基站系统中的主要模块并不局限于以上描述的，以及在图3中示出的特定的模块，在一些实施例中，该架构可以只包含其中的部分模块，即该基站系统的架构可以包含更灵活的模块配置，下面分别针对本发明的两种解耦方案的实现装置进行介绍。
图4示出一实施例的下行频域解耦方案的具体实现位置框图示意图；图5示出一实施例的频域解耦方案解耦模块的结构示意图。图4、图5与图3中相同或等同的结构使用相同的标号。
如图4所示，本发明的频域解耦方案可以在基带频域部分实现。也就是说，下行频域解耦装置005的具体位置可以位于天线端口映射模块004与天线校准模块025之间。下行频域解耦装置005通过加载频域解耦系数存储模块024中的解耦系数，对接收的耦合的多通道数据进行解耦。
如图5所示，下行频域解耦装置005具体可以包括：路由模块500、多个通道解耦模块例如通道CH-1解耦模块501、CH-2解耦模块502、……、CH-M解耦模块50M，M为天线通道的数量。
需要说明的是，上行频域解耦装置020与下行频域解耦装置005具有相同或等同的结构，为了简化描述起见，本文下述的多个实施例以下行频域解耦装置005为例来阐述频域信号的解耦方案，上行链路频域信号的解耦方案与下行链路频域信号的解耦方案保持一致。
在图5中，输入信号005a为频域解耦模块的输入信号，在附图5中可以表示下行天线端口映射后的信号。如果是上行链路，则可以是经过天线校准模块025之后的信号或上行天线端口解映射前的信号；输出信 号005b为频域解耦模块的输出信号。
继续参考图5，路由模块500，可以用于实现对各通道输入信号进行分发，分发给各通道的解耦模块进行解耦。
图5中所示路由模块500将所有通道数据分发给各通道的解耦模块。但是一般认为天线阵子只与周围天线出现较强耦合，出于节省资源的角度考虑，与其他阵子的耦合影响很小可以忽略。
在一个实施例中，参与解耦的通道，为预先根据天线阵列的阵列布局确定的位于所针对通道周围的指定数目个通道。
在步骤S120之前，还可以包括如下步骤：预先根据天线阵列的阵列布局，确定位于每个通道周围的指定数目个通道作为参与解耦的通道。
作为示例，对于矩形排布阵列天线，阵中阵子的周围分布8个天线阵子，加上自身阵子，该阵中阵子解耦时需要引入9个通道数据进行解耦。路由模块的作用就是为各阵子对应通道分配相关的阵子通道数据用于自身通道解耦模块进行解耦。
多个解耦模块501-50M，每个解耦模块对应通道解耦模块，各通道根据路由模块分配的通道数据，并加载频域解耦系数存储模块024传送的解耦系数，合成输出该通道解耦后的信号。
频域解耦系数存储模块024，该模块可以用于存储频域解耦系数，该系数以若干频点下的解耦矩阵形式存在。根据解耦系数随频率的变化特性，可以存储多个不同频点下的解耦矩阵。
在一个实施例中，上述步骤S120中，确定每个通道所对应的参与解耦的通道的解耦系数的步骤，具体可以包括：S121，确定每个通道的预定数字域信号的频点；S122，根据频点确定每个通道所对应的参与解耦的通道的解耦系数。
在步骤S122，首先，可以获取天线阵列中各阵元在该频点下的解耦系数，其次，将各阵元在该频点下的解耦系数，作为与各阵元对应的通道在该频点下的解耦系数；然后，从每个通道所对应的参与解耦的通道，获取每个通道所对应的参与解耦的通道的解耦系数。
在本实施例中，可以根据当前接收的通道数据的频点在频域解耦系数存储模块024中选择对应的解耦矩阵。
在一个实施例中，预定数字域信号为频域信号时，上述步骤S130具体可以包括：S31，对每个通道所对应的参与解耦的通道的频域信号，分别利用所确定参与解耦的通道对应的解耦系数进行加权处理，得到每个通道所对应的参与解耦的通道经加权处理后的频域信号；S32，组合每个通道所对应的参与解耦的通道的经加权处理后的频域信号，得到每个通道的解耦合的频域信号。
示例性地，对频域的通道数据进行解耦可以通过下述表达式(5)来实现。
Figure PCTCN2020140198-appb-000007
在上述表达式(5)中，D i是指第i个资源块(Resource Block，RB)频点下的解耦矩阵。其中，RB是数 据传输资源分配最小单位，频域上连续12个子载波，时域上一个时隙，称为1个RB。
也就是说，D i是根据当前接收的通道数据的频点，在频域解耦系数存储模块024中选择对应的解耦矩阵，数据流矢量X i是指第i个RB频点下从天线端口映射模块下行输出的数据流、或天线校准模块025之后的数据流、或上行天线端口解映射前的数据流，该数据流对应附图5中解耦前频域信号500a；数据流矢量Y_i是指解耦模块输出的RB数据流，对应附图5中解耦后频域信号500b。
在本发明实施例中，表达式(5)中的解耦矩阵D i为M*M维矩阵(M为阵列的天线数目)，出于节省资源考虑，在对某个天线阵子的通道数据进行解耦时，可以将各天线阵子之间与该天线阵子耦合关系较弱的天线阵子在解耦矩阵中对应的元素置零，一般只保留位于该某个天线阵子周围的指定数目个天线阵子的解耦系数，例如在路由模块500中，非本阵子周围的通道将不会路由到本阵子对应解耦通道的输入端。
也就是说，参与某个通道解耦的数据通道，为预先根据天线阵列的阵列布局确定的位于该某个通道周围的指定数目个通道。因此，根据频点引入该通道的解耦矩阵时，只需引入预先设定的参与该通道解耦的数据通道在解耦矩阵中对应的解耦系数即可。
为了便于理解，通过图6和图7，描述对多通道中的某一个通道进行解耦的具体过程。图6示出基站天线为64元矩形面阵示意图；图7示出频域解耦方案中通道10对应的解耦模块510的结构示意图。图6、图7与图4、图5中相同或等同的结构使用相同的标号。
如图6所示，假设基站天线为64元矩形面阵。阵子10周围阵子分别阵子1、阵子2、阵子3、阵子9、阵子11、阵子17、阵子18、阵子19，加上阵子10自身在内，共9个耦合相关阵子。
因此，通道10在解耦时需要引入该9个阵子对应的通道数据。该9个阵子对应的通道数据分别与该RB频点下通道10对应的解耦系数相乘，然后合路输出。
如图7所示，路由分配的频域信号51001，是路由模块500为通道10(CH-10)对应的解耦模块510分配的参与解耦的各通道在第i频点下RB输入信号；参与通道10解耦的各通道输入信号分别为x 1,i、x 2,i、x 3,i、x 9,i、x 10,i、x 11,i、x 17,i、x 18,i、x 19,i。
乘法器模块51002，用于将参与解耦的各通道输入信号与对应的解耦系数值进行相乘。
加法器模块51003，用于将参与解耦的各通道输入信号与解耦系数加权(相乘)之后的信号合路在一起。
解耦后频域信号模块51004，用于输出通道10解耦后的频域信号。
在一个实施例中，上述乘法器模块51002和加法器模块51003的实现过程可以表示为下述表达式(6)。
Figure PCTCN2020140198-appb-000008
在上述表达式(6)中，i表示此时刻正在处理的第i个RB数据，y_(10,i)就是通道10解耦模块的输出值。
其中，x 1,i、x 2,i、x 3,i、x 9,i、x 10,i、x 11,i、x 17,i、x 18,i、x 19,i分别表示通道1、通道2、通道3、通道9、通道10、通道11、通道17、通道18、通道19的输入数据。各通道依次进行上述通道10的解耦流程，输出各通道解耦后的输出值，从而实现天线阵列的解耦操作。
图8示出一实施例的下行时域解耦方案的具体实现位置框图示意图；图9示出一实施例的时域解耦方案解耦模块的结构示意图。图8、图9与图3中相同或等同的结构使用相同的标号。
如图8所示，本发明的时域解耦方案可以在中频或基带部分实现。具体地，下行时域解耦装置008的具体位置可以位于CP插入模块007与削峰(Crest Factor Reduction，CFR)模块027之间，上行时域解耦装置017可以位于CFR模块027与CP去除模块018之间。
如图8所示，在一个实施例中，时域解耦模块装置008可以包括：路由模块800，多个通道解耦模块例如CH-1解耦模块801、CH-2解耦模块802、……、CH-M解耦模块80M，M为天线通道的数量。
需要说明的是，上行时域解耦装置017与下行时域解耦装置008具有相同或等同的结构，为了简化描述起见，本文下述的多个实施例以下行时域解耦装置008为例来阐述时域信号的解耦方案，上行链路时域信号的解耦方案与下行链路时域信号的解耦方案保持一致。
在图8中，输入信号008a为时域解耦模块的输入信号，在附图8中可以表示下行链路中经过循环前缀插入模块之后的信号，如果是上行链路，则可以是经过削峰模块后的信号或经过循环前缀去除前的信号；输出 信号008b为时域解耦模块的输出信号。
继续参考图8，路由模块800，可以用于该模块实现对各通道输入信号进行分发，分发给各通道的解耦模块进行解耦。
图8中所示路由模块800可以将所有通道数据分发给各通道的解耦模块，但是在实际应用中，为节省资源考虑，一般只引入与阵子耦合较大的阵子对应的通道信号进行解耦。与任一阵子耦合较大的阵子，可以是位于该阵子周围的指定数目个阵子。所以，此时路由模块对某一阵子通道解耦模块分配输入信号时，只需要负责将该阵子周围阵子通道的输入信号分发给该阵子的解耦模块即可。
需要进一步说明的是，边缘阵子相对于阵内阵子的周围相邻阵子相对较少，所以路由模块为不同通道的解耦模块分发的输入信号数不一样。
多个解耦模块例如801-80M，每个解耦模块为各通道解耦模块，各通道根据路由模块分配的通道输入数据，加载时域解耦系数存储模块025传送的解耦系数，合成输出该通道解耦后的信号。本发明实施例中，考虑移动通信传输的信号为宽带信号，所以，该处信号的解耦系数加载是以卷积滤波的方式实现的。
时域解耦系数存储模块025，可以用于存储时域解耦滤波系数DF，为方便表示该系数以M*M维度(M为基站天线的阵子数)矩阵形式表示，但该矩阵元素df_(i,j)并非一个单纯的常数，而是一组通过下述表达式(7)描述的滤波器系数。
Figure PCTCN2020140198-appb-000009
在上述表达式(7)中，其中
Figure PCTCN2020140198-appb-000010
为一组滤波器抽头系数，表达式(7)中的K表示该滤波器阶数。K的取值可以根据实际应用场景中的带宽需求或经验值来确定。作为示例，根据验证结果，K取3即可满足常规带宽需求。
图8中时域解耦系数存储模块025可以为各通道的解耦模块(例如801-80M)分发对应的所有解耦滤波系数，但是通常为节省资源考虑，在通道解耦模块(801-80M)中将对最邻近周围阵子进行解耦，所以时域解耦系数存储模块025传输滤波系数时也只需要传送该阵子最邻近周围阵子对应的滤波系数即可。其中，该阵子最邻近周围阵子，表示天线阵列中位于该阵子周围的预定数目个天线阵子。
在一个实施例中，预定数字域信号为时域信号时，上述步骤S130具体可以包括如下步骤。
S41，确定每个通道所对应的解耦滤波器的滤波系数，其中，滤波系数为每个通道对应的参与解耦的通道在不同频点下的解耦系数在时域对应的系数。
S42，对每个通道所对应的参与解耦的通道的时域信号，根据所确定参与解耦的通道对应的解耦滤波器的滤波系数进行卷积滤波处理，得到每个通道所对应的参与解耦的通道的经卷积滤波处理后的时域信号。
S43，对每个通道所对应的参与解耦的通道的经卷积滤波处理后的时域信号进行组合，得到每个通道的解耦合的时域信号。
在一个实施例中，步骤S42具体可以包括如下步骤。
S4201，对第i个通道的时域信号，使用第i个通道所对应的参与解耦的通道对应的解耦滤波器的滤波系数，进行一次滤波加权处理，得到经卷积滤波处理的第i个通道的时域信号。
该步骤中参与解耦的通道，即参与该第i个通道解耦的数据通道。
S4202，每间隔预定时延，对经卷积滤波处理的第i个通道的时域信号，再次进行滤波加权处理，直到滤波加权处理的次数等于预定次数，得到经预定次数滤波加权处理的第i个通道的时域信号。
S4203，将第i个通道的经预定次数滤波加权处理的时域信号进行合成，得到第i个通道所对应的参与解耦的通道的经卷积滤波处理后的时域信号。
在该实施例中，第i个通道分别为多个通道中的每个通道，i为大于等于1的整数，且i小于等于多个通道的总数目，并且，预定次数是根据对应的解耦滤波器的滤波器阶数或抽头数确定的次数。
在本发明实施例中，针对多个通道中的每个通道，参与该每个通道解耦的数据通道对应的解耦滤波器可以是有限冲击响应(Finite Impulse Response，FIR)滤波器，FIR滤波器具有线性延时，如果给定对应的FIR滤波器的阶数为T阶，则该FIR滤波器具有T+1个抽头，其中，T为大于等于1的整数。
在上述步骤S43中，每间隔的预定时延可以是根据对应的滤波器的抽头数或对应的滤波器的阶数计算得到的时延值，也可以是自定义的时延值。并且，在本发明实施例中，参与解耦的每个数据通道对应的滤波器 的阶数或抽头数可以相同，也可以不同，用户可以根据实际应用场景中的滤波要求预先进行设定。
通过上述实施例的描述可知，为减少时域信号解耦处理后的失真，可以对每个通道解耦合的时域信号，需要将首次解耦合的时域信号，和每间隔预定时延后对经预定时延的时域信号再次解耦合的时域信号进行合成，将最终合成得到的每个通道的时域信号，作为每个通道解耦合的时域信号。
示例性地，对时域的通道数据进行解耦可以通过下述表达式(8)来实现。
Figure PCTCN2020140198-appb-000011
在上述表达式(8)中，y j(n)为第j路解耦通道输出数据，x 1(n)、x 2(n)、...、x m(n)为通道j相关的M个通道数据(包括j通道本身)，M为天线阵列的阵子数，符号*表示信号卷积操作。
通过上述实施例的描述可知，考虑节省资源以及天线耦合的实际情况，天线阵子一般只与最邻近周围阵子之间的耦合较大，解耦时路由模块800一般只分配本阵子周围阵子对应的通道信号，最邻近周围阵子为位于该天线阵子周围的预定数目个天线阵子。
现以通道10(CH10)为例，说明附图8中的第10通道解耦模块的实现框架。图10示出频域解耦方案中通道10对应的解耦模块的结构示意图。
假设基站天线为64元矩形面阵，参考上述图6可知，阵子10周围阵子分别阵子1、阵子2、阵子3、阵子9、阵子11、阵子17、阵子18、阵子19，加上自身，共9个耦合相关阵子。所以，通道10在解耦时需要引入该9个阵子对应的通道数据。该9个阵子对应的通道数据分别与对应的解耦滤波器系数卷积，然后合路输出。
如图10所示，路由分配的时域信号模块81001，表示路由模块800为通道10(CH-10)对应的解耦模块810分配的参与解耦的各通道输入信号；参与通道10解耦的各通道输入信号分别为x 1(n)、x 2(n)、x 3(n)、x 9(n)、x 10(n)、x 11(n)、x 17(n)、x 18(n)、x 19(n)。
滤波器模块81002，用于将参与解耦的各通道输入信号与对应的解耦系数滤波器进行卷积滤波，即卷积操作。
加法器模块81003，用于将参与解耦的各通道输入信号卷积滤波之后的信号合路在一起。
解耦后时域信号模块81004，用于输出通道10解耦后的时域信号。
在一个实施例中，滤波器模块81002和加法器模块81003的实现过程可以表示为下述表达式(9)。
y 10(n)＝x 1(n)*df 10,1(n)+x 2(n)*df 10,2(n)+x 3(n)*df 10,3(n)
+x 9(n)*df 10,9(n)+x 10(n)*df 10,10(n)+x 11(n)*df 10,11(n)  (9)
+x 17(n)*df 10,17(n)+x 18(n)*df 10,18(n)+x 19(n)*df 10,19(n)
在上述表达式(9)中，df 10,i表示通道10进行时域解耦时第i个通道对应的解耦滤波器系数，x i(n)表示第i个通道的输入信号，y 10(n)表示时域解耦方案下通道10解耦模块的输出信号。
在本发明实施例中，各通道依次进行上述通道10的解耦流程，输出各通道解耦后的输出信号，从而实现天线阵列的解耦操作。
根据本发明实施例的天线阵列解耦方法，可以在不改变天线硬件的基础上在时域的上/下游链路或频域的上/下游链路实现天线解耦，且实现的解耦的功能相对独立，不需要其它系统模块的配合，为在基站系统中实现数字域解耦提供了可行性，有效解决基站天线耦合导致的副瓣水平高、阵列波束扫描能力下降、有效辐射降低、天线单元之间串扰严重问题，从而提升通信系统的系统性能。
下面结合附图，详细介绍根据本发明实施例的天线阵列解耦装置。图11示出本发明一实施例的天线阵列解耦装置的结构示意图。如图11所示，天线阵列解耦装置可以包括如下模块。
信号接收模块1110，用于接收多个通道的预定数字域信号，其中，多个通道中的每个通道是与天线阵列中的一个阵元相对应的数据通道；
系数加载模块1120，用于确定每个通道所对应的参与解耦的通道的解耦系数，其中，解耦系数是预先根据测量的天线阵列中各阵元的阵中方向图信息求解得到的系数。
信号解耦模块1130，用于根据解耦系数对每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到每个通道解耦合的预定数字域信号。
在一个实施例中，天线阵列解耦装置还可以包括如下模块。
耦合阵列测量模块，用于测量预定频点下天线阵列中的阵元在空间多个采样点的阵中方向图信息，其中，天线阵列中任一阵元的阵中方向图信息是在仅对任一阵元进行激励时测量的方向图信息。
理想阵列测量模块，用于在预定频点下，计算理想天线阵列中的阵元在多个采样点的阵中方向图信息，其中，理想天线阵列是通过天线阵列的阵列布局模拟的无耦合情况下的天线阵列。
解耦系数计算模块，用于利用理想天线阵列中各阵元的阵中方向图信息，对测量的天线阵列中各阵元的阵中方向图信息进行修正，得到天线阵列中各阵元在预定频点下的解耦系数。
在一个实施例中，解耦系数计算模块，具体可以包括如下单元。
第一矩阵生成单元，用于根据预定频点下测量的天线阵列中阵元的阵中方向图信息，生成第一阵中方向图矩阵。
第二矩阵生成单元，用于根据预定频点下理想天线阵列中阵元的阵中方向图信息，生成第二阵中方向图矩阵。
将第一阵中方向图矩阵的广义逆矩阵，与第二阵中方向图矩阵相乘，得到天线阵列在预定频点下的解耦矩阵。
矩阵求解单元，用于从解耦矩阵中提取天线阵列中每个阵元的M个解耦系数，其中，M个解耦系数与天线阵列中的M个阵元相对应，M为大于等于2的整数。
在一个实施例中，预定频点，是根据天线阵列接收的信号带宽和预定频率间隔确定的频点。
在一个实施例中，系数加载模块1120，具体可以用于：确定预定数字域信号的频点；分别对每个通道的预定数字域信号，加载参与解耦的通道在频点下的解耦系数。
在一个实施例中，参与解耦的通道，为预先根据天线阵列的阵列布局确定的位于所针对通道周围的指定数目个通道。
在该实施例中，天线阵列解耦装置可以包括：参与解耦通道确定模块，用于预先根据天线阵列的阵列布局，确定位于每个通道周围的指定数目个通道作为参与解耦的通道。
在一个实施例中，预定数字域信号为频域信号时，频域信号包括经天线端口映射的下行频域信号，或经天线端口解映射之前的上行频域信号。
在该实施例中，预定数字域信号为频域信号时，信号解耦模块1130具体可以包括如下单元。
信号加权处理单元，用于对每个通道所对应的参与解耦的通道的频域信号，分别利用所确定参与解耦的通道对应的解耦系数进行加权处理，得到每个通道所对应的参与解耦的通道经加权处理后的频域信号。
频域信号合成单元，用于分别组合每个通道所对应的参与解耦的通道的经加权处理后的频域信号，得到多个通道中每个通道的解耦合的频域信号。
在一个实施例中，预定数字域信号为时域信号时，时域信号包括加入循环前缀的下行时域信号，或去除循环前缀前的上行时域信号。
在该实施例中，预定数字域信号为时域信号，信号解耦模块1130具体可以包括如下单元。
滤波系数确定单元，用于确定分别用于每个通道的解耦滤波器的滤波系数，其中，滤波系数为每个通道对应的参与解耦的通道在不同频点下的解耦系数在时域对应的系数。
卷积滤波单元，用于对每个通道所对应的参与解耦的通道的时域信号，分别使用所确定参与解耦的通道对应的解耦滤波器的滤波系数进行卷积滤波处理，得到每个通道所对应的参与解耦的通道的经卷积滤波处理后的时域信号。
时域信号组合单元，用于对每个通道所对应的参与解耦的通道的经卷积滤波处理后的时域信号进行组合，得到多个通道中每个通道的解耦合的时域信号。
在一个实施例中，卷积滤波单元，具体可以包括如下子单元。。
滤波加权子单元，用于分别对第i个通道的时域信号，使用第i个通道所对应的参与解耦的通道对应的解耦滤波器的滤波系数，进行一次滤波加权处理，得到经卷积滤波处理的第i个通道的时域信号。
该滤波加权子单元，还用于每间隔预定时延，对经卷积滤波处理的第i个通道的时域信号，再次进行滤 波加权处理，直到滤波加权处理的次数等于预定次数，得到经预定次数滤波加权处理的第i个通道的时域信号。
滤波后合成子单元，用于将第i个通道的经预定次数滤波加权处理的时域信号进行合成，得到第i个通道所对应的参与解耦的通道的经卷积滤波处理后的时域信号。
该实施例中，第i个通道分别为多个通道中的每个通道，i为大于等于1的整数，且i小于等于多个通道的总数目，并且，预定次数是根据对应的解耦滤波器的滤波器阶数或抽头数确定的次数。
根据本发明实施例的天线阵列解耦装置，求解解耦矩阵的方法适用于各种天线模型，且可以在不改变天线硬件的基础上实现天线解耦，该方法可以有效减轻在小型阵列设计中硬件解耦的设计压力，具有方向图畸变小、对天线模型适应高的优点。因而，可以在不增加天线设计难度的情况下对天线阵列解耦，从而减小阵列耦合影响和提高系统性能。
需要明确的是，本发明并不局限于上文实施例中所描述并在图中示出的特定配置和处理。为了描述的方便和简洁，这里省略了对已知方法的详细描述，并且上述描述的系统、模块和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
图12是示出能够实现根据本发明实施例的天线阵列解耦方法和装置的计算设备的示例性硬件架构的结构图。
如图12所示，计算设备1200包括输入设备1201、输入接口1202、中央处理器1203、存储器1204、输出接口1205、以及输出设备1206。其中，输入接口1202、中央处理器1203、存储器1204、以及输出接口1205通过总线1210相互连接，输入设备1201和输出设备1206分别通过输入接口1202和输出接口1205与总线1210连接，进而与计算设备1200的其他组件连接。
具体地，输入设备1201接收来自外部的输入信息，并通过输入接口1202将输入信息传送到中央处理器1203；中央处理器1203基于存储器1204中存储的计算机可执行指令对输入信息进行处理以生成输出信息，将输出信息临时或者永久地存储在存储器1204中，然后通过输出接口1205将输出信息传送到输出设备1206；输出设备1206将输出信息输出到计算设备1200的外部供用户使用。
在一个实施例中，图12所示的计算设备1200可以被实现为一种天线阵列解耦系统，该天线阵列解耦系统可以包括：存储器，被配置为存储程序；处理器，被配置为运行存储器中存储的程序，以执行上述实施例描述的天线阵列解耦方法。
本发明实施例还提供一种通信系统，包括：天线阵列解耦系数存储器，用于存储天线阵列中各阵元对应的数据通道的解耦系数，解耦系数是预先根据测量的天线阵列中各阵元的阵中方向图信息求解得到的系数；天线阵列解耦系统，用于接收多个通道的预定数字域信号，其中，多个通道中的每个通道与天线阵列中的一个阵元相对应，确定每个通道所对应的参与解耦的通道的解耦系数，根据解耦系数对每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到每个通道解耦合的预定数字域信号。
在该通信系统中，天线阵列解耦系统与天线阵列解耦装置具有相同的模块，并可以实现结合上述实施例的描述的天线阵列解耦方法。为了描述的方便和简洁，这里省略了对已知方法的详细描述，并且上述描述的系统、模块和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
根据本发明的实施例，上文参考流程图描述的过程可以被实现为计算机软件程序。例如，本发明的实施例包括一种计算机程序产品，其包括有形地包含在机器可读介质上的计算机程序，所述计算机程序包含用于执行流程图所示的方法的程序代码。在这样的实施例中，该计算机程序可以从网络上被下载和安装，和/或从可拆卸存储介质被安装。
根据本发明实施例的天线阵列解耦方法、装置、系统和存储介质，可以预先通过测试基站天线阵列中各阵元的阵中方向图求解出天线阵列的解耦系数，接收到与天线阵列中各阵元对应的多个通道的数字域信号时，通过加载该解耦参数对每个通道的数字域信号实现解耦操作。该方法中求解天线阵列的解耦矩阵通过方向图测试得到，方向图畸变小且对天线模型适应高，不需要设置额外的硬件，减少了天线设计的难度与压力，因此可以在不增加天线设计难度的情况下对天线阵列解耦，从而减小阵列耦合影响和提高系统性能。
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及其适当的组合。在硬件实施方式中，在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分；例如，一个物理组件可以具有多个功能，或者一个功能或步骤可以 由若干物理组件合作执行。某些物理组件或所有物理组件可以被实施为由处理器，如中央处理器、数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (14)

  1. 一种天线阵列解耦方法，包括：
    接收多个通道的预定数字域信号，其中，所述多个通道中的每个通道是与天线阵列中的一个阵元相对应的数据通道；
    确定所述每个通道所对应的参与解耦的通道的解耦系数，其中，所述解耦系数是预先根据测量的所述天线阵列中各阵元的阵中方向图信息求解得到的系数；以及
    根据所述解耦系数对所述每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到所述每个通道解耦合的预定数字域信号。
  2. 根据权利要求1所述的方法，其中，在接收多个通道的预定数字域信号之前，还包括：
    测量预定频点下天线阵列中的阵元在空间多个采样点的阵中方向图信息，其中，所述天线阵列中任一阵元的阵中方向图信息是在仅对所述任一阵元进行激励时测量的方向图信息；
    在所述预定频点下，计算理想天线阵列中的阵元在所述多个采样点的阵中方向图信息，其中，所述理想天线阵列是通过所述天线阵列的阵列布局模拟的无耦合情况下的天线阵列；以及
    利用所述理想天线阵列中各阵元的阵中方向图信息，对测量的天线阵列中各阵元的阵中方向图信息进行修正，得到所述天线阵列中各阵元在所述预定频点下的解耦系数。
  3. 根据权利要求2所述的方法，其中，所述利用所述理想天线阵列中各阵元的阵中方向图信息，对测量的天线阵列中各阵元的阵中方向图信息进行修正，得到所述天线阵列中各阵元在所述预定频点下的解耦系数，包括：
    根据所述预定频点下测量的天线阵列中阵元的阵中方向图信息，生成第一阵中方向图矩阵；
    根据所述预定频点下理想天线阵列中阵元的阵中方向图信息，生成第二阵中方向图矩阵；
    将所述第一阵中方向图矩阵的广义逆矩阵，与所述第二阵中方向图矩阵相乘，得到所述天线阵列在所述预定频点下的解耦矩阵；以及
    从所述解耦矩阵中提取所述天线阵列中每个阵元的M个解耦系数，其中，所述M个解耦系数与所述天线阵列中的M个阵元相对应，M为大于等于2的整数。
  4. 根据权利要求1所述的方法，其中，所述确定所述每个通道所对应的参与解耦的通道的解耦系数，包括：
    确定所述每个通道的预定数字域信号的频点；以及
    根据所述频点确定所述每个通道所对应的参与解耦的通道的解耦系数。
  5. 根据权利要求1所述的方法，其中，在确定所述每个通道所对应的参与解耦的通道的解耦系数之前，还包括：
    预先根据所述天线阵列的阵列布局，确定位于所述每个通道周围的指定数目个通道作为所述参与解耦的通道。
  6. 根据权利要求1所述的方法，其中，所述预定数字域信号为频域信号；所述根据所述解耦系数对所述每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到所述每个通道解耦合的预定数字域信号，包括：
    对所述每个通道所对应的参与解耦的通道的频域信号，分别利用所确定参与解耦的通道对应的解耦系数进行加权处理，得到所述每个通道所对应的参与解耦的通道经所述加权处理后的频域信号；以及
    组合所述每个通道所对应的参与解耦的通道的经所述加权处理后的频域信号，得到所述每个通道的解耦合的频域信号。
  7. 根据权利要求1所述的方法，其中，所述预定数字域信号为时域信号；所述根据所述解耦系数对所述每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到所述每个通道解耦合的预定数字域信号，包括：
    确定所述每个通道所对应的解耦滤波器的滤波系数，其中，所述滤波系数为所述每个通道对应的参与解耦的通道在不同频点下的解耦系数在时域对应的系数；
    对所述每个通道所对应的参与解耦的通道的时域信号，根据所确定参与解耦的通道对应的解耦滤波器的滤波系数进行卷积滤波处理，得到所述每个通道所对应的参与解耦的通道的经所述卷积滤波处理后的时域信 号；以及
    对所述每个通道所对应的参与解耦的通道的经所述卷积滤波处理后的时域信号进行组合，得到所述每个通道的解耦合的时域信号。
  8. 根据权利要求7所述的方法，其中，所述对所述每个通道所对应的参与解耦的通道的时域信号，根据所确定参与解耦的通道对应的解耦滤波器的滤波系数进行卷积滤波处理，得到所述每个通道所对应的参与解耦的通道的经所述卷积滤波处理后的时域信号，包括：
    对第i个通道的时域信号，使用所述第i个通道所对应的参与解耦的通道对应的解耦滤波器的滤波系数，进行一次滤波加权处理，得到经所述卷积滤波处理的第i个通道的时域信号；
    每间隔预定时延，对经所述卷积滤波处理的第i个通道的时域信号，再次进行所述滤波加权处理，直到所述滤波加权处理的次数等于预定次数，得到经所述预定次数滤波加权处理的所述第i个通道的时域信号；以及
    将所述第i个通道的经所述预定次数滤波加权处理的时域信号进行合成，得到所述第i个通道所对应的参与解耦的通道的经所述卷积滤波处理后的时域信号；
    其中，所述第i个通道分别为所述多个通道中的每个通道，i为大于等于1的整数，且i小于等于所述多个通道的总数目，并且，所述预定次数是根据所述对应的解耦滤波器的滤波器阶数或抽头数确定的次数。
  9. 根据权利要求1所述的方法，其中：
    所述预定数字域信号为频域信号时，所述频域信号包括经天线端口映射的下行频域信号，或经天线端口解映射之前的上行频域信号；
    所述预定数字域信号为时域信号时，所述时域信号包括加入循环前缀的下行时域信号，或去除循环前缀前的上行时域信号。
  10. 一种天线阵列解耦装置，包括：
    信号接收模块，被配置为接收多个通道的预定数字域信号，其中，所述多个通道中的每个通道是与天线阵列中的一个阵元相对应的数据通道；
    系数加载模块，被配置为确定所述每个通道所对应的参与解耦的通道的解耦系数，其中，所述解耦系数是预先根据测量的所述天线阵列中各阵元的阵中方向图信息求解得到的系数；以及
    信号解耦模块，被配置为根据所述解耦系数对所述每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到所述每个通道解耦合的预定数字域信号。
  11. 一种通信系统，包括：
    天线阵列解耦系数存储器，被配置为存储天线阵列中各阵元对应的数据通道的解耦系数，所述解耦系数是预先根据测量的所述天线阵列中各阵元的阵中方向图信息求解得到的系数；以及
    天线阵列解耦系统，被配置为接收多个通道的预定数字域信号，其中，所述多个通道中的每个通道与所述天线阵列中的一个阵元相对应，确定所述每个通道所对应的参与解耦的通道的解耦系数，根据所述解耦系数对所述每个通道所对应的参与解耦的通道的预定数字域信号进行处理，得到所述每个通道解耦合的预定数字域信号。
  12. 根据权利要求11所述的通信系统，其中：
    所述预定数字域信号为频域信号时，所述频域信号包括经天线端口映射的下行频域信号，或经天线端口解映射之前的上行频域信号；
    所述预定数字域信号为时域信号时，所述时域信号包括加入循环前缀的下行时域信号，或去除循环前缀前的上行时域信号。
  13. 一种天线阵列解耦系统，包括存储器和处理器，其中：
    所述存储器被配置为储存有可执行程序代码；以及
    所述处理器被配置为读取所述存储器中存储的可执行程序代码以执行权利要求1至9中任一项所述的天线阵列解耦方法。
  14. 一种计算机可读存储介质，所述计算机可读存储介质储存有指令，其中，所述指令被配置为在计算机上运行时，使得计算机执行如权利要求1至9中任一项所述的天线阵列解耦方法。
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