WO2021131276A1 - Heat treatment apparatus and heat treatment method - Google Patents

Heat treatment apparatus and heat treatment method Download PDF

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Publication number
WO2021131276A1
WO2021131276A1 PCT/JP2020/039550 JP2020039550W WO2021131276A1 WO 2021131276 A1 WO2021131276 A1 WO 2021131276A1 JP 2020039550 W JP2020039550 W JP 2020039550W WO 2021131276 A1 WO2021131276 A1 WO 2021131276A1
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Prior art keywords
temperature
heat treatment
substrate
semiconductor wafer
infrared sensor
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PCT/JP2020/039550
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French (fr)
Japanese (ja)
Inventor
貴宏 北澤
行雄 小野
往馬 中島
Original Assignee
株式会社Ｓｃｒｅｅｎホールディングス
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Application filed by 株式会社Ｓｃｒｅｅｎホールディングス filed Critical 株式会社Ｓｃｒｅｅｎホールディングス
Priority to US17/777,586 priority Critical patent/US20230018090A1/en
Priority to CN202080089425.8A priority patent/CN114846579A/en
Priority to KR1020227021239A priority patent/KR20220106160A/en
Publication of WO2021131276A1 publication Critical patent/WO2021131276A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67115—Apparatus for thermal treatment mainly by radiation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
    • G01J5/28—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using photoemissive or photovoltaic cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67248—Temperature monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67748—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a single workpiece
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68707—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a robot blade, or gripped by a gripper for conveyance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions

Definitions

  • the techniques disclosed in the specification of the present application relate to a heat treatment apparatus and a heat treatment method.
  • the introduction of impurities is a necessary step for forming a pn junction or the like in a thin plate-shaped precision electronic substrate (hereinafter, may be simply referred to as a "substrate") such as a semiconductor wafer.
  • Impurities are generally introduced by an ion implantation method and a subsequent annealing method.
  • the ion implantation method is a technique for physically injecting impurities by ionizing impurity elements such as boron (B), arsenic (As), and phosphorus (P) and causing them to collide with a semiconductor wafer at a high acceleration voltage. ..
  • the injected impurities are activated by the annealing treatment. At this time, if the annealing time is about several seconds or more, the injected impurities are deeply diffused by heat, and as a result, the bonding depth becomes too deep than required, which may hinder the formation of a good device. There is.
  • flash lamp annealing that is, FLA
  • FLA flash lamp annealing
  • the FLA was injected with impurities by irradiating the surface of the semiconductor wafer with flash light using a xenon flash lamp (hereinafter, when simply referred to as "flash lamp", it means a xenon flash lamp).
  • flash lamp it means a xenon flash lamp.
  • This is a heat treatment technique for raising the temperature of only the surface of a semiconductor wafer in an extremely short time (for example, several milliseconds or less).
  • the radiation spectral distribution of the xenon flash lamp is from the ultraviolet region to the near infrared region, the wavelength is shorter than that of the conventional halogen lamp, and it almost coincides with the basic absorption band of the silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with the flash light from the xenon flash lamp, the temperature of the semiconductor wafer can be rapidly raised because the transmitted light is small. It has also been found that if the flash light is irradiated for an extremely short time of several milliseconds or less, the temperature can be selectively raised only in the vicinity of the surface of the semiconductor wafer. Therefore, if the temperature is raised in an extremely short time by the xenon flash lamp, the impurities can be activated without deeply diffusing the impurities.
  • Patent Document 1 a semiconductor wafer is preheated by a heating plate arranged below the processing chamber, and then flash lamp annealing is performed by irradiating the surface of the semiconductor wafer with flash light from a flash lamp arranged above the processing chamber.
  • the device is disclosed.
  • thermometer capable of high-speed response. You will need it.
  • a thermometer capable of high-speed response for example, there is a radiation thermometer using a quantum infrared sensor.
  • the radiation thermometer using the quantum infrared sensor has a problem that the output voltage may change with the passage of time, and it is difficult to measure the temperature with high accuracy.
  • the technique disclosed in the present specification has been made in view of the above-mentioned problems, and even in a radiation thermometer using a quantum infrared sensor, the temperature of the substrate irradiated with flash light. It is a technique for appropriately measuring.
  • a first aspect of the technique disclosed herein is a heat treatment apparatus that heats a first substrate and a second substrate by irradiating with flash light, the temperature of the first substrate and the second.
  • a quantum infrared sensor for measuring the temperature of the substrate is provided, and the temperature of the first substrate measured by the quantum infrared sensor and subjected to the first heat treatment irradiated with the flash light is used as a reference.
  • the temperature is defined as the temperature of the first substrate on which the first heat treatment is performed again after the first heat treatment, which is measured by the quantum infrared sensor, as the shift temperature.
  • a temperature compensating unit for compensating using the above is further provided.
  • the second aspect of the technique disclosed in the present specification relates to the first aspect, and the correction coefficient is calculated based on the ratio of the reference temperature to the shift temperature.
  • a third aspect of the technique disclosed herein relates to a first or second aspect, wherein the correction factor is an average of the temperatures of the first substrate, one of which has been measured multiple times. , Calculated based on the reference temperature and the shift temperature.
  • a fourth aspect of the technique disclosed herein relates to any one of the first to third aspects, wherein the heat treatment apparatus has a threshold value of the difference between the reference temperature and the shift temperature. It is further provided with an alarm unit for issuing an alarm when the temperature exceeds the above.
  • a fifth aspect of the technique disclosed herein relates to any one of the first to fourth aspects, wherein the quantum infrared sensor is provided with at least the flash light of the first substrate.
  • the first surface thermometer which measures the temperature on the top surface to be irradiated, further comprises a bottom surface thermometer for measuring at least the temperature on the bottom surface of the first substrate, which is measured by the bottom surface thermometer.
  • the temperature on the lower surface of the first substrate before the heat treatment is performed is set as the assist temperature, and the temperature compensator uses the correction coefficient calculated based on the reference temperature, the shift temperature, and the assist temperature. Correct the temperature of the second substrate.
  • the sixth aspect of the technique disclosed in the present specification relates to the fifth aspect, and the correction coefficient is the difference between the reference temperature and the assist temperature, and the difference between the shift temperature and the assist temperature. It is calculated based on the ratio of.
  • a seventh aspect of the technique disclosed in the present specification is a heat treatment method for heating a first substrate and a second substrate by irradiating with a flash light, and the flash light is used by using a quantum infrared sensor.
  • the step of measuring the temperature of the first substrate on which the first heat treatment is performed and using the measured temperature of the first substrate as a reference temperature, and the first heat treatment are performed. After that, the temperature of the first substrate subjected to the first heat treatment is measured again by using the quantum infrared sensor, and the temperature of the first substrate measured again is shifted to the shift temperature.
  • the temperature of the second substrate subjected to the second heat treatment to which the flash light is irradiated which is measured by the quantum infrared sensor, is calculated based on the reference temperature and the shift temperature. It is provided with a step of correcting using the correction coefficient to be performed.
  • thermometer using a quantum infrared sensor can appropriately measure the temperature of the substrate irradiated with the flash light. ..
  • FIG. 1 is a plan view schematically showing an example of the configuration of the heat treatment system 100 according to the present embodiment.
  • FIG. 2 is a front view schematically showing an example of the configuration of the heat treatment system 100 according to the present embodiment.
  • the heat treatment system 100 is a flash lamp annealing device that heats the semiconductor wafer W by irradiating the disk-shaped semiconductor wafer W as a substrate with flash light.
  • the size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, ⁇ 300 mm or ⁇ 450 mm.
  • the heat treatment system 100 includes an indexer unit 101 for carrying the untreated semiconductor wafer W into the apparatus from the outside and carrying the processed semiconductor wafer W out of the apparatus.
  • the alignment unit 230 that positions the untreated semiconductor wafer W, the two cooling units 130 and the cooling unit 140 that cool the semiconductor wafer W after heat treatment, and the heat treatment device 160 that performs flash heat treatment on the semiconductor wafer W.
  • a transfer robot 150 that delivers the semiconductor wafer W to the cooling unit 130, the cooling unit 140, and the heat treatment device 160.
  • the heat treatment system 100 includes a control unit 3 that controls the operation mechanism and the transfer robot 150 provided in each of the above processing units to advance the flash heat treatment of the semiconductor wafer W.
  • the indexer section 101 takes out a load port 110 on which a plurality of carriers C (two in the present embodiment) are placed side by side, an unprocessed semiconductor wafer W from each carrier C, and a semiconductor processed on each carrier C. It is equipped with a delivery robot 120 that stores the wafer W.
  • the carrier C accommodating the unprocessed semiconductor wafer W is transported by an automatic guided vehicle (AGV, OHT) or the like and placed on the load port 110, and the carrier C accommodating the processed semiconductor wafer W is unmanned. It is taken away from the load port 110 by an automatic guided vehicle.
  • AGV automatic guided vehicle
  • OHT automatic guided vehicle
  • the carrier C can be moved up and down as shown by the arrow CU in FIG. 2 so that the delivery robot 120 can load and unload an arbitrary semiconductor wafer W with respect to the carrier C. Has been done.
  • the carrier C in addition to the front opening unified pod (FOUP) that stores the semiconductor wafer W in a closed space, the standard mechanical interface (SMIF) pod or the stored semiconductor wafer W is exposed to the outside air. It may be an open cassette (OC).
  • FOUP front opening unified pod
  • SMIF standard mechanical interface
  • OC open cassette
  • the delivery robot 120 is capable of a slide movement as indicated by the arrow 120S in FIG. 1, a turning motion and an ascending / descending motion as indicated by the arrow 120R. As a result, the delivery robot 120 transfers the semiconductor wafer W to and from the two carriers C, and transfers the semiconductor wafer W to the alignment unit 230 and the two cooling units 130 and the cooling unit 140.
  • the semiconductor wafer W is moved in and out of the carrier C by the delivery robot 120 by sliding the hand 121 and moving the carrier C up and down. Further, the transfer of the semiconductor wafer W between the delivery robot 120 and the alignment unit 230 or the cooling unit 130 (cooling unit 140) is performed by sliding the hand 121 and raising and lowering the delivery robot 120.
  • the alignment portion 230 is provided so as to be connected to the side of the indexer portion 101 along the Y-axis direction.
  • the alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane to orient the semiconductor wafer W in an appropriate direction for flash heating.
  • the alignment portion 230 includes a mechanism for supporting and rotating the semiconductor wafer W in a horizontal posture inside the alignment chamber 231 which is a housing made of an aluminum alloy, and a notch or orientation flat formed on the peripheral edge of the semiconductor wafer W. It is configured by providing a mechanism for optically detecting the above.
  • the delivery of the semiconductor wafer W to the alignment unit 230 is performed by the delivery robot 120.
  • the semiconductor wafer W is delivered from the delivery robot 120 to the alignment chamber 231 so that the center of the wafer is located at a predetermined position.
  • the alignment unit 230 adjusts the orientation of the semiconductor wafer W by rotating the semiconductor wafer W around a vertical axis around the center of the semiconductor wafer W received from the indexer unit 101 and optically detecting a notch or the like. To do.
  • the semiconductor wafer W whose orientation has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.
  • a transfer chamber 170 for accommodating the transfer robot 150 is provided as a transfer space for the semiconductor wafer W by the transfer robot 150.
  • the chamber 6 of the heat treatment apparatus 160, the first cool chamber 131 of the cooling unit 130, and the second cool chamber 141 of the cooling unit 140 are communicated with each other on three sides of the transfer chamber 170.
  • the heat treatment apparatus 160 which is the main part of the heat treatment system 100, is a substrate processing unit that irradiates a semiconductor wafer W that has been preheated (assisted heating) with a flash (flash light) from a xenon flash lamp FL to perform a flash heat treatment. is there.
  • the configuration of the heat treatment apparatus 160 will be further described later.
  • the two cooling units 130 and the cooling unit 140 have substantially the same configuration.
  • the cooling unit 130 and the cooling unit 140 have a metal cooling plate and a quartz plate placed on the upper surface of the first cool chamber 131 or the second cool chamber 141, which are aluminum alloy housings, respectively. (Neither is shown).
  • the cooling plate is temperature-controlled to room temperature (about 23 ° C.) by a Perche element or a constant temperature water circulation.
  • the semiconductor wafer W that has been subjected to the flash heat treatment in the heat treatment apparatus 160 is carried into the first cool chamber 131 or the second cool chamber 141, placed on the quartz plate, and cooled.
  • Both the first cool chamber 131 and the second cool chamber 141 are connected to both of the indexer section 101 and the transfer chamber 170.
  • the first cool chamber 131 and the second cool chamber 141 are provided with two openings for loading and unloading the semiconductor wafer W. Of the two openings of the first cool chamber 131, the opening connected to the indexer portion 101 can be opened and closed by the gate valve 181.
  • the opening connected to the transfer chamber 170 of the first cool chamber 131 can be opened and closed by the gate valve 183. That is, the first cool chamber 131 and the indexer portion 101 are connected via the gate valve 181, and the first cool chamber 131 and the transfer chamber 170 are connected via the gate valve 183.
  • the gate valve 181 When the semiconductor wafer W is transferred between the indexer section 101 and the first cool chamber 131, the gate valve 181 is opened. Further, when the semiconductor wafer W is transferred between the first cool chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valve 181 and the gate valve 183 are closed, the inside of the first cool chamber 131 becomes a closed space.
  • the opening connected to the indexer portion 101 can be opened and closed by the gate valve 182.
  • the opening connected to the transfer chamber 170 of the second cool chamber 141 can be opened and closed by the gate valve 184. That is, the second cool chamber 141 and the indexer portion 101 are connected via the gate valve 182, and the second cool chamber 141 and the transfer chamber 170 are connected via the gate valve 184.
  • the gate valve 182 When the semiconductor wafer W is transferred between the indexer section 101 and the second cool chamber 141, the gate valve 182 is opened. Further, when the semiconductor wafer W is transferred between the second cool chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valve 182 and the gate valve 184 are closed, the inside of the second cool chamber 141 becomes a closed space.
  • the transfer robot 150 provided in the transfer chamber 170 installed adjacent to the chamber 6 is capable of turning around an axis along the vertical direction as shown by an arrow 150R.
  • the transfer robot 150 has two link mechanisms composed of a plurality of arm segments, and a transfer hand 151a and a transfer hand 151b for holding the semiconductor wafer W are provided at the tips of the two link mechanisms, respectively.
  • These transport hands 151a and transport hands 151b are vertically separated by a predetermined pitch, and are independently slidable in the same horizontal direction by a link mechanism.
  • the transfer robot 150 moves the two transfer hands 151a and the transfer hand 151b up and down while keeping them separated by a predetermined pitch by moving the base provided with the two link mechanisms up and down.
  • both transfer hands 151a and transfer hands 151b Turns so as to face the delivery partner, and then moves up and down (or while turning) to be located at a height at which one of the transfer hands delivers the semiconductor wafer W to the delivery partner. Then, the transfer hand 151a (151b) is linearly slid in the horizontal direction to transfer the semiconductor wafer W to the transfer partner.
  • the semiconductor wafer W can be delivered between the transfer robot 150 and the delivery robot 120 via the cooling unit 130 and the cooling unit 140. That is, the first cool chamber 131 of the cooling unit 130 and the second cool chamber 141 of the cooling unit 140 also function as paths for delivering the semiconductor wafer W between the transfer robot 150 and the delivery robot 120. .. Specifically, the semiconductor wafer W is delivered when one of the transfer robot 150 or the delivery robot 120 receives the semiconductor wafer W passed to the first cool chamber 131 or the second cool chamber 141 by the other.
  • the transfer robot 150 and the transfer robot 120 constitute a transfer mechanism for transporting the semiconductor wafer W from the carrier C to the heat treatment apparatus 160.
  • a gate valve 181 or a gate valve 182 is provided between the first cool chamber 131 and the second cool chamber 141 and the indexer portion 101, respectively. Further, a gate valve 183 or a gate valve 184 is provided between the transfer chamber 170 and the first cool chamber 131 and the second cool chamber 141, respectively. Further, a gate valve 185 is provided between the transfer chamber 170 and the chamber 6 of the heat treatment apparatus 160. When the semiconductor wafer W is conveyed in the heat treatment system 100, these gate valves are opened and closed as appropriate.
  • FIG. 3 is a cross-sectional view schematically showing the configuration of the heat treatment apparatus 160 in the heat treatment system 100 according to the present embodiment.
  • the heat treatment apparatus 160 is a flash lamp annealing apparatus that heats the semiconductor wafer W by irradiating the disk-shaped semiconductor wafer W as a substrate with flash light.
  • the size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, ⁇ 300 mm or ⁇ 450 mm ( ⁇ 300 mm in the present embodiment).
  • the heat treatment apparatus 160 includes a chamber 6 for accommodating the semiconductor wafer W, a flash heating unit 5 containing a plurality of flash lamps FL, and a halogen heating unit 4 containing a plurality of halogen lamps HL.
  • a flash heating unit 5 is provided on the upper side of the chamber 6, and a halogen heating unit 4 is provided on the lower side.
  • a holding portion 7 for holding the semiconductor wafer W in a horizontal posture and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding portion 7 and the outside of the apparatus are provided inside the chamber 6. Be prepared.
  • the heat treatment apparatus 160 includes a control unit 3 that controls each operation mechanism provided in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to execute the heat treatment of the semiconductor wafer W.
  • the chamber 6 is configured by mounting quartz chamber windows above and below the tubular chamber side portion 61.
  • the chamber side portion 61 has a substantially tubular shape with upper and lower openings, and the upper chamber window 63 is attached to the upper opening and closed, and the lower chamber window 64 is attached to the lower opening and closed. ing.
  • the upper chamber window 63 constituting the ceiling portion of the chamber 6 is a disk-shaped member formed of quartz, and functions as a quartz window that transmits the flash light emitted from the flash heating portion 5 into the chamber 6.
  • the lower chamber window 64 constituting the floor portion of the chamber 6 is also a disk-shaped member formed of quartz, and functions as a quartz window that transmits light from the halogen heating portion 4 into the chamber 6.
  • a reflective ring 68 is attached to the upper part of the inner wall surface of the chamber side portion 61, and a reflective ring 69 is attached to the lower part. Both the reflection ring 68 and the reflection ring 69 are formed in an annular shape.
  • the upper reflective ring 68 is attached by fitting from the upper side of the chamber side portion 61.
  • the lower reflective ring 69 is attached by fitting it from the lower side of the chamber side portion 61 and fastening it with a screw (not shown). That is, both the reflection ring 68 and the reflection ring 69 are detachably attached to the chamber side portion 61.
  • the inner space of the chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side 61, the reflection ring 68 and the reflection ring 69 is defined as the heat treatment space 65.
  • a recess 62 is formed on the inner wall surface of the chamber 6. That is, a recess 62 is formed on the inner wall surface of the chamber side portion 61, which is surrounded by the central portion where the reflection ring 68 and the reflection ring 69 are not mounted, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69. Will be done.
  • the recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W.
  • the chamber side 61, the reflective ring 68, and the reflective ring 69 are made of a metal material (for example, stainless steel) having excellent strength and heat resistance.
  • the chamber side portion 61 is provided with a transport opening (furnace port) 66 for loading and unloading the semiconductor wafer W into and out of the chamber 6.
  • the transport opening 66 can be opened and closed by a gate valve 185.
  • the transport opening 66 is communicated with the outer peripheral surface of the recess 62.
  • the gate valve 185 opens the transport opening 66, the semiconductor wafer W is carried in from the transport opening 66 through the recess 62 into the heat treatment space 65 and the semiconductor wafer W is carried out from the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transport opening 66, the heat treatment space 65 in the chamber 6 becomes a closed space.
  • the through hole 61a is a cylindrical hole for guiding the infrared light emitted from the upper surface of the semiconductor wafer W held by the susceptor 74, which will be described later, to the quantum infrared sensor 29 of the upper radiation thermometer 25.
  • the through hole 61b is a cylindrical hole for guiding the infrared light emitted from the lower surface of the semiconductor wafer W to the thermal infrared sensor 24 of the lower radiation thermometer 20.
  • the through hole 61a and the through hole 61b are provided so as to be inclined with respect to the horizontal direction so that their axes in the through direction intersect with the main surface of the semiconductor wafer W held by the susceptor 74.
  • the quantum infrared sensor 29 is an element that directly converts infrared photon energy into an electric signal by a photoelectric conversion effect.
  • the quantum infrared sensor 29 is, for example, a photoconductive InSb sensor having a sensitivity wavelength of 3 to 5 ⁇ m, but is another quantum infrared sensor (such as an impurity infrared sensor or a photovoltaic infrared sensor). May be good.
  • the thermal infrared sensor 24 is an element that converts the absorbed infrared energy into heat and detects the change in heat as a signal.
  • the thermal infrared sensor 24 is, for example, a pyroelectric sensor that utilizes a pyroelectric effect, a thermopile that utilizes the Seebeck effect, or a bolometer that utilizes a change in resistance of a semiconductor due to heat.
  • the infrared sensor used in the lower radiation thermometer 20 may be replaced with a quantum infrared sensor.
  • a transparent window 26 made of a calcium fluoride material that transmits infrared light in a wavelength region that can be measured by the upper radiation thermometer 25 is attached to the end of the through hole 61a on the side facing the heat treatment space 65.
  • a transparent window 21 made of a barium fluoride material that transmits infrared light in a wavelength region that can be measured by the lower radiation thermometer 20 is attached to the end of the through hole 61b on the side facing the heat treatment space 65. ..
  • a gas supply hole 81 for supplying the processing gas to the heat treatment space 65 is formed in the upper part of the inner wall of the chamber 6.
  • the gas supply hole 81 is formed at a position above the recess 62, and may be provided in the reflection ring 68.
  • the gas supply hole 81 is communicated with the gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the side wall of the chamber 6.
  • the gas supply pipe 83 is connected to the processing gas supply source 85. Further, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82.
  • the processing gas that has flowed into the buffer space 82 flows so as to expand in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 into the heat treatment space 65.
  • the treatment gas for example, an inert gas such as nitrogen (N 2 ), a reactive gas such as hydrogen (H 2 ) or ammonia (NH 3 ), or a mixed gas in which they are mixed can be used (this). Nitrogen gas in the embodiment).
  • a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower part of the inner wall of the chamber 6.
  • the gas exhaust hole 86 is formed at a position below the recess 62, and may be provided in the reflection ring 69.
  • the gas exhaust hole 86 is communicatively connected to the gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the chamber 6.
  • the gas exhaust pipe 88 is connected to the exhaust unit 190.
  • a valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 via the buffer space 87.
  • a plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6, or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust unit 190 may be a mechanism provided in the heat treatment apparatus 160, or may be a utility of a factory in which the heat treatment apparatus 160 is installed.
  • a gas exhaust pipe 191 for discharging the gas in the heat treatment space 65 is also connected to the tip of the transport opening 66.
  • the gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.
  • FIG. 4 is a perspective view showing the overall appearance of the holding portion 7.
  • the holding portion 7 includes a base ring 71, a connecting portion 72, and a susceptor 74.
  • the base ring 71, the connecting portion 72 and the susceptor 74 are all made of quartz. That is, the entire holding portion 7 is made of quartz.
  • the base ring 71 is an arc-shaped quartz member in which a part is missing from the ring shape. This missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described later and the base ring 71.
  • the base ring 71 By placing the base ring 71 on the bottom surface of the recess 62, the base ring 71 is supported on the wall surface of the chamber 6 (see FIG. 3).
  • a plurality of connecting portions 72 (four in the present embodiment) are erected on the upper surface of the base ring 71 along the circumferential direction of the ring shape.
  • the connecting portion 72 is also a quartz member, and is fixed to the base ring 71 by welding.
  • FIG. 5 is a plan view of the susceptor 74. Further, FIG. 6 is a cross-sectional view of the susceptor 74.
  • the susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77.
  • the holding plate 75 is a substantially circular flat plate member made of quartz.
  • the diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a plane size larger than that of the semiconductor wafer W.
  • a guide ring 76 is installed on the upper peripheral edge of the holding plate 75.
  • the guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is ⁇ 300 mm, the inner diameter of the guide ring 76 is ⁇ 320 mm.
  • the inner circumference of the guide ring 76 is a tapered surface that widens upward from the holding plate 75.
  • the guide ring 76 is made of quartz similar to the holding plate 75.
  • the guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.
  • the region inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75a for holding the semiconductor wafer W.
  • a plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In the present embodiment, a total of 12 substrate support pins 77 are erected at every 30 ° along the circumference of the outer circumference circle (inner circumference circle of the guide ring 76) of the holding surface 75a and the concentric circles.
  • the diameter of the circle in which the 12 substrate support pins 77 are arranged is smaller than the diameter of the semiconductor wafer W, and if the diameter of the semiconductor wafer W is ⁇ 300 mm, the diameter is ⁇ 270 mm to ⁇ 280 mm (this implementation). In the form of, ⁇ 270 mm).
  • Each substrate support pin 77 is made of quartz.
  • the plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.
  • the four connecting portions 72 erected on the base ring 71 and the peripheral edge portion of the holding plate 75 of the susceptor 74 are fixed by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72.
  • the base ring 71 of the holding portion 7 is supported on the wall surface of the chamber 6, so that the holding portion 7 is mounted on the chamber 6.
  • the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line coincides with the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal plane.
  • the semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal posture on the susceptor 74 of the holding portion 7 mounted on the chamber 6. At this time, the semiconductor wafer W is supported by the twelve substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. More precisely, the upper ends of the 12 substrate support pins 77 come into contact with the lower surface of the semiconductor wafer W to support the semiconductor wafer W.
  • the semiconductor wafer W is placed in a horizontal position by the 12 substrate support pins 77. Can be supported.
  • the semiconductor wafer W is supported by a plurality of substrate support pins 77 from the holding surface 75a of the holding plate 75 at a predetermined interval.
  • the thickness of the guide ring 76 is larger than the height of the substrate support pin 77. Therefore, the horizontal misalignment of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.
  • the holding plate 75 of the susceptor 74 is formed with an opening 78 that penetrates vertically.
  • the opening 78 is provided so that the lower radiation thermometer 20 receives the synchrotron radiation (infrared light) radiated from the lower surface of the semiconductor wafer W. That is, the lower radiation thermometer 20 receives the light radiated from the lower surface of the semiconductor wafer W through the transparent window 21 mounted in the opening 78 and the through hole 61b of the chamber side portion 61, and the temperature of the semiconductor wafer W. To measure.
  • the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which the lift pin 12 of the transfer mechanism 10 described later penetrates for delivery of the semiconductor wafer W.
  • FIG. 7 is a plan view of the transfer mechanism 10. Further, FIG. 8 is a side view of the transfer mechanism 10.
  • the transfer mechanism 10 includes two transfer arms 11.
  • the transfer arm 11 has an arc shape that generally follows the annular recess 62.
  • the transfer arm 11 and the lift pin 12 are made of quartz.
  • Each transfer arm 11 is rotatable by a horizontal movement mechanism 13.
  • the horizontal movement mechanism 13 has a transfer operation position (solid line position in FIG. 7) for transferring the semiconductor wafer W to the holding portion 7 and the semiconductor wafer W held by the holding portion 7. It is horizontally moved to and from the retracted position (two-point chain line position in FIG. 7) that does not overlap in a plan view.
  • the horizontal movement mechanism 13 may be one in which each transfer arm 11 is rotated by an individual motor, or a pair of transfer arms 11 are interlocked and rotated by one motor using a link mechanism. It may be something to move.
  • the pair of transfer arms 11 are moved up and down together with the horizontal movement mechanism 13 by the elevating mechanism 14.
  • the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 4 and 5) formed in the susceptor 74, and the lift pins The upper end of 12 protrudes from the upper surface of the susceptor 74.
  • the evacuation mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position, the lift pin 12 is pulled out from the through hole 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 so as to open each transfer.
  • the mounting arm 11 moves to the retracted position.
  • the retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arm 11 is inside the recess 62.
  • An exhaust mechanism (not shown) is also provided in the vicinity of the portion where the drive unit (horizontal movement mechanism 13 and elevating mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Is configured to be discharged to the outside of the chamber 6.
  • the flash heating unit 5 provided above the chamber 6 has a light source composed of a plurality of (30 in this embodiment) flash lamp FL inside the housing 51, and above the light source. It is configured to include a reflector 52 provided so as to cover the above.
  • a lamp light radiating window 53 is attached to the bottom of the housing 51 of the flash heating unit 5.
  • the lamp light emitting window 53 constituting the floor portion of the flash heating unit 5 is a plate-shaped quartz window formed of quartz. By installing the flash heating unit 5 above the chamber 6, the lamp light emitting window 53 faces the upper chamber window 63.
  • the flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the lamp light emitting window 53 and the upper chamber window 63.
  • Each of the plurality of flash lamps FL is a rod-shaped lamp having a long cylindrical shape, and the longitudinal direction thereof is along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamp FL is also a horizontal plane.
  • the flash lamp FL is provided on a rod-shaped glass tube (discharge tube) in which xenon gas is sealed inside and an anode and a cathode connected to a condenser are arranged at both ends thereof, and on the outer peripheral surface of the glass tube. It is equipped with a trigger electrode.
  • xenon gas is electrically an insulator, electricity does not flow in the glass tube under normal conditions even if electric charges are accumulated in the condenser. However, when a high voltage is applied to the trigger electrode to break the insulation, the electricity stored in the capacitor instantly flows into the glass tube, and light is emitted by the excitation of xenon atoms or molecules at that time.
  • the electrostatic energy stored in the capacitor in advance is converted into an extremely short optical pulse of 0.1 millisecond to 100 millisecond, so that a light source of continuous lighting such as a halogen lamp HL is used. It has the feature that it can irradiate extremely strong light. That is, the flash lamp FL is a pulse light emitting lamp that instantaneously emits light in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.
  • the electrostatic energy which is the emission intensity of the flash lamp FL
  • the charging voltage stored in the capacitor can be changed by setting the pulse waveform.
  • the reflector 52 is provided above the plurality of flash lamps FL so as to cover all of them.
  • the basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65.
  • the reflector 52 is made of an aluminum alloy plate, and its surface (the surface facing the flash lamp FL, that is, the upper surface) is roughened by blasting.
  • the halogen heating unit 4 provided below the chamber 6 contains a plurality of halogen lamps HL (40 in this embodiment) inside the housing 41.
  • the halogen heating unit 4 heats the semiconductor wafer W by irradiating the heat treatment space 65 with light from below the chamber 6 through the lower chamber window 64 by a plurality of halogen lamps HL.
  • FIG. 9 is a plan view showing the arrangement of a plurality of halogen lamps HL.
  • the 40 halogen lamps HL are arranged in two upper and lower stages. Twenty halogen lamps HL are arranged in the upper stage near the holding portion 7, and 20 halogen lamps HL are also arranged in the lower stage farther from the holding portion 7 than in the upper stage.
  • Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape.
  • the 20 halogen lamps HL in both the upper and lower stages are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). There is. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower stages is a horizontal plane.
  • the arrangement density of the halogen lamp HL in the region facing the peripheral edge portion is higher than the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper and lower stages. ing. That is, in both the upper and lower stages, the arrangement pitch of the halogen lamp HL is shorter in the peripheral portion than in the central portion of the lamp arrangement. Therefore, it is possible to irradiate a peripheral portion of the semiconductor wafer W, which tends to have a temperature drop during heating by light irradiation from the halogen heating unit 4, with a larger amount of light.
  • the lamp group consisting of the upper halogen lamp HL and the lamp group consisting of the lower halogen lamp HL are arranged so as to intersect in a grid pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of the 20 halogen lamps HL arranged in the upper stage and the longitudinal direction of the 20 halogen lamps HL arranged in the lower stage are orthogonal to each other. There is.
  • the halogen lamp HL is a filament type light source that incandescents the filament and emits light by energizing the filament arranged inside the glass tube. Inside the glass tube, a gas in which a small amount of a halogen element (iodine, bromine, etc.) is introduced into an inert gas such as nitrogen or argon is sealed. By introducing the halogen element, it becomes possible to set the temperature of the filament to a high temperature while suppressing the breakage of the filament.
  • a halogen element iodine, bromine, etc.
  • the halogen lamp HL has a characteristic that it has a longer life and can continuously irradiate strong light as compared with a normal incandescent lamp. That is, the halogen lamp HL is a continuously lit lamp that continuously emits light for at least 1 second or longer. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.
  • a reflector 43 is provided under the two-stage halogen lamp HL in the housing 41 of the halogen heating unit 4 (FIG. 3). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.
  • the chamber 6 is provided with two radiation thermometers (pyrometer in the present embodiment), an upper radiation thermometer 25 and a lower radiation thermometer 20.
  • the upper radiation thermometer 25 is installed diagonally above the semiconductor wafer W held by the susceptor 74
  • the lower radiation thermometer 20 is installed diagonally below the semiconductor wafer W held by the susceptor 74.
  • FIG. 10 is a diagram showing the positional relationship between the lower radiation thermometer 20 and the semiconductor wafer W held by the susceptor 74.
  • the light receiving angle ⁇ of the thermal infrared sensor 24 of the lower radiation thermometer 20 with respect to the semiconductor wafer W is 60 ° or more and 89 ° or less.
  • the light receiving angle ⁇ is an angle formed by the optical axis of the thermal infrared sensor 24 of the lower radiation thermometer 20 and the normal line (a line perpendicular to the main surface) of the semiconductor wafer W.
  • the light receiving angle ⁇ of the quantum infrared sensor 29 of the upper radiation thermometer 25 with respect to the semiconductor wafer W is also 60 ° or more and 89 ° or less.
  • the light receiving angle of the thermal infrared sensor 24 of the lower radiation thermometer 20 with respect to the semiconductor wafer W and the light receiving angle of the quantum infrared sensor 29 of the upper radiation thermometer 25 with respect to the semiconductor wafer W do not have to be equal.
  • the control unit 3 controls the above-mentioned various operating mechanisms provided in the heat treatment apparatus 160.
  • the configuration of the control unit 3 as hardware is the same as that of a general computer. That is, the control unit 3 stores a CPU, which is a circuit that performs various arithmetic processes, a ROM, which is a read-only memory for storing basic programs, a RAM, which is a read / write memory for storing various information, and control software and data. It has a magnetic disk to store.
  • the processing in the heat treatment apparatus 160 proceeds when the CPU of the control unit 3 executes a predetermined processing program.
  • FIG. 11 is a functional block diagram showing the relationship between the lower radiation thermometer 20, the upper radiation thermometer 25, and the control unit 3.
  • the lower radiation thermometer 20 provided diagonally below the semiconductor wafer W and measuring the temperature of the lower surface of the semiconductor wafer W includes a thermal infrared sensor 24 and a temperature measuring unit 22.
  • the thermal infrared sensor 24 receives infrared light radiated from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78.
  • the thermal infrared sensor 24 is electrically connected to the temperature measuring unit 22, and transmits a signal generated in response to light reception to the temperature measuring unit 22.
  • the temperature measurement unit 22 includes an amplifier circuit (not shown), an A / D converter, a temperature conversion circuit, and the like, and converts a signal indicating the intensity of infrared light output from the thermal infrared sensor 24 into temperature.
  • the temperature obtained by the temperature measuring unit 22 is the temperature of the lower surface of the semiconductor wafer W.
  • the upper radiation thermometer 25 provided diagonally above the semiconductor wafer W and measuring the temperature of the upper surface of the semiconductor wafer W includes a quantum infrared sensor 29 and a temperature measuring unit 27.
  • the quantum infrared sensor 29 receives infrared light radiated from the upper surface of the semiconductor wafer W held by the susceptor 74.
  • the quantum infrared sensor 29 is provided with an InSb (indium antimonide) optical element so as to be able to respond to a sudden temperature change on the upper surface of the semiconductor wafer W at the moment when the flash light is irradiated.
  • the quantum infrared sensor 29 is electrically connected to the temperature measuring unit 27, and transmits a signal generated in response to the light reception to the temperature measuring unit 27.
  • the temperature measuring unit 27 converts a signal indicating the intensity of infrared light output from the quantum infrared sensor 29 into temperature.
  • the temperature obtained by the temperature measuring unit 27 is the temperature of the upper surface of the semiconductor wafer W.
  • the lower radiation thermometer 20 and the upper radiation thermometer 25 are electrically connected to the control unit 3 which is the controller of the entire heat treatment apparatus 160, and the semiconductors measured by the lower radiation thermometer 20 and the upper radiation thermometer 25, respectively.
  • the temperatures of the lower surface and the upper surface of the wafer W are transmitted to the control unit 3.
  • the control unit 3 includes a coefficient calculation unit 31, a temperature correction unit 32, and an alarm unit 36.
  • the coefficient calculation unit 31 and the temperature correction unit 32 are functional processing units realized by the CPU of the control unit 3 executing a predetermined processing program. The processing contents of the coefficient calculation unit 31, the temperature correction unit 32, and the alarm unit 36 will be further described later.
  • the alarm unit 36 may not be provided. Further, the control unit 3 may not include the coefficient calculation unit 31, and the correction coefficient calculated in advance may be input to the input unit 34 or the display unit 33.
  • the display unit 33, the input unit 34, and the storage unit 35 are connected to the control unit 3.
  • the control unit 3 displays various information on the display unit 33.
  • the input unit 34 is a device for the operator of the heat treatment system 100 to input various commands or parameters to the control unit 3.
  • the operator can also set the conditions of the processing recipe that describes the processing procedure and the processing conditions of the semiconductor wafer W from the input unit 34 while checking the display contents of the display unit 33.
  • the storage unit 35 is a memory (storage medium) including, for example, a volatile or non-volatile semiconductor memory such as an HDD, RAM, ROM or flash memory, a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk or a DVD. It may be.
  • a volatile or non-volatile semiconductor memory such as an HDD, RAM, ROM or flash memory
  • a magnetic disk such as an HDD, RAM, ROM or flash memory
  • a flexible disk such as an HDD, RAM, ROM or flash memory
  • an optical disk such as an optical disk, a compact disk, a mini disk or a DVD. It may be.
  • a touch panel having both functions can be used, and in the present embodiment, a liquid crystal touch panel provided on the outer wall of the heat treatment system 100 is adopted.
  • the heat treatment system 100 prevents an excessive temperature rise of the halogen heating unit 4, the flash heating unit 5, and the chamber 6 due to the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, it has various cooling structures.
  • a water cooling pipe (not shown) is provided on the wall of the chamber 6.
  • the halogen heating unit 4 and the flash heating unit 5 have an air-cooled structure in which a gas flow is formed inside to exhaust heat.
  • air is also supplied to the gap between the upper chamber window 63 and the lamp light radiating window 53 to cool the flash heating unit 5 and the upper chamber window 63.
  • FIG. 12 is a flowchart for explaining the operation of the heat treatment system according to the present embodiment.
  • the following processing procedure of the heat treatment system 100 proceeds by the control unit 3 controlling each operation mechanism of the heat treatment system 100.
  • valve 84 for air supply is opened, and the valve 89 and the valve 192 for exhaust are opened to start air supply and exhaust to the inside of the chamber 6.
  • nitrogen gas is supplied to the heat treatment space 65 from the gas supply hole 81.
  • valve 89 is opened, the gas in the chamber 6 is exhausted from the gas exhaust hole 86.
  • the nitrogen gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65. Further, when the valve 192 is opened, the gas in the chamber 6 is also exhausted from the transport opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by the exhaust mechanism (not shown).
  • nitrogen gas is continuously supplied to the heat treatment space 65, and the supply amount thereof is appropriately changed according to the processing process.
  • the gate valve 185 is opened to open the transfer opening 66, and the test substrate is carried into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by the transfer robot outside the apparatus (step ST01).
  • the test substrate is a substrate on which a test heat treatment is performed prior to flash lamp annealing on the semiconductor wafer W to be processed, and is, for example, non-deposited. Further, it is desirable that the test substrate is a substrate having the same diameter and thickness as the semiconductor wafer W.
  • test heat treatment is a heat treatment performed on the test substrate prior to the flash lamp annealing performed on the semiconductor wafer W to be processed, and is, for example, a heat treatment including irradiation of flash light. ..
  • the test substrate may be a semiconductor wafer W that is actually heat-treated. It is only necessary to know the amount of change in the output voltage of the quantum infrared sensor.
  • the test board carried in by the transfer robot advances to the position directly above the holding unit 7 and stops. Then, the pair of transfer arms 11 of the transfer mechanism 10 move horizontally from the retracted position to the transfer operation position and rise, so that the lift pin 12 protrudes from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. And receive the test board. At this time, the lift pin 12 rises above the upper end of the substrate support pin 77.
  • the transfer robot exits the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, when the pair of transfer arms 11 are lowered, the test substrate is handed over from the transfer mechanism 10 to the susceptor 74 of the holding portion 7 and held in a horizontal posture from below.
  • the test board is supported by a plurality of board support pins 77 erected on the holding plate 75 and held by the susceptor 74. Further, the test substrate is held by the holding portion 7 with the surface to be processed as the upper surface.
  • a predetermined distance is formed between the lower surface of the test substrate (main surface opposite to the surface) supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75.
  • the pair of transfer arms 11 lowered to the lower side of the susceptor 74 are retracted to the retracted position, that is, inside the recess 62 by the horizontal moving mechanism 13.
  • test substrate is subjected to a test heat treatment including irradiation with flash light (step ST02).
  • a part of the flash light radiated from the flash lamp FL goes directly into the chamber 6, and the other part is once reflected by the reflector 52 and then goes into the chamber 6, and these flash lights
  • the test substrate is flash-heated by irradiation.
  • the surface temperature of the test substrate can be raised in a short time. That is, the flash light emitted from the flash lamp FL has an extremely short irradiation time of 0.1 millisecond or more and 100 millisecond or less, in which the electrostatic energy stored in the capacitor in advance is converted into an extremely short optical pulse. It is a strong flash. Then, the surface temperature of the test substrate rises sharply in an extremely short time due to the flash light irradiation from the flash lamp FL.
  • step ST03 the temperature of the upper surface of the test substrate during the test heat treatment is measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 (step ST03).
  • the temperature of the upper surface of the test substrate measured in step ST03 is stored in the storage unit 35 as a reference temperature.
  • Step ST04 After the temperature of the test board is lowered to a predetermined level or less, the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retracted position to the transfer operation position again and rise, so that the lift pin 12 is lifted by the susceptor 74.
  • the test substrate after heat treatment is received from the susceptor 74 by protruding from the upper surface of the surface.
  • the transfer opening 66 closed by the gate valve 185 is opened, the test substrate mounted on the lift pin 12 is carried out from the chamber 6 by the transfer robot outside the apparatus, and the test heat treatment of the test substrate is completed. (Step ST04).
  • the timing of performing the test heat treatment for example, the timing of the initial calibration of the heat treatment system 100 (including the initial calibration of the quantum infrared sensor 29) is assumed.
  • the test substrate is subjected to the test heat treatment again by the same method (same set value) as in steps ST01 to ST04 (step ST05). Then, the temperature of the upper surface of the test substrate during the test heat treatment is measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 (step ST06). The temperature of the upper surface of the test substrate measured in step ST06 is stored in the storage unit 35 as the shift temperature.
  • the timing of performing the test heat treatment again for example, the timing of maintenance of the heat treatment system 100 is assumed. Further, when the heat treatment for each semiconductor wafer W is continuously performed, the timing at which an abnormal state is detected during that time is also assumed. For example, when the output voltage of the quantum infrared sensor 29 obtained by irradiation with flash light differs by a predetermined value or more before and after the semiconductor wafer W to be heat-treated in sequence, the output voltage of the quantum infrared sensor 29 changes significantly. A test heat treatment may be performed as a result.
  • the coefficient calculation unit 31 of the control unit 3 calculates the correction coefficient based on the reference temperature and the shift temperature. Specifically, as shown in the following equation (1), the correction coefficient CF is calculated based on the reference temperature Tref and the shift temperature T shift (step ST07).
  • the alarm unit 36 displays a sound or an image to the operator. It may be used to issue an alarm.
  • the value of the correction coefficient becomes a value that deviates from 1 as the change (sensitivity shift) of the output voltage of the quantum infrared sensor 29 increases, and if the sensitivity shift is excessively large, the quantum infrared sensor 29 malfunctions, and further, This is because other defects in the configuration of the chamber 6 (dirt of the transparent window 26, etc.) are also assumed.
  • the semiconductor wafer W to be processed is carried into the heat treatment space 65 in the chamber 6 (step ST08). Then, the semiconductor wafer W is subjected to flash lamp annealing by irradiating the semiconductor wafer W with flash light (step ST09). Then, the temperature of the upper surface of the semiconductor wafer W at the time of flash lamp annealing is measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 (step ST10). The temperature of the upper surface of the semiconductor wafer W measured in step ST10 is stored in the storage unit 35 as the measured temperature.
  • the temperature correction unit 32 of the control unit 3 corrects the measured temperature measured in step ST10 by using the correction coefficient stored in the storage unit 35. Specifically, as shown in the following equation (2), using the correction factor CF, the measured temperature T its measure, corrected to correct the measured temperature T 'its measure (step ST11).
  • step ST12 the semiconductor wafer W is carried out from the chamber 6 by the transfer robot outside the apparatus, and the flash lamp annealing of the semiconductor wafer W is completed.
  • step ST11 the correction coefficient is corrected by referring to the correction coefficient stored in the storage unit 35, but the correction coefficient calculated by the coefficient calculation unit 31 and stored in the storage unit 35 is not used.
  • the operator directly through the input unit 34 obtains the correction coefficient by a hand calculation type the correction coefficient, the temperature correction unit 32 of the controller 3, the measured temperature T its measure from the input unit 34 by using the correction coefficient May be corrected to the correction measurement temperature T'factor.
  • the control unit 3 refers to the corrected measurement temperature T'measure , and even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface of the surface can be measured with high accuracy. Therefore, it can be appropriately confirmed whether or not the flash lamp annealing is properly performed.
  • the control unit 3 can adjust the output value of the flash lamp, the irradiation time, or the like when the corrected measurement temperature T'measure is out of the expected temperature range.
  • the reference temperature and the shift temperature are measured once, but at least one of the reference temperature and the shift temperature can be used as the average value of the temperatures of the test substrates measured a plurality of times. Good.
  • the coefficient calculation unit 31 of the control unit 3 measures the measurement by the quantum infrared sensor used in the lower radiation thermometer 20.
  • the correction coefficient used for temperature correction may also be calculated.
  • FIG. 13 is a flowchart for explaining the operation of the heat treatment system according to the present embodiment.
  • the following processing procedure of the heat treatment system 100 proceeds by the control unit 3 controlling each operation mechanism of the heat treatment system 100.
  • test board is carried in as in step ST01 in the first embodiment (step ST21). Then, the test substrate is subjected to preheating (assist heating) and test heat treatment including irradiation of flash light (step ST22).
  • FIG. 14 is a diagram showing changes in the surface temperature of the test substrate. Even in the semiconductor wafer W described later, it is assumed that the surface temperature changes as shown in FIG. 14 due to flash lamp annealing.
  • the 40 halogen lamps HL of the halogen heating unit 4 are turned on all at once at time t1, and preheating (assist heating) is started (step). ST23).
  • the halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and irradiates the lower surface of the test substrate.
  • the test substrate is preheated and the temperature rises.
  • the temperature of the test substrate which is raised by irradiation with light from the halogen lamp HL, is measured by the lower radiation thermometer 20. That is, the lower radiation thermometer 20 receives infrared light radiated from the lower surface (lower surface) of the test substrate held by the susceptor 74 through the opening 78 through the transparent window 21 and measures the lower surface temperature of the test substrate. (Step ST24).
  • the temperature measurement by the lower radiation thermometer 20 may be started before the preheating by the halogen lamp HL is started.
  • the bottom surface temperature of the test board measured by the lower radiation thermometer 20 is transmitted to the control unit 3. Then, the lower surface temperature of the test substrate before the test heat treatment is performed is stored in the storage unit 35 as a reference temperature (assist).
  • the control unit 3 controls the output of the halogen lamp HL while monitoring whether or not the temperature of the test substrate, which is raised by irradiation with light from the halogen lamp HL, has reached a predetermined preheating temperature T1. That is, the control unit 3 feedback-controls the output of the halogen lamp HL so that the temperature of the test substrate becomes the preheating temperature T1 based on the measured value by the lower radiation thermometer 20.
  • the lower radiation thermometer 20 is also a temperature sensor for controlling the output of the halogen lamp HL in the preheating stage.
  • the lower radiation thermometer 20 measures the temperature of the lower surface of the test substrate, there is no temperature difference between the upper and lower surfaces of the test substrate at the stage of preheating by the halogen lamp HL, and the lower radiation thermometer 20 measures the temperature.
  • the measured bottom surface temperature can be regarded as the temperature of the entire test substrate.
  • the control unit 3 After the temperature of the test board reaches the preheating temperature T1, the control unit 3 maintains the test board at the preheating temperature T1 for a while. Specifically, the control unit 3 adjusts the output of the halogen lamp HL at the time t2 when the temperature of the test substrate measured by the lower radiation thermometer 20 reaches the preheating temperature T1, and the temperature of the test substrate is substantially preheated. The temperature is maintained at T1.
  • the entire test substrate is uniformly heated to the preheating temperature T1.
  • the temperature of the peripheral portion of the test substrate which is more likely to generate heat, tends to be lower than that of the central portion, but the arrangement density of the halogen lamp HL in the halogen heating unit 4 is tested.
  • the region facing the peripheral edge is higher than the region facing the central portion of the substrate. Therefore, the amount of light emitted to the peripheral portion of the test substrate where heat dissipation is likely to occur increases, and the in-plane temperature distribution of the test substrate in the preheating stage can be made uniform.
  • Step ST25 the upper surface of the test substrate in which the flash lamp FL of the flash heating unit 5 is held by the susceptor 74 is irradiated with flash light as a test heat treatment.
  • the surface temperature of the test board is monitored by the upper radiation thermometer 25.
  • the upper radiation thermometer 25 does not measure the absolute temperature of the upper surface of the test substrate, but measures the temperature change of the upper surface. That is, the quantum infrared sensor 29 of the upper radiation thermometer 25 removes the offset component by AC coupling or the like, and further, with reference to the lower radiation thermometer 20, the difference from the voltage value corresponding to the preheating temperature T1 is obtained.
  • the rising temperature (jump temperature) ⁇ T of the upper surface of the test substrate from the preheating temperature T1 at the time of flash light irradiation is measured (step ST26).
  • the temperature of the lower surface of the test substrate is measured by the lower radiation thermometer 20 even during flash light irradiation, when the irradiation time is extremely short and strong flash light is irradiated, only the vicinity of the surface of the test substrate is rapidly heated. Therefore, a temperature difference occurs between the upper and lower surfaces of the test substrate, and the temperature of the upper surface of the test substrate cannot be measured by the lower radiation thermometer 20. Further, as with the lower radiation thermometer 20, the light receiving angle of the upper radiation thermometer 25 with respect to the test substrate is also set to 60 ° or more and 89 ° or less, so that the upper radiation thermometer 25 accurately determines the rising temperature ⁇ T of the upper surface of the test substrate. Can be measured.
  • control unit 3 calculates the maximum temperature reached by the upper surface of the test substrate during flash light irradiation (step ST27).
  • the temperature of the lower surface of the test substrate is continuously measured by the lower radiation thermometer 20 from the time t2 when the test substrate reaches a constant temperature during preheating to the time t3 when the flash light is irradiated.
  • the control unit 3 measures the temperature of the lower surface of the test substrate (preliminary heating temperature T1) measured by the lower radiation thermometer 20 from the time t2 to the time t3 immediately before irradiating the flash light with the upper radiation thermometer 25.
  • the maximum temperature reached T2 of the upper surface is calculated by adding the rising temperature ⁇ T of the upper surface of the test substrate at the time of irradiation with the flash light.
  • the calculated maximum temperature reached T2 is stored in the storage unit 35 as a reference temperature (jump).
  • the control unit 3 may display the calculated maximum temperature reached T2 on the display unit 33.
  • the halogen lamp HL is turned off at time t4 after a predetermined time has elapsed.
  • the temperature of the test substrate rapidly drops from the preheating temperature T1.
  • the temperature of the test substrate during cooling is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control unit 3.
  • the control unit 3 monitors whether or not the temperature of the test substrate has dropped to a predetermined temperature based on the measurement result of the lower radiation thermometer 20.
  • the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retracted position to the transfer operation position again and rise, so that the lift pin 12 is lifted by the susceptor 74.
  • the test substrate after heat treatment is received from the susceptor 74 by protruding from the upper surface of the surface.
  • the transfer opening 66 closed by the gate valve 185 is opened, the test board mounted on the lift pin 12 is carried out from the chamber 6 by the transfer robot outside the apparatus, and the test board is preheated (assisted heating). ) And the test heat treatment is completed (step ST28).
  • the test substrate is subjected to preheating (assist heating) and test heat treatment again by the same method (same set value) as in steps ST21 to ST28 (step ST29).
  • the lower surface temperature of the test substrate measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 during the test heat treatment is the shift temperature (assist)
  • the rising temperature (jump temperature) of the upper surface of the test substrate is The shift temperature (jump) is stored in the storage unit 35 (step ST30).
  • the coefficient calculation unit 31 of the control unit 3 calculates the correction coefficient based on the reference temperature (jump), the reference temperature (assist), the shift temperature (jump), and the shift temperature (assist). Specifically, as shown in the following equation (3), it is based on the reference temperature T ref (as) , the reference temperature T ref (ju) , the shift temperature T shift (as), and the shift temperature T shift (ju) . Then, the correction coefficient CF is calculated (step ST31).
  • the semiconductor wafer W to be processed is subjected to flash lamp annealing in the same manner as in steps ST21 to ST28 (step ST32).
  • various set values for example, the output value of the flash light or the irradiation time of the flash light
  • the preheating assisted heating
  • the lower surface temperature of the semiconductor wafer W measured by using the quantum infrared sensor 29 of the upper radiation thermometer 25 at the time of flash lamp annealing is the measurement temperature (assist), and the rising temperature (jump) of the upper surface of the semiconductor wafer W is used.
  • the temperature) is stored in the storage unit 35 as the measurement temperature (jump) (step ST33).
  • the temperature correction unit 32 of the control unit 3 corrects the measured temperature measured in step ST33 by using the correction coefficient stored in the storage unit 35. Specifically, as shown in the following equation (4), the measurement temperature (jump) T measure (ju) and the measurement temperature (assist) T measure (as) are corrected using the correction coefficient CF. T 'is corrected to measure (step ST34).
  • control unit 3 refers to the corrected measurement temperature T'measure , and even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface of the surface can be measured with high accuracy. Therefore, it can be appropriately confirmed whether or not the flash lamp annealing is properly performed.
  • the correction coefficient is applied only to the rising temperature (jump temperature) of the upper surface of the semiconductor wafer W, which is affected by the change in the output voltage of the quantum infrared sensor 29.
  • the temperature of the upper surface can be measured with high accuracy. That is, it is possible to measure the temperature in consideration of the change in the thermal conductivity of the semiconductor wafer W (particularly silicon) due to the preheating (assisted heating).
  • temperature correction unit 32 by using the correction coefficient CF, the measured temperature (jump) T measure (ju) and the measured temperature (assist) T measure (as), is corrected to the corrected measured temperature T 'its measure, flash lamp FL
  • the correction accuracy may decrease depending on the conditions such as the pulse waveform corresponding to the light emission time of.
  • the zone offset value is a portion of the flash lamp FL shown in FIG. 3 in which the charging voltage of the portion arranged facing the central portion of the substrate W is arranged so as to face the peripheral edge portion of the substrate W. This is the offset value when the voltage is set lower than the charging voltage of.
  • the correction coefficient CF is, for example, a pulse waveform pw which is a variable of light emission time, a charging voltage cv which is a variable of light emission intensity, an assist heating temperature as corresponding to the preheating temperature T1 of FIG. 14, and a zone offset value zo. It may be a correction coefficient CF (pw, cv, as, zo) having four variables of. In that case, for example, when the variable pw changes, the other variables may be fixed as predetermined reference values.
  • the plurality of correction coefficient CFs obtained in the third embodiment can be retained in the correction coefficient table.
  • FIG. 15 is a diagram schematically showing an example of a correction coefficient table that holds a correction coefficient CF for each processing recipe.
  • a plurality of correction coefficient CFs are held corresponding to the correction coefficient numbers according to the difference in the pulse waveform, the charging voltage, the assist temperature, and the zone offset value in the processing recipe.
  • correction coefficient CF (pw, cv, as, zo) having the variables obtained in the third embodiment can be made selectable by designating each variable.
  • FIG. 16 is a diagram showing an example of a GUI screen for inputting each variable of the correction coefficient CF (pw, cv, as, zo) having the variable.
  • each variable of the correction coefficient CF (pw, cv, as, zo) can be specified in the designated field 300, the designated field 301, the designated field 302, and the designated field 303 by direct input or pull-down format.
  • the correction coefficient (or the corresponding correction coefficient number) corresponding to the input variable is displayed in the designated field 304 by the calculation of the control unit 3. However, the correction coefficient (or the corresponding correction coefficient number) may be directly input to the designated field 304.
  • the zone offset value switching display field 305 is displayed by switching from the off state to the on state when the voltage value is specified in the designation field 303, but a set button for switching the zone offset is separately displayed. It may be provided.
  • the control unit 3 automatically selects the correction coefficient CF suitable for the processing recipe from the library. It may be configured to be selected as a target.
  • the control unit 3 may select a correction coefficient CF suitable for the processing recipe by an optimization method. For example, even if the correction coefficient CF corresponding to the charging voltage cv of a plurality of patterns is held and the optimum correction coefficient CF is estimated by curve fitting by the least squares method when an arbitrary charging voltage cv is input. Good.
  • control unit 3 may select a correction coefficient CF suitable for the processing recipe by machine learning. For example, four variables (pulse waveform pw, charging voltage cv, assist heating temperature as and zone offset value zo) and the corresponding correction coefficient CF are learned as training data by a neural network or the like, and based on the input of the above four variables. A trained model capable of outputting the optimum correction coefficient CF may be mounted on the control unit 3.
  • the replacement may be made across a plurality of embodiments. That is, it may be the case that the respective configurations shown in the examples in different embodiments are combined to produce the same effect.
  • the heat treatment apparatus includes a quantum infrared sensor 29, a coefficient calculation unit 31, and a temperature correction unit 32.
  • the quantum infrared sensor 29 measures the temperature of the first substrate and the temperature of the second substrate.
  • the first substrate corresponds to, for example, a test substrate.
  • the second substrate corresponds to, for example, the semiconductor wafer W.
  • the temperature of the test substrate on which the first heat treatment to be irradiated with the flash light, which is measured by the quantum infrared sensor 29, is performed is set as the reference temperature.
  • the first heat treatment corresponds to, for example, a test heat treatment.
  • the temperature of the test substrate that has been subjected to the test heat treatment again after the test heat treatment is defined as the shift temperature.
  • the coefficient calculation unit 31 calculates the correction coefficient based on the reference temperature and the shift temperature.
  • the temperature correction unit 32 corrects the temperature of the semiconductor wafer W that has been subjected to the second heat treatment to be irradiated with the flash light, which is measured by the quantum infrared sensor 29, by using the correction coefficient.
  • the second heat treatment corresponds to, for example, flash lamp annealing.
  • the semiconductor wafer W by correcting the temperature of the semiconductor wafer W using the correction coefficient, even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface can be measured with high accuracy. Therefore, it can be appropriately confirmed whether or not the flash lamp annealing is properly performed.
  • the range in which the correction coefficient can be applied is, for example, compared to the case where the output voltage of the quantum infrared sensor 29 is corrected, for other devices that do not use voltage. Also spreads.
  • the output is corrected by using a predetermined correction coefficient for the measurement temperature measured by another sensor provided in the heat treatment device, which is different from the heat treatment device provided with the quantum infrared sensor that calculates a predetermined correction coefficient. May be good.
  • the output of each sensor may be corrected by a predetermined correction coefficient.
  • the coefficient calculation unit 31 calculates the correction coefficient based on the ratio of the reference temperature and the shift temperature. According to such a configuration, by correcting the temperature of the semiconductor wafer W using the correction coefficient, even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface can be measured with high accuracy.
  • At least one of the reference temperature and the shift temperature is set as the average value of the temperatures of the test substrates measured a plurality of times. According to such a configuration, the measurement accuracy of at least one of the reference temperature and the shift temperature is improved, so that the accuracy of the correction coefficient is also improved.
  • the heat treatment apparatus 160 includes an alarm unit 36 for issuing an alarm when the difference between the reference temperature and the shift temperature exceeds the threshold value.
  • the quantum infrared sensor 29 measures at least the temperature on the upper surface of the test substrate to which the flash light is irradiated.
  • the heat treatment apparatus 160 includes a bottom surface thermometer for measuring at least the temperature on the bottom surface of the test substrate.
  • the bottom surface thermometer corresponds to, for example, the lower radiation thermometer 20.
  • the temperature on the lower surface of the test substrate before the test heat treatment, which is measured by the lower radiation thermometer 20, is defined as the assist temperature.
  • the coefficient calculation unit 31 calculates the correction coefficient based on the reference temperature, the shift temperature, and the assist temperature.
  • the correction coefficient is applied only to the rising temperature (jump temperature) of the upper surface of the semiconductor wafer W, which is affected by the change in the output voltage of the quantum infrared sensor 29. Therefore, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy.
  • the coefficient calculation unit 31 calculates the correction coefficient based on the ratio of the difference between the reference temperature and the assist temperature and the difference between the shift temperature and the assist temperature. .. According to such a configuration, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy by applying the correction coefficient only to the rising temperature (jump temperature) of the upper surface of the semiconductor wafer W.
  • the temperature of the test substrate subjected to the test heat treatment to be irradiated with the flash light is measured by using the quantum infrared sensor 29, and the temperature of the test substrate is measured.
  • the temperature of the test substrate subjected to the test heat treatment is measured again using the quantum infrared sensor 29, and the temperature of the test substrate is shifted to the shift temperature.
  • the temperature of the semiconductor wafer W that has been annealed by the flash lamp irradiated with the flash light which is measured by the quantum infrared sensor 29, using the correction coefficient calculated based on the reference temperature and the shift temperature. It is provided with a process of making corrections.
  • the semiconductor wafer W by correcting the temperature of the semiconductor wafer W using the correction coefficient, even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface can be measured with high accuracy.
  • the material when a material name or the like is described without being specified, the material contains other additives, for example, an alloy, etc., as long as there is no contradiction. It shall be included.
  • Control unit 4 Halogen heating unit 5 Flash heating unit 6 Chamber 7 Holding unit 10 Transfer mechanism 11 Transfer arm 12 Lift pin 13 Horizontal movement mechanism 14 Lifting mechanism 20 Lower radiation thermometer 21, 26 Transparent window 22, 27 Temperature measurement unit 24 Thermal infrared sensor 25 Upper radiation thermometer 29 Quantum infrared sensor 31 Coefficient calculation unit 32 Temperature correction unit 33 Display unit 34 Input unit 35 Storage unit 36

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Abstract

The present invention makes it possible to appropriately measure, even with a radiation thermometer that uses a quantum infrared sensor, the temperature of a substrate upon which flash light has been emitted. This heat treatment apparatus comprises a quantum infrared sensor for measuring the temperature of a first substrate and the temperature of a second substrate. The heat treatment apparatus further comprises a temperature correction unit for using a correction coefficient calculated on the basis of a reference temperature and a shift temperature to correct a temperature of the second substrate measured by the quantum infrared sensor after the second substrate was subjected to second heat treatment in which flash light was emitted on the same.

Description

熱処理装置、および、熱処理方法Heat treatment equipment and heat treatment method
　本願明細書に開示される技術は、熱処理装置、および、熱処理方法に関するものである。 The techniques disclosed in the specification of the present application relate to a heat treatment apparatus and a heat treatment method.
　半導体デバイスの製造プロセスにおいて、不純物導入は半導体ウエハなどの薄板状精密電子基板（以下、単に「基板」と称する場合がある）内にｐｎ接合などを形成するための必要となる工程である。不純物導入は、イオン打ち込み法とその後のアニール法によってなされるものが一般的である。 In the semiconductor device manufacturing process, the introduction of impurities is a necessary step for forming a pn junction or the like in a thin plate-shaped precision electronic substrate (hereinafter, may be simply referred to as a "substrate") such as a semiconductor wafer. Impurities are generally introduced by an ion implantation method and a subsequent annealing method.
　イオン打ち込み法は、ボロン（Ｂ）、ヒ素（Ａｓ）、リン（Ｐ）などの不純物の元素をイオン化させて高加速電圧で半導体ウエハに衝突させることによって、物理的に不純物注入を行う技術である。 The ion implantation method is a technique for physically injecting impurities by ionizing impurity elements such as boron (B), arsenic (As), and phosphorus (P) and causing them to collide with a semiconductor wafer at a high acceleration voltage. ..
　注入された不純物は、アニール処理によって活性化される。この際に、アニール時間が数秒程度以上であると、打ち込まれた不純物が熱によって深く拡散し、その結果接合深さが要求よりも深くなり過ぎてしまうため、良好なデバイス形成に支障が生じるおそれがある。 The injected impurities are activated by the annealing treatment. At this time, if the annealing time is about several seconds or more, the injected impurities are deeply diffused by heat, and as a result, the bonding depth becomes too deep than required, which may hinder the formation of a good device. There is.
　そこで、極めて短時間で半導体ウエハを加熱するアニール技術として、フラッシュランプアニール（ｆｌａｓｈ　ｌａｍｐ　ａｎｎｅａｌ、すなわち、ＦＬＡ）が注目されている。ＦＬＡは、キセノンフラッシュランプ（以下、単に「フラッシュランプ」と記載する場合には、キセノンフラッシュランプを意味する）を使用して半導体ウエハの表面にフラッシュ光を照射することによって、不純物が注入された半導体ウエハの表面のみを極めて短時間（たとえば、数ミリ秒以下）で昇温させる熱処理技術である。 Therefore, as an annealing technique for heating a semiconductor wafer in an extremely short time, flash lamp annealing (that is, FLA) is attracting attention. The FLA was injected with impurities by irradiating the surface of the semiconductor wafer with flash light using a xenon flash lamp (hereinafter, when simply referred to as "flash lamp", it means a xenon flash lamp). This is a heat treatment technique for raising the temperature of only the surface of a semiconductor wafer in an extremely short time (for example, several milliseconds or less).
　キセノンフラッシュランプの放射分光分布は紫外域から近赤外域であり、従来のハロゲンランプよりも波長が短く、また、シリコンの半導体ウエハの基礎吸収帯とほぼ一致している。よって、キセノンフラッシュランプから半導体ウエハにフラッシュ光を照射した場合には、透過光が少ないため、半導体ウエハを急速に昇温することが可能である。また、数ミリ秒以下の極めて短時間のフラッシュ光照射であれば、半導体ウエハの表面近傍のみを選択的に昇温することができることも判明している。このため、キセノンフラッシュランプによる極短時間の昇温であれば、不純物を深く拡散させずに、不純物活性化を実行することができる。 The radiation spectral distribution of the xenon flash lamp is from the ultraviolet region to the near infrared region, the wavelength is shorter than that of the conventional halogen lamp, and it almost coincides with the basic absorption band of the silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with the flash light from the xenon flash lamp, the temperature of the semiconductor wafer can be rapidly raised because the transmitted light is small. It has also been found that if the flash light is irradiated for an extremely short time of several milliseconds or less, the temperature can be selectively raised only in the vicinity of the surface of the semiconductor wafer. Therefore, if the temperature is raised in an extremely short time by the xenon flash lamp, the impurities can be activated without deeply diffusing the impurities.
　たとえば特許文献１には、処理チャンバーの下方に配置された加熱プレートによって半導体ウエハを予備加熱した後、処理チャンバーの上方に配置されたフラッシュランプから半導体ウエハの表面にフラッシュ光を照射するフラッシュランプアニール装置が開示されている。 For example, in Patent Document 1, a semiconductor wafer is preheated by a heating plate arranged below the processing chamber, and then flash lamp annealing is performed by irradiating the surface of the semiconductor wafer with flash light from a flash lamp arranged above the processing chamber. The device is disclosed.
特開２００４－１８６５４２号公報Japanese Unexamined Patent Publication No. 2004-186542
　フラッシュランプアニールでは、フラッシュ光が照射された基板の表面の温度が短時間で上昇するため、フラッシュ光が照射された当該基板の表面の温度を測定するためには、高速応答可能な温度計が必要となる。そのような高速応答可能な温度計としては、たとえば、量子型赤外線センサーを用いる放射温度計がある。 In flash lamp annealing, the temperature of the surface of the substrate irradiated with flash light rises in a short time. Therefore, in order to measure the temperature of the surface of the substrate irradiated with flash light, a thermometer capable of high-speed response is used. You will need it. As such a thermometer capable of high-speed response, for example, there is a radiation thermometer using a quantum infrared sensor.
　しかしながら、量子型赤外線センサーを用いる放射温度計は、時間の経過とともに出力電圧が変化する場合があり、精度の高い温度測定が難しいという問題があった。 However, the radiation thermometer using the quantum infrared sensor has a problem that the output voltage may change with the passage of time, and it is difficult to measure the temperature with high accuracy.
　本願明細書に開示される技術は、以上に記載されたような問題を鑑みてなされたものであり、量子型赤外線センサーを用いる放射温度計であっても、フラッシュ光が照射された基板の温度を適切に測定するための技術である。 The technique disclosed in the present specification has been made in view of the above-mentioned problems, and even in a radiation thermometer using a quantum infrared sensor, the temperature of the substrate irradiated with flash light. It is a technique for appropriately measuring.
　本願明細書に開示される技術の第１の態様は、フラッシュ光を照射することによって第１の基板および第２の基板を加熱する熱処理装置であり、前記第１の基板の温度および前記第２の基板の温度を測定するための量子型赤外線センサーを備え、前記量子型赤外線センサーによって測定される、前記フラッシュ光が照射される第１の熱処理が行われた前記第１の基板の温度を基準温度とし、前記量子型赤外線センサーによって測定される、前記第１の熱処理が行われた後に、再び前記第１の熱処理が行われた前記第１の基板の温度をシフト温度とし、前記熱処理装置は、前記量子型赤外線センサーによって測定される、前記フラッシュ光が照射される第２の熱処理が行われた前記第２の基板の温度を、前記基準温度および前記シフト温度に基づいて算出された補正係数を用いて補正するための温度補正部をさらに備える。 A first aspect of the technique disclosed herein is a heat treatment apparatus that heats a first substrate and a second substrate by irradiating with flash light, the temperature of the first substrate and the second. A quantum infrared sensor for measuring the temperature of the substrate is provided, and the temperature of the first substrate measured by the quantum infrared sensor and subjected to the first heat treatment irradiated with the flash light is used as a reference. The temperature is defined as the temperature of the first substrate on which the first heat treatment is performed again after the first heat treatment, which is measured by the quantum infrared sensor, as the shift temperature. , A correction coefficient calculated based on the reference temperature and the shift temperature of the temperature of the second substrate subjected to the second heat treatment to which the flash light is irradiated, which is measured by the quantum infrared sensor. A temperature compensating unit for compensating using the above is further provided.
　本願明細書に開示される技術の第２の態様は、第１の態様に関連し、前記補正係数は、前記基準温度と前記シフト温度との比率に基づいて算出される。 The second aspect of the technique disclosed in the present specification relates to the first aspect, and the correction coefficient is calculated based on the ratio of the reference temperature to the shift temperature.
　本願明細書に開示される技術の第３の態様は、第１または２の態様に関連し、前記補正係数は、少なくとも一方が複数回測定された前記第１の基板の温度の平均値である、前記基準温度および前記シフト温度に基づいて算出される。 A third aspect of the technique disclosed herein relates to a first or second aspect, wherein the correction factor is an average of the temperatures of the first substrate, one of which has been measured multiple times. , Calculated based on the reference temperature and the shift temperature.
　本願明細書に開示される技術の第４の態様は、第１から３のうちのいずれか１つの態様に関連し、前記熱処理装置は、前記基準温度と前記シフト温度との差がしきい値を超えた場合に警報を発報するための警報部をさらに備える。 A fourth aspect of the technique disclosed herein relates to any one of the first to third aspects, wherein the heat treatment apparatus has a threshold value of the difference between the reference temperature and the shift temperature. It is further provided with an alarm unit for issuing an alarm when the temperature exceeds the above.
　本願明細書に開示される技術の第５の態様は、第１から４のうちのいずれか１つの態様に関連し、前記量子型赤外線センサーは、少なくとも前記第１の基板の、前記フラッシュ光が照射される上面における温度を測定し、前記熱処理装置は、少なくとも前記第１の基板の下面における温度を測定するための下面温度計をさらに備え、前記下面温度計によって測定される、前記第１の熱処理が行われる前の前記第１の基板の下面における温度をアシスト温度とし、前記温度補正部は、前記基準温度、前記シフト温度および前記アシスト温度に基づいて算出された前記補正係数を用いて前記第２の基板の温度を補正する。 A fifth aspect of the technique disclosed herein relates to any one of the first to fourth aspects, wherein the quantum infrared sensor is provided with at least the flash light of the first substrate. The first surface thermometer, which measures the temperature on the top surface to be irradiated, further comprises a bottom surface thermometer for measuring at least the temperature on the bottom surface of the first substrate, which is measured by the bottom surface thermometer. The temperature on the lower surface of the first substrate before the heat treatment is performed is set as the assist temperature, and the temperature compensator uses the correction coefficient calculated based on the reference temperature, the shift temperature, and the assist temperature. Correct the temperature of the second substrate.
　本願明細書に開示される技術の第６の態様は、第５の態様に関連し、前記補正係数は、前記基準温度と前記アシスト温度との差と、前記シフト温度と前記アシスト温度との差との比率に基づいて算出される。 The sixth aspect of the technique disclosed in the present specification relates to the fifth aspect, and the correction coefficient is the difference between the reference temperature and the assist temperature, and the difference between the shift temperature and the assist temperature. It is calculated based on the ratio of.
　本願明細書に開示される技術の第７の態様は、フラッシュ光を照射することによって第１の基板および第２の基板を加熱する熱処理方法であり、量子型赤外線センサーを用いて、前記フラッシュ光が照射される第１の熱処理が行われた前記第１の基板の温度を測定し、かつ、測定された前記第１の基板の温度を基準温度とする工程と、前記第１の熱処理が行われた後に、前記量子型赤外線センサーを用いて、前記第１の熱処理が行われた前記第１の基板の温度を再び測定し、かつ、再び測定された前記第１の基板の温度をシフト温度とする工程と、前記量子型赤外線センサーによって測定される、前記フラッシュ光が照射される第２の熱処理が行われた前記第２の基板の温度を、前記基準温度および前記シフト温度に基づいて算出される補正係数を用いて補正する工程とを備える。 A seventh aspect of the technique disclosed in the present specification is a heat treatment method for heating a first substrate and a second substrate by irradiating with a flash light, and the flash light is used by using a quantum infrared sensor. The step of measuring the temperature of the first substrate on which the first heat treatment is performed and using the measured temperature of the first substrate as a reference temperature, and the first heat treatment are performed. After that, the temperature of the first substrate subjected to the first heat treatment is measured again by using the quantum infrared sensor, and the temperature of the first substrate measured again is shifted to the shift temperature. The temperature of the second substrate subjected to the second heat treatment to which the flash light is irradiated, which is measured by the quantum infrared sensor, is calculated based on the reference temperature and the shift temperature. It is provided with a step of correcting using the correction coefficient to be performed.
　本願明細書に開示される技術の第１から７の態様によれば、量子型赤外線センサーを用いる放射温度計であっても、フラッシュ光が照射された基板の温度を適切に測定することができる。 According to the first to seventh aspects of the technique disclosed in the present specification, even a radiation thermometer using a quantum infrared sensor can appropriately measure the temperature of the substrate irradiated with the flash light. ..
　また、本願明細書に開示される技術に関連する目的と、特徴と、局面と、利点とは、以下に示される詳細な説明と添付図面とによって、さらに明白となる。 Further, the objectives, features, aspects, and advantages related to the technology disclosed in the present specification will be further clarified by the detailed description and the accompanying drawings shown below.
実施の形態に関する、熱処理システムの構成の例を概略的に示す平面図である。It is a top view which shows typically the example of the structure of the heat treatment system which concerns on embodiment. 実施の形態に関する、熱処理システムの構成の例を概略的に示す正面図である。It is a front view which shows typically the example of the structure of the heat treatment system which concerns on embodiment. 実施の形態に関する熱処理システムにおける、熱処理装置の構成を概略的に示す断面図である。It is sectional drawing which shows schematic the structure of the heat treatment apparatus in the heat treatment system which concerns on embodiment. 保持部の全体外観を示す斜視図である。It is a perspective view which shows the whole appearance of the holding part. サセプタの平面図である。It is a top view of the susceptor. サセプタの断面図である。It is sectional drawing of the susceptor. 移載機構の平面図である。It is a top view of the transfer mechanism. 移載機構の側面図である。It is a side view of the transfer mechanism. 複数のハロゲンランプの配置を示す平面図である。It is a top view which shows the arrangement of a plurality of halogen lamps. 下部放射温度計とサセプタに保持された半導体ウエハＷとの位置関係を示す図である。It is a figure which shows the positional relationship between the lower radiation thermometer and the semiconductor wafer W held by the susceptor. 下部放射温度計、上部放射温度計および制御部の関係性を示す機能ブロック図である。It is a functional block diagram which shows the relationship between the lower radiation thermometer, the upper radiation thermometer and the control unit. 実施の形態に関する、熱処理システムの動作を説明するためのフローチャートである。It is a flowchart for demonstrating operation of a heat treatment system which concerns on embodiment. 実施の形態に関する、熱処理システムの動作を説明するためのフローチャートである。It is a flowchart for demonstrating operation of a heat treatment system which concerns on embodiment. テスト基板の表面温度の変化を示す図である。It is a figure which shows the change of the surface temperature of a test substrate. 処理レシピごとに補正係数を保持する補正係数テーブルの例を模式的に示す図である。It is a figure which shows typically the example of the correction coefficient table which holds the correction coefficient for each processing recipe. 変数を有する補正係数のそれぞれの変数を入力するためのＧＵＩ画面の例を示す図である。It is a figure which shows the example of the GUI screen for inputting each variable of the correction coefficient which has a variable.
　以下、添付される図面を参照しながら実施の形態について説明する。以下の実施の形態では、技術の説明のために詳細な特徴なども示されるが、それらは例示であり、実施の形態が実施可能となるためにそれらすべてが必ずしも必須の特徴ではない。 Hereinafter, embodiments will be described with reference to the attached drawings. In the following embodiments, detailed features and the like are also shown for the purpose of explaining the technique, but they are examples, and not all of them are necessarily essential features in order for the embodiments to be feasible.
　なお、図面は概略的に示されるものであり、説明の便宜のため、適宜、構成の省略、または、構成の簡略化が図面においてなされるものである。また、異なる図面にそれぞれ示される構成などの大きさおよび位置の相互関係は、必ずしも正確に記載されるものではなく、適宜変更され得るものである。また、断面図ではない平面図などの図面においても、実施の形態の内容を理解することを容易にするために、ハッチングが付される場合がある。 Note that the drawings are shown schematically, and for convenience of explanation, the configuration is omitted or the configuration is simplified as appropriate in the drawings. Further, the interrelationship between the sizes and positions of the configurations and the like shown in different drawings is not always accurately described and can be changed as appropriate. Further, even in a drawing such as a plan view which is not a cross-sectional view, hatching may be added to facilitate understanding of the contents of the embodiment.
　また、以下に示される説明では、同様の構成要素には同じ符号を付して図示し、それらの名称と機能とについても同様のものとする。したがって、それらについての詳細な説明を、重複を避けるために省略する場合がある。 Further, in the explanation shown below, similar components are illustrated with the same reference numerals, and their names and functions are also the same. Therefore, detailed description of them may be omitted to avoid duplication.
　また、以下に記載される説明において、ある構成要素を「備える」、「含む」または「有する」などと記載される場合、特に断らない限りは、他の構成要素の存在を除外する排他的な表現ではない。 Further, in the description described below, when it is described that a certain component is "equipped", "included", or "has", the existence of another component is excluded unless otherwise specified. Not an expression.
　また、以下に記載される説明において、「第１の」または「第２の」などの序数が用いられる場合があっても、これらの用語は、実施の形態の内容を理解することを容易にするために便宜上用いられるものであり、これらの序数によって生じ得る順序などに限定されるものではない。 Also, even if ordinal numbers such as "first" or "second" are used in the description described below, these terms make it easy to understand the content of the embodiments. It is used for convenience, and is not limited to the order that can be generated by these ordinal numbers.
　また、以下に記載される説明において、等しい状態であることを示す表現、たとえば、「同一」、「等しい」、「均一」または「均質」などは、特に断らない限りは、厳密に等しい状態であることを示す場合、および、公差または同程度の機能が得られる範囲において差が生じている場合を含むものとする。 Further, in the description described below, expressions indicating equality, for example, "same", "equal", "uniform" or "homogeneous", are strictly equal unless otherwise specified. It shall include the case where it indicates that there is, and the case where there is a difference within the range where tolerance or similar function can be obtained.
　また、以下に記載される説明において、「上」、「下」、「左」、「右」、「側」、「底」、「表」または「裏」などの特定の位置または方向を意味する用語が用いられる場合があっても、これらの用語は、実施の形態の内容を理解することを容易にするために便宜上用いられるものであり、実際に実施される際の位置または方向とは関係しないものである。 Also, in the description described below, it means a specific position or direction such as "top", "bottom", "left", "right", "side", "bottom", "front" or "back". Even if terms are used, these terms are used for convenience to facilitate understanding of the contents of the embodiment, and are the positions or directions when they are actually implemented. It has nothing to do with it.
　＜第１の実施の形態＞
　以下、本実施の形態に関する熱処理システムにおける熱処理装置、および、熱処理方法について説明する。 <First Embodiment>
Hereinafter, the heat treatment apparatus and the heat treatment method in the heat treatment system according to the present embodiment will be described.
　＜熱処理システムの構成について＞
　図１は、本実施の形態に関する熱処理システム１００の構成の例を概略的に示す平面図である。また、図２は、本実施の形態に関する熱処理システム１００の構成の例を概略的に示す正面図である。 <About the configuration of the heat treatment system>
FIG. 1 is a plan view schematically showing an example of the configuration of the heat treatment system 100 according to the present embodiment. Further, FIG. 2 is a front view schematically showing an example of the configuration of the heat treatment system 100 according to the present embodiment.
　図１に例が示されるように、熱処理システム１００は、基板として円板形状の半導体ウエハＷにフラッシュ光を照射して当該半導体ウエハＷを加熱するフラッシュランプアニール装置である。 As an example is shown in FIG. 1, the heat treatment system 100 is a flash lamp annealing device that heats the semiconductor wafer W by irradiating the disk-shaped semiconductor wafer W as a substrate with flash light.
　処理対象となる半導体ウエハＷのサイズは特に限定されるものではないが、たとえばφ３００ｍｍまたはφ４５０ｍｍである。 The size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, φ300 mm or φ450 mm.
　図１および図２に示されるように、熱処理システム１００は、未処理の半導体ウエハＷを外部から装置内に搬入するとともに、処理済みの半導体ウエハＷを装置外に搬出するためのインデクサ部１０１と、未処理の半導体ウエハＷの位置決めを行うアライメント部２３０と、加熱処理後の半導体ウエハＷの冷却を行う２つの冷却部１３０および冷却部１４０と、半導体ウエハＷにフラッシュ加熱処理を施す熱処理装置１６０と、冷却部１３０、冷却部１４０および熱処理装置１６０に対して半導体ウエハＷの受け渡しを行う搬送ロボット１５０とを備える。 As shown in FIGS. 1 and 2, the heat treatment system 100 includes an indexer unit 101 for carrying the untreated semiconductor wafer W into the apparatus from the outside and carrying the processed semiconductor wafer W out of the apparatus. , The alignment unit 230 that positions the untreated semiconductor wafer W, the two cooling units 130 and the cooling unit 140 that cool the semiconductor wafer W after heat treatment, and the heat treatment device 160 that performs flash heat treatment on the semiconductor wafer W. And a transfer robot 150 that delivers the semiconductor wafer W to the cooling unit 130, the cooling unit 140, and the heat treatment device 160.
　また、熱処理システム１００は、上記の各処理部に設けられた動作機構および搬送ロボット１５０を制御して、半導体ウエハＷのフラッシュ加熱処理を進行させる制御部３を備える。 Further, the heat treatment system 100 includes a control unit 3 that controls the operation mechanism and the transfer robot 150 provided in each of the above processing units to advance the flash heat treatment of the semiconductor wafer W.
　インデクサ部１０１は、複数のキャリアＣ（本実施の形態では２個）を並べて載置するロードポート１１０と、各キャリアＣから未処理の半導体ウエハＷを取り出すとともに、各キャリアＣに処理済みの半導体ウエハＷを収納する受渡ロボット１２０とを備えている。 The indexer section 101 takes out a load port 110 on which a plurality of carriers C (two in the present embodiment) are placed side by side, an unprocessed semiconductor wafer W from each carrier C, and a semiconductor processed on each carrier C. It is equipped with a delivery robot 120 that stores the wafer W.
　未処理の半導体ウエハＷを収容するキャリアＣは、無人搬送車（ＡＧＶ、ＯＨＴ）などによって搬送されてロードポート１１０に載置されるとともに、処理済みの半導体ウエハＷを収容するキャリアＣは、無人搬送車によってロードポート１１０から持ち去られる。 The carrier C accommodating the unprocessed semiconductor wafer W is transported by an automatic guided vehicle (AGV, OHT) or the like and placed on the load port 110, and the carrier C accommodating the processed semiconductor wafer W is unmanned. It is taken away from the load port 110 by an automatic guided vehicle.
　また、ロードポート１１０においては、受渡ロボット１２０がキャリアＣに対して任意の半導体ウエハＷの出し入れを行うことができるように、キャリアＣが図２の矢印ＣＵで示されるように昇降移動可能に構成されている。 Further, in the load port 110, the carrier C can be moved up and down as shown by the arrow CU in FIG. 2 so that the delivery robot 120 can load and unload an arbitrary semiconductor wafer W with respect to the carrier C. Has been done.
　なお、キャリアＣの形態としては、半導体ウエハＷを密閉空間に収納するｆｒｏｎｔ　ｏｐｅｎｉｎｇ　ｕｎｉｆｉｅｄ　ｐｏｄ（ＦＯＵＰ）の他に、ｓｔａｎｄａｒｄ　ｍｅｃｈａｎｉｃａｌ　ｉｎｔｅｒ　ｆａｃｅ（ＳＭＩＦ）ポッド、または、収納された半導体ウエハＷを外気に曝すｏｐｅｎ　ｃａｓｓｅｔｔｅ（ＯＣ）であってもよい。 As the form of the carrier C, in addition to the front opening unified pod (FOUP) that stores the semiconductor wafer W in a closed space, the standard mechanical interface (SMIF) pod or the stored semiconductor wafer W is exposed to the outside air. It may be an open cassette (OC).
　また、受渡ロボット１２０は、図１の矢印１２０Ｓによって示されるようなスライド移動、矢印１２０Ｒによって示されるような旋回動作および昇降動作が可能とされている。これによって、受渡ロボット１２０は、２つのキャリアＣに対して半導体ウエハＷの出し入れを行うとともに、アライメント部２３０および２つの冷却部１３０および冷却部１４０に対して半導体ウエハＷの受け渡しを行う。 Further, the delivery robot 120 is capable of a slide movement as indicated by the arrow 120S in FIG. 1, a turning motion and an ascending / descending motion as indicated by the arrow 120R. As a result, the delivery robot 120 transfers the semiconductor wafer W to and from the two carriers C, and transfers the semiconductor wafer W to the alignment unit 230 and the two cooling units 130 and the cooling unit 140.
　受渡ロボット１２０によるキャリアＣに対する半導体ウエハＷの出し入れは、ハンド１２１のスライド移動、および、キャリアＣの昇降移動によって行われる。また、受渡ロボット１２０と、アライメント部２３０または冷却部１３０（冷却部１４０）との半導体ウエハＷの受け渡しは、ハンド１２１のスライド移動、および、受渡ロボット１２０の昇降動作によって行われる。 The semiconductor wafer W is moved in and out of the carrier C by the delivery robot 120 by sliding the hand 121 and moving the carrier C up and down. Further, the transfer of the semiconductor wafer W between the delivery robot 120 and the alignment unit 230 or the cooling unit 130 (cooling unit 140) is performed by sliding the hand 121 and raising and lowering the delivery robot 120.
　アライメント部２３０は、Ｙ軸方向に沿ったインデクサ部１０１の側方に接続されて設けられている。アライメント部２３０は、半導体ウエハＷを水平面内で回転させてフラッシュ加熱に適切な向きに向ける処理部である。アライメント部２３０は、アルミニウム合金製の筐体であるアライメントチャンバー２３１の内部に、半導体ウエハＷを水平姿勢に支持して回転させる機構、および、半導体ウエハＷの周縁部に形成されたノッチまたはオリフラなどを光学的に検出する機構などを設けて構成される。 The alignment portion 230 is provided so as to be connected to the side of the indexer portion 101 along the Y-axis direction. The alignment unit 230 is a processing unit that rotates the semiconductor wafer W in a horizontal plane to orient the semiconductor wafer W in an appropriate direction for flash heating. The alignment portion 230 includes a mechanism for supporting and rotating the semiconductor wafer W in a horizontal posture inside the alignment chamber 231 which is a housing made of an aluminum alloy, and a notch or orientation flat formed on the peripheral edge of the semiconductor wafer W. It is configured by providing a mechanism for optically detecting the above.
　アライメント部２３０への半導体ウエハＷの受け渡しは、受渡ロボット１２０によって行われる。受渡ロボット１２０からアライメントチャンバー２３１へは、ウエハ中心が所定の位置に位置するように半導体ウエハＷが渡される。 The delivery of the semiconductor wafer W to the alignment unit 230 is performed by the delivery robot 120. The semiconductor wafer W is delivered from the delivery robot 120 to the alignment chamber 231 so that the center of the wafer is located at a predetermined position.
　アライメント部２３０では、インデクサ部１０１から受け取った半導体ウエハＷの中心部を回転中心として鉛直方向軸まわりで半導体ウエハＷを回転させ、ノッチ等を光学的に検出することによって半導体ウエハＷの向きを調整する。向き調整の終了した半導体ウエハＷは、受渡ロボット１２０によってアライメントチャンバー２３１から取り出される。 The alignment unit 230 adjusts the orientation of the semiconductor wafer W by rotating the semiconductor wafer W around a vertical axis around the center of the semiconductor wafer W received from the indexer unit 101 and optically detecting a notch or the like. To do. The semiconductor wafer W whose orientation has been adjusted is taken out from the alignment chamber 231 by the delivery robot 120.
　搬送ロボット１５０による半導体ウエハＷの搬送空間として、搬送ロボット１５０を収容する搬送チャンバー１７０が設けられている。その搬送チャンバー１７０の三方に熱処理装置１６０のチャンバー６、冷却部１３０の第１クールチャンバー１３１および冷却部１４０の第２クールチャンバー１４１が連通接続されている。 A transfer chamber 170 for accommodating the transfer robot 150 is provided as a transfer space for the semiconductor wafer W by the transfer robot 150. The chamber 6 of the heat treatment apparatus 160, the first cool chamber 131 of the cooling unit 130, and the second cool chamber 141 of the cooling unit 140 are communicated with each other on three sides of the transfer chamber 170.
　熱処理システム１００の主要部である熱処理装置１６０は、予備加熱（アシスト加熱）を行った半導体ウエハＷにキセノンフラッシュランプＦＬからの閃光（フラッシュ光）を照射してフラッシュ加熱処理を行う基板処理部である。この熱処理装置１６０の構成についてはさらに後述する。 The heat treatment apparatus 160, which is the main part of the heat treatment system 100, is a substrate processing unit that irradiates a semiconductor wafer W that has been preheated (assisted heating) with a flash (flash light) from a xenon flash lamp FL to perform a flash heat treatment. is there. The configuration of the heat treatment apparatus 160 will be further described later.
　２つの冷却部１３０および冷却部１４０は、概ね同様の構成を備える。冷却部１３０および冷却部１４０はそれぞれ、アルミニウム合金製の筐体である第１クールチャンバー１３１または第２クールチャンバー１４１の内部に、金属製の冷却プレートと、その上面に載置された石英板とを備える（いずれも図示省略）。当該冷却プレートは、ペルチェ素子または恒温水循環によって常温（約２３℃）に温調されている。 The two cooling units 130 and the cooling unit 140 have substantially the same configuration. The cooling unit 130 and the cooling unit 140 have a metal cooling plate and a quartz plate placed on the upper surface of the first cool chamber 131 or the second cool chamber 141, which are aluminum alloy housings, respectively. (Neither is shown). The cooling plate is temperature-controlled to room temperature (about 23 ° C.) by a Perche element or a constant temperature water circulation.
　熱処理装置１６０においてフラッシュ加熱処理が施された半導体ウエハＷは、第１クールチャンバー１３１または第２クールチャンバー１４１に搬入されて、当該石英板に載置されて冷却される。 The semiconductor wafer W that has been subjected to the flash heat treatment in the heat treatment apparatus 160 is carried into the first cool chamber 131 or the second cool chamber 141, placed on the quartz plate, and cooled.
　第１クールチャンバー１３１および第２クールチャンバー１４１はともに、インデクサ部１０１と搬送チャンバー１７０との間において、それらの双方に接続されている。 Both the first cool chamber 131 and the second cool chamber 141 are connected to both of the indexer section 101 and the transfer chamber 170.
　第１クールチャンバー１３１および第２クールチャンバー１４１には、半導体ウエハＷを搬入出するための２つの開口が形設されている。第１クールチャンバー１３１の２つの開口のうちインデクサ部１０１に接続される開口は、ゲートバルブ１８１によって開閉可能とされている。 The first cool chamber 131 and the second cool chamber 141 are provided with two openings for loading and unloading the semiconductor wafer W. Of the two openings of the first cool chamber 131, the opening connected to the indexer portion 101 can be opened and closed by the gate valve 181.
　一方、第１クールチャンバー１３１の搬送チャンバー１７０に接続される開口は、ゲートバルブ１８３によって開閉可能とされている。すなわち、第１クールチャンバー１３１とインデクサ部１０１とはゲートバルブ１８１を介して接続され、第１クールチャンバー１３１と搬送チャンバー１７０とはゲートバルブ１８３を介して接続されている。 On the other hand, the opening connected to the transfer chamber 170 of the first cool chamber 131 can be opened and closed by the gate valve 183. That is, the first cool chamber 131 and the indexer portion 101 are connected via the gate valve 181, and the first cool chamber 131 and the transfer chamber 170 are connected via the gate valve 183.
　インデクサ部１０１と第１クールチャンバー１３１との間で半導体ウエハＷの受け渡しを行う際には、ゲートバルブ１８１が開放される。また、第１クールチャンバー１３１と搬送チャンバー１７０との間で半導体ウエハＷの受け渡しを行う際には、ゲートバルブ１８３が開放される。ゲートバルブ１８１およびゲートバルブ１８３が閉鎖されているときには、第１クールチャンバー１３１の内部が密閉空間となる。 When the semiconductor wafer W is transferred between the indexer section 101 and the first cool chamber 131, the gate valve 181 is opened. Further, when the semiconductor wafer W is transferred between the first cool chamber 131 and the transfer chamber 170, the gate valve 183 is opened. When the gate valve 181 and the gate valve 183 are closed, the inside of the first cool chamber 131 becomes a closed space.
　また、第２クールチャンバー１４１の２つの開口のうちインデクサ部１０１に接続される開口はゲートバルブ１８２によって開閉可能とされている。一方、第２クールチャンバー１４１の搬送チャンバー１７０に接続される開口はゲートバルブ１８４によって開閉可能とされている。すなわち、第２クールチャンバー１４１とインデクサ部１０１とはゲートバルブ１８２を介して接続され、第２クールチャンバー１４１と搬送チャンバー１７０とはゲートバルブ１８４を介して接続されている。 Further, of the two openings of the second cool chamber 141, the opening connected to the indexer portion 101 can be opened and closed by the gate valve 182. On the other hand, the opening connected to the transfer chamber 170 of the second cool chamber 141 can be opened and closed by the gate valve 184. That is, the second cool chamber 141 and the indexer portion 101 are connected via the gate valve 182, and the second cool chamber 141 and the transfer chamber 170 are connected via the gate valve 184.
　インデクサ部１０１と第２クールチャンバー１４１との間で半導体ウエハＷの受け渡しを行う際には、ゲートバルブ１８２が開放される。また、第２クールチャンバー１４１と搬送チャンバー１７０との間で半導体ウエハＷの受け渡しを行う際には、ゲートバルブ１８４が開放される。ゲートバルブ１８２およびゲートバルブ１８４が閉鎖されているときには、第２クールチャンバー１４１の内部が密閉空間となる。 When the semiconductor wafer W is transferred between the indexer section 101 and the second cool chamber 141, the gate valve 182 is opened. Further, when the semiconductor wafer W is transferred between the second cool chamber 141 and the transfer chamber 170, the gate valve 184 is opened. When the gate valve 182 and the gate valve 184 are closed, the inside of the second cool chamber 141 becomes a closed space.
　チャンバー６に隣接して設置された搬送チャンバー１７０に設けられた搬送ロボット１５０は、鉛直方向に沿った軸を中心に矢印１５０Ｒで示すように旋回可能とされる。搬送ロボット１５０は、複数のアームセグメントからなる２つのリンク機構を有し、それら２つのリンク機構の先端にはそれぞれ半導体ウエハＷを保持する搬送ハンド１５１ａおよび搬送ハンド１５１ｂが設けられている。これらの搬送ハンド１５１ａおよび搬送ハンド１５１ｂは上下に所定のピッチだけ隔てて配置され、リンク機構によってそれぞれ独立して同一水平方向に直線的にスライド移動可能とされている。 The transfer robot 150 provided in the transfer chamber 170 installed adjacent to the chamber 6 is capable of turning around an axis along the vertical direction as shown by an arrow 150R. The transfer robot 150 has two link mechanisms composed of a plurality of arm segments, and a transfer hand 151a and a transfer hand 151b for holding the semiconductor wafer W are provided at the tips of the two link mechanisms, respectively. These transport hands 151a and transport hands 151b are vertically separated by a predetermined pitch, and are independently slidable in the same horizontal direction by a link mechanism.
　また、搬送ロボット１５０は、２つのリンク機構が設けられるベースを昇降移動することによって、所定のピッチだけ離れた状態のまま２つの搬送ハンド１５１ａおよび搬送ハンド１５１ｂを昇降移動させる。 Further, the transfer robot 150 moves the two transfer hands 151a and the transfer hand 151b up and down while keeping them separated by a predetermined pitch by moving the base provided with the two link mechanisms up and down.
　搬送ロボット１５０が第１クールチャンバー１３１、第２クールチャンバー１４１または熱処理装置１６０のチャンバー６を受け渡し相手として半導体ウエハＷの受け渡し（出し入れ）を行う際には、まず、両搬送ハンド１５１ａおよび搬送ハンド１５１ｂが受け渡し相手と対向するように旋回し、その後（または旋回している間に）昇降移動していずれかの搬送ハンドが受け渡し相手と半導体ウエハＷを受け渡しする高さに位置する。そして、搬送ハンド１５１ａ（１５１ｂ）を水平方向に直線的にスライド移動させて受け渡し相手と半導体ウエハＷの受け渡しを行う。 When the transfer robot 150 transfers (puts in and out) the semiconductor wafer W as a transfer partner for the first cool chamber 131, the second cool chamber 141, or the chamber 6 of the heat treatment apparatus 160, first, both transfer hands 151a and transfer hands 151b Turns so as to face the delivery partner, and then moves up and down (or while turning) to be located at a height at which one of the transfer hands delivers the semiconductor wafer W to the delivery partner. Then, the transfer hand 151a (151b) is linearly slid in the horizontal direction to transfer the semiconductor wafer W to the transfer partner.
　搬送ロボット１５０と受渡ロボット１２０との半導体ウエハＷの受け渡しは冷却部１３０および冷却部１４０を介して行うことができる。すなわち、冷却部１３０の第１クールチャンバー１３１および冷却部１４０の第２クールチャンバー１４１は、搬送ロボット１５０と受渡ロボット１２０との間で半導体ウエハＷを受け渡すためのパスとしても機能するものである。具体的には、搬送ロボット１５０または受渡ロボット１２０のうちの一方が第１クールチャンバー１３１または第２クールチャンバー１４１に渡した半導体ウエハＷを他方が受け取ることによって半導体ウエハＷの受け渡しが行われる。搬送ロボット１５０および受渡ロボット１２０によって半導体ウエハＷをキャリアＣから熱処理装置１６０にまで搬送する搬送機構が構成される。 The semiconductor wafer W can be delivered between the transfer robot 150 and the delivery robot 120 via the cooling unit 130 and the cooling unit 140. That is, the first cool chamber 131 of the cooling unit 130 and the second cool chamber 141 of the cooling unit 140 also function as paths for delivering the semiconductor wafer W between the transfer robot 150 and the delivery robot 120. .. Specifically, the semiconductor wafer W is delivered when one of the transfer robot 150 or the delivery robot 120 receives the semiconductor wafer W passed to the first cool chamber 131 or the second cool chamber 141 by the other. The transfer robot 150 and the transfer robot 120 constitute a transfer mechanism for transporting the semiconductor wafer W from the carrier C to the heat treatment apparatus 160.
　上述したように、第１クールチャンバー１３１および第２クールチャンバー１４１とインデクサ部１０１との間にはそれぞれゲートバルブ１８１またはゲートバルブ１８２が設けられている。また、搬送チャンバー１７０と第１クールチャンバー１３１および第２クールチャンバー１４１との間にはそれぞれゲートバルブ１８３またはゲートバルブ１８４が設けられている。さらに、搬送チャンバー１７０と熱処理装置１６０のチャンバー６との間にはゲートバルブ１８５が設けられている。熱処理システム１００内において半導体ウエハＷが搬送される際には、適宜これらのゲートバルブが開閉される。 As described above, a gate valve 181 or a gate valve 182 is provided between the first cool chamber 131 and the second cool chamber 141 and the indexer portion 101, respectively. Further, a gate valve 183 or a gate valve 184 is provided between the transfer chamber 170 and the first cool chamber 131 and the second cool chamber 141, respectively. Further, a gate valve 185 is provided between the transfer chamber 170 and the chamber 6 of the heat treatment apparatus 160. When the semiconductor wafer W is conveyed in the heat treatment system 100, these gate valves are opened and closed as appropriate.
　図３は、本実施の形態に関する熱処理システム１００における熱処理装置１６０の構成を概略的に示す断面図である。 FIG. 3 is a cross-sectional view schematically showing the configuration of the heat treatment apparatus 160 in the heat treatment system 100 according to the present embodiment.
　図３に例が示されるように、熱処理装置１６０は、基板としての円板形状の半導体ウエハＷに対してフラッシュ光照射を行うことによって、その半導体ウエハＷを加熱するフラッシュランプアニール装置である。 As an example is shown in FIG. 3, the heat treatment apparatus 160 is a flash lamp annealing apparatus that heats the semiconductor wafer W by irradiating the disk-shaped semiconductor wafer W as a substrate with flash light.
　処理対象となる半導体ウエハＷのサイズは特に限定されるものではないが、たとえばφ３００ｍｍまたはφ４５０ｍｍである（本実施の形態ではφ３００ｍｍ）。 The size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, φ300 mm or φ450 mm (φ300 mm in the present embodiment).
　熱処理装置１６０は、半導体ウエハＷを収容するチャンバー６と、複数のフラッシュランプＦＬを内蔵するフラッシュ加熱部５と、複数のハロゲンランプＨＬを内蔵するハロゲン加熱部４とを備える。チャンバー６の上側にフラッシュ加熱部５が設けられるとともに、下側にハロゲン加熱部４が設けられている。 The heat treatment apparatus 160 includes a chamber 6 for accommodating the semiconductor wafer W, a flash heating unit 5 containing a plurality of flash lamps FL, and a halogen heating unit 4 containing a plurality of halogen lamps HL. A flash heating unit 5 is provided on the upper side of the chamber 6, and a halogen heating unit 4 is provided on the lower side.
　また、熱処理装置１６０は、チャンバー６の内部に、半導体ウエハＷを水平姿勢に保持する保持部７と、保持部７と装置外部との間で半導体ウエハＷの受け渡しを行う移載機構１０とを備える。 Further, in the heat treatment apparatus 160, a holding portion 7 for holding the semiconductor wafer W in a horizontal posture and a transfer mechanism 10 for transferring the semiconductor wafer W between the holding portion 7 and the outside of the apparatus are provided inside the chamber 6. Be prepared.
　さらに、熱処理装置１６０は、ハロゲン加熱部４、フラッシュ加熱部５およびチャンバー６に設けられた各動作機構を制御して半導体ウエハＷの熱処理を実行させる制御部３を備える。 Further, the heat treatment apparatus 160 includes a control unit 3 that controls each operation mechanism provided in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to execute the heat treatment of the semiconductor wafer W.
　チャンバー６は、筒状のチャンバー側部６１の上下に石英製のチャンバー窓を装着して構成されている。チャンバー側部６１は上下が開口された概略筒形状を有しており、上側開口には上側チャンバー窓６３が装着されて閉塞され、下側開口には下側チャンバー窓６４が装着されて閉塞されている。 The chamber 6 is configured by mounting quartz chamber windows above and below the tubular chamber side portion 61. The chamber side portion 61 has a substantially tubular shape with upper and lower openings, and the upper chamber window 63 is attached to the upper opening and closed, and the lower chamber window 64 is attached to the lower opening and closed. ing.
　チャンバー６の天井部を構成する上側チャンバー窓６３は、石英によって形成された円板形状部材であり、フラッシュ加熱部５から出射されたフラッシュ光をチャンバー６内に透過する石英窓として機能する。 The upper chamber window 63 constituting the ceiling portion of the chamber 6 is a disk-shaped member formed of quartz, and functions as a quartz window that transmits the flash light emitted from the flash heating portion 5 into the chamber 6.
　また、チャンバー６の床部を構成する下側チャンバー窓６４も、石英によって形成された円板形状部材であり、ハロゲン加熱部４からの光をチャンバー６内に透過する石英窓として機能する。 Further, the lower chamber window 64 constituting the floor portion of the chamber 6 is also a disk-shaped member formed of quartz, and functions as a quartz window that transmits light from the halogen heating portion 4 into the chamber 6.
　また、チャンバー側部６１の内側の壁面の上部には反射リング６８が装着され、下部には反射リング６９が装着されている。反射リング６８および反射リング６９は、ともに円環状に形成されている。 Further, a reflective ring 68 is attached to the upper part of the inner wall surface of the chamber side portion 61, and a reflective ring 69 is attached to the lower part. Both the reflection ring 68 and the reflection ring 69 are formed in an annular shape.
　上側の反射リング６８は、チャンバー側部６１の上側から嵌め込むことによって装着される。一方、下側の反射リング６９は、チャンバー側部６１の下側から嵌め込んで図示省略のビスで留めることによって装着される。すなわち、反射リング６８および反射リング６９は、ともに着脱自在にチャンバー側部６１に装着されるものである。 The upper reflective ring 68 is attached by fitting from the upper side of the chamber side portion 61. On the other hand, the lower reflective ring 69 is attached by fitting it from the lower side of the chamber side portion 61 and fastening it with a screw (not shown). That is, both the reflection ring 68 and the reflection ring 69 are detachably attached to the chamber side portion 61.
　チャンバー６の内側空間、すなわち上側チャンバー窓６３、下側チャンバー窓６４、チャンバー側部６１、反射リング６８および反射リング６９によって囲まれる空間が熱処理空間６５として規定される。 The inner space of the chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side 61, the reflection ring 68 and the reflection ring 69 is defined as the heat treatment space 65.
　チャンバー側部６１に反射リング６８および反射リング６９が装着されることによって、チャンバー６の内壁面に凹部６２が形成される。すなわち、チャンバー側部６１の内壁面のうち反射リング６８および反射リング６９が装着されていない中央部分と、反射リング６８の下端面と、反射リング６９の上端面とで囲まれた凹部６２が形成される。 By attaching the reflection ring 68 and the reflection ring 69 to the chamber side portion 61, a recess 62 is formed on the inner wall surface of the chamber 6. That is, a recess 62 is formed on the inner wall surface of the chamber side portion 61, which is surrounded by the central portion where the reflection ring 68 and the reflection ring 69 are not mounted, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69. Will be done.
　凹部６２は、チャンバー６の内壁面に水平方向に沿って円環状に形成され、半導体ウエハＷを保持する保持部７を囲繞する。チャンバー側部６１および反射リング６８および反射リング６９は、強度と耐熱性に優れた金属材料（たとえば、ステンレススチール）で形成されている。 The recess 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W. The chamber side 61, the reflective ring 68, and the reflective ring 69 are made of a metal material (for example, stainless steel) having excellent strength and heat resistance.
　また、チャンバー側部６１には、チャンバー６に対して半導体ウエハＷの搬入および搬出を行うための搬送開口部（炉口）６６が形設されている。搬送開口部６６は、ゲートバルブ１８５によって開閉可能とされている。搬送開口部６６は、凹部６２の外周面に連通接続されている。 Further, the chamber side portion 61 is provided with a transport opening (furnace port) 66 for loading and unloading the semiconductor wafer W into and out of the chamber 6. The transport opening 66 can be opened and closed by a gate valve 185. The transport opening 66 is communicated with the outer peripheral surface of the recess 62.
　このため、ゲートバルブ１８５が搬送開口部６６を開放しているときには、搬送開口部６６から凹部６２を通過して熱処理空間６５への半導体ウエハＷの搬入および熱処理空間６５からの半導体ウエハＷの搬出を行うことができる。また、ゲートバルブ１８５が搬送開口部６６を閉鎖するとチャンバー６内の熱処理空間６５が密閉空間とされる。 Therefore, when the gate valve 185 opens the transport opening 66, the semiconductor wafer W is carried in from the transport opening 66 through the recess 62 into the heat treatment space 65 and the semiconductor wafer W is carried out from the heat treatment space 65. It can be performed. Further, when the gate valve 185 closes the transport opening 66, the heat treatment space 65 in the chamber 6 becomes a closed space.
　さらに、チャンバー側部６１には、貫通孔６１ａおよび貫通孔６１ｂが穿設されている。貫通孔６１ａは、後述するサセプタ７４に保持された半導体ウエハＷの上面から放射された赤外光を上部放射温度計２５の量子型赤外線センサー２９に導くための円筒状の孔である。一方、貫通孔６１ｂは、半導体ウエハＷの下面から放射された赤外光を下部放射温度計２０の熱型赤外線センサー２４に導くための円筒状の孔である。貫通孔６１ａおよび貫通孔６１ｂは、それらの貫通方向の軸がサセプタ７４に保持された半導体ウエハＷの主面と交わるように、水平方向に対して傾斜して設けられている。 Further, a through hole 61a and a through hole 61b are bored in the chamber side portion 61. The through hole 61a is a cylindrical hole for guiding the infrared light emitted from the upper surface of the semiconductor wafer W held by the susceptor 74, which will be described later, to the quantum infrared sensor 29 of the upper radiation thermometer 25. On the other hand, the through hole 61b is a cylindrical hole for guiding the infrared light emitted from the lower surface of the semiconductor wafer W to the thermal infrared sensor 24 of the lower radiation thermometer 20. The through hole 61a and the through hole 61b are provided so as to be inclined with respect to the horizontal direction so that their axes in the through direction intersect with the main surface of the semiconductor wafer W held by the susceptor 74.
　量子型赤外線センサー２９は、光電変換効果によって、赤外線のフォトンエネルギーを直接電気信号に変換する素子である。量子型赤外線センサー２９は、たとえば、３～５μｍの感度波長を有する光導電ＩｎＳｂセンサーであるが、他の量子型赤外線センサー（不純物型赤外線センサー、または、光起電力型赤外線センサーなど）であってもよい。 The quantum infrared sensor 29 is an element that directly converts infrared photon energy into an electric signal by a photoelectric conversion effect. The quantum infrared sensor 29 is, for example, a photoconductive InSb sensor having a sensitivity wavelength of 3 to 5 μm, but is another quantum infrared sensor (such as an impurity infrared sensor or a photovoltaic infrared sensor). May be good.
　また、熱型赤外線センサー２４は、吸収した赤外線のエネルギーを熱に変換し、熱の変化を信号として検知する素子である。熱型赤外線センサー２４は、たとえば、焦電効果を利用する焦電センサー、ゼーベック効果を利用するサーモパイル、または、熱による半導体の抵抗変化を利用するボロメータなどである。また、下部放射温度計２０に用いられる赤外線センサーは、量子型赤外線センサーに置き換えられてもよい。 Further, the thermal infrared sensor 24 is an element that converts the absorbed infrared energy into heat and detects the change in heat as a signal. The thermal infrared sensor 24 is, for example, a pyroelectric sensor that utilizes a pyroelectric effect, a thermopile that utilizes the Seebeck effect, or a bolometer that utilizes a change in resistance of a semiconductor due to heat. Further, the infrared sensor used in the lower radiation thermometer 20 may be replaced with a quantum infrared sensor.
　貫通孔６１ａの熱処理空間６５に臨む側の端部には、上部放射温度計２５が測定可能な波長領域の赤外光を透過させるフッ化カルシウム材料からなる透明窓２６が装着されている。また、貫通孔６１ｂの熱処理空間６５に臨む側の端部には、下部放射温度計２０が測定可能な波長領域の赤外光を透過させるフッ化バリウム材料からなる透明窓２１が装着されている。 A transparent window 26 made of a calcium fluoride material that transmits infrared light in a wavelength region that can be measured by the upper radiation thermometer 25 is attached to the end of the through hole 61a on the side facing the heat treatment space 65. Further, a transparent window 21 made of a barium fluoride material that transmits infrared light in a wavelength region that can be measured by the lower radiation thermometer 20 is attached to the end of the through hole 61b on the side facing the heat treatment space 65. ..
　また、チャンバー６の内壁上部には熱処理空間６５に処理ガスを供給するガス供給孔８１が形設されている。ガス供給孔８１は、凹部６２よりも上側位置に形設されており、反射リング６８に設けられていてもよい。ガス供給孔８１はチャンバー６の側壁内部に円環状に形成された緩衝空間８２を介してガス供給管８３に連通接続されている。 Further, a gas supply hole 81 for supplying the processing gas to the heat treatment space 65 is formed in the upper part of the inner wall of the chamber 6. The gas supply hole 81 is formed at a position above the recess 62, and may be provided in the reflection ring 68. The gas supply hole 81 is communicated with the gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the side wall of the chamber 6.
　ガス供給管８３は処理ガス供給源８５に接続されている。また、ガス供給管８３の経路途中にはバルブ８４が介挿されている。バルブ８４が開放されると、処理ガス供給源８５から緩衝空間８２に処理ガスが送給される。 The gas supply pipe 83 is connected to the processing gas supply source 85. Further, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82.
　緩衝空間８２に流入した処理ガスは、ガス供給孔８１よりも流体抵抗の小さい緩衝空間８２内を拡がるように流れてガス供給孔８１から熱処理空間６５内へと供給される。処理ガスとしては、たとえば窒素（Ｎ２）等の不活性ガス、または、水素（Ｈ２）、アンモニア（ＮＨ３）等の反応性ガス、或いはそれらを混合した混合ガスを用いることができる（本実施の形態では窒素ガス）。 The processing gas that has flowed into the buffer space 82 flows so as to expand in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81, and is supplied from the gas supply hole 81 into the heat treatment space 65. As the treatment gas, for example , an inert gas such as nitrogen (N 2 ), a reactive gas such as hydrogen (H 2 ) or ammonia (NH 3 ), or a mixed gas in which they are mixed can be used (this). Nitrogen gas in the embodiment).
　一方、チャンバー６の内壁下部には熱処理空間６５内の気体を排気するガス排気孔８６が形設されている。ガス排気孔８６は、凹部６２よりも下側位置に形設されており、反射リング６９に設けられていてもよい。ガス排気孔８６はチャンバー６の側壁内部に円環状に形成された緩衝空間８７を介してガス排気管８８に連通接続されている。ガス排気管８８は排気部１９０に接続されている。また、ガス排気管８８の経路途中にはバルブ８９が介挿されている。バルブ８９が開放されると、熱処理空間６５の気体がガス排気孔８６から緩衝空間８７を経てガス排気管８８へと排出される。 On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower part of the inner wall of the chamber 6. The gas exhaust hole 86 is formed at a position below the recess 62, and may be provided in the reflection ring 69. The gas exhaust hole 86 is communicatively connected to the gas exhaust pipe 88 via a buffer space 87 formed in an annular shape inside the side wall of the chamber 6. The gas exhaust pipe 88 is connected to the exhaust unit 190. Further, a valve 89 is inserted in the middle of the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 to the gas exhaust pipe 88 via the buffer space 87.
　なお、ガス供給孔８１およびガス排気孔８６は、チャンバー６の周方向に沿って複数設けられていてもよいし、スリット状のものであってもよい。また、処理ガス供給源８５および排気部１９０は、熱処理装置１６０に設けられた機構であってもよいし、熱処理装置１６０が設置される工場のユーティリティであってもよい。 A plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6, or may be slit-shaped. Further, the processing gas supply source 85 and the exhaust unit 190 may be a mechanism provided in the heat treatment apparatus 160, or may be a utility of a factory in which the heat treatment apparatus 160 is installed.
　また、搬送開口部６６の先端にも熱処理空間６５内の気体を排出するガス排気管１９１が接続されている。ガス排気管１９１はバルブ１９２を介して排気部１９０に接続されている。バルブ１９２を開放することによって、搬送開口部６６を介してチャンバー６内の気体が排気される。 Further, a gas exhaust pipe 191 for discharging the gas in the heat treatment space 65 is also connected to the tip of the transport opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.
　図４は、保持部７の全体外観を示す斜視図である。保持部７は、基台リング７１、連結部７２およびサセプタ７４を備えて構成される。基台リング７１、連結部７２およびサセプタ７４はいずれも石英で形成されている。すなわち、保持部７の全体が石英で形成されている。 FIG. 4 is a perspective view showing the overall appearance of the holding portion 7. The holding portion 7 includes a base ring 71, a connecting portion 72, and a susceptor 74. The base ring 71, the connecting portion 72 and the susceptor 74 are all made of quartz. That is, the entire holding portion 7 is made of quartz.
　基台リング７１は、円環形状から一部が欠落した円弧形状の石英部材である。この欠落部分は、後述する移載機構１０の移載アーム１１と基台リング７１との干渉を防ぐために設けられている。基台リング７１は凹部６２の底面に載置されることによって、チャンバー６の壁面に支持されることとなる（図３を参照）。基台リング７１の上面に、その円環形状の周方向に沿って複数の連結部７２（本実施の形態では４個）が立設される。連結部７２も石英の部材であり、溶接によって基台リング７１に固着される。 The base ring 71 is an arc-shaped quartz member in which a part is missing from the ring shape. This missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described later and the base ring 71. By placing the base ring 71 on the bottom surface of the recess 62, the base ring 71 is supported on the wall surface of the chamber 6 (see FIG. 3). A plurality of connecting portions 72 (four in the present embodiment) are erected on the upper surface of the base ring 71 along the circumferential direction of the ring shape. The connecting portion 72 is also a quartz member, and is fixed to the base ring 71 by welding.
　サセプタ７４は基台リング７１に設けられた４個の連結部７２によって支持される。図５は、サセプタ７４の平面図である。また、図６は、サセプタ７４の断面図である。 The susceptor 74 is supported by four connecting portions 72 provided on the base ring 71. FIG. 5 is a plan view of the susceptor 74. Further, FIG. 6 is a cross-sectional view of the susceptor 74.
　サセプタ７４は、保持プレート７５、ガイドリング７６および複数の基板支持ピン７７を備える。保持プレート７５は、石英で形成された略円形の平板状部材である。保持プレート７５の直径は、半導体ウエハＷの直径よりも大きい。すなわち、保持プレート７５は、半導体ウエハＷよりも大きな平面サイズを有する。 The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a plane size larger than that of the semiconductor wafer W.
　保持プレート７５の上面周縁部には、ガイドリング７６が設置されている。ガイドリング７６は、半導体ウエハＷの直径よりも大きな内径を有する円環形状の部材である。たとえば、半導体ウエハＷの直径がφ３００ｍｍの場合、ガイドリング７６の内径はφ３２０ｍｍである。 A guide ring 76 is installed on the upper peripheral edge of the holding plate 75. The guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm.
　ガイドリング７６の内周は、保持プレート７５から上方に向けて広くなるようなテーパ面とされている。ガイドリング７６は、保持プレート７５と同様の石英で形成される。 The inner circumference of the guide ring 76 is a tapered surface that widens upward from the holding plate 75. The guide ring 76 is made of quartz similar to the holding plate 75.
　ガイドリング７６は、保持プレート７５の上面に溶着するようにしてもよいし、別途加工したピンなどによって保持プレート７５に固定するようにしてもよい。或いは、保持プレート７５とガイドリング７６とを一体の部材として加工するようにしてもよい。 The guide ring 76 may be welded to the upper surface of the holding plate 75, or may be fixed to the holding plate 75 by a separately processed pin or the like. Alternatively, the holding plate 75 and the guide ring 76 may be processed as an integral member.
　保持プレート７５の上面のうちガイドリング７６よりも内側の領域が半導体ウエハＷを保持する平面状の保持面７５ａとされる。保持プレート７５の保持面７５ａには、複数の基板支持ピン７７が立設されている。本実施の形態においては、保持面７５ａの外周円（ガイドリング７６の内周円）と同心円の周上に沿って３０°毎に合計１２個の基板支持ピン７７が立設されている。 The region inside the guide ring 76 on the upper surface of the holding plate 75 is a flat holding surface 75a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In the present embodiment, a total of 12 substrate support pins 77 are erected at every 30 ° along the circumference of the outer circumference circle (inner circumference circle of the guide ring 76) of the holding surface 75a and the concentric circles.
　１２個の基板支持ピン７７を配置した円の径（対向する基板支持ピン７７間の距離）は半導体ウエハＷの径よりも小さく、半導体ウエハＷの径がφ３００ｍｍであればφ２７０ｍｍ～φ２８０ｍｍ（本実施の形態ではφ２７０ｍｍ）である。それぞれの基板支持ピン７７は石英で形成されている。 The diameter of the circle in which the 12 substrate support pins 77 are arranged (distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W, and if the diameter of the semiconductor wafer W is φ300 mm, the diameter is φ270 mm to φ280 mm (this implementation). In the form of, φ270 mm). Each substrate support pin 77 is made of quartz.
　複数の基板支持ピン７７は、保持プレート７５の上面に溶接によって設けるようにしてもよいし、保持プレート７５と一体に加工するようにしてもよい。 The plurality of substrate support pins 77 may be provided on the upper surface of the holding plate 75 by welding, or may be processed integrally with the holding plate 75.
　図４に戻り、基台リング７１に立設された４個の連結部７２とサセプタ７４の保持プレート７５の周縁部とが溶接によって固着される。すなわち、サセプタ７４と基台リング７１とは連結部７２によって固定的に連結されている。このような保持部７の基台リング７１がチャンバー６の壁面に支持されることによって、保持部７がチャンバー６に装着される。保持部７がチャンバー６に装着された状態においては、サセプタ７４の保持プレート７５は水平姿勢（法線が鉛直方向と一致する姿勢）となる。すなわち、保持プレート７５の保持面７５ａは水平面となる。 Returning to FIG. 4, the four connecting portions 72 erected on the base ring 71 and the peripheral edge portion of the holding plate 75 of the susceptor 74 are fixed by welding. That is, the susceptor 74 and the base ring 71 are fixedly connected by the connecting portion 72. The base ring 71 of the holding portion 7 is supported on the wall surface of the chamber 6, so that the holding portion 7 is mounted on the chamber 6. When the holding portion 7 is mounted on the chamber 6, the holding plate 75 of the susceptor 74 is in a horizontal posture (a posture in which the normal line coincides with the vertical direction). That is, the holding surface 75a of the holding plate 75 is a horizontal plane.
　チャンバー６に搬入された半導体ウエハＷは、チャンバー６に装着された保持部７のサセプタ７４の上に水平姿勢で載置されて保持される。このとき、半導体ウエハＷは保持プレート７５上に立設された１２個の基板支持ピン７７によって支持されてサセプタ７４に保持される。より厳密には、１２個の基板支持ピン７７の上端部が半導体ウエハＷの下面に接触して当該半導体ウエハＷを支持する。 The semiconductor wafer W carried into the chamber 6 is placed and held in a horizontal posture on the susceptor 74 of the holding portion 7 mounted on the chamber 6. At this time, the semiconductor wafer W is supported by the twelve substrate support pins 77 erected on the holding plate 75 and held by the susceptor 74. More precisely, the upper ends of the 12 substrate support pins 77 come into contact with the lower surface of the semiconductor wafer W to support the semiconductor wafer W.
　１２個の基板支持ピン７７の高さ（基板支持ピン７７の上端から保持プレート７５の保持面７５ａまでの距離）は均一であるため、１２個の基板支持ピン７７によって半導体ウエハＷを水平姿勢に支持することができる。 Since the heights of the 12 substrate support pins 77 (distance from the upper end of the substrate support pins 77 to the holding surface 75a of the holding plate 75) are uniform, the semiconductor wafer W is placed in a horizontal position by the 12 substrate support pins 77. Can be supported.
　また、半導体ウエハＷは複数の基板支持ピン７７によって保持プレート７５の保持面７５ａから所定の間隔を隔てて支持されることとなる。基板支持ピン７７の高さよりもガイドリング７６の厚さの方が大きい。従って、複数の基板支持ピン７７によって支持された半導体ウエハＷの水平方向の位置ずれはガイドリング７６によって防止される。 Further, the semiconductor wafer W is supported by a plurality of substrate support pins 77 from the holding surface 75a of the holding plate 75 at a predetermined interval. The thickness of the guide ring 76 is larger than the height of the substrate support pin 77. Therefore, the horizontal misalignment of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76.
　また、図４および図５に示されるように、サセプタ７４の保持プレート７５には、上下に貫通して開口部７８が形成されている。開口部７８は、下部放射温度計２０が半導体ウエハＷの下面から放射される放射光（赤外光）を受光するために設けられている。すなわち、下部放射温度計２０が開口部７８およびチャンバー側部６１の貫通孔６１ｂに装着された透明窓２１を介して半導体ウエハＷの下面から放射された光を受光して当該半導体ウエハＷの温度を測定する。 Further, as shown in FIGS. 4 and 5, the holding plate 75 of the susceptor 74 is formed with an opening 78 that penetrates vertically. The opening 78 is provided so that the lower radiation thermometer 20 receives the synchrotron radiation (infrared light) radiated from the lower surface of the semiconductor wafer W. That is, the lower radiation thermometer 20 receives the light radiated from the lower surface of the semiconductor wafer W through the transparent window 21 mounted in the opening 78 and the through hole 61b of the chamber side portion 61, and the temperature of the semiconductor wafer W. To measure.
　さらに、サセプタ７４の保持プレート７５には、後述する移載機構１０のリフトピン１２が半導体ウエハＷの受け渡しのために貫通する４個の貫通孔７９が穿設されている。 Further, the holding plate 75 of the susceptor 74 is provided with four through holes 79 through which the lift pin 12 of the transfer mechanism 10 described later penetrates for delivery of the semiconductor wafer W.
　図７は、移載機構１０の平面図である。また、図８は、移載機構１０の側面図である。移載機構１０は、２本の移載アーム１１を備える。移載アーム１１は、概ね円環状の凹部６２に沿うような円弧形状とされている。 FIG. 7 is a plan view of the transfer mechanism 10. Further, FIG. 8 is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arm 11 has an arc shape that generally follows the annular recess 62.
　それぞれの移載アーム１１には２本のリフトピン１２が立設されている。移載アーム１１およびリフトピン１２は石英で形成されている。各移載アーム１１は水平移動機構１３によって回動可能とされている。水平移動機構１３は、一対の移載アーム１１を保持部７に対して半導体ウエハＷの移載を行う移載動作位置（図７の実線位置）と保持部７に保持された半導体ウエハＷと平面視で重ならない退避位置（図７の二点鎖線位置）との間で水平移動させる。 Two lift pins 12 are erected on each transfer arm 11. The transfer arm 11 and the lift pin 12 are made of quartz. Each transfer arm 11 is rotatable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 has a transfer operation position (solid line position in FIG. 7) for transferring the semiconductor wafer W to the holding portion 7 and the semiconductor wafer W held by the holding portion 7. It is horizontally moved to and from the retracted position (two-point chain line position in FIG. 7) that does not overlap in a plan view.
　水平移動機構１３としては、個別のモータによって各移載アーム１１をそれぞれ回動させるものであってもよいし、リンク機構を用いて１個のモータによって一対の移載アーム１１を連動させて回動させるものであってもよい。 The horizontal movement mechanism 13 may be one in which each transfer arm 11 is rotated by an individual motor, or a pair of transfer arms 11 are interlocked and rotated by one motor using a link mechanism. It may be something to move.
　また、一対の移載アーム１１は、昇降機構１４によって水平移動機構１３とともに昇降移動される。昇降機構１４が一対の移載アーム１１を移載動作位置において上昇させると、合計４本のリフトピン１２がサセプタ７４に穿設された貫通孔７９（図４および図５参照）を通過し、リフトピン１２の上端がサセプタ７４の上面から突き出る。一方、昇降機構１４が一対の移載アーム１１を移載動作位置において下降させてリフトピン１２を貫通孔７９から抜き取り、水平移動機構１３が一対の移載アーム１１を開くように移動させると各移載アーム１１が退避位置に移動する。 Further, the pair of transfer arms 11 are moved up and down together with the horizontal movement mechanism 13 by the elevating mechanism 14. When the elevating mechanism 14 raises the pair of transfer arms 11 at the transfer operation position, a total of four lift pins 12 pass through the through holes 79 (see FIGS. 4 and 5) formed in the susceptor 74, and the lift pins The upper end of 12 protrudes from the upper surface of the susceptor 74. On the other hand, when the evacuation mechanism 14 lowers the pair of transfer arms 11 at the transfer operation position, the lift pin 12 is pulled out from the through hole 79, and the horizontal movement mechanism 13 moves the pair of transfer arms 11 so as to open each transfer. The mounting arm 11 moves to the retracted position.
　一対の移載アーム１１の退避位置は、保持部７の基台リング７１の直上である。基台リング７１は凹部６２の底面に載置されているため、移載アーム１１の退避位置は凹部６２の内側となる。なお、移載機構１０の駆動部（水平移動機構１３および昇降機構１４）が設けられている部位の近傍にも図示省略の排気機構が設けられており、移載機構１０の駆動部周辺の雰囲気がチャンバー６の外部に排出されるように構成されている。 The retracted position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. Since the base ring 71 is placed on the bottom surface of the recess 62, the retracted position of the transfer arm 11 is inside the recess 62. An exhaust mechanism (not shown) is also provided in the vicinity of the portion where the drive unit (horizontal movement mechanism 13 and elevating mechanism 14) of the transfer mechanism 10 is provided, and the atmosphere around the drive unit of the transfer mechanism 10 is provided. Is configured to be discharged to the outside of the chamber 6.
　図３に戻り、チャンバー６の上方に設けられたフラッシュ加熱部５は、筐体５１の内側に、複数本（本実施の形態では３０本）のフラッシュランプＦＬからなる光源と、その光源の上方を覆うように設けられたリフレクタ５２とを備えて構成される。 Returning to FIG. 3, the flash heating unit 5 provided above the chamber 6 has a light source composed of a plurality of (30 in this embodiment) flash lamp FL inside the housing 51, and above the light source. It is configured to include a reflector 52 provided so as to cover the above.
　また、フラッシュ加熱部５の筐体５１の底部にはランプ光放射窓５３が装着されている。フラッシュ加熱部５の床部を構成するランプ光放射窓５３は、石英によって形成された板状の石英窓である。フラッシュ加熱部５がチャンバー６の上方に設置されることにより、ランプ光放射窓５３が上側チャンバー窓６３と相対向することとなる。 Further, a lamp light radiating window 53 is attached to the bottom of the housing 51 of the flash heating unit 5. The lamp light emitting window 53 constituting the floor portion of the flash heating unit 5 is a plate-shaped quartz window formed of quartz. By installing the flash heating unit 5 above the chamber 6, the lamp light emitting window 53 faces the upper chamber window 63.
　フラッシュランプＦＬはチャンバー６の上方からランプ光放射窓５３および上側チャンバー窓６３を介して熱処理空間６５にフラッシュ光を照射する。 The flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the lamp light emitting window 53 and the upper chamber window 63.
　複数のフラッシュランプＦＬは、それぞれが長尺の円筒形状を有する棒状ランプであり、それぞれの長手方向が保持部７に保持される半導体ウエハＷの主面に沿って（つまり水平方向に沿って）互いに平行となるように平面状に配列されている。よって、フラッシュランプＦＬの配列によって形成される平面も水平面である。 Each of the plurality of flash lamps FL is a rod-shaped lamp having a long cylindrical shape, and the longitudinal direction thereof is along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamp FL is also a horizontal plane.
　フラッシュランプＦＬは、その内部にキセノンガスが封入されその両端部にコンデンサーに接続された陽極および陰極が配設された棒状のガラス管（放電管）と、該ガラス管の外周面上に付設されたトリガー電極とを備える。 The flash lamp FL is provided on a rod-shaped glass tube (discharge tube) in which xenon gas is sealed inside and an anode and a cathode connected to a condenser are arranged at both ends thereof, and on the outer peripheral surface of the glass tube. It is equipped with a trigger electrode.
　キセノンガスは電気的には絶縁体であることから、コンデンサーに電荷が蓄積されていたとしても通常の状態ではガラス管内に電気は流れない。しかしながら、トリガー電極に高電圧を印加して絶縁を破壊した場合には、コンデンサーに蓄えられた電気がガラス管内に瞬時に流れ、そのときのキセノンの原子あるいは分子の励起によって光が放出される。 Since xenon gas is electrically an insulator, electricity does not flow in the glass tube under normal conditions even if electric charges are accumulated in the condenser. However, when a high voltage is applied to the trigger electrode to break the insulation, the electricity stored in the capacitor instantly flows into the glass tube, and light is emitted by the excitation of xenon atoms or molecules at that time.
　このようなフラッシュランプＦＬにおいては、予めコンデンサーに蓄えられていた静電エネルギーが０．１ミリセカンドないし１００ミリセカンドという極めて短い光パルスに変換されることから、ハロゲンランプＨＬの如き連続点灯の光源に比べて極めて強い光を照射し得るという特徴を有する。すなわち、フラッシュランプＦＬは、１秒未満の極めて短い時間で瞬間的に発光するパルス発光ランプである。なお、フラッシュランプＦＬの発光時間は、フラッシュランプＦＬに電力供給を行うランプ電源のコイル定数によって調整することができる。 In such a flash lamp FL, the electrostatic energy stored in the capacitor in advance is converted into an extremely short optical pulse of 0.1 millisecond to 100 millisecond, so that a light source of continuous lighting such as a halogen lamp HL is used. It has the feature that it can irradiate extremely strong light. That is, the flash lamp FL is a pulse light emitting lamp that instantaneously emits light in an extremely short time of less than 1 second. The light emission time of the flash lamp FL can be adjusted by the coil constant of the lamp power supply that supplies power to the flash lamp FL.
　なお、フラッシュランプＦＬの発光強度となる静電エネルギーは、コンデンサーに蓄えられる充電電圧によって変更することができる。また、フラッシュランプＦＬの発光時間は、パルス波形の設定によって変更することができる。 The electrostatic energy, which is the emission intensity of the flash lamp FL, can be changed by the charging voltage stored in the capacitor. Further, the light emission time of the flash lamp FL can be changed by setting the pulse waveform.
　また、リフレクタ５２は、複数のフラッシュランプＦＬの上方にそれら全体を覆うように設けられている。リフレクタ５２の基本的な機能は、複数のフラッシュランプＦＬから出射されたフラッシュ光を熱処理空間６５の側に反射するというものである。リフレクタ５２はアルミニウム合金板で形成されており、その表面（フラッシュランプＦＬに臨む側の面、すなわち、上面）はブラスト処理により粗面化加工が施されている。 Further, the reflector 52 is provided above the plurality of flash lamps FL so as to cover all of them. The basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is made of an aluminum alloy plate, and its surface (the surface facing the flash lamp FL, that is, the upper surface) is roughened by blasting.
　チャンバー６の下方に設けられたハロゲン加熱部４は、筐体４１の内側に複数本（本実施の形態では４０本）のハロゲンランプＨＬを内蔵している。ハロゲン加熱部４は、複数のハロゲンランプＨＬによってチャンバー６の下方から下側チャンバー窓６４を介して熱処理空間６５への光照射を行って半導体ウエハＷを加熱する。 The halogen heating unit 4 provided below the chamber 6 contains a plurality of halogen lamps HL (40 in this embodiment) inside the housing 41. The halogen heating unit 4 heats the semiconductor wafer W by irradiating the heat treatment space 65 with light from below the chamber 6 through the lower chamber window 64 by a plurality of halogen lamps HL.
　図９は、複数のハロゲンランプＨＬの配置を示す平面図である。４０本のハロゲンランプＨＬは上下２段に分けて配置されている。保持部７に近い上段に２０本のハロゲンランプＨＬが配設されるとともに、上段よりも保持部７から遠い下段にも２０本のハロゲンランプＨＬが配設されている。 FIG. 9 is a plan view showing the arrangement of a plurality of halogen lamps HL. The 40 halogen lamps HL are arranged in two upper and lower stages. Twenty halogen lamps HL are arranged in the upper stage near the holding portion 7, and 20 halogen lamps HL are also arranged in the lower stage farther from the holding portion 7 than in the upper stage.
　各ハロゲンランプＨＬは、長尺の円筒形状を有する棒状ランプである。上段、下段ともに２０本のハロゲンランプＨＬは、それぞれの長手方向が保持部７に保持される半導体ウエハＷの主面に沿って（つまり水平方向に沿って）互いに平行となるように配列されている。よって、上段、下段ともにハロゲンランプＨＬの配列によって形成される平面は水平面である。 Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. The 20 halogen lamps HL in both the upper and lower stages are arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, along the horizontal direction). There is. Therefore, the plane formed by the arrangement of the halogen lamps HL in both the upper and lower stages is a horizontal plane.
　また、図９に示されるように、上段、下段ともに保持部７に保持される半導体ウエハＷの中央部に対向する領域よりも周縁部に対向する領域におけるハロゲンランプＨＬの配設密度が高くなっている。すなわち、上下段ともに、ランプ配列の中央部よりも周縁部の方がハロゲンランプＨＬの配設ピッチが短い。このため、ハロゲン加熱部４からの光照射による加熱時に温度低下が生じやすい半導体ウエハＷの周縁部により多い光量の照射を行うことができる。 Further, as shown in FIG. 9, the arrangement density of the halogen lamp HL in the region facing the peripheral edge portion is higher than the region facing the central portion of the semiconductor wafer W held by the holding portion 7 in both the upper and lower stages. ing. That is, in both the upper and lower stages, the arrangement pitch of the halogen lamp HL is shorter in the peripheral portion than in the central portion of the lamp arrangement. Therefore, it is possible to irradiate a peripheral portion of the semiconductor wafer W, which tends to have a temperature drop during heating by light irradiation from the halogen heating unit 4, with a larger amount of light.
　また、上段のハロゲンランプＨＬからなるランプ群と下段のハロゲンランプＨＬからなるランプ群とが格子状に交差するように配列されている。すなわち、上段に配置された２０本のハロゲンランプＨＬの長手方向と下段に配置された２０本のハロゲンランプＨＬの長手方向とが互いに直交するように合計４０本のハロゲンランプＨＬが配設されている。 Further, the lamp group consisting of the upper halogen lamp HL and the lamp group consisting of the lower halogen lamp HL are arranged so as to intersect in a grid pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal direction of the 20 halogen lamps HL arranged in the upper stage and the longitudinal direction of the 20 halogen lamps HL arranged in the lower stage are orthogonal to each other. There is.
　ハロゲンランプＨＬは、ガラス管内部に配設されたフィラメントに通電することでフィラメントを白熱化させて発光させるフィラメント方式の光源である。ガラス管の内部には、窒素やアルゴン等の不活性ガスにハロゲン元素（ヨウ素、臭素等）を微量導入した気体が封入されている。ハロゲン元素を導入することによって、フィラメントの折損を抑制しつつフィラメントの温度を高温に設定することが可能となる。 The halogen lamp HL is a filament type light source that incandescents the filament and emits light by energizing the filament arranged inside the glass tube. Inside the glass tube, a gas in which a small amount of a halogen element (iodine, bromine, etc.) is introduced into an inert gas such as nitrogen or argon is sealed. By introducing the halogen element, it becomes possible to set the temperature of the filament to a high temperature while suppressing the breakage of the filament.
　したがって、ハロゲンランプＨＬは、通常の白熱電球に比べて寿命が長くかつ強い光を連続的に照射できるという特性を有する。すなわち、ハロゲンランプＨＬは少なくとも１秒以上連続して発光する連続点灯ランプである。また、ハロゲンランプＨＬは棒状ランプであるため長寿命であり、ハロゲンランプＨＬを水平方向に沿わせて配置することにより上方の半導体ウエハＷへの放射効率が優れたものとなる。 Therefore, the halogen lamp HL has a characteristic that it has a longer life and can continuously irradiate strong light as compared with a normal incandescent lamp. That is, the halogen lamp HL is a continuously lit lamp that continuously emits light for at least 1 second or longer. Further, since the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL along the horizontal direction, the radiation efficiency to the upper semiconductor wafer W becomes excellent.
　また、ハロゲン加熱部４の筐体４１内にも、２段のハロゲンランプＨＬの下側にリフレクタ４３が設けられている（図３）。リフレクタ４３は、複数のハロゲンランプＨＬから出射された光を熱処理空間６５の側に反射する。 Further, a reflector 43 is provided under the two-stage halogen lamp HL in the housing 41 of the halogen heating unit 4 (FIG. 3). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65.
　図３に示されるように、チャンバー６には、上部放射温度計２５および下部放射温度計２０の２つの放射温度計（本実施の形態ではパイロメーター）が設けられている。上部放射温度計２５はサセプタ７４に保持された半導体ウエハＷの斜め上方に設置されるとともに、下部放射温度計２０はサセプタ７４に保持された半導体ウエハＷの斜め下方に設けられている。 As shown in FIG. 3, the chamber 6 is provided with two radiation thermometers (pyrometer in the present embodiment), an upper radiation thermometer 25 and a lower radiation thermometer 20. The upper radiation thermometer 25 is installed diagonally above the semiconductor wafer W held by the susceptor 74, and the lower radiation thermometer 20 is installed diagonally below the semiconductor wafer W held by the susceptor 74.
　図１０は、下部放射温度計２０とサセプタ７４に保持された半導体ウエハＷとの位置関係を示す図である。 FIG. 10 is a diagram showing the positional relationship between the lower radiation thermometer 20 and the semiconductor wafer W held by the susceptor 74.
　下部放射温度計２０の熱型赤外線センサー２４の半導体ウエハＷに対する受光角θは６０°以上８９°以下である。受光角θは、下部放射温度計２０の熱型赤外線センサー２４の光軸と半導体ウエハＷの法線（主面に対して垂直な線）とのなす角度である。また、同様に、上部放射温度計２５の量子型赤外線センサー２９の半導体ウエハＷに対する受光角θも６０°以上８９°以下である。なお、下部放射温度計２０の熱型赤外線センサー２４の半導体ウエハＷに対する受光角と、上部放射温度計２５の量子型赤外線センサー２９の半導体ウエハＷに対する受光角とは、等しい角度でなくともよい。 The light receiving angle θ of the thermal infrared sensor 24 of the lower radiation thermometer 20 with respect to the semiconductor wafer W is 60 ° or more and 89 ° or less. The light receiving angle θ is an angle formed by the optical axis of the thermal infrared sensor 24 of the lower radiation thermometer 20 and the normal line (a line perpendicular to the main surface) of the semiconductor wafer W. Similarly, the light receiving angle θ of the quantum infrared sensor 29 of the upper radiation thermometer 25 with respect to the semiconductor wafer W is also 60 ° or more and 89 ° or less. The light receiving angle of the thermal infrared sensor 24 of the lower radiation thermometer 20 with respect to the semiconductor wafer W and the light receiving angle of the quantum infrared sensor 29 of the upper radiation thermometer 25 with respect to the semiconductor wafer W do not have to be equal.
　制御部３は、熱処理装置１６０に設けられた上記の種々の動作機構を制御する。制御部３のハードウェアとしての構成は一般的なコンピュータと同様である。すなわち、制御部３は、各種演算処理を行う回路であるＣＰＵ、基本プログラムを記憶する読み出し専用のメモリであるＲＯＭ、各種情報を記憶する読み書き自在のメモリであるＲＡＭおよび制御用ソフトウェアやデータなどを記憶しておく磁気ディスクを備えている。制御部３のＣＰＵが所定の処理プログラムを実行することによって熱処理装置１６０における処理が進行する。 The control unit 3 controls the above-mentioned various operating mechanisms provided in the heat treatment apparatus 160. The configuration of the control unit 3 as hardware is the same as that of a general computer. That is, the control unit 3 stores a CPU, which is a circuit that performs various arithmetic processes, a ROM, which is a read-only memory for storing basic programs, a RAM, which is a read / write memory for storing various information, and control software and data. It has a magnetic disk to store. The processing in the heat treatment apparatus 160 proceeds when the CPU of the control unit 3 executes a predetermined processing program.
　図１１は、下部放射温度計２０、上部放射温度計２５および制御部３の関係性を示す機能ブロック図である。 FIG. 11 is a functional block diagram showing the relationship between the lower radiation thermometer 20, the upper radiation thermometer 25, and the control unit 3.
　半導体ウエハＷの斜め下方に設けられて半導体ウエハＷの下面の温度を測定する下部放射温度計２０は、熱型赤外線センサー２４および温度測定ユニット２２を備える。 The lower radiation thermometer 20 provided diagonally below the semiconductor wafer W and measuring the temperature of the lower surface of the semiconductor wafer W includes a thermal infrared sensor 24 and a temperature measuring unit 22.
　熱型赤外線センサー２４は、サセプタ７４に保持された半導体ウエハＷの下面から開口部７８を介して放射された赤外光を受光する。熱型赤外線センサー２４は、温度測定ユニット２２と電気的に接続されており、受光に応答して生じた信号を温度測定ユニット２２に伝達する。 The thermal infrared sensor 24 receives infrared light radiated from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78. The thermal infrared sensor 24 is electrically connected to the temperature measuring unit 22, and transmits a signal generated in response to light reception to the temperature measuring unit 22.
　温度測定ユニット２２は、図示を省略する増幅回路、Ａ／Ｄコンバータおよび温度変換回路などを備えており、熱型赤外線センサー２４から出力された赤外光の強度を示す信号を温度に変換する。温度測定ユニット２２によって求められた温度が半導体ウエハＷの下面の温度である。 The temperature measurement unit 22 includes an amplifier circuit (not shown), an A / D converter, a temperature conversion circuit, and the like, and converts a signal indicating the intensity of infrared light output from the thermal infrared sensor 24 into temperature. The temperature obtained by the temperature measuring unit 22 is the temperature of the lower surface of the semiconductor wafer W.
　一方、半導体ウエハＷの斜め上方に設けられて半導体ウエハＷの上面の温度を測定する上部放射温度計２５は、量子型赤外線センサー２９および温度測定ユニット２７を備える。量子型赤外線センサー２９は、サセプタ７４に保持された半導体ウエハＷの上面から放射された赤外光を受光する。量子型赤外線センサー２９は、フラッシュ光が照射された瞬間の半導体ウエハＷの上面の急激な温度変化に対応できるように、ＩｎＳｂ（インジウムアンチモン）の光学素子を備えている。量子型赤外線センサー２９は、温度測定ユニット２７と電気的に接続されており、受光に応答して生じた信号を温度測定ユニット２７に伝達する。温度測定ユニット２７は、量子型赤外線センサー２９から出力された赤外光の強度を示す信号を温度に変換する。温度測定ユニット２７によって求められた温度が半導体ウエハＷの上面の温度である。 On the other hand, the upper radiation thermometer 25 provided diagonally above the semiconductor wafer W and measuring the temperature of the upper surface of the semiconductor wafer W includes a quantum infrared sensor 29 and a temperature measuring unit 27. The quantum infrared sensor 29 receives infrared light radiated from the upper surface of the semiconductor wafer W held by the susceptor 74. The quantum infrared sensor 29 is provided with an InSb (indium antimonide) optical element so as to be able to respond to a sudden temperature change on the upper surface of the semiconductor wafer W at the moment when the flash light is irradiated. The quantum infrared sensor 29 is electrically connected to the temperature measuring unit 27, and transmits a signal generated in response to the light reception to the temperature measuring unit 27. The temperature measuring unit 27 converts a signal indicating the intensity of infrared light output from the quantum infrared sensor 29 into temperature. The temperature obtained by the temperature measuring unit 27 is the temperature of the upper surface of the semiconductor wafer W.
　下部放射温度計２０および上部放射温度計２５は、熱処理装置１６０全体のコントローラである制御部３と電気的に接続されており、下部放射温度計２０および上部放射温度計２５によってそれぞれ測定された半導体ウエハＷの下面および上面の温度は制御部３に伝達される。 The lower radiation thermometer 20 and the upper radiation thermometer 25 are electrically connected to the control unit 3 which is the controller of the entire heat treatment apparatus 160, and the semiconductors measured by the lower radiation thermometer 20 and the upper radiation thermometer 25, respectively. The temperatures of the lower surface and the upper surface of the wafer W are transmitted to the control unit 3.
　制御部３は、係数算出部３１と、温度補正部３２と、警報部３６とを備える。係数算出部３１および温度補正部３２は、制御部３のＣＰＵが所定の処理プログラムを実行することによって実現される機能処理部である。係数算出部３１、温度補正部３２および警報部３６の処理内容についてはさらに後述する。なお、警報部３６は備えられていなくともよい。また、制御部３が係数算出部３１を備えずに、あらかじめ算出された補正係数が入力部３４または表示部３３に入力される態様であってもよい。 The control unit 3 includes a coefficient calculation unit 31, a temperature correction unit 32, and an alarm unit 36. The coefficient calculation unit 31 and the temperature correction unit 32 are functional processing units realized by the CPU of the control unit 3 executing a predetermined processing program. The processing contents of the coefficient calculation unit 31, the temperature correction unit 32, and the alarm unit 36 will be further described later. The alarm unit 36 may not be provided. Further, the control unit 3 may not include the coefficient calculation unit 31, and the correction coefficient calculated in advance may be input to the input unit 34 or the display unit 33.
　また、制御部３には表示部３３、入力部３４および記憶部３５が接続されている。制御部３は、表示部３３に種々の情報を表示する。入力部３４は、熱処理システム１００のオペレータが制御部３に種々のコマンドまたはパラメータを入力するための機器である。オペレータは、表示部３３の表示内容を確認しつつ、入力部３４から半導体ウエハＷの処理手順および処理条件を記述した処理レシピの条件設定を行うこともできる。 Further, the display unit 33, the input unit 34, and the storage unit 35 are connected to the control unit 3. The control unit 3 displays various information on the display unit 33. The input unit 34 is a device for the operator of the heat treatment system 100 to input various commands or parameters to the control unit 3. The operator can also set the conditions of the processing recipe that describes the processing procedure and the processing conditions of the semiconductor wafer W from the input unit 34 while checking the display contents of the display unit 33.
　記憶部３５は、たとえば、ＨＤＤ、ＲＡＭ、ＲＯＭまたはフラッシュメモリなどの、揮発性または不揮発性の半導体メモリ、磁気ディスク、フレキシブルディスク、光ディスク、コンパクトディスク、ミニディスクまたはＤＶＤなどを含むメモリ（記憶媒体）であってもよい。 The storage unit 35 is a memory (storage medium) including, for example, a volatile or non-volatile semiconductor memory such as an HDD, RAM, ROM or flash memory, a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk or a DVD. It may be.
　表示部３３および入力部３４としては、双方の機能を兼ね備えたタッチパネルを用いることもでき、本実施の形態では熱処理システム１００の外壁に設けられた液晶のタッチパネルを採用している。 As the display unit 33 and the input unit 34, a touch panel having both functions can be used, and in the present embodiment, a liquid crystal touch panel provided on the outer wall of the heat treatment system 100 is adopted.
　上記の構成以外にも熱処理システム１００は、半導体ウエハＷの熱処理時にハロゲンランプＨＬおよびフラッシュランプＦＬから発生する熱エネルギーによるハロゲン加熱部４、フラッシュ加熱部５およびチャンバー６の過剰な温度上昇を防止するため、様々な冷却用の構造を備えている。 In addition to the above configuration, the heat treatment system 100 prevents an excessive temperature rise of the halogen heating unit 4, the flash heating unit 5, and the chamber 6 due to the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. Therefore, it has various cooling structures.
　たとえば、チャンバー６の壁体には水冷管（図示省略）が設けられている。また、ハロゲン加熱部４およびフラッシュ加熱部５は、内部に気体流を形成して排熱する空冷構造とされている。また、上側チャンバー窓６３とランプ光放射窓５３との間隙にも空気が供給され、フラッシュ加熱部５および上側チャンバー窓６３を冷却する。 For example, a water cooling pipe (not shown) is provided on the wall of the chamber 6. Further, the halogen heating unit 4 and the flash heating unit 5 have an air-cooled structure in which a gas flow is formed inside to exhaust heat. In addition, air is also supplied to the gap between the upper chamber window 63 and the lamp light radiating window 53 to cool the flash heating unit 5 and the upper chamber window 63.
　＜熱処理システムの動作について＞
　次に、本実施の形態に関する熱処理システムの動作を説明する。図１２は、本実施の形態に関する熱処理システムの動作を説明するためのフローチャートである。以下の熱処理システム１００の処理手順は、制御部３が熱処理システム１００の各動作機構を制御することによって進行する。 <About the operation of the heat treatment system>
Next, the operation of the heat treatment system according to the present embodiment will be described. FIG. 12 is a flowchart for explaining the operation of the heat treatment system according to the present embodiment. The following processing procedure of the heat treatment system 100 proceeds by the control unit 3 controlling each operation mechanism of the heat treatment system 100.
　まず、給気のためのバルブ８４が開放されるとともに、排気用のバルブ８９およびバルブ１９２が開放されてチャンバー６内に対する給排気が開始される。バルブ８４が開放されると、ガス供給孔８１から熱処理空間６５に窒素ガスが供給される。また、バルブ８９が開放されると、ガス排気孔８６からチャンバー６内の気体が排気される。 First, the valve 84 for air supply is opened, and the valve 89 and the valve 192 for exhaust are opened to start air supply and exhaust to the inside of the chamber 6. When the valve 84 is opened, nitrogen gas is supplied to the heat treatment space 65 from the gas supply hole 81. When the valve 89 is opened, the gas in the chamber 6 is exhausted from the gas exhaust hole 86.
　これにより、チャンバー６内の熱処理空間６５の上部から供給された窒素ガスが下方へと流れ、熱処理空間６５の下部から排気される。また、バルブ１９２が開放されることによって、搬送開口部６６からもチャンバー６内の気体が排気される。さらに、図示省略の排気機構によって移載機構１０の駆動部周辺の雰囲気も排気される。 As a result, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward and is exhausted from the lower part of the heat treatment space 65. Further, when the valve 192 is opened, the gas in the chamber 6 is also exhausted from the transport opening 66. Further, the atmosphere around the drive unit of the transfer mechanism 10 is also exhausted by the exhaust mechanism (not shown).
　なお、熱処理装置１６０における半導体ウエハＷまたはテスト基板の熱処理時には、窒素ガスが熱処理空間６５に継続的に供給されており、その供給量は処理工程に応じて適宜変更される。 During the heat treatment of the semiconductor wafer W or the test substrate in the heat treatment apparatus 160, nitrogen gas is continuously supplied to the heat treatment space 65, and the supply amount thereof is appropriately changed according to the processing process.
　続いて、ゲートバルブ１８５が開いて搬送開口部６６が開放され、装置外部の搬送ロボットにより搬送開口部６６を介して、テスト基板がチャンバー６内の熱処理空間６５に搬入される（ステップＳＴ０１）。 Subsequently, the gate valve 185 is opened to open the transfer opening 66, and the test substrate is carried into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by the transfer robot outside the apparatus (step ST01).
　ここで、テスト基板とは、処理対象である半導体ウエハＷに対するフラッシュランプアニールに先行してテスト熱処理が行われる基板であり、たとえば、非成膜である。また、テスト基板は、半導体ウエハＷと同一の直径および厚さを有する基板であることが望ましい。 Here, the test substrate is a substrate on which a test heat treatment is performed prior to flash lamp annealing on the semiconductor wafer W to be processed, and is, for example, non-deposited. Further, it is desirable that the test substrate is a substrate having the same diameter and thickness as the semiconductor wafer W.
　また、テスト熱処理とは、処理対象である半導体ウエハＷに対して行われるフラッシュランプアニールに先行して、テスト基板に対して行われる熱処理であり、たとえば、フラッシュ光の照射が含まれる熱処理である。 Further, the test heat treatment is a heat treatment performed on the test substrate prior to the flash lamp annealing performed on the semiconductor wafer W to be processed, and is, for example, a heat treatment including irradiation of flash light. ..
　なお、本実施の形態ではテスト基板として説明されるが、テスト基板とは、実際に熱処理される半導体ウエハＷであってもよい。あくまで、量子型赤外線センサーの出力電圧における変化量が分かればよい。 Although described as a test substrate in this embodiment, the test substrate may be a semiconductor wafer W that is actually heat-treated. It is only necessary to know the amount of change in the output voltage of the quantum infrared sensor.
　テスト基板の搬入にともなって装置外部の雰囲気を巻き込むおそれがあるが、チャンバー６には窒素ガスが供給され続けているため、搬送開口部６６から窒素ガスが流出して、そのような外部雰囲気の巻き込みを最小限に抑制することができる。 There is a risk of entraining the atmosphere outside the equipment as the test board is brought in, but since nitrogen gas continues to be supplied to the chamber 6, nitrogen gas flows out from the transport opening 66, and such an external atmosphere is created. Entrainment can be minimized.
　搬送ロボットによって搬入されたテスト基板は保持部７の直上位置まで進出して停止する。そして、移載機構１０の一対の移載アーム１１が退避位置から移載動作位置に水平移動して上昇することにより、リフトピン１２が貫通孔７９を通ってサセプタ７４の保持プレート７５の上面から突き出てテスト基板を受け取る。このとき、リフトピン１２は基板支持ピン７７の上端よりも上方にまで上昇する。 The test board carried in by the transfer robot advances to the position directly above the holding unit 7 and stops. Then, the pair of transfer arms 11 of the transfer mechanism 10 move horizontally from the retracted position to the transfer operation position and rise, so that the lift pin 12 protrudes from the upper surface of the holding plate 75 of the susceptor 74 through the through hole 79. And receive the test board. At this time, the lift pin 12 rises above the upper end of the substrate support pin 77.
　テスト基板がリフトピン１２に載置された後、搬送ロボットが熱処理空間６５から退出し、ゲートバルブ１８５によって搬送開口部６６が閉鎖される。そして、一対の移載アーム１１が下降することにより、テスト基板は移載機構１０から保持部７のサセプタ７４に受け渡されて水平姿勢で下方より保持される。テスト基板は、保持プレート７５上に立設された複数の基板支持ピン７７によって支持されてサセプタ７４に保持される。また、テスト基板は、被処理面である表面を上面として保持部７に保持される。複数の基板支持ピン７７によって支持されたテスト基板の下面（表面とは反対側の主面）と保持プレート７５の保持面７５ａとの間には所定の間隔が形成される。サセプタ７４の下方にまで下降した一対の移載アーム１１は水平移動機構１３によって退避位置、すなわち凹部６２の内側に退避する。 After the test board is placed on the lift pin 12, the transfer robot exits the heat treatment space 65, and the transfer opening 66 is closed by the gate valve 185. Then, when the pair of transfer arms 11 are lowered, the test substrate is handed over from the transfer mechanism 10 to the susceptor 74 of the holding portion 7 and held in a horizontal posture from below. The test board is supported by a plurality of board support pins 77 erected on the holding plate 75 and held by the susceptor 74. Further, the test substrate is held by the holding portion 7 with the surface to be processed as the upper surface. A predetermined distance is formed between the lower surface of the test substrate (main surface opposite to the surface) supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 lowered to the lower side of the susceptor 74 are retracted to the retracted position, that is, inside the recess 62 by the horizontal moving mechanism 13.
　次に、テスト基板に対し、フラッシュ光の照射を含むテスト熱処理を行う（ステップＳＴ０２）。このとき、フラッシュランプＦＬから放射されるフラッシュ光の一部は直接にチャンバー６内へと向かい、他の一部は一旦リフレクタ５２により反射されてからチャンバー６内へと向かい、これらのフラッシュ光の照射によりテスト基板のフラッシュ加熱が行われる。 Next, the test substrate is subjected to a test heat treatment including irradiation with flash light (step ST02). At this time, a part of the flash light radiated from the flash lamp FL goes directly into the chamber 6, and the other part is once reflected by the reflector 52 and then goes into the chamber 6, and these flash lights The test substrate is flash-heated by irradiation.
　フラッシュ加熱は、フラッシュランプＦＬからのフラッシュ光（閃光）照射により行われるため、テスト基板の表面温度を短時間で上昇することができる。すなわち、フラッシュランプＦＬから照射されるフラッシュ光は、予めコンデンサーに蓄えられていた静電エネルギーが極めて短い光パルスに変換された、照射時間が０．１ミリセカンド以上１００ミリセカンド以下程度の極めて短く強い閃光である。そして、フラッシュランプＦＬからのフラッシュ光照射により、テスト基板の表面温度は極めて短時間のうちに急激に上昇する。 Since the flash heating is performed by irradiating the flash light (flash) from the flash lamp FL, the surface temperature of the test substrate can be raised in a short time. That is, the flash light emitted from the flash lamp FL has an extremely short irradiation time of 0.1 millisecond or more and 100 millisecond or less, in which the electrostatic energy stored in the capacitor in advance is converted into an extremely short optical pulse. It is a strong flash. Then, the surface temperature of the test substrate rises sharply in an extremely short time due to the flash light irradiation from the flash lamp FL.
　そして、テスト熱処理の際のテスト基板の上面の温度を、上部放射温度計２５の量子型赤外線センサー２９を用いて測定する（ステップＳＴ０３）。ステップＳＴ０３において測定されたテスト基板の上面の温度は、基準温度として記憶部３５に記憶される。 Then, the temperature of the upper surface of the test substrate during the test heat treatment is measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 (step ST03). The temperature of the upper surface of the test substrate measured in step ST03 is stored in the storage unit 35 as a reference temperature.
　そして、テスト基板の温度が所定以下にまで降温した後、移載機構１０の一対の移載アーム１１が再び退避位置から移載動作位置に水平移動して上昇することにより、リフトピン１２がサセプタ７４の上面から突き出て熱処理後のテスト基板をサセプタ７４から受け取る。続いて、ゲートバルブ１８５により閉鎖されていた搬送開口部６６が開放され、リフトピン１２上に載置されたテスト基板が装置外部の搬送ロボットによりチャンバー６から搬出され、テスト基板のテスト熱処理が完了する（ステップＳＴ０４）。 Then, after the temperature of the test board is lowered to a predetermined level or less, the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retracted position to the transfer operation position again and rise, so that the lift pin 12 is lifted by the susceptor 74. The test substrate after heat treatment is received from the susceptor 74 by protruding from the upper surface of the surface. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, the test substrate mounted on the lift pin 12 is carried out from the chamber 6 by the transfer robot outside the apparatus, and the test heat treatment of the test substrate is completed. (Step ST04).
　ここで、テスト熱処理を行うタイミングとしては、たとえば、熱処理システム１００の初期校正（量子型赤外線センサー２９の初期校正を含む）のタイミングなどが想定される。 Here, as the timing of performing the test heat treatment, for example, the timing of the initial calibration of the heat treatment system 100 (including the initial calibration of the quantum infrared sensor 29) is assumed.
　次に、テスト基板に対して、ステップＳＴ０１～ステップＳＴ０４と同様の方法（同一の設定値）で、再びテスト熱処理を行う（ステップＳＴ０５）。そして、テスト熱処理の際のテスト基板の上面の温度を、上部放射温度計２５の量子型赤外線センサー２９を用いて測定する（ステップＳＴ０６）。ステップＳＴ０６において測定されたテスト基板の上面の温度は、シフト温度として記憶部３５に記憶される。 Next, the test substrate is subjected to the test heat treatment again by the same method (same set value) as in steps ST01 to ST04 (step ST05). Then, the temperature of the upper surface of the test substrate during the test heat treatment is measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 (step ST06). The temperature of the upper surface of the test substrate measured in step ST06 is stored in the storage unit 35 as the shift temperature.
　再びテスト熱処理を行うタイミングとしては、たとえば、熱処理システム１００のメンテナンスのタイミングなどが想定される。また、それぞれの半導体ウエハＷに対する熱処理が連続的に行われている場合において、その間に異常状態が検知されたタイミングなども想定される。たとえば、順々に熱処理される半導体ウエハＷの前後において、フラッシュ光の照射によって得られた量子型赤外線センサー２９の出力電圧が所定値以上異なる場合に、量子型赤外線センサー２９の出力電圧が大きく変化したものとしてテスト熱処理を行ってもよい。 As the timing of performing the test heat treatment again, for example, the timing of maintenance of the heat treatment system 100 is assumed. Further, when the heat treatment for each semiconductor wafer W is continuously performed, the timing at which an abnormal state is detected during that time is also assumed. For example, when the output voltage of the quantum infrared sensor 29 obtained by irradiation with flash light differs by a predetermined value or more before and after the semiconductor wafer W to be heat-treated in sequence, the output voltage of the quantum infrared sensor 29 changes significantly. A test heat treatment may be performed as a result.
　次に、制御部３の係数算出部３１は、基準温度およびシフト温度に基づいて、補正係数を算出する。具体的には、以下の式（１）に示されるように、基準温度Ｔｒｅｆおよびシフト温度Ｔｓｈｉｆｔに基づいて、補正係数ＣＦを算出する（ステップＳＴ０７）。 Next, the coefficient calculation unit 31 of the control unit 3 calculates the correction coefficient based on the reference temperature and the shift temperature. Specifically, as shown in the following equation (1), the correction coefficient CF is calculated based on the reference temperature Tref and the shift temperature T shift (step ST07).
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
　ここで、補正係数があらかじめ定められた範囲を外れる場合（すなわち、基準温度とシフト温度との差がしきい値を超える場合）には、警報部３６がオペレータに対し、音または画像表示などを用いて警報を発報してもよい。補正係数の値は、量子型赤外線センサー２９の出力電圧の変化（感度シフト）が大きいほど１から離れる値となり、感度シフトが過度に大きい場合には、量子型赤外線センサー２９の不具合、さらには、チャンバー６における他の構成の不具合（透明窓２６の汚れなど）も想定されるためである。 Here, when the correction coefficient is out of the predetermined range (that is, when the difference between the reference temperature and the shift temperature exceeds the threshold value), the alarm unit 36 displays a sound or an image to the operator. It may be used to issue an alarm. The value of the correction coefficient becomes a value that deviates from 1 as the change (sensitivity shift) of the output voltage of the quantum infrared sensor 29 increases, and if the sensitivity shift is excessively large, the quantum infrared sensor 29 malfunctions, and further, This is because other defects in the configuration of the chamber 6 (dirt of the transparent window 26, etc.) are also assumed.
　次に、処理対象である半導体ウエハＷがチャンバー６内の熱処理空間６５に搬入される（ステップＳＴ０８）。そして、半導体ウエハＷに対し、フラッシュ光を照射するフラッシュランプアニールを行う（ステップＳＴ０９）。そして、フラッシュランプアニールの際の半導体ウエハＷの上面の温度を、上部放射温度計２５の量子型赤外線センサー２９を用いて測定する（ステップＳＴ１０）。ステップＳＴ１０において測定された半導体ウエハＷの上面の温度は、測定温度として記憶部３５に記憶される。 Next, the semiconductor wafer W to be processed is carried into the heat treatment space 65 in the chamber 6 (step ST08). Then, the semiconductor wafer W is subjected to flash lamp annealing by irradiating the semiconductor wafer W with flash light (step ST09). Then, the temperature of the upper surface of the semiconductor wafer W at the time of flash lamp annealing is measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 (step ST10). The temperature of the upper surface of the semiconductor wafer W measured in step ST10 is stored in the storage unit 35 as the measured temperature.
　次に、制御部３の温度補正部３２は、ステップＳＴ１０において測定された測定温度を、記憶部３５に記憶されている補正係数を用いて補正する。具体的には、以下の式（２）に示されるように、補正係数ＣＦを用いて、測定温度Ｔｍｅａｓｕｒｅを、補正測定温度Ｔ’ｍｅａｓｕｒｅに補正する（ステップＳＴ１１）。 Next, the temperature correction unit 32 of the control unit 3 corrects the measured temperature measured in step ST10 by using the correction coefficient stored in the storage unit 35. Specifically, as shown in the following equation (2), using the correction factor CF, the measured temperature T its measure, corrected to correct the measured temperature T 'its measure (step ST11).
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
　そして、半導体ウエハＷが装置外部の搬送ロボットによりチャンバー６から搬出され、半導体ウエハＷのフラッシュランプアニールが完了する（ステップＳＴ１２）。 Then, the semiconductor wafer W is carried out from the chamber 6 by the transfer robot outside the apparatus, and the flash lamp annealing of the semiconductor wafer W is completed (step ST12).
　なお、ステップＳＴ１１では、記憶部３５に記憶されている補正係数を参照することによって補正係数を補正しているが、係数算出部３１によって算出され記憶部３５に記憶されている補正係数を用いずに、オペレータが手計算などによって補正係数を求めて直接入力部３４を介して補正係数を入力し、制御部３の温度補正部３２が、入力部３４から当該補正係数を用いて測定温度Ｔｍｅａｓｕｒｅを、補正測定温度Ｔ’ｍｅａｓｕｒｅに補正してもよい。 In step ST11, the correction coefficient is corrected by referring to the correction coefficient stored in the storage unit 35, but the correction coefficient calculated by the coefficient calculation unit 31 and stored in the storage unit 35 is not used. the operator directly through the input unit 34 obtains the correction coefficient by a hand calculation type the correction coefficient, the temperature correction unit 32 of the controller 3, the measured temperature T its measure from the input unit 34 by using the correction coefficient May be corrected to the correction measurement temperature T'factor.
　上記の実施の形態によれば、制御部３は、補正測定温度Ｔ’ｍｅａｓｕｒｅを参照することによって、時間の経過とともに量子型赤外線センサー２９の出力電圧が変化する場合であっても、半導体ウエハＷの上面の温度を高い精度で測定することができる。そのため、フラッシュランプアニールが適切に行われているか否かを適切に確認することができる。たとえば、制御部３は、補正測定温度Ｔ’ｍｅａｓｕｒｅが想定される温度範囲から外れている場合に、フラッシュランプの出力値または照射時間などを調整することができる。 According to the above embodiment, the control unit 3 refers to the corrected measurement temperature T'measure , and even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface of the surface can be measured with high accuracy. Therefore, it can be appropriately confirmed whether or not the flash lamp annealing is properly performed. For example, the control unit 3 can adjust the output value of the flash lamp, the irradiation time, or the like when the corrected measurement temperature T'measure is out of the expected temperature range.
　なお、上記の実施の形態では、基準温度およびシフト温度はそれぞれ１回測定されているが、基準温度およびシフト温度のうちの少なくとも一方を、複数回測定されたテスト基板の温度の平均値としてもよい。 In the above embodiment, the reference temperature and the shift temperature are measured once, but at least one of the reference temperature and the shift temperature can be used as the average value of the temperatures of the test substrates measured a plurality of times. Good.
　また、下部放射温度計２０に用いられる赤外線センサーが量子型赤外線センサーである場合には、制御部３の係数算出部３１は、下部放射温度計２０に用いられる量子型赤外線センサーによって測定される測定温度の補正に用いる補正係数も算出してもよい。 When the infrared sensor used in the lower radiation thermometer 20 is a quantum infrared sensor, the coefficient calculation unit 31 of the control unit 3 measures the measurement by the quantum infrared sensor used in the lower radiation thermometer 20. The correction coefficient used for temperature correction may also be calculated.
　＜第２の実施の形態＞
　本実施の形態に関する熱処理システムにおける熱処理装置、および、熱処理方法について説明する。なお、以下の説明においては、以上に記載された実施の形態で説明された構成要素と同様の構成要素については同じ符号を付して図示し、その詳細な説明については適宜省略するものとする。 <Second embodiment>
The heat treatment apparatus and the heat treatment method in the heat treatment system according to the present embodiment will be described. In the following description, components similar to the components described in the above-described embodiment will be illustrated with the same reference numerals, and detailed description thereof will be omitted as appropriate. ..
　次に、本実施の形態に関する熱処理システムの動作を説明する。図１３は、本実施の形態に関する熱処理システムの動作を説明するためのフローチャートである。以下の熱処理システム１００の処理手順は、制御部３が熱処理システム１００の各動作機構を制御することによって進行する。 Next, the operation of the heat treatment system according to the present embodiment will be described. FIG. 13 is a flowchart for explaining the operation of the heat treatment system according to the present embodiment. The following processing procedure of the heat treatment system 100 proceeds by the control unit 3 controlling each operation mechanism of the heat treatment system 100.
　まず、第１の実施の形態におけるステップＳＴ０１と同様に、テスト基板が搬入される（ステップＳＴ２１）。そして、テスト基板に対し、予備加熱（アシスト加熱）と、フラッシュ光の照射を含むテスト熱処理とを行う（ステップＳＴ２２）。 First, the test board is carried in as in step ST01 in the first embodiment (step ST21). Then, the test substrate is subjected to preheating (assist heating) and test heat treatment including irradiation of flash light (step ST22).
　図１４は、テスト基板の表面温度の変化を示す図である。なお、後述の半導体ウエハＷであっても、フラッシュランプアニールによって図１４に示されるような表面温度の変化を示すものとする。 FIG. 14 is a diagram showing changes in the surface temperature of the test substrate. Even in the semiconductor wafer W described later, it is assumed that the surface temperature changes as shown in FIG. 14 due to flash lamp annealing.
　テスト基板がチャンバー６内に搬入されてサセプタ７４に保持された後、時刻ｔ１にハロゲン加熱部４の４０本のハロゲンランプＨＬが一斉に点灯して予備加熱（アシスト加熱）が開始される（ステップＳＴ２３）。ハロゲンランプＨＬから出射されたハロゲン光は、石英で形成された下側チャンバー窓６４およびサセプタ７４を透過してテスト基板の下面に照射される。ハロゲンランプＨＬからの光照射を受けることによってテスト基板が予備加熱されて温度が上昇する。 After the test substrate is carried into the chamber 6 and held by the susceptor 74, the 40 halogen lamps HL of the halogen heating unit 4 are turned on all at once at time t1, and preheating (assist heating) is started (step). ST23). The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the susceptor 74 made of quartz and irradiates the lower surface of the test substrate. By receiving light irradiation from the halogen lamp HL, the test substrate is preheated and the temperature rises.
　なお、移載機構１０の移載アーム１１は凹部６２の内側に退避しているため、ハロゲンランプＨＬによる加熱の障害となることはない。 Since the transfer arm 11 of the transfer mechanism 10 is retracted inside the recess 62, it does not interfere with heating by the halogen lamp HL.
　ハロゲンランプＨＬからの光照射によって昇温するテスト基板の温度は下部放射温度計２０によって測定される。すなわち、サセプタ７４に保持されたテスト基板の下面（下面）から開口部７８を介して放射された赤外光を透明窓２１を通して下部放射温度計２０が受光してテスト基板の下面温度を測定する（ステップＳＴ２４）。 The temperature of the test substrate, which is raised by irradiation with light from the halogen lamp HL, is measured by the lower radiation thermometer 20. That is, the lower radiation thermometer 20 receives infrared light radiated from the lower surface (lower surface) of the test substrate held by the susceptor 74 through the opening 78 through the transparent window 21 and measures the lower surface temperature of the test substrate. (Step ST24).
　なお、ハロゲンランプＨＬによる予備加熱を開始する前から下部放射温度計２０による温度測定を開始するようにしても良い。 Note that the temperature measurement by the lower radiation thermometer 20 may be started before the preheating by the halogen lamp HL is started.
　下部放射温度計２０によって測定されたテスト基板の下面温度は制御部３に伝達される。そして、テスト熱処理が行われる前のテスト基板の下面温度は、基準温度（アシスト）として記憶部３５に記憶される。 The bottom surface temperature of the test board measured by the lower radiation thermometer 20 is transmitted to the control unit 3. Then, the lower surface temperature of the test substrate before the test heat treatment is performed is stored in the storage unit 35 as a reference temperature (assist).
　制御部３は、ハロゲンランプＨＬからの光照射によって昇温するテスト基板の温度が所定の予備加熱温度Ｔ１に到達したか否かを監視しつつ、ハロゲンランプＨＬの出力を制御する。すなわち、制御部３は、下部放射温度計２０による測定値に基づいて、テスト基板の温度が予備加熱温度Ｔ１となるようにハロゲンランプＨＬの出力をフィードバック制御する。 The control unit 3 controls the output of the halogen lamp HL while monitoring whether or not the temperature of the test substrate, which is raised by irradiation with light from the halogen lamp HL, has reached a predetermined preheating temperature T1. That is, the control unit 3 feedback-controls the output of the halogen lamp HL so that the temperature of the test substrate becomes the preheating temperature T1 based on the measured value by the lower radiation thermometer 20.
　このように下部放射温度計２０は、予備加熱段階においてハロゲンランプＨＬの出力を制御するための温度センサーでもある。なお、下部放射温度計２０はテスト基板の下面の温度を測定しているが、ハロゲンランプＨＬによる予備加熱の段階ではテスト基板の上下面に温度差が生じることはなく、下部放射温度計２０によって測定される下面温度はテスト基板全体の温度であるとみなせる。 As described above, the lower radiation thermometer 20 is also a temperature sensor for controlling the output of the halogen lamp HL in the preheating stage. Although the lower radiation thermometer 20 measures the temperature of the lower surface of the test substrate, there is no temperature difference between the upper and lower surfaces of the test substrate at the stage of preheating by the halogen lamp HL, and the lower radiation thermometer 20 measures the temperature. The measured bottom surface temperature can be regarded as the temperature of the entire test substrate.
　テスト基板の温度が予備加熱温度Ｔ１に到達した後、制御部３はテスト基板をその予備加熱温度Ｔ１に暫時維持する。具体的には、下部放射温度計２０によって測定されるテスト基板の温度が予備加熱温度Ｔ１に到達した時刻ｔ２に制御部３がハロゲンランプＨＬの出力を調整し、テスト基板の温度をほぼ予備加熱温度Ｔ１に維持している。 After the temperature of the test board reaches the preheating temperature T1, the control unit 3 maintains the test board at the preheating temperature T1 for a while. Specifically, the control unit 3 adjusts the output of the halogen lamp HL at the time t2 when the temperature of the test substrate measured by the lower radiation thermometer 20 reaches the preheating temperature T1, and the temperature of the test substrate is substantially preheated. The temperature is maintained at T1.
　このようなハロゲンランプＨＬによる予備加熱を行うことによって、テスト基板の全体を予備加熱温度Ｔ１に均一に昇温している。ハロゲンランプＨＬによる予備加熱の段階においては、より放熱が生じやすいテスト基板の周縁部の温度が中央部よりも低下する傾向にあるが、ハロゲン加熱部４におけるハロゲンランプＨＬの配設密度は、テスト基板の中央部に対向する領域よりも周縁部に対向する領域の方が高くなっている。このため、放熱が生じやすいテスト基板の周縁部に照射される光量が多くなり、予備加熱段階におけるテスト基板の面内温度分布を均一なものとすることができる。 By performing preheating with such a halogen lamp HL, the entire test substrate is uniformly heated to the preheating temperature T1. At the stage of preheating with the halogen lamp HL, the temperature of the peripheral portion of the test substrate, which is more likely to generate heat, tends to be lower than that of the central portion, but the arrangement density of the halogen lamp HL in the halogen heating unit 4 is tested. The region facing the peripheral edge is higher than the region facing the central portion of the substrate. Therefore, the amount of light emitted to the peripheral portion of the test substrate where heat dissipation is likely to occur increases, and the in-plane temperature distribution of the test substrate in the preheating stage can be made uniform.
　テスト基板の温度が予備加熱温度Ｔ１に到達して所定時間が経過した時刻ｔ３にフラッシュ加熱部５のフラッシュランプＦＬがサセプタ７４に保持されたテスト基板の上面にテスト熱処理としてのフラッシュ光照射を行う（ステップＳＴ２５）。 At time t3 when the temperature of the test substrate reaches the preheating temperature T1 and a predetermined time elapses, the upper surface of the test substrate in which the flash lamp FL of the flash heating unit 5 is held by the susceptor 74 is irradiated with flash light as a test heat treatment. (Step ST25).
　テスト基板の表面温度は上部放射温度計２５によって監視されている。但し、上部放射温度計２５は、テスト基板の上面の絶対温度を測定するものではなく、当該上面の温度変化を測定する。すなわち、上部放射温度計２５の量子型赤外線センサー２９は、ＡＣカップリングなどによってオフセット成分を除去し、さらに、下部放射温度計２０を参照して予備加熱温度Ｔ１に対応する電圧値との差を算出することによって、フラッシュ光照射時の予備加熱温度Ｔ１からのテスト基板の上面の上昇温度（ジャンプ温度）ΔＴを測定するのである（ステップＳＴ２６）。 The surface temperature of the test board is monitored by the upper radiation thermometer 25. However, the upper radiation thermometer 25 does not measure the absolute temperature of the upper surface of the test substrate, but measures the temperature change of the upper surface. That is, the quantum infrared sensor 29 of the upper radiation thermometer 25 removes the offset component by AC coupling or the like, and further, with reference to the lower radiation thermometer 20, the difference from the voltage value corresponding to the preheating temperature T1 is obtained. By calculating, the rising temperature (jump temperature) ΔT of the upper surface of the test substrate from the preheating temperature T1 at the time of flash light irradiation is measured (step ST26).
　なお、フラッシュ光照射時にもテスト基板の下面温度が下部放射温度計２０によって測定されているものの、照射時間が極めて短く強度の強いフラッシュ光を照射したときには、テスト基板の表面近傍のみが急激に加熱されるため、テスト基板の上下面で温度差が生じ、下部放射温度計２０によってはテスト基板の上面の温度を測定することはできない。また、下部放射温度計２０と同様に、上部放射温度計２５のテスト基板に対する受光角も６０°以上８９°以下としているため、上部放射温度計２５によってテスト基板の上面の上昇温度ΔＴを正確に測定することができる。 Although the temperature of the lower surface of the test substrate is measured by the lower radiation thermometer 20 even during flash light irradiation, when the irradiation time is extremely short and strong flash light is irradiated, only the vicinity of the surface of the test substrate is rapidly heated. Therefore, a temperature difference occurs between the upper and lower surfaces of the test substrate, and the temperature of the upper surface of the test substrate cannot be measured by the lower radiation thermometer 20. Further, as with the lower radiation thermometer 20, the light receiving angle of the upper radiation thermometer 25 with respect to the test substrate is also set to 60 ° or more and 89 ° or less, so that the upper radiation thermometer 25 accurately determines the rising temperature ΔT of the upper surface of the test substrate. Can be measured.
　次に、制御部３がフラッシュ光照射時にテスト基板の上面が到達した最高温度を算定する（ステップＳＴ２７）。テスト基板の下面の温度は少なくとも予備加熱時にテスト基板が一定温度に到達した時刻ｔ２からフラッシュ光が照射される時刻ｔ３までの間は継続して下部放射温度計２０によって測定されている。 Next, the control unit 3 calculates the maximum temperature reached by the upper surface of the test substrate during flash light irradiation (step ST27). The temperature of the lower surface of the test substrate is continuously measured by the lower radiation thermometer 20 from the time t2 when the test substrate reaches a constant temperature during preheating to the time t3 when the flash light is irradiated.
　フラッシュ光照射前の予備加熱の段階ではテスト基板の上下面に温度差が生じておらず、フラッシュ光照射前に下部放射温度計２０によって測定されたテスト基板の下面温度は上面温度でもある。制御部３は、フラッシュ光を照射する直前の時刻ｔ２から時刻ｔ３までの間に下部放射温度計２０によって測定されたテスト基板の下面の温度（予備加熱温度Ｔ１）に上部放射温度計２５によって測定されたフラッシュ光照射時のテスト基板の上面の上昇温度ΔＴを加算して当該上面の最高到達温度Ｔ２を算定する。算定された最高到達温度Ｔ２は、基準温度（ジャンプ）として記憶部３５に記憶される。制御部３は、算定した最高到達温度Ｔ２を表示部３３に表示するようにしても良い。 At the stage of preheating before the flash light irradiation, there is no temperature difference between the upper and lower surfaces of the test substrate, and the lower surface temperature of the test substrate measured by the lower radiation thermometer 20 before the flash light irradiation is also the upper surface temperature. The control unit 3 measures the temperature of the lower surface of the test substrate (preliminary heating temperature T1) measured by the lower radiation thermometer 20 from the time t2 to the time t3 immediately before irradiating the flash light with the upper radiation thermometer 25. The maximum temperature reached T2 of the upper surface is calculated by adding the rising temperature ΔT of the upper surface of the test substrate at the time of irradiation with the flash light. The calculated maximum temperature reached T2 is stored in the storage unit 35 as a reference temperature (jump). The control unit 3 may display the calculated maximum temperature reached T2 on the display unit 33.
　フラッシュ光照射が終了した後、所定時間経過後の時刻ｔ４にハロゲンランプＨＬが消灯する。これにより、テスト基板が予備加熱温度Ｔ１から急速に降温する。降温中のテスト基板の温度は下部放射温度計２０によって測定され、その測定結果は制御部３に伝達される。制御部３は、下部放射温度計２０の測定結果よりテスト基板の温度が所定温度まで降温したか否かを監視する。 After the flash light irradiation is completed, the halogen lamp HL is turned off at time t4 after a predetermined time has elapsed. As a result, the temperature of the test substrate rapidly drops from the preheating temperature T1. The temperature of the test substrate during cooling is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control unit 3. The control unit 3 monitors whether or not the temperature of the test substrate has dropped to a predetermined temperature based on the measurement result of the lower radiation thermometer 20.
　そして、テスト基板の温度が所定以下にまで降温した後、移載機構１０の一対の移載アーム１１が再び退避位置から移載動作位置に水平移動して上昇することにより、リフトピン１２がサセプタ７４の上面から突き出て熱処理後のテスト基板をサセプタ７４から受け取る。続いて、ゲートバルブ１８５により閉鎖されていた搬送開口部６６が開放され、リフトピン１２上に載置されたテスト基板が装置外部の搬送ロボットによりチャンバー６から搬出され、テスト基板の予備加熱（アシスト加熱）およびテスト熱処理が完了する（ステップＳＴ２８）。 Then, after the temperature of the test board is lowered to a predetermined level or less, the pair of transfer arms 11 of the transfer mechanism 10 horizontally move from the retracted position to the transfer operation position again and rise, so that the lift pin 12 is lifted by the susceptor 74. The test substrate after heat treatment is received from the susceptor 74 by protruding from the upper surface of the surface. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, the test board mounted on the lift pin 12 is carried out from the chamber 6 by the transfer robot outside the apparatus, and the test board is preheated (assisted heating). ) And the test heat treatment is completed (step ST28).
　次に、テスト基板に対して、ステップＳＴ２１～ステップＳＴ２８と同様の方法（同一の設定値）で、再び予備加熱（アシスト加熱）およびテスト熱処理を行う（ステップＳＴ２９）。そして、テスト熱処理の際に上部放射温度計２５の量子型赤外線センサー２９を用いて測定された、テスト基板の下面温度はシフト温度（アシスト）として、テスト基板の上面の上昇温度（ジャンプ温度）はシフト温度（ジャンプ）として、それぞれ記憶部３５に記憶される（ステップＳＴ３０）。 Next, the test substrate is subjected to preheating (assist heating) and test heat treatment again by the same method (same set value) as in steps ST21 to ST28 (step ST29). Then, the lower surface temperature of the test substrate measured using the quantum infrared sensor 29 of the upper radiation thermometer 25 during the test heat treatment is the shift temperature (assist), and the rising temperature (jump temperature) of the upper surface of the test substrate is The shift temperature (jump) is stored in the storage unit 35 (step ST30).
　次に、制御部３の係数算出部３１は、基準温度（ジャンプ）、基準温度（アシスト）、シフト温度（ジャンプ）およびシフト温度（アシスト）に基づいて、補正係数を算出する。具体的には、以下の式（３）に示されるように、基準温度Ｔｒｅｆ（ａｓ）、基準温度Ｔｒｅｆ（ｊｕ）、シフト温度Ｔｓｈｉｆｔ（ａｓ）およびシフト温度Ｔｓｈｉｆｔ（ｊｕ）に基づいて、補正係数ＣＦを算出する（ステップＳＴ３１）。 Next, the coefficient calculation unit 31 of the control unit 3 calculates the correction coefficient based on the reference temperature (jump), the reference temperature (assist), the shift temperature (jump), and the shift temperature (assist). Specifically, as shown in the following equation (3), it is based on the reference temperature T ref (as) , the reference temperature T ref (ju) , the shift temperature T shift (as), and the shift temperature T shift (ju) . Then, the correction coefficient CF is calculated (step ST31).
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
　次に、処理対象である半導体ウエハＷに対して、次に、ステップＳＴ２１～ステップＳＴ２８と同様の方法で、フラッシュランプアニールを行う（ステップＳＴ３２）。ここで、フラッシュランプアニールを行う際の各種設定値（たとえば、フラッシュ光の出力値、または、フラッシュ光の照射時間など）は、予備加熱（アシスト加熱）およびテスト熱処理と同一である必要はない。 Next, the semiconductor wafer W to be processed is subjected to flash lamp annealing in the same manner as in steps ST21 to ST28 (step ST32). Here, various set values (for example, the output value of the flash light or the irradiation time of the flash light) at the time of performing the flash lamp annealing do not have to be the same as the preheating (assisted heating) and the test heat treatment.
　そして、フラッシュランプアニールの際に上部放射温度計２５の量子型赤外線センサー２９を用いて測定された、半導体ウエハＷの下面温度は測定温度（アシスト）として、半導体ウエハＷの上面の上昇温度（ジャンプ温度）は測定温度（ジャンプ）として、それぞれ記憶部３５に記憶される（ステップＳＴ３３）。 Then, the lower surface temperature of the semiconductor wafer W measured by using the quantum infrared sensor 29 of the upper radiation thermometer 25 at the time of flash lamp annealing is the measurement temperature (assist), and the rising temperature (jump) of the upper surface of the semiconductor wafer W is used. The temperature) is stored in the storage unit 35 as the measurement temperature (jump) (step ST33).
　次に、制御部３の温度補正部３２は、ステップＳＴ３３において測定された測定温度を、記憶部３５に記憶されている補正係数を用いて補正する。具体的には、以下の式（４）に示されるように、補正係数ＣＦを用いて、測定温度（ジャンプ）Ｔｍｅａｓｕｒｅ（ｊｕ）および測定温度（アシスト）Ｔｍｅａｓｕｒｅ（ａｓ）を、補正測定温度Ｔ’ｍｅａｓｕｒｅに補正する（ステップＳＴ３４）。 Next, the temperature correction unit 32 of the control unit 3 corrects the measured temperature measured in step ST33 by using the correction coefficient stored in the storage unit 35. Specifically, as shown in the following equation (4), the measurement temperature (jump) T measure (ju) and the measurement temperature (assist) T measure (as) are corrected using the correction coefficient CF. T 'is corrected to measure (step ST34).
Figure JPOXMLDOC01-appb-M000004
Figure JPOXMLDOC01-appb-M000004
　上記の実施の形態によれば、制御部３は、補正測定温度Ｔ’ｍｅａｓｕｒｅを参照することによって、時間の経過とともに量子型赤外線センサー２９の出力電圧が変化する場合であっても、半導体ウエハＷの上面の温度を高い精度で測定することができる。そのため、フラッシュランプアニールが適切に行われているか否かを適切に確認することができる。 According to the above embodiment, the control unit 3 refers to the corrected measurement temperature T'measure , and even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface of the surface can be measured with high accuracy. Therefore, it can be appropriately confirmed whether or not the flash lamp annealing is properly performed.
　また、アシスト温度を考慮することによって、量子型赤外線センサー２９の出力電圧の変化によって影響を受ける、半導体ウエハＷの上面の上昇温度（ジャンプ温度）にのみ補正係数をかけることによって、半導体ウエハＷの上面の温度を高い精度で測定することができる。すなわち、予備加熱（アシスト加熱）による半導体ウエハＷ（特にシリコン）の熱伝導率の変化も考慮した温度測定が可能となる。 Further, by considering the assist temperature, the correction coefficient is applied only to the rising temperature (jump temperature) of the upper surface of the semiconductor wafer W, which is affected by the change in the output voltage of the quantum infrared sensor 29. The temperature of the upper surface can be measured with high accuracy. That is, it is possible to measure the temperature in consideration of the change in the thermal conductivity of the semiconductor wafer W (particularly silicon) due to the preheating (assisted heating).
　＜第３の実施の形態＞
　本実施の形態に関する熱処理システムにおける熱処理装置、および、熱処理方法について説明する。なお、以下の説明においては、以上に記載された実施の形態で説明された構成要素と同様の構成要素については同じ符号を付して図示し、その詳細な説明については適宜省略するものとする。 <Third embodiment>
The heat treatment apparatus and the heat treatment method in the heat treatment system according to the present embodiment will be described. In the following description, components similar to the components described in the above-described embodiment will be illustrated with the same reference numerals, and detailed description thereof will be omitted as appropriate. ..
　温度補正部３２が、補正係数ＣＦを用いて、測定温度（ジャンプ）Ｔｍｅａｓｕｒｅ（ｊｕ）および測定温度（アシスト）Ｔｍｅａｓｕｒｅ（ａｓ）を、補正測定温度Ｔ’ｍｅａｓｕｒｅに補正する場合、フラッシュランプＦＬの発光時間に対応するパルス波形などの条件によっては、補正精度が低下する場合がある。 If temperature correction unit 32, by using the correction coefficient CF, the measured temperature (jump) T measure (ju) and the measured temperature (assist) T measure (as), is corrected to the corrected measured temperature T 'its measure, flash lamp FL The correction accuracy may decrease depending on the conditions such as the pulse waveform corresponding to the light emission time of.
　そのため、本実施の形態では、使用されうる半導体ウエハＷの処理レシピの条件、たとえば、パルス波形、充電電圧、アシスト温度またはゾーンオフセット値などに応じて、処理レシピごとに異なる基準温度Ｔｒｅｆを取得し、さらに、対応する複数の補正係数ＣＦを取得することによって、処理レシピの違いによる補正精度のばらつきを抑制する。ここで、ゾーンオフセット値とは、図３に示されたフラッシュランプＦＬの基板Ｗの中央部に対向して配置される部分の充電電圧を、基板Ｗの周縁部に対向して配置される部分の充電電圧よりも低く設定する際のオフセット値である。 Therefore, in the present embodiment, different reference temperature Tref is acquired for each processing recipe according to the conditions of the processing recipe of the semiconductor wafer W that can be used, for example, the pulse waveform, the charging voltage, the assist temperature, the zone offset value, and the like. Further, by acquiring a plurality of corresponding correction coefficient CFs, it is possible to suppress variations in correction accuracy due to differences in processing recipes. Here, the zone offset value is a portion of the flash lamp FL shown in FIG. 3 in which the charging voltage of the portion arranged facing the central portion of the substrate W is arranged so as to face the peripheral edge portion of the substrate W. This is the offset value when the voltage is set lower than the charging voltage of.
　また、補正係数ＣＦが、たとえば、発光時間の変数であるパルス波形ｐｗ、発光強度の変数である充電電圧ｃｖ、図１４の予備加熱温度Ｔ１に対応するアシスト加熱温度ａｓ、および、ゾーンオフセット値ｚｏの４変数を有する補正係数ＣＦ（ｐｗ、ｃｖ、ａｓ、ｚｏ）であってもよい。その場合、たとえば、変数ｐｗが変化する場合に、他の変数はあらかじめ定められた基準値として固定されてもよい。 Further, the correction coefficient CF is, for example, a pulse waveform pw which is a variable of light emission time, a charging voltage cv which is a variable of light emission intensity, an assist heating temperature as corresponding to the preheating temperature T1 of FIG. 14, and a zone offset value zo. It may be a correction coefficient CF (pw, cv, as, zo) having four variables of. In that case, for example, when the variable pw changes, the other variables may be fixed as predetermined reference values.
　＜第４の実施の形態＞
　本実施の形態に関する熱処理システムにおける熱処理装置、および、熱処理方法について説明する。なお、以下の説明においては、以上に記載された実施の形態で説明された構成要素と同様の構成要素については同じ符号を付して図示し、その詳細な説明については適宜省略するものとする。 <Fourth Embodiment>
The heat treatment apparatus and the heat treatment method in the heat treatment system according to the present embodiment will be described. In the following description, components similar to the components described in the above-described embodiment will be illustrated with the same reference numerals, and detailed description thereof will be omitted as appropriate. ..
　第３の実施の形態において得られた複数の補正係数ＣＦは、補正係数テーブルにおいて保持することができる。 The plurality of correction coefficient CFs obtained in the third embodiment can be retained in the correction coefficient table.
　図１５は、処理レシピごとに補正係数ＣＦを保持する補正係数テーブルの例を模式的に示す図である。図１５においては、処理レシピにおけるパルス波形、充電電圧、アシスト温度およびゾーンオフセット値の違いに応じて、補正係数ナンバーに対応して複数の補正係数ＣＦが保持されている。 FIG. 15 is a diagram schematically showing an example of a correction coefficient table that holds a correction coefficient CF for each processing recipe. In FIG. 15, a plurality of correction coefficient CFs are held corresponding to the correction coefficient numbers according to the difference in the pulse waveform, the charging voltage, the assist temperature, and the zone offset value in the processing recipe.
　また、第３の実施の形態において得られた変数を有する補正係数ＣＦ（ｐｗ、ｃｖ、ａｓ、ｚｏ）は、それぞれの変数を指定することによって選択可能とすることができる。 Further, the correction coefficient CF (pw, cv, as, zo) having the variables obtained in the third embodiment can be made selectable by designating each variable.
　図１６は、変数を有する補正係数ＣＦ（ｐｗ、ｃｖ、ａｓ、ｚｏ）のそれぞれの変数を入力するためのＧＵＩ画面の例を示す図である。図１６においては、補正係数ＣＦ（ｐｗ、ｃｖ、ａｓ、ｚｏ）のそれぞれの変数が直接入力またはプルダウン形式などで指定欄３００、指定欄３０１、指定欄３０２および指定欄３０３において指定可能となっており、入力された変数に対応する補正係数（または、対応する補正係数ナンバー）が制御部３の演算によって指定欄３０４に表示される。ただし、指定欄３０４に直接補正係数（または、対応する補正係数ナンバー）が入力されてもよい。なお、ゾーンオフセット値の切り替え表示欄３０５は、指定欄３０３において電圧値が指定されると、オフ状態からオン状態に切り替えて表示されるが、別途、ゾーンオフセットの切り替えのためのセットボタンなどが設けられてもよい。 FIG. 16 is a diagram showing an example of a GUI screen for inputting each variable of the correction coefficient CF (pw, cv, as, zo) having the variable. In FIG. 16, each variable of the correction coefficient CF (pw, cv, as, zo) can be specified in the designated field 300, the designated field 301, the designated field 302, and the designated field 303 by direct input or pull-down format. The correction coefficient (or the corresponding correction coefficient number) corresponding to the input variable is displayed in the designated field 304 by the calculation of the control unit 3. However, the correction coefficient (or the corresponding correction coefficient number) may be directly input to the designated field 304. The zone offset value switching display field 305 is displayed by switching from the off state to the on state when the voltage value is specified in the designation field 303, but a set button for switching the zone offset is separately displayed. It may be provided.
　＜第５の実施の形態＞
　本実施の形態に関する熱処理システムにおける熱処理装置、および、熱処理方法について説明する。なお、以下の説明においては、以上に記載された実施の形態で説明された構成要素と同様の構成要素については同じ符号を付して図示し、その詳細な説明については適宜省略するものとする。 <Fifth Embodiment>
The heat treatment apparatus and the heat treatment method in the heat treatment system according to the present embodiment will be described. In the following description, components similar to the components described in the above-described embodiment will be illustrated with the same reference numerals, and detailed description thereof will be omitted as appropriate. ..
　第３、４の実施の形態において得られた複数の補正係数ＣＦがライブラリへ格納され、任意の処理レシピが作成された際に、制御部３が、ライブラリから処理レシピに適する補正係数ＣＦを自動的に選択するように構成されてもよい。 When a plurality of correction coefficient CFs obtained in the third and fourth embodiments are stored in the library and an arbitrary processing recipe is created, the control unit 3 automatically selects the correction coefficient CF suitable for the processing recipe from the library. It may be configured to be selected as a target.
　制御部３は、最適化手法によって処理レシピに適する補正係数ＣＦを選択してもよい。たとえば、複数のパターンの充電電圧ｃｖに対応する補正係数ＣＦを保持しておき、任意の充電電圧ｃｖが入力された際に、最小二乗法によるカーブフィッティングによって最適な補正係数ＣＦを推定してもよい。 The control unit 3 may select a correction coefficient CF suitable for the processing recipe by an optimization method. For example, even if the correction coefficient CF corresponding to the charging voltage cv of a plurality of patterns is held and the optimum correction coefficient CF is estimated by curve fitting by the least squares method when an arbitrary charging voltage cv is input. Good.
　また、制御部３は、機械学習によって処理レシピに適する補正係数ＣＦを選択してもよい。たとえば、４変数（パルス波形ｐｗ、充電電圧ｃｖ、アシスト加熱温度ａｓおよびゾーンオフセット値ｚｏ）と、対応する補正係数ＣＦとを教師データとしてニューラルネットワークなどで学習し、上記の４変数の入力に基づいて最適な補正係数ＣＦを出力可能となった学習済みモデルが、制御部３に搭載されてもよい。 Further, the control unit 3 may select a correction coefficient CF suitable for the processing recipe by machine learning. For example, four variables (pulse waveform pw, charging voltage cv, assist heating temperature as and zone offset value zo) and the corresponding correction coefficient CF are learned as training data by a neural network or the like, and based on the input of the above four variables. A trained model capable of outputting the optimum correction coefficient CF may be mounted on the control unit 3.
　＜以上に記載された実施の形態によって生じる効果について＞
　次に、以上に記載された実施の形態によって生じる効果の例を示す。なお、以下の説明においては、以上に記載された実施の形態に例が示された具体的な構成に基づいて当該効果が記載されるが、同様の効果が生じる範囲で、本願明細書に例が示される他の具体的な構成と置き換えられてもよい。 <About the effect caused by the above-described embodiment>
Next, an example of the effect produced by the above-described embodiment will be shown. In the following description, the effect is described based on the specific configuration shown in the embodiment described above, but to the extent that the same effect occurs, the examples in the present specification. May be replaced with other specific configurations indicated by.
　また、当該置き換えは、複数の実施の形態に跨ってなされてもよい。すなわち、異なる実施の形態において例が示されたそれぞれの構成が組み合わされて、同様の効果が生じる場合であってもよい。 Further, the replacement may be made across a plurality of embodiments. That is, it may be the case that the respective configurations shown in the examples in different embodiments are combined to produce the same effect.
　以上に記載された実施の形態によれば、熱処理装置は、量子型赤外線センサー２９と、係数算出部３１と、温度補正部３２とを備える。量子型赤外線センサー２９は、第１の基板の温度および第２の基板の温度を測定する。ここで、第１の基板は、たとえば、テスト基板に対応するものである。また、第２の基板は、たとえば、半導体ウエハＷに対応するものである。ここで、量子型赤外線センサー２９によって測定される、フラッシュ光が照射される第１の熱処理が行われたテスト基板の温度を基準温度とする。なお、第１の熱処理は、たとえば、テスト熱処理に対応するものである。また、量子型赤外線センサー２９によって測定される、テスト熱処理が行われた後に、再びテスト熱処理が行われたテスト基板の温度をシフト温度とする。係数算出部３１は、基準温度およびシフト温度に基づいて、補正係数を算出する。また、温度補正部３２は、量子型赤外線センサー２９によって測定される、フラッシュ光が照射される第２の熱処理が行われた半導体ウエハＷの温度を、補正係数を用いて補正する。ここで、第２の熱処理は、たとえば、フラッシュランプアニールに対応するものである。 According to the embodiment described above, the heat treatment apparatus includes a quantum infrared sensor 29, a coefficient calculation unit 31, and a temperature correction unit 32. The quantum infrared sensor 29 measures the temperature of the first substrate and the temperature of the second substrate. Here, the first substrate corresponds to, for example, a test substrate. Further, the second substrate corresponds to, for example, the semiconductor wafer W. Here, the temperature of the test substrate on which the first heat treatment to be irradiated with the flash light, which is measured by the quantum infrared sensor 29, is performed is set as the reference temperature. The first heat treatment corresponds to, for example, a test heat treatment. Further, the temperature of the test substrate that has been subjected to the test heat treatment again after the test heat treatment, which is measured by the quantum infrared sensor 29, is defined as the shift temperature. The coefficient calculation unit 31 calculates the correction coefficient based on the reference temperature and the shift temperature. Further, the temperature correction unit 32 corrects the temperature of the semiconductor wafer W that has been subjected to the second heat treatment to be irradiated with the flash light, which is measured by the quantum infrared sensor 29, by using the correction coefficient. Here, the second heat treatment corresponds to, for example, flash lamp annealing.
　このような構成によれば、半導体ウエハＷの温度を、補正係数を用いて補正することによって、時間の経過とともに量子型赤外線センサー２９の出力電圧が変化する場合であっても、半導体ウエハＷの上面の温度を高い精度で測定することができる。そのため、フラッシュランプアニールが適切に行われているか否かを適切に確認することができる。 According to such a configuration, by correcting the temperature of the semiconductor wafer W using the correction coefficient, even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface can be measured with high accuracy. Therefore, it can be appropriately confirmed whether or not the flash lamp annealing is properly performed.
　また、補正係数によって測定温度を直接補正するため、たとえば、量子型赤外線センサー２９の出力電圧を補正する場合に比べて、補正係数が応用可能となる範囲が、電圧を用いない他の機器などにも拡がる。たとえば、所定の補正係数を算出する量子型赤外線センサーを備える熱処理装置とは異なる、熱処理装置に備えられる別のセンサーで測定される測定温度に対し、所定の補正係数を用いて出力を補正してもよい。さらに、熱処理装置に備えられる複数のセンサーによって半導体ウエハＷの表面における複数の箇所における温度を測定する場合において、所定の補正係数によってそれぞれのセンサーの出力を補正してもよい。 Further, since the measurement temperature is directly corrected by the correction coefficient, the range in which the correction coefficient can be applied is, for example, compared to the case where the output voltage of the quantum infrared sensor 29 is corrected, for other devices that do not use voltage. Also spreads. For example, the output is corrected by using a predetermined correction coefficient for the measurement temperature measured by another sensor provided in the heat treatment device, which is different from the heat treatment device provided with the quantum infrared sensor that calculates a predetermined correction coefficient. May be good. Further, when the temperature at a plurality of locations on the surface of the semiconductor wafer W is measured by a plurality of sensors provided in the heat treatment apparatus, the output of each sensor may be corrected by a predetermined correction coefficient.
　なお、上記の構成に本願明細書に例が示された他の構成を適宜追加した場合、すなわち、上記の構成としては言及されなかった本願明細書中の他の構成が適宜追加された場合であっても、同様の効果を生じさせることができる。 In addition, when other configurations shown in the present specification are appropriately added to the above configurations, that is, when other configurations in the present specification not mentioned as the above configurations are appropriately added. Even if there is, the same effect can be produced.
　また、以上に記載された実施の形態によれば、係数算出部３１は、基準温度とシフト温度との比率に基づいて補正係数を算出する。このような構成によれば、半導体ウエハＷの温度を、補正係数を用いて補正することによって、時間の経過とともに量子型赤外線センサー２９の出力電圧が変化する場合であっても、半導体ウエハＷの上面の温度を高い精度で測定することができる。 Further, according to the embodiment described above, the coefficient calculation unit 31 calculates the correction coefficient based on the ratio of the reference temperature and the shift temperature. According to such a configuration, by correcting the temperature of the semiconductor wafer W using the correction coefficient, even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface can be measured with high accuracy.
　また、以上に記載された実施の形態によれば、基準温度およびシフト温度のうちの少なくとも一方を、複数回測定されたテスト基板の温度の平均値とする。このような構成によれば、基準温度およびシフト温度のうちの少なくとも一方の測定精度が高まるため、補正係数の精度も高まる。 Further, according to the embodiment described above, at least one of the reference temperature and the shift temperature is set as the average value of the temperatures of the test substrates measured a plurality of times. According to such a configuration, the measurement accuracy of at least one of the reference temperature and the shift temperature is improved, so that the accuracy of the correction coefficient is also improved.
　また、以上に記載された実施の形態によれば、熱処理装置１６０は、基準温度とシフト温度との差がしきい値を超えた場合に警報を発報するための警報部３６を備える。このような構成によれば、感度シフトが過度に大きい場合に、量子型赤外線センサー２９の不具合、さらには、チャンバー６における他の構成の不具合（透明窓２６の汚れなど）などを想定することができる。 Further, according to the embodiment described above, the heat treatment apparatus 160 includes an alarm unit 36 for issuing an alarm when the difference between the reference temperature and the shift temperature exceeds the threshold value. According to such a configuration, when the sensitivity shift is excessively large, it is possible to assume a defect of the quantum infrared sensor 29, a defect of another configuration in the chamber 6 (dirt of the transparent window 26, etc.), and the like. it can.
　また、以上に記載された実施の形態によれば、量子型赤外線センサー２９は、少なくともテスト基板の、フラッシュ光が照射される上面における温度を測定する。そして、熱処理装置１６０は、少なくともテスト基板の下面における温度を測定するための下面温度計を備える。ここで、下面温度計は、たとえば、下部放射温度計２０に対応するものである。また、下部放射温度計２０によって測定される、テスト熱処理が行われる前のテスト基板の下面における温度をアシスト温度とする。そして、係数算出部３１は、基準温度、シフト温度およびアシスト温度に基づいて、補正係数を算出する。このような構成によれば、アシスト温度を考慮することによって、量子型赤外線センサー２９の出力電圧の変化によって影響を受ける、半導体ウエハＷの上面の上昇温度（ジャンプ温度）にのみ補正係数をかけることによって、半導体ウエハＷの上面の温度を高い精度で測定することができる。 Further, according to the embodiment described above, the quantum infrared sensor 29 measures at least the temperature on the upper surface of the test substrate to which the flash light is irradiated. The heat treatment apparatus 160 includes a bottom surface thermometer for measuring at least the temperature on the bottom surface of the test substrate. Here, the bottom surface thermometer corresponds to, for example, the lower radiation thermometer 20. Further, the temperature on the lower surface of the test substrate before the test heat treatment, which is measured by the lower radiation thermometer 20, is defined as the assist temperature. Then, the coefficient calculation unit 31 calculates the correction coefficient based on the reference temperature, the shift temperature, and the assist temperature. According to such a configuration, by considering the assist temperature, the correction coefficient is applied only to the rising temperature (jump temperature) of the upper surface of the semiconductor wafer W, which is affected by the change in the output voltage of the quantum infrared sensor 29. Therefore, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy.
　また、以上に記載された実施の形態によれば、係数算出部３１は、基準温度とアシスト温度との差と、シフト温度とアシスト温度との差との比率に基づいて、補正係数を算出する。このような構成によれば、半導体ウエハＷの上面の上昇温度（ジャンプ温度）にのみ補正係数をかけることによって、半導体ウエハＷの上面の温度を高い精度で測定することができる。 Further, according to the embodiment described above, the coefficient calculation unit 31 calculates the correction coefficient based on the ratio of the difference between the reference temperature and the assist temperature and the difference between the shift temperature and the assist temperature. .. According to such a configuration, the temperature of the upper surface of the semiconductor wafer W can be measured with high accuracy by applying the correction coefficient only to the rising temperature (jump temperature) of the upper surface of the semiconductor wafer W.
　以上に記載された実施の形態によれば、熱処理方法において、量子型赤外線センサー２９を用いて、フラッシュ光が照射されるテスト熱処理が行われたテスト基板の温度を測定し、かつ、テスト基板の温度を基準温度とする工程と、テスト熱処理が行われた後に、量子型赤外線センサー２９を用いて、テスト熱処理が行われたテスト基板の温度を再び測定し、かつ、テスト基板の温度をシフト温度とする工程と、量子型赤外線センサー２９によって測定される、フラッシュ光が照射されるフラッシュランプアニールが行われた半導体ウエハＷの温度を、基準温度およびシフト温度に基づいて算出される補正係数を用いて補正する工程とを備える。 According to the embodiment described above, in the heat treatment method, the temperature of the test substrate subjected to the test heat treatment to be irradiated with the flash light is measured by using the quantum infrared sensor 29, and the temperature of the test substrate is measured. After the step of using the temperature as the reference temperature and the test heat treatment, the temperature of the test substrate subjected to the test heat treatment is measured again using the quantum infrared sensor 29, and the temperature of the test substrate is shifted to the shift temperature. And the temperature of the semiconductor wafer W that has been annealed by the flash lamp irradiated with the flash light, which is measured by the quantum infrared sensor 29, using the correction coefficient calculated based on the reference temperature and the shift temperature. It is provided with a process of making corrections.
　このような構成によれば、半導体ウエハＷの温度を、補正係数を用いて補正することによって、時間の経過とともに量子型赤外線センサー２９の出力電圧が変化する場合であっても、半導体ウエハＷの上面の温度を高い精度で測定することができる。 According to such a configuration, by correcting the temperature of the semiconductor wafer W using the correction coefficient, even when the output voltage of the quantum infrared sensor 29 changes with the passage of time, the semiconductor wafer W The temperature of the upper surface can be measured with high accuracy.
　なお、特段の制限がない場合には、それぞれの処理が行われる順序は変更することができる。 If there are no special restrictions, the order in which each process is performed can be changed.
　なお、上記の構成に本願明細書に例が示された他の構成を適宜追加した場合、すなわち、上記の構成としては言及されなかった本願明細書中の他の構成が適宜追加された場合であっても、同様の効果を生じさせることができる。 In addition, when other configurations shown in the present specification are appropriately added to the above configurations, that is, when other configurations in the present specification not mentioned as the above configurations are appropriately added. Even if there is, the same effect can be produced.
　＜以上に記載された実施の形態の変形例について＞
　以上に記載された実施の形態では、それぞれの構成要素の材質、材料、寸法、形状、相対的配置関係または実施の条件などについても記載する場合があるが、これらはすべての局面においてひとつの例であって、本願明細書に記載されたものに限られることはないものとする。 <About the modified example of the embodiment described above>
In the embodiments described above, the materials, materials, dimensions, shapes, relative arrangement relationships, implementation conditions, etc. of each component may also be described, but these are one example in all aspects. However, it is not limited to those described in the present specification.
　したがって、例が示されていない無数の変形例、および、均等物が、本願明細書に開示される技術の範囲内において想定される。たとえば、少なくとも１つの構成要素を変形する場合、追加する場合または省略する場合、さらには、少なくとも１つの実施の形態における少なくとも１つの構成要素を抽出し、他の実施の形態における構成要素と組み合わせる場合が含まれるものとする。 Therefore, innumerable variants and equivalents for which examples are not shown are envisioned within the scope of the technology disclosed herein. For example, when transforming, adding or omitting at least one component, or when extracting at least one component in at least one embodiment and combining it with the component in another embodiment. Shall be included.
　また、以上に記載された実施の形態において、特に指定されずに材料名などが記載された場合は、矛盾が生じない限り、当該材料に他の添加物が含まれた、たとえば、合金などが含まれるものとする。 Further, in the above-described embodiment, when a material name or the like is described without being specified, the material contains other additives, for example, an alloy, etc., as long as there is no contradiction. It shall be included.
　３　制御部
　４　ハロゲン加熱部
　５　フラッシュ加熱部
　６　チャンバー
　７　保持部
　１０　移載機構
　１１　移載アーム
　１２　リフトピン
　１３　水平移動機構
　１４　昇降機構
　２０　下部放射温度計
　２１，２６　透明窓
　２２，２７　温度測定ユニット
　２４　熱型赤外線センサー
　２５　上部放射温度計
　２９　量子型赤外線センサー
　３１　係数算出部
　３２　温度補正部
　３３　表示部
　３４　入力部
　３５　記憶部
　３６　警報部
　４１，５１　筐体
　４３，５２　リフレクタ
　５３　ランプ光放射窓
　６１　チャンバー側部
　６１ａ，６１ｂ，７９　貫通孔
　６２　凹部
　６３　上側チャンバー窓
　６４　下側チャンバー窓
　６５　熱処理空間
　６６　搬送開口部
　６８，６９　反射リング
　７１　基台リング
　７２　連結部
　７４　サセプタ
　７５　保持プレート
　７５ａ　保持面
　７６　ガイドリング
　７７　基板支持ピン
　７８　開口部
　８１　ガス供給孔
　８２，８７　緩衝空間
　８３　ガス供給管
　８４，８９，１９２　バルブ
　８５　処理ガス供給源
　８６　ガス排気孔
　８８，１９１　ガス排気管
　１００　熱処理システム
　１０１　インデクサ部
　１１０　ロードポート
　１２０　受渡ロボット
　１２０Ｒ，１２０Ｓ，１５０Ｒ　矢印
　１２１　ハンド
　１３０，１４０　冷却部
　１３１　第１クールチャンバー
　１４１　第２クールチャンバー
　１５０　搬送ロボット
　１５１ａ，１５１ｂ　搬送ハンド
　１６０　熱処理装置
　１７０　搬送チャンバー
　１８１，１８２，１８３，１８４，１８５　ゲートバルブ
　１９０　排気部
　２３０　アライメント部
　２３１　アライメントチャンバー
　３００，３０１，３０２，３０３，３０４　指定欄
　３０５　切り替え表示欄 3 Control unit 4 Halogen heating unit 5 Flash heating unit 6 Chamber 7 Holding unit 10 Transfer mechanism 11 Transfer arm 12 Lift pin 13 Horizontal movement mechanism 14 Lifting mechanism 20 Lower radiation thermometer 21, 26 Transparent window 22, 27 Temperature measurement unit 24 Thermal infrared sensor 25 Upper radiation thermometer 29 Quantum infrared sensor 31 Coefficient calculation unit 32 Temperature correction unit 33 Display unit 34 Input unit 35 Storage unit 36 Alarm unit 41,51 Housing 43,52 Reflector 53 Lamp light emission window 61 Chamber Sides 61a, 61b, 79 Through holes 62 Recesses 63 Upper chamber window 64 Lower chamber window 65 Heat treatment space 66 Transport opening 68, 69 Reflective ring 71 Base ring 72 Connecting part 74 Suceptor 75 Holding plate 75a Holding surface 76 Guide ring 77 Board support pin 78 Opening 81 Gas supply hole 82,87 Buffer space 83 Gas supply pipe 84, 89, 192 Valve 85 Processing gas supply source 86 Gas exhaust hole 88, 191 Gas exhaust pipe 100 Heat treatment system 101 Indexer part 110 Load port 120 Delivery robot 120R, 120S, 150R Arrow 121 Hand 130, 140 Cooling unit 131 1st cool chamber 141 2nd cool chamber 150 Transfer robot 151a, 151b Transfer hand 160 Heat treatment device 170 Transfer chamber 181, 182, 183, 184, 185 Gate Valve 190 Exhaust part 230 Alignment part 231 Alignment chamber 300, 301, 302, 303, 304 Designation column 305 Switching display column

Claims (7)

  1. 　フラッシュ光を照射することによって第１の基板および第２の基板を加熱する熱処理装置であり、
    　前記第１の基板の温度および前記第２の基板の温度を測定するための量子型赤外線センサーを備え、
    　前記量子型赤外線センサーによって測定される、前記フラッシュ光が照射される第１の熱処理が行われた前記第１の基板の温度を基準温度とし、
    　前記量子型赤外線センサーによって測定される、前記第１の熱処理が行われた後に、再び前記第１の熱処理が行われた前記第１の基板の温度をシフト温度とし、
    　前記熱処理装置は、
    　前記量子型赤外線センサーによって測定される、前記フラッシュ光が照射される第２の熱処理が行われた前記第２の基板の温度を、前記基準温度および前記シフト温度に基づいて算出された補正係数を用いて補正するための温度補正部をさらに備える、
    　熱処理装置。     It is a heat treatment apparatus that heats the first substrate and the second substrate by irradiating with flash light.
    A quantum infrared sensor for measuring the temperature of the first substrate and the temperature of the second substrate is provided.
    The temperature of the first substrate on which the first heat treatment to be irradiated with the flash light, which is measured by the quantum infrared sensor, is set as a reference temperature.
    The temperature of the first substrate on which the first heat treatment was performed again after the first heat treatment measured by the quantum infrared sensor was defined as the shift temperature.
    The heat treatment apparatus
    A correction coefficient calculated based on the reference temperature and the shift temperature of the temperature of the second substrate subjected to the second heat treatment irradiated with the flash light, which is measured by the quantum infrared sensor. Further provided with a temperature compensator for compensating by using,
    Heat treatment equipment.
  2. 　請求項１に記載の熱処理装置であり、
    　前記補正係数は、前記基準温度と前記シフト温度との比率に基づいて算出される、
    　熱処理装置。     The heat treatment apparatus according to claim 1.
    The correction coefficient is calculated based on the ratio of the reference temperature to the shift temperature.
    Heat treatment equipment.
  3. 　請求項１または２に記載の熱処理装置であり、
    　前記補正係数は、少なくとも一方が複数回測定された前記第１の基板の温度の平均値である、前記基準温度および前記シフト温度に基づいて算出される、
    　熱処理装置。     The heat treatment apparatus according to claim 1 or 2.
    The correction coefficient is calculated based on the reference temperature and the shift temperature, at least one of which is the average value of the temperatures of the first substrate measured a plurality of times.
    Heat treatment equipment.
  4. 　請求項１から３のうちのいずれか１つに記載の熱処理装置であり、
    　前記熱処理装置は、前記基準温度と前記シフト温度との差がしきい値を超えた場合に警報を発報するための警報部をさらに備える、
    　熱処理装置。     The heat treatment apparatus according to any one of claims 1 to 3.
    The heat treatment apparatus further includes an alarm unit for issuing an alarm when the difference between the reference temperature and the shift temperature exceeds a threshold value.
    Heat treatment equipment.
  5. 　請求項１から４のうちのいずれか１つに記載の熱処理装置であり、
    　前記量子型赤外線センサーは、少なくとも前記第１の基板の、前記フラッシュ光が照射される上面における温度を測定し、
    　前記熱処理装置は、少なくとも前記第１の基板の下面における温度を測定するための下面温度計をさらに備え、
    　前記下面温度計によって測定される、前記第１の熱処理が行われる前の前記第１の基板の下面における温度をアシスト温度とし、
    　前記温度補正部は、前記基準温度、前記シフト温度および前記アシスト温度に基づいて算出された前記補正係数を用いて前記第２の基板の温度を補正する、
    　熱処理装置。     The heat treatment apparatus according to any one of claims 1 to 4.
    The quantum infrared sensor measures the temperature at least on the upper surface of the first substrate irradiated with the flash light.
    The heat treatment apparatus further includes a bottom surface thermometer for measuring the temperature at least on the bottom surface of the first substrate.
    The temperature on the lower surface of the first substrate before the first heat treatment, which is measured by the lower surface thermometer, is defined as the assist temperature.
    The temperature correction unit corrects the temperature of the second substrate by using the correction coefficient calculated based on the reference temperature, the shift temperature, and the assist temperature.
    Heat treatment equipment.
  6. 　請求項５に記載の熱処理装置であり、
    　前記補正係数は、前記基準温度と前記アシスト温度との差と、前記シフト温度と前記アシスト温度との差との比率に基づいて算出される、
    　熱処理装置。     The heat treatment apparatus according to claim 5.
    The correction coefficient is calculated based on the ratio of the difference between the reference temperature and the assist temperature and the difference between the shift temperature and the assist temperature.
    Heat treatment equipment.
  7. 　フラッシュ光を照射することによって第１の基板および第２の基板を加熱する熱処理方法であり、
    　量子型赤外線センサーを用いて、前記フラッシュ光が照射される第１の熱処理が行われた前記第１の基板の温度を測定し、かつ、測定された前記第１の基板の温度を基準温度とする工程と、
    　前記第１の熱処理が行われた後に、前記量子型赤外線センサーを用いて、前記第１の熱処理が行われた前記第１の基板の温度を再び測定し、かつ、再び測定された前記第１の基板の温度をシフト温度とする工程と、
    　前記量子型赤外線センサーによって測定される、前記フラッシュ光が照射される第２の熱処理が行われた前記第２の基板の温度を、前記基準温度および前記シフト温度に基づいて算出される補正係数を用いて補正する工程とを備える、
    　熱処理方法。     It is a heat treatment method that heats the first substrate and the second substrate by irradiating with flash light.
    Using a quantum infrared sensor, the temperature of the first substrate subjected to the first heat treatment irradiated with the flash light is measured, and the measured temperature of the first substrate is used as a reference temperature. And the process to do
    After the first heat treatment was performed, the temperature of the first substrate on which the first heat treatment was performed was measured again using the quantum infrared sensor, and the first measured again. The process of using the temperature of the substrate as the shift temperature and
    A correction coefficient calculated based on the reference temperature and the shift temperature of the temperature of the second substrate subjected to the second heat treatment to which the flash light is irradiated, which is measured by the quantum infrared sensor. Provided with a step of correction using
    Heat treatment method.
PCT/JP2020/039550 2019-12-24 2020-10-21 Heat treatment apparatus and heat treatment method WO2021131276A1 (en)

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