WO2021128435A1 - 新半导体电子原理技术与器件 - Google Patents

新半导体电子原理技术与器件 Download PDF

Info

Publication number
WO2021128435A1
WO2021128435A1 PCT/CN2020/000042 CN2020000042W WO2021128435A1 WO 2021128435 A1 WO2021128435 A1 WO 2021128435A1 CN 2020000042 W CN2020000042 W CN 2020000042W WO 2021128435 A1 WO2021128435 A1 WO 2021128435A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
junction
voltage
modulation
impedance
Prior art date
Application number
PCT/CN2020/000042
Other languages
English (en)
French (fr)
Inventor
汪克明
汪润泽
Original Assignee
汪克明
汪润泽
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 汪克明, 汪润泽 filed Critical 汪克明
Priority to KR1020227025314A priority Critical patent/KR20220119678A/ko
Priority to CA3163026A priority patent/CA3163026A1/en
Priority to AU2020414761A priority patent/AU2020414761A1/en
Priority to JP2022539754A priority patent/JP2023508509A/ja
Priority to EP20907132.3A priority patent/EP4084070A4/en
Priority to CN202080025941.4A priority patent/CN113826203A/zh
Publication of WO2021128435A1 publication Critical patent/WO2021128435A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H01L27/0211—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique adapted for requirements of temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers

Definitions

  • the present invention is a fundamental change in semiconductor science and technology. New semiconductor electronic principles, technologies and passive semiconductor electronic devices based on changes in electrical conductivity replace current semiconductor electronic principles, technologies and active semiconductor electronic devices based on changes in current. All semiconductor electronic technology and equipment applications. It involves semiconductor electronics principles and technology, device structure and working principles, circuit design, device manufacturing and materials, product functions and characteristics, and belongs to the field of semiconductor electronics technology.
  • the working principle of the bipolar junction transistor is: the current injected from the base generates and controls the emitter current (the majority carrier is controlled by the minority carrier), and the working principle of the unipolar field effect transistor is: the gate voltage is induced Drain current (field effect theory: the lateral current is controlled by the vertical electric field).
  • semiconductor science and technology which is widely used in all science and technology from mobile communications, electronic computers, weapon systems to space science and technology, and semiconductor science and technology has become the most important subject today.
  • semiconductor electronic theories and technologies are no longer able to effectively solve the stability, reliability, power consumption, speed and volume, etc.
  • the drain of a unipolar field effect (MOS) transistor is operated with a reverse bias voltage, and the drain junction is also a PN
  • the reverse biased PN junction is a high-impedance barrier, and the forward current cannot pass. Therefore, the source current cannot pass through the drain junction to reach the drain and become the drain current. Therefore, it is theoretical
  • the recognition is not established, but the collector current and drain current are objectively existing, so the working principle of the transistor needs to be re-understood.
  • the current semiconductor electronics theory believes that bipolar junction transistors and unipolar field effect (MOS) transistors are both active current components, and the current change is used as the basis for recognition and analysis.
  • bipolar junction transistors In bipolar junction transistors, it is injected from the base.
  • the current generates and controls the emitter current, or the voltage applied to the base generates and controls the emitter current.
  • the working state of the transistor is determined by the base current.
  • the collector current changes linearly.
  • the material and process of manufacturing transistors are the inevitable problems of transistors.
  • the current amplification factor ⁇ a variable or a constant and determined by those parameters?
  • the current injected from the base since the current injected from the base generates the emitter current, the current injected from the base of any value should generate the emitter current, but the fact is that when applied to the base When the voltage is lower than a certain value, the transistor is in the off state, regardless of the current injected into the base. It is the voltage applied to the base that determines the on or off state of the transistor, not the current injected into the base, and the bipolar junction
  • the collector current of the type transistor is related to the change of the collector voltage and load impedance.
  • the current semiconductor electronic theory believes that: the voltage applied to the gate induces the drain current (field effect theory), the voltage applied to the gate and the drain current It is a linear relationship, the drain current changes linearly, and the drain current is only determined by the voltage applied to the gate, and has nothing to do with changes in the drain voltage and load impedance. But the fact is that the drain current of a unipolar field-effect transistor changes nonlinearly. In a unipolar field-effect transistor (MOS field-effect transistor), since the voltage applied to the gate induces the drain current, the Any value applied on the voltage should induce a drain current, but the fact is that when the voltage applied to the gate is lower than a certain value.
  • the transistor is in the off state, and the drain current and drain voltage of the unipolar field effect transistor It is related to the change of load impedance.
  • the inventor has been conducting independent research on semiconductor theory and technology at his own expense since 1975. After more than 40 years of specialized in-depth research, a large number of experiments and specific solutions to a series of practical problems, the inventors have obtained a current situation based on current changes.
  • the basic principles of semiconductor electronics theory, including field effect theory, cannot be established. After 16 years of continuous research and thinking, I finally found a way to verify the above understanding.
  • the verification circuit is a "ordinary bipolar junction transistor transformer coupled Class B push-pull amplifier" carefully designed to accurately determine the working state of the transistor (transistor conductivity change).
  • the work of the transistor is the change of the conductivity.
  • the current flowing in the transistor is only a dependent variable that changes with the conductivity of the transistor, thus negating the current semiconductor theory based on current changes, including the field effect theory, and creating a new semiconductor electronic theory based on changes in conductivity.
  • the purpose of the present invention is to provide a new principle, technology and device for correct, reliable and efficient conversion of electrical signals, correctly recognize and apply semiconductor electronic devices and technologies, and effectively solve the stability, reliability, power consumption, heat generation, speed and The volume and other issues, with stronger performance, higher stability and reliability, and lower energy consumption devices, improve the ability and speed of data processing, and solve the urgent need to break through the emerging fields such as unmanned driving, artificial intelligence, and smart medical care. , To promote the continued development of semiconductor science and technology.
  • the present invention discloses that the function of a semiconductor electronic device is to convert electrical signals.
  • the conversion of electrical signals is accomplished by modulating the conductivity of the semiconductor electronic device.
  • Conductivity modulation is the foundation of semiconductor electronic technology and devices.
  • a new semiconductor electronics based on conductivity change Principles, technology, and the application of passive semiconductor electronic devices in all semiconductor electronic devices, fully exert the functions and characteristics of semiconductor electronic devices, effectively solve key problems such as heat generation of semiconductor electronic theory and technology, and ensure the realization of goals.
  • the conductivity of the semiconductor is between the conductor and the insulator, and the wide conductivity modulation area is the best material for manufacturing electronic devices.
  • the conductivity of pure semiconductors and semiconductors with uniform free carrier concentration cannot be modulated because there is no mechanism for modulating the conductivity.
  • two connected regions with different carrier concentrations are generated, or the electromagnetic field acts to change the carrier concentration distribution in the semiconductor to form two connected regions with different carrier concentrations , Or semiconductor and metal contact to form two connected regions with different carrier concentrations.
  • the carrier concentration is different, and the majority carriers move to the minority carriers.
  • the sub-regions diffuse, and the carrier concentration is distributed exponentially and the junction self-construction voltage is formed.
  • the carrier concentration and the junction self-construction voltage are interdependent exponential relations.
  • the positive charge carrier concentration and The concentration of negative charge carriers is equal, and the concentration of free carriers is zero, forming a junction with very low conductivity, high resistivity and neutrality.
  • the junction and the junction on both sides The carrier concentration distribution changes exponentially with the difference between the applied voltage and the junction self-built voltage.
  • the carrier concentration on both sides of the junction and the junction will produce a large exponential law. Therefore, by changing the voltage applied to the positive and negative charge regions, the junction and the carrier concentration on both sides of the junction are changed to modulate the conductivity and resistivity of the junction.
  • the junction formed in the semiconductor has the function of modulating the conductivity of the semiconductor and is the mechanism for modulating the conductivity of the semiconductor.
  • the P-N junction is a typical one.
  • a positive bias voltage higher than the junction self-built voltage is applied to the PN junction.
  • the carrier concentration of the PN junction is higher than the equilibrium carrier concentration, the PN junction is turned on, and the PN junction is turned on.
  • the conduction voltage of the PN junction is called the gate valve voltage.
  • the carrier concentration of the PN junction changes exponentially with the difference between the applied voltage and the gate valve voltage.
  • the conductivity and resistivity of the PN junction changes with the carrier concentration.
  • the carrier concentration of the PN junction produces a large change according to the exponential law.
  • the conductivity and resistivity of the PN junction change exponentially with the difference between the voltage applied to the PN junction and the gate valve voltage.
  • the current flowing through the PN junction changes with the impedance of the PN junction.
  • the junction of the region and the electrically neutral is a variable impedance with adjustable directional conductivity. Because the applied voltage only changes the carrier concentration distribution of the PN junction, and the PN does not generate current, it is a passive element.
  • the P-N junction self-built voltage is the gate valve voltage of the P-N junction.
  • the positive bias voltage applied to the P-N junction is lower than the gate valve voltage
  • the carrier concentration of the P-N junction is lower than the equilibrium carrier concentration, and the P-N junction is in the cut-off state.
  • a reverse bias voltage is applied to the P-N junction
  • the P-N junction is in an off state.
  • the reverse bias voltage applied to the P-N junction is twice the gate valve voltage, the P-N junction is inverted and a reverse current is generated.
  • the gate voltage of the transistor is formed by the diffusion of majority carriers to the minority carrier region, which is the difference in carrier concentration, which is determined by the intrinsic carrier concentration and doping concentration of the semiconductor material.
  • the intrinsic carrier concentration is a function of temperature. It increases with the increase of temperature and decreases with the decrease of temperature. Therefore, the self-built voltage of PN junction decreases with the increase of temperature and increases with the decrease of temperature. Since the PN junction self-built voltage is the gate valve voltage of the transistor, the gate valve voltage of the transistor is a function of temperature, which decreases with the increase of temperature, and increases with the decrease of temperature. The voltage of the gate valve of the transistor changes with temperature, which causes the working state of the transistor to change with temperature.
  • the transistor temperature drops, the intrinsic carrier concentration decreases, the gate valve voltage rises, the difference between the positive bias voltage and the transistor gate valve voltage decreases, the junction carrier concentration decreases, the conductivity decreases and the resistivity increases, and the junction impedance
  • the positive bias voltage is lower than the gate valve voltage of the transistor
  • the carrier concentration of the junction is lower than the equilibrium carrier concentration, and the transistor is in an off state. In severe cases, the transistor will stop working.
  • the change in the gate valve voltage of the transistor with temperature which is determined by the intrinsic carrier concentration and doping concentration of the semiconductor material, is the fundamental reason for the instability and reduced reliability of the transistor.
  • the junction has the function of modulating the conductivity of the semiconductor.
  • the PN junction is a passive component with directional conductivity and adjustable impedance.
  • the conductivity and resistivity of the PN junction is the difference between the voltage applied to the PN junction and the gate valve voltage. Exponentially regular changes and transistor gate valve voltage is a function of temperature.
  • junctions PN junctions or semiconductor metal junctions that can be formed in a variety of semiconductor materials, alone or in combination into passive semiconductor electronic devices, and manufacturing highly stable Passive transistors with flexibility, high reliability, fast switching speed and low power consumption are used in all semiconductor electronic equipment.
  • the junction formed in semiconductor, or semiconductor and metal contact, or insulator and metal contact has the function of modulating electrical conductivity.
  • the junction is used to form electronic devices that convert electrical signals and photoelectric conversion. It works on the principle and characteristics of junctions and is used in electronics. In the device.
  • the W diode Connect a positive temperature coefficient low resistance thermistor in series on the PN junction or semiconductor metal junction, as shown in Figure 1, the working voltage is applied to the W diode through the thermistor, the thermistor and the W diode are at the same temperature
  • the PN junction is a variable impedance with adjustable directional conductivity.
  • the thermistor is connected in series with a variable impedance and has the same temperature as the W diode. The voltage drop of the thermistor varies with temperature and impedance. Variety.
  • a positive bias voltage is applied to the W diode.
  • the junction carrier concentration of the W diode is higher than the equilibrium carrier concentration, the W diode is turned on, and the conductivity of the W diode is equal to The resistivity changes exponentially with the difference between the voltage applied to the W diode and the gate valve voltage, and the current flowing through the W diode changes with the junction impedance to complete the electrical signal conversion.
  • the positive bias voltage applied to the W diode is lower than the gate valve voltage of the W diode
  • the junction carrier concentration of the W diode is lower than the equilibrium carrier concentration, and the W diode is in an off state.
  • the temperature of the W diode rises, the intrinsic carrier concentration increases, and the gate valve voltage drops.
  • the positive bias voltage applied to the W diode decreases synchronously, and the difference between the positive bias voltage and the gate valve voltage of the W diode remains a constant that does not change with temperature, and the work of the W diode is stable.
  • the temperature of the W diode decreases, the intrinsic carrier concentration decreases and the gate valve voltage increases.
  • the forward bias voltage on the diode increases synchronously, and the difference between the forward bias voltage and the gate valve voltage of the W diode remains a constant that does not change with temperature.
  • the W diode works stably and is a semiconductor electronic device with high reliability and low power consumption.
  • w Three-pole transistor According to the conductivity, it is directly modulated by the voltage applied to the modulating pole, or indirectly modulated by the voltage applied to the modulating pole to change the carrier concentration distribution in the channel. It is divided into w direct modulation transistor and W Indirect modulation type transistor.
  • W direct modulation type transistor is composed of two PN junctions in reverse series. The two PN junctions are the modulation junction at the source terminal and the drain junction at the drain terminal. Between the modulation junction and the drain junction is The modulating pole is connected in series with a low-resistance thermistor with a positive temperature coefficient, as shown in Figure 2.
  • the working principle of the W direct modulation type transistor is: in the static state, one of the two PN junctions in reverse series is always reverse biased, the transistor is in the off state, and the reverse bias voltage is applied to the drain and the forward bias voltage is applied to the thermistor to modulate Extremely, according to the working principle of the PN junction, when the forward bias voltage applied to the modulation junction is higher than the gate valve voltage, the modulation junction of the transistor is turned on, so the reverse bias voltage applied to the drain of the W direct modulation transistor Make the drain junction inverted, the w direct modulation transistor changes from two reverse series PN junctions to two forward series PN junctions, and the drain junction of the w direct modulation transistor becomes positive after being reversed. Partial.
  • the conductivity of the positive-biased drain junction is very high and the resistivity is very low. After being inverted, the drain junction becomes a channel that allows large currents to pass.
  • the operation of the transistor is only determined by the voltage applied to the modulation junction and the gate valve voltage of the transistor. The difference is determined, and the sum varies with the modulation junction impedance. Since the PN junction is a variable impedance with adjustable directional conductivity, and the modulation junction is a PN junction, when the voltage applied to the modulation junction has a small change, the carrier concentration of the modulation junction increases with The difference between the voltage on the modulation junction and the gate valve voltage of the transistor changes exponentially. The conductivity of the modulation junction changes exponentially.
  • the resistivity and impedance of the modulation junction change with the conductivity.
  • the current flowing through the transistor changes with the modulation junction. Impedance changes, so in a circuit composed of power supply voltage, load impedance, and transistor impedance, the current flowing through the transistor changes exponentially with the difference between the voltage applied to the modulation junction and the gate valve voltage of the transistor, which is proportional to the power supply voltage and load impedance.
  • the change is related to complete the amplification and conversion of the electrical signal.
  • the above working principle shows that the work of the W direct modulation type transistor is completed by two parts.
  • the voltage applied to the modulation electrode changes the conductivity of the modulation junction.
  • the resistivity and impedance change with the conductivity, so the power supply voltage and load impedance
  • the current flowing through the W direct modulation transistor changes with the impedance of the transistor modulation junction, which is related to the change of the power supply voltage and the load impedance. Therefore, the voltage applied to the modulation electrode is only The conductivity, resistivity and impedance of the modulation junction are changed, so that the current flowing in the W direct modulation transistor changes with the impedance of the modulation junction to complete the conversion and amplification of electrical signals.
  • the positive bias voltage of the modulation pole of the W direct modulation transistor is applied to the modulation junction through a low resistance thermistor with a positive temperature coefficient.
  • the PN junction is a directional conductivity adjustable
  • the variable impedance, positive temperature coefficient thermistor is connected in series with a variable impedance, and the temperature of the W direct modulation transistor is the same.
  • the voltage drop of the thermistor changes with temperature and impedance. When the temperature of the W direct modulation transistor rises, it modulates The intrinsic carrier concentration of the junction increases, the gate valve voltage decreases, and at the same time the temperature of the thermistor increases synchronously, the impedance increases, and the voltage drop increases.
  • the positive bias voltage applied to the modulation junction of the W direct modulation transistor decreases synchronously.
  • the difference between the bias voltage and the gate valve voltage of the transistor remains a constant that does not change with temperature, and the W direct modulation transistor works stably; when the temperature of the W direct modulation transistor decreases, the intrinsic carrier concentration of the modulation junction decreases and the gate valve voltage increases At the same time, the temperature of the positive temperature coefficient thermistor decreases synchronously, the impedance decreases, and the voltage drop decreases.
  • the positive bias voltage applied to the modulation junction of the W direct modulation transistor increases synchronously, and the difference between the positive bias voltage and the gate valve voltage of the transistor remains As a constant that does not change with temperature, the W direct modulation transistor works stably, and is a semiconductor electronic device with high reliability and low power consumption.
  • W indirect modulation (MOS) transistors are divided into P-type W indirect modulation (MOS) transistors and N-type W indirect modulation (MOS) transistors according to whether the semiconductor substrate is P-type or N-type, and P-type W indirect modulation type
  • MOS metal-oxide-semiconductor
  • P-type W indirect modulation (MOS) transistors are two highly doped N regions diffused on a P-type semiconductor substrate, and the electrodes are drawn out to become source and drain. Two N regions and P regions form two opposite sides. The PN junction is connected in series. The two PN junctions are the modulation junction at the source terminal and the drain junction at the drain terminal. A thin oxide layer is grown on the surface of the substrate, and then a metal layer is deposited on the oxide layer to connect one The low resistance thermistor with positive temperature coefficient leads to the electrode to become the modulating electrode, as shown in Figure 3.
  • the working principle of the P-type W indirect modulation (MOS) transistor is: when the modulation electrode is not applied with a forward bias voltage, one of the two reverse-series PN junctions on the source-channel-drain channel is always reverse-biased.
  • W indirect modulation type (MOS) transistor is in the off state; when a reverse bias voltage is applied to the drain and a forward bias voltage is applied to the modulation electrode, the forward bias voltage applied to the modulation electrode is induced at the boundary of the oxide layer in the P-channel
  • the electronic charge changes the carrier concentration distribution in the P area to form an N-type conductive region.
  • the majority carriers in the P-type conductive region and the N-type conductive region diffuse to the minority carrier region to form a new PN junction and An electric field is established, and the field voltage is positively applied to the modulation junction.
  • the electron concentration, field voltage and conductivity of the N-type conductive region increase with the increase of the forward bias voltage.
  • the carrier concentration of the modulation junction varies with the field voltage and the gate valve voltage. When the carrier concentration of the modulation junction increases to be equal to or higher than the equilibrium carrier concentration, the field voltage rises to be equal to or higher than the gate valve voltage, and the modulation junction of the transistor is turned on.
  • the reverse bias voltage on the drain of the W indirect modulation (MOS) transistor makes the drain junction inverted, and the W indirect modulation (MOS) transistor changes from two PN junctions in reverse series to two PN junctions in forward series.
  • the drain junction of the W indirect modulation type (MOS) transistor becomes forward-biased after being inverted, the conductivity of the forward-biased drain junction is very high and the resistivity is very low, and the drain junction after being inverted becomes a
  • the operation of the transistor is only determined by the difference between the voltage applied to the modulating pole and the gate valve voltage of the transistor, and changes with the modulating junction impedance.
  • the PN junction is a variable impedance with adjustable directional conductivity
  • the forward bias voltage applied to the modulation electrode is lower than the gate valve voltage of the modulation junction
  • the carrier concentration of the modulation junction is lower than the equilibrium carrier concentration
  • the modulation junction is in the cut-off state
  • the forward bias voltage applied to the modulation pole rises to equal to the modulation junction valve voltage
  • the carrier concentration of the modulation junction is equal to the equilibrium carrier concentration
  • the modulation junction is in a critical state between on and off
  • the forward bias voltage applied to the modulation electrode rises to higher than the modulation junction valve voltage
  • the carrier concentration of the modulation junction is higher than the equilibrium carrier concentration
  • the modulation junction is in a conducting state
  • the source-channel-drain The electrode is connected to form a conductive channel.
  • the conductivity of the modulation junction changes exponentially with the difference between the voltage applied to the modulation electrode (the sum of the forward bias voltage and the signal voltage) and the gate valve voltage of the W indirect modulation (MOS) transistor.
  • the resistivity and impedance of the junction change with the conductivity, and the current flowing through the W indirect modulation (MOS) transistor changes with the impedance of the modulation junction.
  • the current flowing through the W indirect modulation type (MOS) transistor changes with the impedance of the transistor, and is related to changes in the power supply voltage and load impedance, so the drain current changes with the voltage applied to the modulator (the difference between the forward bias voltage and the signal voltage).
  • Sum and W indirect modulation type (MOS) transistor gate valve voltage difference changes exponentially, completing the conversion and amplification of electrical signals.
  • the above working principle shows that the work of W indirect modulation type (MOS) transistor is completed by two parts. The voltage applied to the modulation electrode changes the conductivity of the modulation junction.
  • the resistivity and impedance change with the conductivity, so the power supply
  • the current flowing through the W indirect modulation (MOS) transistor changes with the impedance of the transistor modulation junction, which is related to changes in the power supply voltage and load impedance.
  • the voltage applied to the modulation electrode only changes the conductivity, resistivity and impedance of the modulation junction, so that the current flowing in the W indirect modulation type (MOS) transistor changes with the modulation junction impedance to complete the conversion and amplification of electrical signals.
  • W indirect modulation type (MOS) transistor modulating pole positive bias voltage is added to the modulating pole through a low resistance thermistor with a positive temperature coefficient.
  • the PN junction is a directional conductivity
  • the thermistor with positive temperature coefficient is connected in series with a variable impedance.
  • the thermistor and W indirect modulation (MOS) transistor have the same temperature, and the voltage drop varies with impedance.
  • W indirect modulation (MOS) When the transistor temperature rises, the intrinsic carrier concentration of the modulation junction increases, and the gate valve voltage decreases. At the same time, the temperature of the thermistor rises synchronously, the impedance increases, and the voltage drop increases.
  • the positive bias voltage decreases synchronously, and the difference between the positive bias voltage and the gate valve voltage of the transistor remains a constant that does not change with temperature.
  • the indirect modulation type (MOS) transistor works stably; when the temperature of the indirect modulation type (MOS) transistor drops , The intrinsic carrier concentration of the modulation junction decreases, the gate valve voltage increases, and at the same time the temperature of the thermistor decreases synchronously, the impedance decreases, and the voltage drop decreases.
  • the forward bias is added to the modulation pole of the W indirect modulation (MOS) transistor.
  • the setting voltage increases synchronously, and the difference between the positive bias voltage and the gate valve voltage of the transistor remains a constant that does not change with temperature.
  • the indirect modulation type (MOS) transistor works stably and is a semiconductor electronic device with high reliability and low power consumption.
  • W diodes, W direct modulation transistors and W indirect modulation (MOS) transistors correctly and completely perform the functions, characteristics and efficiency of semiconductor electronic devices.
  • the working speed can be increased by more than 100 times, and it can be maintained at an ambient temperature below 80 °C. Stable and reliable work, without preheating, it can work stably after booting.
  • the electronic devices use chips with stronger performance, higher stability and reliability, and lower energy consumption to improve the ability and speed of processing data, and effectively solve the problem of unmanned A series of key issues such as high stability, high reliability, low power consumption, high sensitivity, low latency, heat generation, device size and high power output in emerging fields such as driving, smart medical and artificial intelligence.
  • Transistor working state by adding to W direct modulation type transistor modulation pole, or adding to W indirect modulation type (MOS) transistor modulation pole, or bipolar junction transistor base, or unipolar field effect (MOS) transistor gate
  • the gate valve voltage of the transistor is V b- >V D
  • the carrier concentration of the modulation junction is higher than the equilibrium carrier concentration n>n n0
  • the modulation junction is turned on in the static state, and the transistor works in the Class A state
  • the carrier concentration of the modulation junction is higher than the equilibrium carrier concentration n>n n0 ,
  • the transistor is turned on and works in a Class C (pulse) state.
  • the difference between the positive bias voltage and the gate valve voltage of the transistor changes, the working state of the transistor changes, resulting in instability, reducing reliability and increasing power loss.
  • the temperature of the transistor rises, and the intrinsic carrier
  • the gate valve voltage decreases, and the difference between the positive bias voltage and the transistor gate valve voltage increases, and the stability and reliability are further reduced.
  • a vicious circle is formed, the increased transistor temperature will burn out the transistor and electronic equipment.
  • the working state and working characteristics of the transistor are determined by the difference between the positive bias voltage and the gate valve voltage of the transistor.
  • the transistor is composed of PN junction, which is a passive device with directional conductivity, adjustable and variable impedance, W direct modulation type transistor, W indirect modulation type (MOS) transistor, bipolar junction type
  • the work of transistors and unipolar field-effect (MOS) transistors is completed by two parts.
  • the voltage applied to the modulation electrode, gate or base only modulates the conductivity of the modulation junction.
  • the resistivity and impedance vary with the conductivity.
  • the transistor modulation junction is a variable impedance with adjustable conductivity.
  • Transistor power loss is the loss current of the transistor flows generated in the transistor impedance
  • P C is a variable varying transistor impedance R J
  • P C E C 2 R J ⁇ (R J + R L) 2
  • the drain current I D square the drain current I D is greater than the increment of the amount of decrease impedance of the transistor
  • the transistor power loss increases with the input signal voltage is increased
  • the impedance of the transistor is reduced to equal to the load impedance
  • the square of the increment is equal to the decrease in the impedance of the transistor.
  • the transistor has the largest power loss. At this time, the output power is a quarter of the maximum output power. After the maximum power loss is reached, the drain current will increase with the increase of the input signal voltage.
  • the above relationship quantitatively analyzes the operation of the transistor and is used in
  • the intrinsic carrier concentration of silicon is 1.5 ⁇ 10 10 , the intrinsic mobility: electrons 1350/cm 2 , holes 480/cm 2
  • the gate voltage of silicon transistors is about 0.6V; the intrinsic carrier concentration of germanium is 2.5 ⁇ 10 13 , intrinsic mobility: electrons 3900/cm 2 , holes 1900/cm 2 , the gate voltage of a germanium transistor is about 0.25V.
  • the data shows that the static conductivity of germanium is three orders of magnitude higher than that of silicon, and the static resistivity of germanium is three orders of magnitude lower than that of silicon. Therefore, the dynamic conductivity of germanium semiconductor electronic devices is much greater than that of silicon semiconductor electronic devices, and the resistivity is much smaller than that of silicon semiconductor electronics.
  • the germanium transistor has high conductivity, and the gate voltage is only one-third of that of the silicon transistor.
  • the forward bias voltage and switching time of the germanium transistor are reduced by two-thirds, which improves the switching speed of the transistor and reduces the transistor Power loss. Therefore, semiconductor electronic devices made of germanium, a semiconductor material with high static conductivity and low static resistivity, will have better functions and characteristics than semiconductor electronic devices made of silicon materials. Facts have revealed that according to the new semiconductor electronic principles, a variety of semiconductor materials can be expanded for the manufacture of semiconductor electronic devices with higher functions and characteristics.
  • the work of a semiconductor electronic device which is composed of a junction alone or in combination, is to apply a voltage to the junction, change the carrier concentration distribution of the junction, modulate the conductivity of the semiconductor electronic device, and complete the conversion and conversion of electrical signals. Amplification.
  • the work of semiconductor electronic devices is the change of the carrier concentration distribution, not the emission of electrons and no current generation, so the semiconductor electronic devices will not fail and age, thereby improving the qualification rate and service life of semiconductor electronic devices and products, and reducing production Costs and usage fees.
  • Figure 1 is a W diode, in which a positive temperature coefficient low resistance thermistor Rt is connected in series on a PN junction or a semiconductor metal junction.
  • Figure 2 is a W direct modulation transistor.
  • the modulation pole M is connected in series with a low resistance thermistor R with a positive temperature coefficient.
  • a reverse bias voltage is applied to the drain and a forward bias voltage is applied to the modulation pole through the thermistor.
  • Figure 3 is a W indirect modulation (MOS) transistor.
  • the modulation pole M is connected in series with a low resistance thermistor with a positive temperature coefficient.
  • a reverse bias voltage is applied to the drain and a forward bias voltage is applied through the thermistor R.
  • Figure 4 is a bipolar junction transistor.
  • a thermoelectric element with a negative temperature coefficient is connected in series, and a reverse bias voltage is applied to the collector and the positive bias voltage is applied through the thermoelectric element.
  • the bias voltage is on the base.
  • Figure 5 is a unipolar field effect (MOS) transistor.
  • MOS unipolar field effect
  • a thermoelectric element R with a negative temperature coefficient is connected in series, and a reverse bias voltage is applied to the drain and passed The thermoelectric element applies a forward bias voltage to the grid.
  • the invention is a fundamental change in semiconductor science and technology, revealing that the function of semiconductor electronic devices is to convert electrical signals.
  • the conversion of electrical signals is accomplished by modulating the conductivity of the semiconductor electronic devices.
  • Conductivity modulation is the basis of semiconductor electronic devices and technology. New semiconductor electronic principles, technologies and passive semiconductor electronic devices based on changes in electrical conductivity have replaced current semiconductor electronic principles, technologies and active semiconductor electronic devices based on current changes in all semiconductor electronic devices.
  • the difference in carrier concentration forms a self-built electric field.
  • the self-built electric field is changed by applying a voltage to change the carrier concentration distribution and modulation.
  • the conductivity of the semiconductor according to the junction formed in the semiconductor, has the function of modulating the conductivity.
  • the semiconductor electronic device composed of the junction changes the carrier concentration distribution of the junction by applying a voltage, modulates the conductivity of the semiconductor electronic device, and completes the electrical signal Conversion. Therefore, the new semiconductor electronic principle based on the change of electrical conductivity correctly reflects the conductive mechanism and working principle of semiconductor electronic devices in essence, reveals the structure of semiconductor electronic devices and changes with external stress, and unifies the functions and work of semiconductor electronic devices.
  • Principle and conduction mechanism that modulates the conductivity of semiconductors to correctly and completely exert the functions, characteristics and efficiency of semiconductor electronic devices.
  • Semiconductor electronic devices can choose different semiconductor materials according to their functions and characteristics.
  • the working speed can be increased by more than 100 times, and the working speed can be increased by more than 100 times. It can maintain normal, stable and reliable work in temperature. It can work stably without preheating.
  • Electronic devices use chips with stronger performance, higher stability and reliability, and lower energy consumption to improve the ability to process data and Speed, effectively solve the problems of semiconductor theory and technology such as high stability, high reliability, low power consumption, high sensitivity, low delay, heat generation, device volume and high power output in emerging fields such as unmanned driving, smart medical treatment and artificial intelligence.
  • a series of key issues have enabled the rapid development of semiconductor science and technology, driving the development of all science and technology and the advancement of society.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Amplifiers (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

一种半导体电子器件，电信号的转换是通过调制半导体电子器件的电导率完成，以电导率变化为基础的无源半导体电子器件，取代以电流变化为基础的有源半导体电子器件在半导体电子技术和设备中的应用，有效解决半导体电子理论与技术的发热等关键问题，完整地发挥半导体电子器件的功能和特性。半导体电子器件可根据功能和特性等的不同要求，选用不同的半导体材料制造，工作速率提高100倍以上，在80℃以下环境温度中能保持正常、稳定和可靠工作，不需预热，开机就能稳定工作，电子器件以性能更强、稳定性可靠性更高、耗能更低的芯片，提高处理数据的能力和速度，解决在无人驾驶、人工智能和智慧医疗等新兴领域亟待突破的关口，用于所有半导体电子设备。涉及半导体电子原理与技术、器件结构和工作原理、电路设计、器件制造和材料，产品功能与特性，属于半导体电子技术领域。

Description

新半导体电子原理技术与器件 技术领域
本发明是半导体科学技术的根本变革，以电导率变化为基础的新半导体电子原理、技术和无源半导体电子器件，取代以电流变化为基础的现半导体电子原理、技术和有源半导体电子器件在所有半导体电子技术和设备中的应用。涉及半导体电子原理与技术、器件结构和工作原理、电路设计、器件制造和材料，产品功能与特性，属于半导体电子技术领域。
背景技术
1947年John Bardeen(约翰.巴丁)在实验中发现：在适当接点输入电流可以调制半导体电导率，于是和William Shockley(威廉.肖克莱)、Walter Houser Brattain(沃尔特.H.布拉顿)发明晶体管，创立以电流变化为基础的现半导体电子理论。现半导体电子理论认为晶体管是有源元件，以电流为自变量进行认识、分析、制造和电路设计，晶体管被分为结构、导电机制、工作原理和计算方程式不同的单极场效应晶体和双极结型晶体管。双极结型晶体管的工作原理是：从基极注入的电流产生和控制发射极电流(多数载流子受少数载流子控制)，单极场效应晶体管的工作原理是：栅极电压感生漏极电流(场效应理论：横向电流受垂直电场控制)。集成电路的诞生使半导体科学技术飞速发展，广泛应用于从移动通信、电子计算机、武器系统到太空科学技术等的所有科学技术中，半导体科学技术成为当今最重要的学科。但随着半导体电子科学技术的迅速发展和广泛应用，面对日益要求提高半导体电子产品的功能和质量，现半导体电子理论和技术已无力有效解决稳定性、可靠性、功耗、速度和体积等问题，并成为制约半导体科学与技术继续发展的瓶颈，导致人们认为半导体科学与技术的发展已达到极限(由Science《科学》杂志在2000年发表多篇文章)。进入万物互联网时代，数据呈几何级增长，处理数据的能力、稳定性和速度也‘水涨船高’，因此需要性能更强、稳定性可靠 性更高、耗能更低的芯片，解决这个重大问题的唯一途径，只有半导体科学技术的根本变革。
发明人从1957年起一直从事电子技术工作，在实际工作中发现一些现半导体电子理论与事实不符的问题，主要为：双极结型晶体管和单极场效应(MOS)晶体管为什么要用两个P-N结反向串联组成？同由两个P-N结反向串联组成的晶体管为什么工作原理不同？按现半导体电子理论：双极结型晶体管工作时集电极是加反偏电压，由于集电结是一个P-N结，按P-N结工作原理，反偏P-N结是一个高阻抗的阻挡层，正向电流不能通过，因此，发射极电流不能通过集电结到达集电极和成为集电极电流；同样，单极场效应(MOS)晶体管的漏极工作时是加反偏电压，漏极结也是一个P-N结，按P-N结工作原理，反偏P-N结是一个高阻抗的阻挡层，正向电流不能通过，因此，源极电流不能通过漏极结到达漏极和成为漏极电流，因此，现理论的认识不成立，但集电极电流和漏极电流是客观存在的，因此对晶体管的工作原理需重新认识。现半导体电子理论认定：双极结型晶体管和单极场效应(MOS)晶体管都是有源电流元件，以电流变化作为认识和分析的根据，在双极结型晶体管中是，从基极注入的电流产生和控制发射极电流，或加在基极上的电压产生和控制发射极电流，晶体管的工作状态由基极电流确定，集电极电流是线性变化，基极电流与集电极电流是线性关系：Ic＝βIB+(β+1)IcBo，反向饱和电流IcBo成(β+1)倍的变化，增加晶体管的功耗、产生不稳定性和降低可靠性，并认为反向饱和电流是由制造晶体管的材料和工艺决定，是晶体管必然存在的问题，因而是从制造晶体管的材料和工艺上寻求解决，及发射极电流只由从基极注入的电流决定，与集电极电压和负载阻抗的变化无关。但事实是：发射极电流远大于基极电流，从基极注入的电流是怎样产生发射极电流？和使发射极电流突变？使发射极电流产生和突变的机制是什么？如果Ic＝βIB+(β+1)IcBo成立，由于基极电流与集电极电流是两个独立的电流迴路，基极电流是怎样放大集电极电流的？放大集电极电流的机制是什么？对于每只晶体管电流放大系数β是变数还是常数和由那些参数决定？按现理论，在双极结型晶体管中既然是从基极注入的电流产生发射极电流，那么从基极注入任意值的电流都应产生发射极电流，但事实是，当加在基极上的电压低于 某值时，晶体管处于截止状态，与注入基极的电流无关，决定晶体管处于导通或截止状态的是加在基极上的电压，不是注入基极的电流，和双极结型晶体管的集电极电流与集电极电压和负载阻抗的变化有关。在单极场效应晶体管(MOS场效应晶体管)中，现半导体电子理论认为：是加在栅极上的电压感生漏极电流(场效应理论)，加在栅极上的电压与漏极电流是线性关系，漏极电流是线性变化，漏极电流只由加在栅极上的电压决定，与漏极电压和负载阻抗的变化无关。但事实是，单极场效应晶体管的漏极电流是非线性变化，在单极场效应晶体管(MOS场效应晶体管)中，既然是加在栅极上的电压感生漏极电流，那么在栅极上加任意值电压都应感生漏极电流，但事实是，当加在栅极上的电压低于某值时.晶体管处于截止状态，和单极场效应晶体管的漏极电流与漏极电压和负载阻抗的变化有关等。为寻求解答，发明人从1975年起一直对半导体理论与技术进行独立自费研究，经过40多年的专门深入研究、大量实验和对一系列实际问题的具体解决，得出以电流变化为基础的现半导体电子理论，包括场效应理论，其基本原理不能成立。经过16年的不断研究和思索，终一找到验证上述认识的方法。验证电路是一个精心设计能准确判定晶体管工作状态(晶体管电导率变化)的“普通双极结型晶体管变压器耦合乙类推挽放大器”。通过逐步提高输入信号电压，测量每一步的工作数据与图像，分析全部工作数据与图像，分别从9个关系以可以验证和无可辩驳的事实证明：晶体管的工作是电导率的变化，在晶体管中流动的电流，只是随晶体管电导率变化的一个应变量，从而否定以电流变化为基础的现半导体理论，包括场效应理论，创立以电导率变化为基础的新半导体电子理论。
《The New Semiconductor Electron Theory》(新半导体电子理论)一书(英文版)，于2013年10月8日由美国Tate Publishing在美国出版发行，书号：ISBN：978-1-62510-438-0，作者：汪克明汪润泽。包含在该书中的文章《A New Principles of Semiconductor Electron Devices》(半导体电子器件的新原理)《A New Understanding of Semiconductor conductivity Modulation》(半导体电导率调制的新认识)《P-N Junction》(P-N结)，经NAS(美国科学 院)的院士David E.Aspnes教授，Walter L.Brown教授和美国科学院多名科学家从2004年元月到2008年2月长达四年多的连续审阅认可，称赞验证电路，和建议提交US journal Applied Physics Letters，the US Journal of Applied Physics和IEEE等杂志发表，文章也经PNAS(美国科学院学报)四次审查通过，美国科学院学报通知我，我的文章已被收藏在PNAS的稿件库中，证明这些文章是正确的和有价值的。
本发明的目的在于提供一种正确、可靠和高效转换电信号的新原理、技术和器件，正确地认识与应用半导体电子器件与技术，有效解决稳定性、可靠性、功耗、发热、速度和体积等问题，以性能更强、稳定性可靠性更高、耗能更低的器件，提高处理数据的能力和速度，解决在无人驾驶、人工智能，和智慧医疗等新兴领域亟待突破的关口，推进半导体科学与技术的继续发展。
发明内容：
本发明揭示半导体电子器件的功能是转换电信号，电信号的转换是通过调制半导体电子器件的电导率完成，电导率调制是半导体电子技术和器件的根本，以电导率变化为基础的新半导体电子原理、技术和无源半导体电子器件在所有半导体电子设备中的应用，完整地发挥半导体电子器件的功能和特性，有效解决半导体电子理论与技术的发热等关键问题，保证目的实现。
半导体的电导率在导体与绝缘体之间，宽的电导率调制区域，是制造电子器件的最佳材料。纯净半导体和自由载流子浓度均匀半导体的电导率不能调制，因为没有调制电导率的机制。在半导体衬底上通过掺杂，生成两个相连接的载流子浓度不同的区域，或电磁场作用，改变半导体中的载流子浓度分布，形成两个相连接的载流子浓度不同的区域，或半导体与金属接触，形成两个相连接的载流子浓度不同的区域，在形成的两个不同载流子浓度区域相连接时，载流子浓度差，多数载流子向少数载流子区扩散，载流子浓度按指数规律分布和形成结自建电压，载流子浓度与结自建电压是相互依存的指数关系，在正负电荷区交界处，正电荷载流 子浓度与负电荷载流子浓度相等，自由载流子浓度为零，形成一个电导率很低、电阻率很高和电中性的结，当在正负电荷区上加一个电压时，结和结两边的载流子浓度分布随外加电压与结自建电压之差成指数规律变化，当外加在结上的电压有一个小的变化，结和结两边的载流子浓度是按指数规律产生一个大的变化，于是，通过改变加在正负电荷区上的电压，改变结和结两边的载流子浓度，调制结的电导率和电阻率。在半导体中形成的结，具有调制半导体电导率的功能，是调制半导体电导率的机制，P-N结是一个典型。
在半导体衬底上当形成P-N结时，在P-N结上加一个高于结自建电压的正偏置电压，P-N结的载流子浓度高于平衡载流子浓度，P-N结导通，P-N结的导通电压称门阀电压，P-N结的载流子浓度随外加电压与门阀电压之差按指数规律变化，P-N结的电导率和电阻率随载流子浓度变化，当加在P-N结上的电压有一个小的变化时，P-N结的载流子浓度按指数规律产生一个大的变化，通过改变加在P-N结上的电压，改变结的载流子浓度，调制P-N结的电导率和电阻率，P-N结的电导率和电阻率随加在P-N结上的电压与门阀电压之差成指数规律变化，流过P-N结的电流随P-N结阻抗变化，得到P-N结由P型区、N型区和电中性的结组成，是一个有方向性电导率可调的可变阻抗，由于外加电压只是改变P-N结的载流子浓度分佈，P-N不产生电流，因此是无源元件。
P-N结自建电压就是P-N结的门阀电压，当加在P-N结上的正偏置电压低于门阀电压时，P-N结的载流子浓度低于平衡载流子浓度，P-N结是截止状态。当在P-N结上加反偏置电压时，P-N结是截止状态，当加在P-N结上的反偏置电压高于门阀电压二倍时，P-N结被反型和产生反向电流。
晶体管门阀电压由多数载流子向少数载流子区扩散形成，是载流子浓度差，由半导体材料的本征载流子浓度和参杂浓度决定。本征载流子浓度是温度的函数，随温度的升高而增加，和随温度的下降而降低，于是P-N结自建电压是随温度的升高而下降，和随温度的下降而升高，由于P-N结自建电压就是晶体管的门阀电压，因此，晶体管门阀电压是温度的函数，随 温度的升高而下降，和随温度的下降而升高。晶体管门阀电压随温度的变化，导致晶体管的工作状态随温度变化，当晶体管温度上升时，本征载流子浓度增加，门阀电压下降，正偏置电压与晶体管门阀电压之差增大，结的载流子浓度增加，电导率增加和电阻率下降，结阻抗减小和流过结的电流随着增加，晶体管的工作特性被改变，产生不稳定性和降低可靠性，当形成恶性循环时，升高的晶体管温度将烧坏晶体管及电子设备。当晶体管温度下降时，本征载流子浓度下降，门阀电压上升，正偏置电压与晶体管门阀电压之差减小，结载流子浓度降低，电导率减小和电阻率增大，结阻抗增加和流过结的电流随着减小，晶体管工作特性被改变，产生不稳定性和降低可靠性。当正偏置电压低于晶体管门阀电压时，结的载流子浓度低于平衡载流子浓度，晶体管处于截止状态，严重时晶体管将停止工作。由半导体材料的本征载流子浓度和参杂浓度决定的晶体管门阀电压随温度的变化，是晶体管产生不稳定性和降低可靠性的根本原因。
根据半导体电子器件的功能是转换电信号，应用以电导率变化为基础的新半导体电子原理、电磁场改变半导体的载流子浓度分布形成载流子浓度和电导率不同的区域、在半导体中形成的结具有调制半导体电导率的功能、P-N结是一个有方向性电导率可调阻抗可变的无源元件、P-N结的电导率和电阻率是随加在P-N结上的电压与门阀电压之差成指数规律变化和晶体管门阀电压是温度的函数这些功能和特性，由可在多种半导体材料中形成的结、P-N结或半导体金属结，单独或组合成无源半导体电子器件，和制造高稳定性、高可靠性、开关速度快和低功耗的无源晶体管，用于所有半导体电子设备。在半导体中、或半导体与金属接触、或绝缘体与金属接触形成的结，具有调制电导率的功能，用结组成转换电信号和光电转换的电子器件，以结的原理和特性工作，用在电子设备中。
高稳定性可靠性和低功耗半导体电子器件：
W二极管：在P-N结或半导体金属结上串接一个正温度系数的低阻值热敏电阻，附图1，工作电压是通过热敏电阻加在W二极管上，热敏电阻与W二极管同温，根据新半导体电子原理，P-N结是一个有方向性电导率可调的可变阻抗，热敏电阻是与一个可变阻抗串联，与W二极管 同温，热敏电阻的电压降随温度和阻抗变化。在W二极管上加正偏置电压，当正偏置电压高于W二极管门阀电压时，W二极管的结载流子浓度高于平衡载流子浓度，W二极管导通，W二极管的电导率和电阻率随加在W二极管上的电压与门阀电压之差成指数规律变化，流过W二极管的电流随结阻抗变化，完成电信号的转换。当加在W二极管上的正偏置电压低于W二极管门阀电压时，W二极管的结载流子浓度低于平衡载流子浓度，W二极管处于截止状态。当W二极管温度上升时，本征载流子浓度增加，门阀电压下降，同时串接在W二极管上与W二极管同温度的正温度系数热敏电阻的温度同步上升，电阻值增加，电压降增高，加在W二极管上的正偏置电压同步下降，正偏置电压与W二极管门阀电压之差保持为不随温度变化的常数，W二极管的工作稳定。当W二极管温度下降时，本征载流子浓度下降，门阀电压升高，同时与W二极管同温度的正温度系数热敏电阻的温度同步下降，电阻值减小，电压降下降，加在W二极管上的正偏置电压同步增加，正偏置电压与W二极管门阀电压之差保持为不随温度变化的常数，W二极管的工作稳定，是可靠性高和功耗低的半导体电子器件。
w三极晶体管：按电导率是由加在调制极上的电压直接调制，或由加在调制极上的电压改变沟道中的载流子浓度分布间接调制，分为w直接调制型晶体管和W间接调制型晶体管。
W直接调制型晶体管：W直接调制型晶体管由两个P-N结反向串联组成，两个P-N结分别是源极端的调制结和漏极端的漏极结，在调制结和漏极结之间是调制极，调制极与一个正温度系数的低阻值热敏电祖串接，附图2。W直接调制型晶体管的工作原理是：静态时两个反向串联的P-N结总有一个是反偏，晶体管处于截止状态，在漏极加反偏电压和通过热敏电阻加正偏电压在调制极上，根据P-N结的工作原理，当加在调制结上的正偏电压高于门阀电压时，晶体管的调制结是导通状态，于是加在W直接调制型晶体管漏极上的反偏电压使漏极结反型，w直接调制型晶体管从两个反向串联的P-N结，变成两个正向串联的P-N结，w直接调制型晶体管的漏极结在被反型后变成正偏。正偏漏极结的电导率很高和电阻率很低，被反型后的漏极结变成一个允许大电流通过的通道，晶体管的工作只由加在调制结上的电压与晶体管门阀电 压之差决定，和随调制结阻抗变化。由于P-N结是一个有方向性电导率可调的可变阻抗，和调制结是一个P-N结，当加在调制结上的电压有一个小的变化时，调制结的载流子浓度随加在调制结上的电压与晶体管门阀电压之差成指数规律变化，调制结电导率按指数规律产生一个大的变化，调制结的电阻率和阻抗随电导率变化，流过晶体管的电流随调制结的阻抗变化，于是在由电源电压、负载阻抗和晶体管阻抗组成的电路中，流过晶体管的电流随加在调制结上的电压与晶体管门阀电压之差成指数规律变化，与电源电压和负载阻抗的变化有关，完成电信号的放大和转换。上述工作原理表明，W直接调制型晶体管的工作由两个部份完成，加在调制极上的电压改变调制结的电导率，电阻率和阻抗随电导率变化，于是在由电源电压、负载阻抗和W直接调制型晶体管阻抗组成的电路中，流过W直接调制型晶体管的电流随晶体管调制结的阻抗变化，与电源电压和负载阻抗的变化有关，因此，加在调制极上的电压，只是改变调制结的电导率、电阻率和阻抗，使在W直接调制型晶体管中流动的电流随调制结阻抗变化，完成电信号的转换和放大。
W直接调制型晶体管调制极正偏置电压，是通过一个正温度系数的低阻值热敏电阻加在调制结上，根据新半导体电子原理，P-N结是一个有方向性电导率可调的可变阻抗，正温度系数的热敏电阻是与一个可变阻抗串联，与W直接调制型晶体管同温，热敏电阻的电压降随温度和阻抗变化，当W直接调制型晶体管温度上升时，调制结的本征载流子浓度增加，门阀电压下降，同时热敏电阻的温度同步上升，阻抗增加，电压降增大，加在W直接调制型晶体管调制结上的正偏置电压同步下降，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W直接调制型晶体管的工作稳定；当W直接调制型晶体管温度下降时，调制结本征载流子浓度下降，门阀电压升高，同时正温度系数热敏电阻的温度同步下降，阻抗减小，电压降下降，加在W直接调制型晶体管调制结上的正偏置电压同步增加，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W直接调制型晶体管的工作稳定，是可靠性高和低功耗的半导体电子器件。
W间接调制型(MOS)晶体管，根据半导体基片是P型或N型分为：P型W间接调制型(MOS)晶体管和N型W间接调制型(MOS)晶体管，P型W间接调制型(MOS)晶体管与N型W间接调制型(MOS)晶体管的工作原理完全相同。
P型W间接调制型(MOS)晶体管，是在P型半导体基片上扩散两个高掺杂的N区，引出电极，成为源极和漏极，两个N区与P区组成两个反向串联的P-N结，两个P-N结分别是源极端的调制结和漏极端的漏极结，在基片表面上生长一层很薄的氧化层，再在氧化层上淀积金属层，连接一个正温度系数的低阻值热敏电阻，引出电极，成为调制极，附图3。P型W间接调制型(MOS)晶体管的工作原理是：当调制极未加正偏电压时，源极-沟道-漏极通道上两个反向串联的P-N结总有一个是反偏，W间接调制型(MOS)晶体管处于截止状态；当在漏极加反偏电压和调制极加正偏电压时，加在调制极上的正偏电压在P型沟道中的氧化层边界处感生电子电荷，改变P区中的载流子浓度分布，形成N型导电区，P型导电区与N型导电区中的多数载流子向少数载流子区扩散，形成一个新的P-N结和建立一个电场，场电压正向加在调制结上，N型导电区的电子浓度、场电压和电导率随正偏电压的升高而增加，调制结的载流子浓度随场电压与门阀电压之差的减小而增加，当调制结的载流子浓度增加到等于或高于平衡载流子浓度时，场电压上升到等于或高于门阀电压，晶体管的调制结是导通状态，加在W间接调制型(MOS)晶体管漏极上的反偏电压使漏极结反型，W间接调制型(MOS)晶体管从两个反向串联的P-N结变成两个正向串联的P-N结，W间接调制型(MOS)晶体管的漏极结在被反型后变成正偏，正偏漏极结的电导率很高和电阻率很低，被反型后的漏极结变成一个允许大电流通过的通道，晶体管的工作只由加在调制极上的电压与晶体管门阀电压之差决定，和随调制结阻抗变化。根据P-N结是一个有方向性电导率可调的可变阻抗，当加在调制极上的正偏电压低于调制结的门阀电压时，调制结的载流子浓度低于平衡载流子浓度，调制结处于截止状态；当加在调制极上的正偏电压上升到等于调制结门阀电压时，调制结的载流子浓度等于平衡载流子浓度，调制结处于导通与截止的临界状态；当加在调制极上的正偏电压上升到高于调制结门阀 电压时，调制结的载流子浓度高于平衡载流子浓度，调制结处于导通状态，源极-沟道-漏极连接成一条导电通道，调制结的电导率随加在调制极上的电压(正偏电压与信号电压之和)与W间接调制型(MOS)晶体管门阀电压之差成指数规律的变化，调制结的电阻率和阻抗随电导率变化，流过W间接调制型(MOS)晶体管的电流随调制结的阻抗变化，在由电源电压、负载阻抗和W间接调制型(MOS)晶体管阻抗组成的电路中，流过W间接调制型(MOS)晶体管的电流随晶体管的阻抗变化，与电源电压和负载阻抗的变化有关，于是漏极电流随加在调制极上的电压(正偏电压与信号电压之和)与W间接调制型(MOS)晶体管门阀电压之差成指数规律的变化，完成电信号的转换和放大。上述工作原理表明，W间接调制理型(MOS)晶体管的工作由两个部份完成，加在调制极上的电压改变调制结的电导率，电阻率和阻抗随电导率变化，于是在由电源电压、负载阻抗和W间接调制型(MOS)晶体管阻抗组成的电路中，流过W间接调制型(MOS)晶体管的电流随晶体管调制结的阻抗变化，与电源电压和负载阻抗的变化有关，因此，加在调制极上的电压只是改变调制结的电导率、电阻率和阻抗，使在W间接调制型(MOS)晶体管中流动的电流随调制结阻抗变化，完成电信号的转换和放大。
W间接调制型(MOS)晶体管调制极正偏置电压，是通过一个正温度系数的低阻值热敏电阻加在调制极上，根据新半导体电子原理，P-N结是一个有方向性电导率可调的可变阻抗，正温度系数的热敏电阻是与一个可变阻抗串联，热敏电阻与W间接调制型(MOS)晶体管同温，电压降随阻抗变化，当W间接调制型(MOS)晶体管温度上升时，调制结的本征载流子浓度增加，门阀电压下降，同时热敏电阻的温度同步上升，阻抗增加，电压降增大，加在W间接调制型(MOS)晶体管调制极上的正偏置电压同步下降，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W间接调制型(MOS)晶体管的工作稳定；当W间接调制型(MOS)晶体管温度下降时，调制结的本征载流子浓度下降，门阀电压升高，同时热敏电阻的温度同步下降，阻抗减小，电压降下降，加在W间接调制型(MOS)晶体管调制极上的正偏置电压同步增加，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W间接调制型(MOS)晶体管的工作稳定，是可靠 性高和低功耗的半导体电子器件。
W二极管、W直接调制型晶体管和W间接调制型(MOS)晶体管正确完整地发挥半导体电子器件的功能、特性和效率，工作速率能提高100倍以上，在80℃以下环境温度中能保持正常、稳定和可靠的工作，不需预热，开机就能稳定工作，电子器件以性能更强、稳定性可靠性更高、耗能更低的芯片，提高处理数据的能力和速度，有效解决无人驾驶、智慧医疗和人工智能等新兴领域高稳定性、高可靠性、低功耗、高灵敏度、低时延、发热、器件的体积和高功率输出等一系列关键问题。
晶体管工作状态：由加在W直接调制型晶体管调制极、或加在W间接调制型(MOS)晶体管调制极、或双极结型晶体管基极、或单极场效应(MOS)晶体管栅极上的正偏置电压与晶体管门阀电压之差决定，电导率：σ＝nqμ n＝qμ nn n0exp[(V b～+V b--V D)/V T]，当正偏置电压高于晶体管门阀电压V b-＞V D时，调制结的载流子浓度高于平衡载流子浓度n＞n n0，静态时调制结导通，晶体管工作在甲类状态；当正偏置电压等于晶体管门阀电压V b-＝V D时，调制结的载流子浓度等于平衡载流子浓度n＝n n0，静态时调制结处于导通与截止的临界点，晶体管工作在乙类状态；当正偏置电压低于晶体管门阀电压V b-＜V D时，调制结的载流子浓度低于平衡载流子浓度n＜n n0，静态时调制结处于截止状态，只有当加在调制结上的正偏置电压与信号电压之和高于晶体管门阀电压(V b～+V b-)＞V D时，调制结的载流子浓度高于平衡载流子浓度n＞n n0，晶体管导通和工作在丙类(脉冲)状态。当正偏置电压与晶体管门阀电压之差变化时，晶体管工作状态随着变化，产生不稳定性，降低可靠性和增大功率损耗，功率损耗的增大，晶体管温度上升，本征载流子浓度增加，门阀电压下降，正偏置电压与晶体管门阀电压之差增大，稳定性和可靠性进一步降低，当形成恶性循环时，升高的晶体管温度将烧坏晶体管及电子设备。
Figure PCTCN2020000042-appb-000001
Figure PCTCN2020000042-appb-000002
根据新半导体电子原理，晶体管的工作状态和工作特性由正偏置电压与晶体管门阀电压之差决定，晶体管门阀电压是P-N结自建电压，由半导体材料的本征载流子浓度和参杂浓度决定，V D＝V n-V p＝V TIn(N dN a/n i 2)，参杂浓度高和本征载流子浓度低，晶体管门阀电压高，参杂浓度低和本征载流子浓度高，晶体管门阀电压低，通过选用不同的半导体材料和参杂浓度，可制造晶体管门阀电压、工作特性、开关速度、处理数据能力和计算效率不同的 晶体管。
根据新半导体电子原理，晶体管由P-N结组成，P-N结是一个有方向性电导率可调阻抗可变的无源器件，W直接调制型晶体管、W间接调制型(MOS)晶体管、双极结型晶体管、和单极场效应(MOS)晶体管的工作由两个部份完成，加在调制极、栅极或基极上的电压，只是调制调制结的电导率，电阻率和阻抗随电导率变化，晶体管调制结是一个电导率可调的可变阻抗，由于调制结阻抗就是晶体管阻抗，于是在由电源电压、负载阻抗和晶体管阻抗组成的电路中流动的电流，随调制结的阻抗变化：I D＝E C/(R J+R L)，式中：I D-漏极电流，E C-电源电压，R L-负载阻抗(包含交流阻抗和直流阻抗)，R J-晶体管阻抗，R J＝L/nAqμ n＝L/Aqμ nn n0exp[(V b～+V b--V D)/V T]，式中：L-扩散长度，A-结截面积，n-载流子浓度，q-电子电荷，μ n-电子迁移率，n n0-平衡载流子浓度，V b-输入信号电压，V b-偏置电压，V D-门阀电压，电导率：σ＝nqμ n＝qμ nn n0exp[(V b～+V b--V D)/V T]，电阻率：p＝1/nqμ n＝1/qμ nn n0exp[(V b～+V b--V D)/V T]，由半导体材料的本征载流子浓度nn0和本征迁移率μ n决定，随加在调制极上的电压(正偏电压V b-与信号电压V b～之和)与晶体管门阀电压V D之差成指数规律变化；晶体管最大允许电流由结的截面积A决定，由于晶体管阻抗是随加在调制极上电压的升高而减小，因此，晶体管最大电流由电源电压E C与负载阻抗R L之比决定I Dm＝E C/(R L+R j)≈E C/R L。由于W间接调制型(MOS)晶体管和单极场效应(MOS)晶体管的工作由两个部份完成，加在调制极上的电压，只是调制调制结的电导率，电阻率和阻抗随电导率变化，使晶体管调制结成为一个电导率可调的可变阻抗，因此，W间接调制型(MOS)晶体管和单极场效应(MOS)晶体管调制极的氧化层与在晶体管中流动的电流无直接关系。
输出功率：P o＝E c 2R L/(R J+R L) 2，随输入信号电压的升高导致晶体管阻抗的减小和电流的增加而增大，最大输出功率：P om＝E C 2R L/(R L+R J) 2≈E C 2/R L。
效率：η c＝(P o/P d)＝[(E c 2R L)/(R J+R L) 2]/[E C 2/(R J+R L)]＝R L/(R J+R L)，随输入信号电压的升高导致晶体管阻抗的减小而增加。
晶体管功率损耗是晶体管中流动的电流在晶体管阻抗上产生的损耗，P C是一个随晶体管阻抗R J变化的变量，P C＝E C 2R J\(R J+R L) 2，在小信号阶段，漏极电流I D增量的平方大于晶体管阻抗的减小量，晶体管功率损耗随输入信号电压的升高增大，在晶体管阻抗减小到与负载阻抗相等时，漏极电流I D增量的平方等于晶体管阻抗的减小量，晶体管功率损耗最大，此时的输出功率是最大输出功率的四分之一，在达到最大功率损耗后，随输入信号电压的升高，漏极电流I D增量的平方小于晶体管阻抗的减小量，晶体管功率损耗是随输出功率的增大和晶体管阻抗的减小而下降，即在晶体管阻抗与负载阻抗相等和输出功率是最大输出功率的四分之一时，晶体管的功率损耗最大，由于晶体管阻抗R J＝L/nAqμ n＝L/Aqμ nnn 0exp[(V b～+V b--V D)/V T]，静态电阻R J0＝L/Aqμ nn n0exp(-V D/V T)，和门阀电压V D对每只晶体管是定值，负载阻抗在设计电路时已确定，因此，选择正偏电压V b-与信号电压V b～，可避开最大功率损耗点工作，有效减小晶体管功率损耗，降低晶体管温度。以上关系式定量分析晶体管的工作，用于电路设计。
[根据细则91更正 06.05.2020]　
根据新半导体电子原理，半导体电子元件的电导率：σ＝nqμ n＝qμ nn n0exp[(V b～+V b--V D)/V T]，，和电阻率：ρ＝1/nqμ n＝1/qμ nn n0exp[(V b～+V b--V D)/V T]，静态电导率：由本征载流子浓度n n0和本征迁移率μ n决定，由于晶体管能用多种半导体材料制造，不同半导体材料的静态电导率和电阻率各不相同，选用不同半导体材料，可制造具有不同功能和特性的晶体管。硅的本征载流子浓度是1.5×10 10，本征迁移率：电子1350/cm 2，空穴480/cm 2硅晶体管的门阀电压约为0.6V；锗的本征载流子浓度是2.5×10 13，本征迁移率：电子3900/cm 2，空穴1900/cm 2，锗晶体管的门阀电压约为0.25V。数据表明：静态电导率锗高于硅三个数量级，静态电阻率锗低于硅三个数量级，因而，锗半导体电子器件的动态电导率远大于硅半导体电子器件，电阻率则远小于硅半导体电子器件，因而锗晶体管具有高的导电性，和门阀电压只是硅晶体管的三分之一，对于相同工作状态锗晶体管的正偏电压和开关时间减少三分之二，提高晶体管的开关速度和降低晶体管功率损耗。因此，由高静态电导率和低静态电阻率的半导体材料锗制造的半导体电子器件，其功能和特性将优于硅材料制造的半导体电子器件。事实揭示，根据新半导体电子原理，能拓展多种半导体材料，用于制造功能和特性更高的半导体电子器件。
[根据细则91更正 06.05.2020]　
根据新半导体电子原理，由结单独或组合成的半导体电子器的工作,是外加在结上的电压，改变结的载流子浓度分佈，调制半导体电子器件的电导率，完成电信号的转换和放大.半导体电子器件的工作是载流子浓度分佈的变化,不是发射电子和不产生电流,因而半导体电子器件不会失效和老化，从而提高半导体电子器件和产品的合格率与使用寿命，降低生产成本和使用费。
[根据细则91更正 06.05.2020]　
附图说明：图1是W二极管，在P-N结或半导体金属结上串接一个正温度系数的低阻值热敏电阻Rt。图2是W直接调制型晶体管，调制极M与一个正温度系数的低阻值热敏电阻R,串接，在漏极加反偏电压和通过热敏电阻加正偏电压在调制极上。图3是W间接调制型(MOS)晶体管，调制极M与一个正温度系数的低阻值热敏电祖串接,在漏极加反偏电压和通过热敏电阻R,加正偏电压在调制极上。图4是双极结型晶体管，在基极的正偏置电压电路的下偏置电路中，串接入一个负温度系数的热电元件，在集电极加反偏电压和通过热电元件艮加正偏电压在基极上。图5是单极场效应(MOS)晶体管，在栅极的正偏置电压电路的下偏置电路中，串接入一个负温度系数的热电元件R,,在漏极加反偏电压和通过热电元件加正偏电压在栅极上。
与现有技术相比：
[根据细则91更正 06.05.2020]　
本发明是半导体科学技术的根本变革，揭示半导体电子器件的功能是转换电信号，电信号的转换是通过调制半导体电子器件的电导率完成，电导率调制是半导体电子器件和技术的基础。以电导率变化为基础的新半导体电子原理、技术和无源半导体电子器件，取代以电流变化为基础的现半导体电子原理、技术和有源半导体电子器件在所有半导体电子设备中的应用。
[根据细则91更正 06.05.2020]　
电流是电子在外力作用下的连续移动，随外加电压、电子器件的电导率和回路阻抗变化的应变量。电流是一种现像，不是物质的本质特性，注入电流只能等量增加移动电子的数量，不能产生电流和使电流突变，因为没有使电流产生和突变的机制。因此，以电流变化为基础的现半导体电子理论，不能正确反映半导体电子器件的导电机制和工作原理，不能有效解决半导体理论和技术中的发热等一系列关键问题。电导率是物质的基本特性，表示物质的导电能力，由物质的自由载流子浓度决定，载流子浓度差形成自建电场，通过外加电压改变自建电场，改变载流子浓度分佈，调制半导体的电导率，根据在半导体中形成的结具有调制电导率的功能，由结组成的半导体电子器件通过外加电压改变结的载流子浓度分佈，调制半导体电子器件的电导率，完成电信号的转换。因此，以电导率变化为基础的新半导体电子原理，从本质上正确反映半导体电子器件的导电机制和工作原理，揭示半导体电子器件的结构和随外加应力的变化，统一半导体电子器件的功能、工作原理和调制半导体电导率的导电机制，正确完整地发挥半导体电子器件的功能、特性和效率，半导体电子器件可根据功能和特性选用不同半导体材料，工作速率能提高100倍以上，在80℃以下环境温度中能保持正常、稳定和可靠的工作，不需预热，开机就能稳定工作，电子器件以性能更强、稳定性可靠性更高、耗能更低的芯片，提高处理数据的能力和速度，有效解决无人驾驶、智慧医疗和人工智能等新兴领域高稳定性、高可靠性、低功耗、高灵敏度、低时延、发热、器件的体积和高功率输出等半导体理论和技术的一系列关键问题，使半导体科学技术飞跃发展，带动所有科学技术发展和社会前进。

Claims (2)

  1. [根据细则91更正 06.05.2020]　
    新半导体电子原理技术与器件，是半导体科学技术的根本变革，其特征是：揭示半导体电子器件的功能是转换电信号，电信号的转换是通过调制半导体电子器件的电导率完成，电导率调制是半导体电子技术与器件的根本；以电导率变化为基础的新半导体电子原理、技术和无源半导体电子器件，取代以电流变化为基础的现半导体电子原理、技术和有源半导体电子器件在所有半导体电子技术和设备中的应用；半导体的电导率在导体与绝缘体之间，很宽的电导率调制区域，是制造电子器件的最佳材料；纯净半导体和自由载流子浓度均匀半导体的电导率不能调制，因为没有调制电导率的机制，在半导体衬底上通过掺杂，生成两个相连接的载流子浓度不同的区域，或电磁场作用，改变半导体中的载流子浓度分布，形成两个相连接的载流子浓度不同的区域，或半导体与金属接触，形成两个相连接的载流子浓度不同的区域，在形成的两个不同载流子浓度区域相连接时，载流子浓度差，多数载流子向少数载流子区扩散，载流子浓度按指数规律分布和形成结自建电压，载流子浓度与结自建电压是相互依存的指数关系，在正负电荷区交界处，正电荷载流子浓度与负电荷载流子浓度相等，自由载流子浓度为零，形成一个电导率很低、电阻率很高和电中性的结，当在正负电荷区上加一个电压时，结和结两边的载流子浓度分布随外加电压与结自建电压之差成指数规律变化，当外加在结上的电压有一个小的变化时，结和结两边的载流子浓度是按指数规律产生一个大的变化，于是，通过改变加在正负电荷区上的电压，改变结和结两边的载流子浓度，调制结的电导率和电阻率，在半导体中形成的结，具有调制半导体电导率的功能，是调制半导体电导率的机制，P-N结是一个典型；在半导体衬底上当形成P-N结时，在P-N结上加一个高于结自建电压的正偏置电压，P-N结的载流子浓度高于平衡载流子浓度，P-N结导通，P-N结的导通电压称门阀电压，P-N结的载流子浓度随加在结上的电压与门阀电压之差按指数规律变化，P-N结的电导率和电阻率随载流子浓度变化，当加在P-N结上的电压有一个小的变化时，P-N结的载流子浓度按指数规律产生 一个大的变化，通过改变加在P-N结上的电压，改变P-N结的载流子浓度，调制P-N结的电导率和电阻率，P-N结的电导率和电阻率随加在P-N结上的电压与门阀电压之差成指数规律变化，流过P-N结的电流随P-N结阻抗变化，得到P-N结由P型区、N型区和电中性的结组成，是一个有方向性电导率可调的可变阻抗，由于外加电压只是改变P-N结的载流子浓度分佈，不产生电流，因此P-N是无源元件，P-N结自建电压就是P-N结的门阀电压，当加在P-N结上的正偏置电压低于门阀电压时，P-N结的载流子浓度低于平衡载流子浓度，P-N结是截止状态，当在P-N结上加反偏置电压时，P-N结是截止状态，当加在P-N结上的反偏置电压高于门阀电压二倍时，P-N结被反型和产生反向电流；晶体管门阀电压由多数载流子向少数载流子区扩散形成，是载流子浓度差，由半导体材料的本征载流子浓度和参杂浓度决定，本征载流子浓度是温度的函数，随温度的升高而增加，和随温度的下降而降低，于是P-N结自建电压是随温度的升高而下降，和随温度的下降而升高，由于P-N结自建电压就是晶体管的门阀电压，因此，晶体管门阀电压是温度的函数，随温度的升高而下降，和随温度的下降而升高，晶体管门阀电压随温度的变化，导致晶体管的工作状态随温度变化，当晶体管温度上升时，本征载流子浓度增加，门阀电压下降，正偏置电压与晶体管门阀电压之差增大，结的载流子浓度增加，电导率增加和电阻率下降，结阻抗减小和流过结的电流随着增加，晶体管的工作特性被改变，产生不稳定性和降低可靠性，当形成恶性循环时，升高的晶体管温度将烧坏晶体管及电子设备，当晶体管温度下降时，本征载流子浓度下降，门阀电压上升，正偏置电压与晶体管门阀电压之差减小，结载流子浓度降低，电导率减小和电阻率增大，结阻抗增加和流过结的电流随着减小，晶体管工作特性被改变，产生不稳定性和降低可靠性，当正偏置电压低于晶体管门阀电压时，结的载流子浓度低于平衡载流子浓度，晶体管处于截止状态，严重时晶体管将停止工作，由半导体材料的本征载流子浓度和参杂浓度决定的晶体管门阀电压随温度的变化，是晶体管产生不稳定性和降低可靠性的根本原因；根据半导体电子器件的功能是转换电信号，应用以电导率变化为基础的新半导体电子原理、电磁场改变半导体的载流子浓度分布形成载流子浓度和电导率不同的区域、 在半导体中形成的结具有调制半导体电导率的功能、P-N结是一个有方向性电导率可调阻抗可变的无源元件、P-N结的电导率和电阻率是随加在P-N结上的电压与门阀电压之差成指数规律变化和晶体管门阀电压是温度的函数这些功能和特性，由可在多种半导体材料中形成的结、P-N结或半导体金属结，单独或组合成无源半导体电子器件，和制造高稳定性、高可靠性、开关速度快和低功耗的无源晶体管，用于所有半导体电子设备；在半导体中、或半导体与金属接触、或绝缘体与金属接触形成的结，具有调制电导率的功能，用结组成转换电信号和光电转换的电子器件，以结的原理和特性工作，用在电子设备中；高稳定性可靠性和低功耗半导体电子器件：W二极管：在P-N结或半导体金属结上串接一个正温度系数的低阻值热敏电阻，工作电压是通过热敏电阻加在W二极管上，热敏电阻与W二极管同温，根据新半导体电子原理，P-N结是一个有方向性电导率可调的可变阻抗，热敏电阻是与一个可变阻抗串联，与W二极管同温，热敏电阻的电压降随温度和阻抗变化，在W二极管上加正偏置电压，当正偏置电压高于W二极管门阀电压时，W二极管的结载流子浓度高于平衡载流子浓度，W二极管导通，W二极管的电导率和电阻率随加在W二极管上的电压与门阀电压之差成指数规律变化，流过W二极管的电流随结阻抗变化，完成电信号的转换，当加在W二极管上的正偏置电压低于W二极管门阀电压时，W二极管的结载流子浓度低于平衡载流子浓度，W二极管处于截止状态，当W二极管温度上升时，本征载流子浓度增加，门阀电压下降，同时串接在W二极管上与W二极管同温度的正温度系数热敏电阻的温度同步上升，电阻值增加，电压降增高，加在W二极管上的正偏置电压同步下降，正偏置电压与W二极管门阀电压之差保持为不随温度变化的常数，W二极管的工作稳定，当W二极管温度下降时，本征载流子浓度下降，门阀电压升高，同时与W二极管同温度的正温度系数热敏电阻的温度同步下降，电阻值减小，电压降下降，加在W二极管上的正偏置电压同步增加，正偏置电压与W二极管门阀电压之差保持为不随温度变化的常数，W二极管的工作稳定，是可靠性高和功耗低的半导体电子器件；w三极晶体管：按晶体管电导率是由加在调制极上的电压直接调制，或由加在调制极上的电压改变沟道中的载流 子浓度分布间接调制，分为w直接调制型晶体管与W间接调制型晶体管：W直接调制型晶体管：W直接调制型晶体管由两个P-N结反向串联组成，两个P-N结分别是源极端的调制结和漏极端的漏极结，在调制结和漏极结之间是调制极，调制极与一个正温度系数的低阻值热敏电祖串接，W直接调制型晶体管的工作原理是：静态时两个反向串联的P-N结总有一个是反偏，晶体管处于截止状态，在漏极加反偏电压和通过热敏电阻加正偏电压在调制极上，根据P-N结的工作原理，当加在调制结上的正偏电压高于门阀电压时，晶体管的调制结是导通状态，于是加在W直接调制型晶体管漏极上的反偏电压使漏极结反型，w直接调制型晶体管从两个反向串联的P-N结，变成两个正向串联的P-N结，w直接调制型晶体管的漏极结在被反型后变成正偏，正偏漏极结的电导率很高和电阻率很低，被反型后的漏极结变成一个允许大电流通过的通道，晶体管的工作只由加在调制结上的电压与晶体管门阀电压之差决定，和随调制结阻抗变化，由于P-N结是一个有方向性电导率可调的可变阻抗，和调制结是一个P-N结，当加在调制结上的电压有一个小的变化时，调制结的载流子浓度随加在调制结上的电压与晶体管门阀电压之差成指数规律变化，调制结电导率按指数规律产生一个大的变化，调制结的电阻率和阻抗随电导率变化，流过晶体管的电流随调制结的阻抗变化，于是在由电源电压、负载阻抗和晶体管阻抗组成的电路中，流过晶体管的电流随加在调制结上的电压与晶体管门阀电压之差成指数规律变化，与电源电压和负载阻抗的变化有关，完成电信号的放大和转换，上述工作原理表明，W直接调制型晶体管的工作由两个部份完成，加在调制极上的电压改变调制结的电导率，电阻率和阻抗随电导率变化，于是在由电源电压、负载阻抗和W直接调制型晶体管阻抗组成的电路中，流过W直接调制型晶体管的电流随晶体管调制结的阻抗变化，与电源电压和负载阻抗的变化有关，因此，加在调制极上的电压，只是改变调制结的电导率、电阻率和阻抗，使在W直接调制型晶体管中流动的电流随调制结阻抗变化，完成电信号的转换和放大；W直接调制型晶体管的调制极正偏置电压，是通过一个正温度系数的热敏电阻加在调制结上，根据新半导体电子原理，P-N结是一个有方向性电导率可调的可变阻抗，正温度系数的热敏电阻是与一个 可变阻抗串联，与W直接调制型晶体管同温，热敏电阻的电压降随温度和阻抗变化，当W直接调制型晶体管温度上升时，调制结的本征载流子浓度增加，门阀电压下降，同时热敏电阻的温度同步上升，阻抗增加，电压降增大，加在W直接调制型晶体管调制结上的正偏置电压同步下降，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W直接调制型晶体管的工作稳定，当W直接调制型晶体管温度下降时，调制结本征载流子浓度下降，门阀电压升高，同时正温度系数热敏电阻的温度同步下降，阻抗减小，电压降下降，加在W直接调制型晶体管调制结上的正偏置电压同步增加，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W直接调制型晶体管的工作稳定，是可靠性高和低功耗的半导体电子器件；W间接调制型(MOS)晶体管，根据半导体基片是P型或N型分为：P型W间接调制型(MOS)晶体管和N型W间接调制型(MOS)晶体管，P型W间接调制型(MOS)晶体管与N型W间接调制型(MOS)晶体管的工作原理完全相同；P型W间接调制型(MOS)晶体管，是在P型半导体基片上扩散两个高掺杂的N区，引出电极，成为源极和漏极，两个N区与P区组成两个反向串联的P-N结，两个P-N结分别是源极端的调制结和漏极端的漏极结，在基片表面上生长一层很薄的氧化层，再在氧化层上淀积金属层，连接一个正温度系数的低阻值热敏电阻，引出电极，成为调制极，P型W间接调制型(MOS)晶体管的工作原理是：当调制极未加正偏电压时，源极-沟道-漏极通道上两个反向串联的P-N结总有一个是反偏，W间接调制型(MOS)晶体管处于截止状态，当在漏极加反偏电压和调制极加正偏电压时，加在调制极上的正偏电压在P型沟道中的氧化层边界处感生电子电荷，改变P区中的载流子浓度分布，形成N型导电区，P型导电区与N型导电区中的多数载流子向少数载流子区扩散，形成一个新的P-N结和建立一个电场，场电压正向加在调制结上，N型导电区的电子浓度、场电压和电导率随正偏电压的升高而增加，调制结的载流子浓度随场电压与门阀电压之差的减小而增加，当调制结的载流子浓度增加到等于或高于平衡载流子浓度时，场电压上升到等于或高于门阀电压，晶体管的调制结是导通状态，加在W间接调制型(MOS)晶体管漏极上的反偏电压使漏极结反型，W间接调制型(MOS)晶体 管从两个反向串联的P-N结变成两个正向串联的P-N结，W间接调制型(MOS)晶体管的漏极结在被反型后变成正偏，正偏漏极结的电导率很高和电阻率很低，被反型后的漏极结变成一个允许大电流通过的通道，晶体管的工作只由加在调制极上的电压与晶体管门阀电压之差决定，和随调制结阻抗变化，根据P-N结是一个有方向性电导率可调的可变阻抗，当加在调制极上的正偏电压低于调制结的门阀电压时，调制结的载流子浓度低于平衡载流子浓度，调制结处于截止状态，当加在调制极上的正偏电压上升到等于调制结门阀电压时，调制结的载流子浓度增加到等于平衡载流子浓度，调制结处于导通与截止的临界状态，当加在调制极上的正偏电压上升到高于调制结门阀电压时，调制结的载流子浓度增加到高于平衡载流子浓度，调制结处于导通状态，源极-沟道-漏极连接成一条导电通道，调制结的电导率随加在调制极上的电压(正偏电压与信号电压之和)与W间接调制型(MOS)晶体管门阀电压之差成指数规律的变化，调制结的电阻率和阻抗随电导率变化，流过W间接调制型(MOS)晶体管的电流随调制结的阻抗变化，在由电源电压、负载阻抗和W间接调制型(MOS)晶体管阻抗组成的电路中，流过W间接调制型(MOS)晶体管的电流随晶体管的阻抗变化，与电源电压和负载阻抗的变化有关，于是漏极电流随加在调制极上的电压(正偏电压与信号电压之和)与W间接调制型(MOS)晶体管门阀电压之差成指数规律的变化，完成电信号的转换和放大，上述工作原理表明，W间接调制型(MOS)晶体管的工作由两个部份完成，加在调制极上的电压改变调制结的电导率，电阻率和阻抗随电导率变化，于是在由电源电压、负载阻抗和W间接调制型(MOS)阻抗组成的电路中，流过W间接调制型(MOS)晶体管的电流随晶体管调制结的阻抗变化，与电源电压和负载阻抗的变化有关，因此，加在调制极上的电压只是改变调制结的电导率、电阻率和阻抗，使在W间接调制型(MOS)晶体管中流动的电流随调制结阻抗变化，完成电信号的转换和放大；W间接调制型(MOS)晶体管调制极正偏置电压，是通过一个正温度系数的低阻值热敏电阻加在调制极上，根据新半导体电子原理，P-N结是一个有方向性电导率可调的可变阻抗，正温度系数的热敏电阻是与一个可变阻抗串联，热敏电阻与W间接调制型(MOS)晶体管同温，电压降随阻 抗变化，当W间接调制型(MOS)晶体管温度上升时，调制结的本征载流子浓度增加，门阀电压下降，同时热敏电阻的温度同步上升，阻抗增加，电压降增大，加在W间接调制型(MOS)晶体管调制极上的正偏置电压同步下降，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W间接调制型(MOS)晶体管的工作稳定，当W间接调制型(MOS)晶体管温度下降时，调制结的本征载流子浓度下降，门阀电压升高，同时热敏电阻的温度同步下降，阻抗减小，电压降下降，加在W间接调制型(MOS)晶体管调制极上的正偏置电压同步增加，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，W间接调制型(MOS)晶体管的工作稳定，是可靠性高和低功耗的半导体电子器件；W二极管、W直接调制型晶体管和W间接调制型(MOS)晶体管正确完整地发挥半导体电子器件的功能、特性和效率，工作速率能提高100倍以上，在80℃以下环境温度中能保持正常、稳定和可靠的工作，不需预热，开机就能稳定工作，电子器件以性能更强、稳定性可靠性更高、耗能更低的芯片，提高处理数据的能力和速度，有效解决无人驾驶、智慧医疗和人工智能等新兴领域高稳定性、高可靠性、低功耗、高灵敏度、低时延、发热、器件的体积和高功率输出等一系列关键问题；晶体管工作状态：由加在W直接调制型晶体管调制极、或加在W间接调制型(MOS)晶体管调制极、或双极结型晶体管基极、或单极场效应(MOS)晶体管栅极上的正偏置电压与晶体管门阀电压之差决定，电导率：σ＝nqμ n＝qμ nn n0exp[(V b～+V b--V D)/V T]，当正偏置电压高于晶体管门阀电压V b-＞V D时，调制结的载流子浓度高于平衡载流子浓度n＞n n0，静态时调制结导通，晶体管工作在甲类状态，当正偏置电压等于晶体管门阀电压V b-＝V D时，调制结的载流子浓度等于平衡载流子浓度n＝n n0，静态时调制结处于导通与截止的临界点，晶体管工作在乙类状态，当正偏置电压低于晶体管门阀电压V b-＜V D时，调制结的载流子浓度低于平衡载流子浓度n＜n n0，静态时调制结处于截止状态，只有当加在调制结上的正偏置电压与信号电压之和高于晶体管门阀电压(V b～+V b-)＞V D时，调制结的载流子浓度高于平衡载流子浓度n＞n n0，晶体管导通和工作在丙类(脉冲)状态，当正偏置电压与晶体管门阀电压之差变化时，晶体管工作状态随着变化，产生不稳定性，降低 可靠性和增大功率损耗，功率损耗的增大，晶体管温度上升，本征载流子浓度增加，门阀电压下降，正偏置电压与晶体管门阀电压之差增大，稳定性和可靠性进一步降低，当形成恶性循环时，升高的晶体管温度将烧坏晶体管及电子设备；根据新半导体电子原理，晶体管工作状态由加在W直接调制型晶体管调制极、或加在W间接调制型(MOS)晶体管调制极、或双极结型晶体管基极、或单极场效应(MOS)晶体管栅极上的正偏置电压与晶体管门阀电压之差决定，晶体管门阀电压是温度的函数，随温度的升高而下降，和随温度的下降而升高，导致晶体管工作状态不稳定，稳定晶体管工作状态的原理是：晶体管门阀电压不随温度变化或正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，晶体管门阀电压不随温度变化的一项措施是，选用具有相同温度特性的半导体材料和参杂材料，使两种材料的载流子浓度之比在温度变化时保持为近于常数，晶体管门阀电压不随温度变化，保证晶体管工作稳定；另一方法是：在双极结型晶体管基极和单极场效应(MOS)晶体管栅极上的正偏置电压电路的下偏置电路中，串接入一个负温度系数的热电元件，热电元件与晶体管同温，电压降随阻抗变化，正偏置电压等于晶体管工作电压，当双极结型晶体管或单极场效应(MOS)晶体管温度上升时，双极结型晶体管发射结或单极场效应(MOS)晶体管源极结的本征载流子浓度增加，门阀电压下降，同时热电元件的温度同步升高，阻抗减小，电压降下降，加在双极结型晶体管基极或单极场效应(MOS)晶体管栅极上的正偏置电压同步下降，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，双极结型晶体管和单极场效应(MOS)晶体管的工作稳定，当双极结型晶体管或单极场效应(MOS)晶体管温度下降时，双极结型晶体管发射结或单极场效应(MOS)晶体管源极结的本征载流子浓度下降，门阀电压升高，同时热电元件的温度同步下降，阻抗增加，电压降增大，加在双极结型晶体管基极或单极场效应(MOS)晶体管栅极上的正偏置电压同步增加，正偏置电压与晶体管门阀电压之差保持为不随温度变化的常数，双极结型晶体管和单极场效应(MOS)晶体管的工作稳定；根据新半导体电子原理，晶体管的工作状态和工作特性由晶体管门阀电压决定，晶体管门阀电压是P-N结自建电压，由半导体材料的本征载流子浓度和参杂浓度决定， V D＝V n-V p＝V TIn(N dN a/n i 2)，参杂浓度高和本征载流子浓度低，晶体管门阀电压高，参杂浓度低和本征载流子浓度高，晶体管门阀电压低，通过选用不同的半导体材料和参杂浓度，可制造晶体管门阀电压、工作特性、开关速度、处理数据能力和计算效率不同的晶体管；根据晶体管的工作原理，晶体管由P-N结组成，P-N结是一个有方向性电导率可调阻抗可变的无源器件，W直接调制型晶体管、W间接调制型(MOS)晶体管、双极结型晶体管和单极场效应(MOS)晶体管的工作由两个部份完成，加在调制极上的电压，只是调制调制结的电导率，电阻率和阻抗随电导率变化，晶体管调制结是一个电导率可调的可变阻抗，由于调制结阻抗就是晶体管阻抗，于是在由电源电压、负载阻抗和晶体管阻抗组成的电路中流动的电流，随调制结的阻抗变化：l D＝E C/(R J+R L)，式中：I D-漏极电流，E C-电源电压，R L-负载阻抗(包含交流阻抗和直流阻抗)，R J-晶体管阻抗，R J＝L/nAqμ n＝L/Aqμ nn n0exp[(V b～+V b--V D)/V T]，式中：L-扩散长度，A-结截面积，n-载流子浓度，q-电子电荷，μ n-电子迁移率，n n0-平衡载流子浓度，V b～-输入信号电压，V b--偏置电压，V D-门阀电压，电导率：σ＝nqμ n＝qμ nn n0exp[(V b～+V b--V D)/V T]，电阻率：ρ＝1/nqμ n＝1/qμ nn n0exp[(V b～+V b--V D)/V T]，由半导体材料的本征载流子浓度n n0和本征迁移率μ n决定，随加在调制极上的电压(正偏电压V b-与信号电压V b～之和)与晶体管门阀电压V D之差成指数规律变化；晶体管最大允许电流由结的截面积A决定，由于晶体管阻抗是随加在调制极上电压的升高而减小，因此，晶体管最大电流由电源电压E C与负载阻抗R L之比决定I Dm＝E C/(R L+R j)≈E C/R L，由于W间接调制型(MOS)晶体管和单极场效应(MOS)晶体管的工作由两个部份完成，加在调制极上的电压，只是调制调制结的电导率，电阻率和阻抗随电导率变化，使晶体管调制结成为一个电导率可调的可变阻抗，因此，W间接调制型(MOS)晶体管和单极场效应(MOS)晶体管调制极的氧化层与在晶体管中流动的电流无直接关系；输出功率：P o＝E c 2R L/(R J+R L) 2，随输入信号电压的升高导致晶体管阻抗的减小和电流的增加而增大，最大输出功率：P om＝E C 2R L/(R L+R J) 2≈E C 2/R L；效率：η c＝(P o/P d)＝[(E c 2R L)/(R J+R L) 2]/[E c 2/(R J+R L)]＝R L/(R J+R L)，随输入信号电压的升高导致晶体管阻抗的减小而增加；晶体管功率损 耗是晶体管中流动的电流在晶体管阻抗上产生的损耗，P C是一个随晶体管阻抗R J变化的变量，P C＝E C 2R J\(R J+R L) 2，在小信号阶段，漏极电流I D增量的平方大于晶体管阻抗的减小量，晶体管功率损耗随输入信号电压的升高增大，在晶体管阻抗减小到与负载阻抗相等时，漏极电流I D增量的平方等于晶体管阻抗的减小量，晶体管功率损耗最大，此时的输出功率是最大输出功率的四分之一，在达到最大功率损耗后，随输入信号电压的升高，漏极电流I D增量的平方小于晶体管阻抗的减小量，晶体管功率损耗是随输出功率的增大和晶体管阻抗的减小而下降，即在晶体管阻抗与负载阻抗相等和输出功率是最大输出功率的四分之一时，晶体管的功率损耗最大，由于晶体管阻抗R J＝L/nAqμ n＝L/Aqμ nn n0exp[(V b～+V b--V D)/V T]，静态电阻R J0＝L/Aqμ nn n0exp(-V D/V T)，和门阀电压V D对每只晶体管是定值，负载阻抗在设计电路时已确定，因此，选择正偏电压V b-与信号电压V b～，可避开最大功率损耗点工作，有效减小晶体管功率损耗，降低晶体管温度，以上关系式定量分析晶体管的工作，用于电路设计；根据新半导体电子原理，半导体电子元件的电导率σ＝nqμ n＝qμ nn n0exp[(V b～+V b--V D)/V T]，和电阻率：ρ＝1/nqμ n＝1/qμ nn n0exp[(V b～+V b--V D)/V T]，静态电导率由本征载流子浓度n n0和本征迁移率μ n决定，由于晶体管能用多种半导体材料制造，不同半导体材料的静态电导率和电阻率各不相同，选用不同半导体材料，可制造具有不同功能和特性的晶体管，硅的本征载流子浓度是1.5×10 10，本征迁移率：电子1350/cm 2，空穴480/cm 2，硅晶体管的门阀电压约为0.6V；锗的本征载流子浓度是2.5×10 13，本征迁移率：电子3900/cm 2，空穴1900/cm 2，锗晶体管的门阀电压约为0.25V；数据表明：静态电导率锗高于硅三个数量级，静态电阻率锗低于硅三个数量级，因而，锗半导体电子器件的动态电导率远大于硅半导体电子器件，电阻率则远小于硅半导体电子器件，因而锗晶体管具有高的导电性，和门阀电压只是硅晶体管的三分之一，对于相同工作状态锗晶体管的开关时间减少三分之二，提高晶体管的开关速度，因此，由高静态电导率和低静态电阻率的半导体材料锗制造的半导体电子器件，其功能和特性将优于硅材料制造的半导体电子器件。事实揭示，根据新半导体电子原理，能拓展多种半导体材料，用于制造功能和特性更高的半导体电子器件；根据新半导体电子原理，由结单独或组合成的半导体电子器的工作,是外加在结上的电压，改变结的载流子浓度分佈，调制半导体电子器件的电导率，完成电信号的转换和放大，半导体电子器件的工作是载流子浓度分佈的变化，不是发射电子和不产生电流,因而半导体电子器件不会失效和老化,从而提高半导体电子器件和产品的合格率与使用寿命，降低生产成本和使用费。
  2. 根据权利要求1所述的新半导体电子原理技术与器件，其特征是：所述的稳定晶 体管工作状态的另一方法是：在双极结型晶体管基极和单极场效应(MOS)晶体管栅极的正偏置电压电路的下偏置电路中，串接入一个负温度系数的热电元件，热电元件与晶体管同温，热电元件的电压降在20℃时，在甲类工作状态是近似等于晶体管门阀电压，在乙类工作状态是略低于晶体管门阀电压，在丙类工作状态是低于晶体管门阀电压。
PCT/CN2020/000042 2019-12-28 2020-03-09 新半导体电子原理技术与器件 WO2021128435A1 (zh)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1020227025314A KR20220119678A (ko) 2019-12-28 2020-03-09 새로운 반도체 전자 공학 원리 기술 및 장치
CA3163026A CA3163026A1 (en) 2019-12-28 2020-03-09 New semiconductor electronics principle technology and devices
AU2020414761A AU2020414761A1 (en) 2019-12-28 2020-03-09 Novel principles and technology for semiconductor electronics, and device
JP2022539754A JP2023508509A (ja) 2019-12-28 2020-03-09 新しい半導体電子原理技術およびデバイス
EP20907132.3A EP4084070A4 (en) 2019-12-28 2020-03-09 NEW PRINCIPLES AND TECHNOLOGY FOR SEMICONDUCTOR ELECTRONICS, AND DEVICE
CN202080025941.4A CN113826203A (zh) 2019-12-28 2020-03-09 新半导体电子原理技术与器件

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201911426662.4 2019-12-28
CN201911426662 2019-12-28

Publications (1)

Publication Number Publication Date
WO2021128435A1 true WO2021128435A1 (zh) 2021-07-01

Family

ID=76507611

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/000042 WO2021128435A1 (zh) 2019-12-28 2020-03-09 新半导体电子原理技术与器件

Country Status (7)

Country Link
EP (1) EP4084070A4 (zh)
JP (1) JP2023508509A (zh)
KR (1) KR20220119678A (zh)
CN (2) CN113826203A (zh)
AU (1) AU2020414761A1 (zh)
CA (1) CA3163026A1 (zh)
WO (1) WO2021128435A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86108332A (zh) * 1986-12-06 1988-11-23 汪克明 半导体电路不稳定性解决效率提高
EP0371785A2 (en) * 1988-11-29 1990-06-06 Kabushiki Kaisha Toshiba Lateral conductivity modulated MOSFET
US5073511A (en) * 1988-03-29 1991-12-17 Sgs-Thomson Microelectronics S.R.L. Method for manufacturing a conductivity modulation mos semiconductor power device (himos)
CN103887169A (zh) * 2013-11-29 2014-06-25 杭州恩能科技有限公司 一种具有提高抗浪涌电流能力的半导体装置的制备方法
CN107170817A (zh) * 2017-06-16 2017-09-15 电子科技大学 一种横向igbt
WO2018060237A1 (en) * 2016-09-27 2018-04-05 Luxembourg Institute Of Science And Technology (List) Transparent p-n junction providing a rectifying contact

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN86108332A (zh) * 1986-12-06 1988-11-23 汪克明 半导体电路不稳定性解决效率提高
US5073511A (en) * 1988-03-29 1991-12-17 Sgs-Thomson Microelectronics S.R.L. Method for manufacturing a conductivity modulation mos semiconductor power device (himos)
EP0371785A2 (en) * 1988-11-29 1990-06-06 Kabushiki Kaisha Toshiba Lateral conductivity modulated MOSFET
CN103887169A (zh) * 2013-11-29 2014-06-25 杭州恩能科技有限公司 一种具有提高抗浪涌电流能力的半导体装置的制备方法
WO2018060237A1 (en) * 2016-09-27 2018-04-05 Luxembourg Institute Of Science And Technology (List) Transparent p-n junction providing a rectifying contact
CN107170817A (zh) * 2017-06-16 2017-09-15 电子科技大学 一种横向igbt

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
"US Journal of Applied Physics", article "US journal Applied Physics Letters"
See also references of EP4084070A4
WANG KEMING WANG RUNZE: "The New Semiconductor Electron Theory", 8 October 2013, UNITED STATES TATE PUBLISHING

Also Published As

Publication number Publication date
CN113053871A (zh) 2021-06-29
EP4084070A1 (en) 2022-11-02
EP4084070A4 (en) 2024-02-07
CN113826203A (zh) 2021-12-21
KR20220119678A (ko) 2022-08-30
AU2020414761A1 (en) 2022-07-14
CA3163026A1 (en) 2021-07-01
JP2023508509A (ja) 2023-03-02

Similar Documents

Publication Publication Date Title
Hall Power rectifiers and transistors
Sharma et al. Dual metal drain Ge‐source dopingless TFET with enhanced turn‐ON steep subthreshold swing and high ON‐current
JP5345649B2 (ja) 可変ゲート電界効果トランジスタ（ｆｅｔ）及びこのｆｅｔを備える電気電子装置
Sporea et al. Self-heating effects in polysilicon source gated transistors
US9379342B1 (en) Semi-conductor device with programmable response
Ghenzi et al. One-transistor one-resistor (1T1R) cell for large-area electronics
WO2021128435A1 (zh) 新半导体电子原理技术与器件
US8614108B2 (en) Electronic device having thermally managed electron path and method of thermal management of very cold electrons
Zakaria et al. Self-switching diodes as RF rectifiers: evaluation methods and current progress
Shaikshavali et al. Influence of surface trap states on RF/microwave performance of lateral AlGaN/GaN Schottky barrier diode
Nelson et al. The effects of proton implant on GaAs isolation properties
Mao et al. Graphene Field-effect transistor current source with double top-gates and double feedback
Raj et al. Memristor BJT pair based low complex circuits for portable electronics
Beaty et al. Transistor
Katiyar et al. Simulation of pentacene/Alq3 bilayer OLET to analyze the effect of Alq3 layer thickness and asymmetric contacts on device performance
Aziz et al. Simulation of InGaAs-Based Self-Switching Diodes as Sub-Terahertz Rectifiers.
Ma Electronic Devices for Smartphones
Yang et al. Output breakdown characteristics of amorphous InGaZnO thin-film transistors at high gate voltage
Chatterjee et al. Unexpected two-step response in AlGaAs/GaAs heterostructure-based SBD
Singh et al. A power dual-gate laterally-diffused MOSFET on 4H–SiC
Zhang et al. Preparation and characteristics of tunnelling effect transistor using copper phthalocyanine
Srikant et al. Junction Transistors and Field-Effect Transistors
Agrawal et al. The Effect of Base–Emitter Interfacial Layer on the Organic Permeable Base Transistor’s Characteristics
Song et al. Numerical study on off-current features in an organic transistor by controlling electrode-overlap area
PN-Body-Tied Operation Analysis of Steep-Subthreshold-Slope PN-Body-Tied SOI FET

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20907132

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 3163026

Country of ref document: CA

ENP Entry into the national phase

Ref document number: 2022539754

Country of ref document: JP

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2020414761

Country of ref document: AU

Date of ref document: 20200309

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 20227025314

Country of ref document: KR

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 2020907132

Country of ref document: EP

Effective date: 20220728