WO2021098485A1

WO2021098485A1 - Method and system for power-on and power-off control of pcie device

Info

Publication number: WO2021098485A1
Application number: PCT/CN2020/125408
Authority: WO
Inventors: 王刘非; 戴庆军; 陈业嘉; 李双庭
Original assignee: 中兴通讯股份有限公司
Priority date: 2019-11-20
Filing date: 2020-10-30
Publication date: 2021-05-27
Also published as: CN112825011A

Abstract

A method and system for power-on and power-off control of a PCIe device. The method comprises: a logic module receives an operational instruction from a CPU (S202), the operational instruction including a power-on instruction or a power-off instruction carrying information of a target device; simulating the in-position state of the target device according to the operational instruction (S203); according to the simulated in-position state of the target device, enabling to control a clock and reset signal of the target device (S204); according to the simulated in-position state of the target device from the logic module, triggering a hot-plug driver of an operating system to execute the operation of adding or removing the target device (S206); according to the operational instruction, outputting a corresponding power control instruction to a power control module (S207); and receiving, and according to the power control instruction from the logic module, controlling a power signal supplied to the target device to be turned on or off (S208).

Description

Power-on and power-off control method and system of PCIe device

Cross-references to related applications

This disclosure claims the priority of the Chinese patent application CN201911144077.5 entitled "Power-on control method and system for PCIe devices" filed on November 20, 2019, the entire content of which is incorporated herein by reference.

Technical field

The present disclosure relates to the field of electronic technology, and in particular, to a method and system for power-on and power-off control of PCIe devices.

Background technique

PCIe (Peripheral Component Interconnect express) is a high-speed serial computer expansion bus standard, which is mainly used for data interaction between CPU (Central Processing Unit, central processing unit) and peripheral devices.

For example, the non-volatile memory host controller interface specification solid state drive (Non-Volatile Memory express Solid State Disk, NVMe SSD) is a PCIe device based on the PCIe bus interface. At present, NVMe SSDs are gradually replacing traditional mechanical hard disks and are widely used in server storage systems. In server storage systems, storage arrays containing multiple NVMe SSDs are usually used. When the NVMe SSD of the storage array fails, it is often necessary for the operation and maintenance personnel to perform a power-on and power-off operation on the NVMe SSD to determine whether the NVMe SSD can return to normal, and then determine whether the NVMe SSD needs to be replaced. However, this power-on and power-off operation often requires operation and maintenance personnel to enter the computer room for manual operation, resulting in high operation and maintenance costs.

Summary of the invention

The following is an overview of the topics detailed in this article. This summary is not intended to limit the scope of protection of the claims.

The embodiments of the present disclosure provide a power-on and power-off control method, system, device, and computer-readable storage medium for PCIe devices, which can realize remote control of power-on and power-off of PCIe devices, which is beneficial to reducing operation and maintenance costs.

On the one hand, the embodiments of the present disclosure provide a power-on and power-off control method for PCIe devices, including:

Receiving an operation instruction from the CPU, the operation instruction including a power-on instruction or a power-off instruction carrying target device information;

According to the operation instruction, simulate the in-position state of the target device;

According to the simulated target device in-position state, enable control of the clock and reset signal of the target device;

Reporting the in-position status of the simulated target device to the CPU to trigger the hot-plug driver of the operating system to perform the operation of adding or removing the target device;

According to the operation instruction, a corresponding power control instruction is output to the power control module, so that the power control module controls the power signal supplied to the target device to be turned on or off.

On the other hand, the embodiments of the present disclosure provide a power-on and power-off control method for PCIe devices, including:

Receiving an operation instruction from the system application layer, and forwarding the operation instruction to the logic module, the operation instruction including a power-on instruction or a power-off instruction carrying target device information;

According to the in-position state of the simulated target device from the logic module, the hot-plug driver of the operating system is triggered to perform the operation of adding or removing the target device.

On the other hand, embodiments of the present disclosure provide a power-on and power-off control system, including:

The CPU is used to receive operating instructions from the system application layer and forward the operating instructions to the logic module. The operating instructions include power-on instructions or power-off instructions that carry target device information; and according to the information from the logic module The simulated target device is in the in-position state, which triggers the hot-swappable driver of the operating system to perform the operation of adding or removing the target device;

The logic module is used to receive an operation instruction from the CPU, the operation instruction includes a power-on instruction or a power-off instruction carrying target device information; according to the operation instruction, the in-position state of the target device is simulated; The simulated target device's in-position state enables control of the clock and reset signal of the target device; the simulated target device's in-position state is reported to the CPU to trigger the hot-swappable driver of the operating system to add or remove all data. The operation of the target device; further outputting a corresponding power control instruction to the power control module according to the operation instruction, so that the power control module controls the power signal supplied to the target device to be turned on or off;

The power control module is used to receive and control the power signal supplied to the target device to be turned on or off according to the power control instruction from the logic module.

On the other hand, an embodiment of the present disclosure provides a device, including:

Memory, used to store programs;

The processor is configured to execute the program stored in the memory, and when the processor executes the program stored in the memory, the processor is configured to execute any of the power-on and power-off control methods of the PCIe device as described above.

In another aspect, embodiments of the present disclosure provide a computer-readable storage medium storing computer-executable instructions, and the computer-executable instructions are used to execute any of the foregoing PCIe device power-on and power-off control methods.

Other features and advantages of the present disclosure will be described in the following specification, and partly become obvious from the specification, or understood by implementing the present disclosure. The objectives and other advantages of the present disclosure can be realized and obtained through the structures specifically pointed out in the specification, claims and drawings.

Description of the drawings

The accompanying drawings are used to provide a further understanding of the technical solution of the present disclosure, and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure, and do not constitute a limitation to the technical solution of the present disclosure.

FIG. 1 is a schematic structural diagram of a power-on and power-off control system for PCIe devices provided by an embodiment of the present disclosure;

2 is a schematic structural diagram of another PCIe device power-on and power-off control system provided by an embodiment of the present disclosure;

FIG. 3 is a flowchart of a method for controlling power-on and power-off of PCIe devices according to an embodiment of the present disclosure;

4 is a flowchart of another method for controlling power-on and power-off of PCIe devices according to an embodiment of the present disclosure;

Fig. 5 is a schematic structural diagram of a device provided by an embodiment of the present disclosure.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the present disclosure clearer, the following further describes the present disclosure in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present disclosure, but not used to limit the present disclosure.

It should be understood that in the description of the embodiments of the present disclosure, multiple (or multiple) means two or more, greater than, less than, exceeding, etc. are understood to not include the number, and above, below, and within are understood to include the number. If there are descriptions of "first", "second", etc., which are only used to distinguish technical features, they cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the indicated The precedence of technical characteristics.

PCIe (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, mainly used for data interaction between CPU (Central Processing Unit, central processing unit) and peripheral devices.

In order to solve the above technical problems, the embodiments of the present disclosure provide a power-on and power-off control method, system, device, and computer-readable storage medium for PCIe devices, which can realize remote control of power-on and power-off of PCIe devices, and can first replace the device before failure. The PCIe device can be removed through the power-off command to avoid system abnormalities caused by violent plugging and unplugging of the device.

Fig. 1 shows a PCIe device power-on and power-off control system 100 provided by an embodiment of the present disclosure. As shown in FIG. 1, the system 100 includes but is not limited to: a CPU 110, a logic module 120 and a power control module 130. The CPU 110 is connected to N PCIe devices 140 and the logic module 120 respectively, where N is an integer greater than or equal to 1; the logic module 120 is connected to the N PCIe devices 140 and the power control module 130 respectively. The power control module 130 is connected to N PCIe devices 140.

The topology of the system 100 shown in FIG. 1 is suitable for applications where the number of PCIe devices 140 is small, and the number of PCIe channels of the CPU 110 itself can meet the connection requirements of N PCIe devices 140, the CPU 110 can be directly connected via N PCIe buses. The PCIe interfaces of the N PCIe devices 140 and the logic module 120 can be connected via the I2C bus, thereby reducing the complexity and cost of the system design.

In another alternative design solution, as shown in FIG. 2, the CPU 110 is connected to N PCIe devices 140 through a PCIe switch (SWITCH) module 150, and the PCIe switch module 150 functions to expand the number of PCIe channels. Optionally, the CPU 110 is connected to the PCIe switch module 150 through a PCIe bus, and the PCIe switch module 150 is connected to N PCIe devices 140 through N PCIe buses. The PCIe bus and the PCIe device 140 can be connected through a fixed connector (such as a slot )connection. The CPU 110 is also connected to the logic module 120 through the PCIe switch module 150. Specifically, the PCIe switch module 150 and the logic module 120 can be connected through an I2C bus, where the I2C bus can be flexibly selected according to the interface provided by the PCIe switch module 150. , Such as the Local Bus interface.

In this embodiment, the logic module 120 may be a CPLD (Complex Programmable Logic Device, complex programmable logic device). Those skilled in the art should understand that the logic module 120 may also be an FPGA (Field Programmable Gate Array, Field Programmable Gate Array) or other similar logic devices, and the present disclosure does not limit the type of the logic module 120 too much.

As shown in FIG. 2, the logic module 120 can be connected to the power control module 130 through the I/O expansion chip 160, and the logic module 120 and the I/O expansion chip 160 can be connected through the I2C bus. The I/O expansion chip 160 can be connected through the N The root I/O signal transmission line is connected to the power control module 130. Those skilled in the art should understand that when there are a large number of PCIe devices 140 and one I/O expansion chip 160 cannot meet the I/O interface requirements, the number of I/O expansion chips 160 can also be increased as needed, and only the I/O expansion chip 160 O The I2C address of the expansion chip 160 can be set to a different address.

It should be understood that when the number of PCIe devices 140 is small and the number of I/O interfaces of the logic module 120 is sufficient, the I/O expansion chip 160 can be removed. As shown in FIG. 1, the logic module 120 directly passes through its own I/O interface. The O interface and N I/O signal transmission lines are connected to the power control module 130.

In this embodiment, the power control module 130 has N power output terminals, and the N power output terminals are correspondingly connected to N PCIe devices 140 through N power transmission lines to output power signals to the N PCIe devices 140. Here, the power signal output of the N power output units are respectively controlled by the I/O signal of the logic module 120, so as to enable the power supply of the PCIe device 140 to be powered on and off.

FIG. 3 shows a flowchart of a method for controlling power-on and power-off of PCIe devices according to an embodiment of the present disclosure. This method can be applied to the above-mentioned power-on and power-off control system 100 including the CPU 110, the logic module 120, and the power control module 130. As shown in Figure 3, the method includes but is not limited to the following steps.

S201: The CPU receives the operation instruction from the system application layer, and forwards the operation instruction to the logic module.

The operation instruction includes a power-on instruction or a power-off instruction carrying target device information.

Exemplarily, the operation and maintenance personnel may input an operation instruction through an application installed in the application layer of the system. The operation instruction includes a power-on instruction for powering on the target device and a power-off instruction for powering off the target device. After the CPU receives the power-on command or power-off command carrying the target device information from the system application layer, it forwards the power-on command or power-off command to the logic module through the I2C bus.

S202: The logic module receives an operation instruction from the CPU.

S203: The logic module simulates the in-position state of the target device according to the operation instruction.

Exemplarily, the logic module receives an operation instruction from the CPU, and can analyze the operation instruction to determine whether the operation instruction is a power-on instruction or a power-off instruction, and then according to the target device information carried in the power-on instruction or the power-off instruction To determine the target device and the slot where the target device is located.

When the operation command received by the logic module is a power-on command, the real state of the target device is simulated; when the operation command received by the logic module is a power-off command, the simulated target device is not in place.

The real state of the target device can be obtained from the register configured by the target device. Generally speaking, a PCIe device is configured with a register for recording the status of the position, and the value in the register can indicate whether the PCIe device on the corresponding slot is in position. For example, when the value of the register is 1, it indicates that the PCIe device in the slot is not in place; when the value of the register is 0, it indicates that the PCIe device in the slot is in place.

In a specific implementation, a register used to record the in-position status of the simulated target device can be set in the logic module, and the status of the target device can be achieved by updating the value of the register used to record the in-position state of the simulated target device The purpose of the simulation. For example, when the target device to be simulated is not in place, the value of the register used to record the in-position status of the simulated target device is set to 1; when the target device to be simulated is in place, it will be used to record the in-position status of the simulated target device The value of the register is set to 0. The embodiment of the present disclosure achieves the purpose of simulating the action of inserting or unplugging the device on the slot corresponding to the target device by simulating the presence or absence of the target device.

S204: The logic module enables the control of the clock and reset signal of the target device according to the simulated in-position state of the target device.

Exemplarily, the data transmission of the PCIe device such as NVMe SSD is performed when the clock and reset signal are turned on. If the clock and reset signal of the PCIe device are turned off, the data transmission of the PCIe device will be terminated. In this embodiment, the logic module determines whether to provide the enable signal of the start clock and the reset signal for the target device according to the value of the register that records the analog in-position state.

For example, when the value of the register that the logic module records the analog in-position status is 0, the logic module outputs the clock and reset signal enable signal to the target device, and the target device can perform data transmission; when the logic module records the analog in-position state When the value of the status register is 1, the logic module stops outputting the enable signal to the target device to turn off the clock and reset signal of the target device, so that the target device terminates the data transmission.

S205: The logic module reports the in-position status of the simulated target device to the CPU.

Exemplarily, the logic module sends the in-position state of the corresponding target device to the CPU through the I2C bus according to the value of the register that records the simulated in-position state.

S206: The CPU triggers the hot plug driver of the operating system to perform an operation of adding or removing the target device according to the simulated target device in-position state from the logic module.

Exemplarily, the CPU judges whether there is a device plug-in action in the slot corresponding to the target device according to the simulated target device in-place status information updated by the logic module, and thus triggers the hot-plug driver of the operating system to execute the addition or removal. In addition to the operation of the target device.

For example, when the logic module records the value of the register that simulates the in-position status and updates it from 1 to 0, after the CPU obtains the in-position status update information from the logic module, it determines that there is a device insertion action in the slot corresponding to the target device. In turn, the hot-swappable driver of the operating system is triggered to perform the operation of adding the target device, and the connection between the PCIe slot and the target device is established. When the logic module records the value of the register that simulates the in-position state and updates from 0 to 1, the CPU obtains the in-position state update information from the logic module, and determines that there is a device unplugging action in the slot corresponding to the target device, and then Trigger the operating system's hot-swappable driver to remove the target device and disconnect the PCIe slot from the target device. Here, the hot-swappable driver is a device driver of the operating system kernel. Since the hot-swappable driver is an existing technology, it will not be repeated here.

S207: The logic module outputs a corresponding power control command to the power control module according to the operation command.

In a specific implementation, when the operation command received by the logic module is a power-on command, the target device power-on command is output to the power control module through the I/O signal transmission line, so that the power control module outputs a power signal to the target device.

In a specific implementation, when the operation instruction received by the logic module is a power-off instruction, it is determined whether the hot-plug driver has completed the operation of removing the target device, and if so, the target device power-off instruction is output through the I/O signal transmission line To the power control module, so that the power control module stops outputting the power signal to the target device.

Here, it is judged whether the hot plug driver has completed the operation of removing the target device, which can be specifically achieved by the following steps: obtain the state value of the corresponding PCIe slot power status register, and judge whether the hot plug process is finished according to the state value.

Exemplarily, the PCIe device is configured with a register for recording the power state of the PCIe slot corresponding to the target device, and the logic module can determine whether the hot plug process is over by reading the state value of the power state register.

S208: The power control module receives and controls the power signal supplied to the target device to be turned on or off according to the power control instruction from the logic module.

Exemplarily, the power control module determines whether the power control command is a power-on command or a power-off command according to the power control command received from the logic module, and responds to the power control command, and executes turn-on or turn-off of the target device accordingly The operation of the power signal completes the power-on and power-off operation of the target device.

FIG. 4 shows a flowchart of another method for controlling power-on and power-off of PCIe devices according to an embodiment of the present disclosure. In order to improve the CPU processing speed of power-on and power-off instructions, in conjunction with FIG. 3, as shown in FIG. 4, steps S205 and S206 can be replaced with steps S301 and S302 correspondingly.

S301: The logic module sends an interrupt signal for indicating update of the in-position state to the CPU, and reports the in-position state of the simulated target device to the CPU.

The interrupt signal is used to trigger the hot plug drive in step S206, so that the CPU executes step S302.

S302: The CPU receives an interrupt signal from the logic module for indicating an in-position status update, and triggers a hot-swappable driver of the operating system to perform an operation of adding or removing a target hard disk according to the received simulated in-position state.

It should be noted that, in a specific implementation, in addition to the method of sending an interrupt signal to the CPU, the hot-plug drive can also be triggered by a polling method, which is not specifically limited in the embodiment of the present disclosure.

Based on the technical solutions of the embodiments of the present disclosure, when a PCIe device fails, the PCIe device in the computer room can be remotely controlled to power on and off to determine whether the device needs to be replaced. There is no need for operation and maintenance personnel to enter the computer room to perform operations, reducing the need for operation and maintenance personnel. Workload.

In addition, although PCIe devices support hot-swappable functions, if the system supports unreliable PCIe device hot-swappable functions, it is easy to cause system abnormalities and business interruption during the process of replacing devices with faults. Based on the technical solutions of the embodiments of the present disclosure, it is possible to implement the removal operation of the device through the power-off instruction before replacing the PCIe device, so as to avoid violent plugging and unplugging of the device causing system abnormality.

In addition, the technical solution provided by the embodiments of the present disclosure can also be applied to the scenario of the PCIe device hot-plug function stability test in the system development and testing phase, avoiding a large amount of manual disk insertion and removal operations, and improving the reliability of the system test.

Fig. 5 shows an apparatus 400 provided by an embodiment of the present disclosure. As shown in FIG. 5, the device 400 includes but is not limited to:

The memory 420 is used to store programs;

The processor 410 is configured to execute a program stored in the memory 420. When the processor 410 executes a program stored in the memory 420, the processor 410 is configured to execute the foregoing PCIe device power-on control method.

The processor 410 and the memory 420 may be connected by a bus or in other ways.

As a non-transitory computer-readable storage medium, the memory 420 can be used to store non-transitory software programs and non-transitory computer-executable programs, such as the PCIe device power-on control method described in the embodiments of the present disclosure. The processor 410 executes the non-transitory software programs and instructions stored in the memory 420 to implement the aforementioned PCIe device power-on and power-off control method.

The memory 420 may include a storage program area and a storage data area. The storage program area may store an operating system and an application program required by at least one function; the storage data area may store and execute the aforementioned PCIe device power-on control method. In addition, the memory 420 may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory 420 may optionally include memories remotely provided with respect to the processor 410, and these remote memories may be connected to the device through a network. Examples of the aforementioned networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

The non-transient software programs and instructions required to implement the power-on and power-off control method of the PCIe device are stored in the memory 420, and when executed by one or more processors 410, the power-on and power-off control method of the PCIe device is executed, for example, , Execute method steps S201 and S206 described in FIG. 3, method steps S202 to S205, and step S207 described in FIG. 3, method step S208 described in FIG. 3, method steps S201 and S302 described in FIG. 4, in FIG. The described method steps S201 to S204, step S301, step S207, and the method step S208 described in FIG. 4.

The embodiment of the present disclosure also provides a computer-readable storage medium that stores computer-executable instructions, and the computer-executable instructions are used to execute the aforementioned PCIe device power-on control method.

In an embodiment, the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are executed by one or more control processors 410, for example, executed by one processor 410 in the above-mentioned apparatus 400, The foregoing one or more processors 410 are caused to execute the foregoing PCIe device power-on control method, for example, to execute the method steps S201 and S206 described in FIG. 3, the method steps S202 to S205, and step S207 described in FIG. 3, as shown in FIG. The method step S208 described in FIG. 4, the method steps S201 and S302 described in FIG. 4, the method steps S201 to S204, step S301, and step S207 described in FIG. 4, and the method step S208 described in FIG.

The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the objectives of the solutions of the embodiments.

A person of ordinary skill in the art can understand that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and appropriate combinations thereof. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit . Such software may be distributed on a computer-readable medium, and the computer-readable medium may include a computer storage medium (or non-transitory medium) and a communication medium (or transitory medium). As is well known to those of ordinary skill in the art, the term computer storage medium includes volatile and non-volatile data implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Sexual, removable and non-removable media. Computer storage media include but are not limited to RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or Any other medium used to store desired information and that can be accessed by a computer. In addition, as is well known to those of ordinary skill in the art, communication media usually include computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as carrier waves or other transmission mechanisms, and may include any information delivery media. .

The above is a detailed description of the preferred implementation of the present disclosure, but the present disclosure is not limited to the above-mentioned embodiments. Those skilled in the art can make various equivalent modifications or substitutions under the sharing conditions that do not violate the spirit of the present disclosure. These equivalent modifications or replacements are all included in the scope defined by the claims of the present disclosure.

Claims

A power-on and power-off control method for PCIe devices includes:

Receiving an operation instruction from the CPU, the operation instruction including a power-on instruction or a power-off instruction carrying target device information;

According to the operation instruction, simulate the in-position state of the target device;

According to the simulated target device in-position state, enable control of the clock and reset signal of the target device;

Reporting the in-position status of the simulated target device to the CPU to trigger the hot-plug driver of the operating system to perform the operation of adding or removing the target device;

According to the operation instruction, a corresponding power control instruction is output to the power control module, so that the power control module controls the power signal supplied to the target device to be turned on or off.
The method according to claim 1, wherein the simulating the in-position state of the target device includes at least one of the following:

When the operation instruction is a power-on instruction, simulate the real state of the target device;

When the operation instruction is a power-off instruction, it is simulated that the target device is not in place.
The method according to claim 1, wherein after enabling control of the clock and reset signal of the target device, the method further comprises:

Sending an interrupt signal for instructing an update of the in-position status to the CPU.
The method according to claim 1, wherein the outputting a corresponding power control command to a power control module according to the operation command comprises at least one of the following:

When the operation instruction is a power-on instruction, output a power-on instruction of the target device to the power control module;

When the operation instruction is a power-off instruction, it is determined whether the hot-plug driver has completed the operation of removing the target device, and if so, a power-off instruction of the target device is output to the power control module.
The method according to claim 4, wherein the judging whether the hot-swappable driver completes the operation of removing the target device comprises:

Obtain the status value of the corresponding PCIe slot power status register, and determine whether the hot plug process is over according to the status value.
A power-on and power-off control method for PCIe devices includes:

Receiving an operation instruction from the system application layer, and forwarding the operation instruction to the logic module, the operation instruction including a power-on instruction or a power-off instruction carrying target device information;

According to the in-position status of the simulated target device from the logic module, the hot-plug driver of the operating system is triggered to perform the operation of adding or removing the target device.
The method according to claim 6, characterized in that, according to the simulated target device in-position state from the logic module, triggering the hot plug driver of the operating system to perform the operation of adding or removing the target device comprises:

Receive an interrupt signal from the logic module for indicating an update of the in-place status, and trigger the hot-plug driver of the operating system to add or remove the target device according to the simulated in-place status of the target device from the logic module Operation.
A power-on and power-off control system for PCIe devices, which is characterized in that it includes:

The CPU is used to receive operating instructions from the system application layer and forward the operating instructions to the logic module. The operating instructions include power-on instructions or power-off instructions that carry target device information; and based on simulations from the logic module The target device is in the in-position state, triggering the hot-plug driver of the operating system to perform the operation of adding or removing the target device;

The logic module is used to receive an operation instruction from the CPU, the operation instruction includes a power-on instruction or a power-off instruction carrying target device information; according to the operation instruction, the in-position state of the target device is simulated; The simulated target device's in-position state enables control of the clock and reset signal of the target device; the simulated target device's in-position state is reported to the CPU to trigger the hot-swappable driver of the operating system to add or remove all The operation of the target device; further according to the operation instruction, output a corresponding power control instruction to the power control module, so that the power control module controls the power signal supplied to the target device to be turned on or off;

The power control module is used to receive and control the power signal supplied to the target device to be turned on or off according to the power control instruction from the logic module.
The system according to claim 8, further comprising a PCIe switch module, the CPU is connected to the logic module through the PCIe switch module; the CPU is also connected to N PCIe devices through the PCIe switch module Connection, where N is an integer greater than or equal to 1.
8. The system according to claim 8, further comprising an I/O expansion module, and the logic module is connected to the power control module through the I/O expansion module.
A device, characterized in that it comprises:

Memory, used to store programs;

The processor is configured to execute the program stored in the memory, and when the processor executes the program stored in the memory, the processor is configured to execute:

The method according to any one of claims 1 to 5; or

The method according to any one of claims 6 to 7.
A computer-readable storage medium that stores computer-executable instructions, and the computer-executable instructions are used to execute:

The method according to any one of claims 1 to 5; or

The method according to any one of claims 6 to 7.