CN112527719B - PCIe link-based JBOF (just-in-File) connection method, device and system - Google Patents

PCIe link-based JBOF (just-in-File) connection method, device and system Download PDF

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CN112527719B
CN112527719B CN202011403108.7A CN202011403108A CN112527719B CN 112527719 B CN112527719 B CN 112527719B CN 202011403108 A CN202011403108 A CN 202011403108A CN 112527719 B CN112527719 B CN 112527719B
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jbof
pcie
equipment
connection state
pcie cable
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CN112527719A (en
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孙明刚
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Beijing Inspur Data Technology Co Ltd
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Beijing Inspur Data Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4081—Live connection to bus, e.g. hot-plugging
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)

Abstract

The invention discloses a JBOF (Java-free function) connection method, a device and a system based on a PCIe link and a storage controller, wherein the method comprises the following steps: the storage controller determines the connection state of the PCIe cable transfer card and the JBOF equipment according to PCIe configuration information of the JBOF equipment obtained through the PCIe cable transfer card; when the connection state is changed, performing hot plug processing on the JBOF equipment, and adding or removing the JBOF equipment; the x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables; the invention adopts the common SAS cable to replace the standard PCIe cable, avoids the problem of difficult material preparation of the PCIe cable, and avoids the problem that the hot plug processing cannot be realized because the SAS cable has no PRSNT signal by carrying out hot plug processing on the JBOF equipment when the connection state is changed, thereby ensuring the reliability of the PCIe link.

Description

PCIe link-based JBOF (just-in-File) connection method, device and system
Technical Field
The present invention relates to the field of storage, and in particular, to a JBOF connection method, device, system and storage controller based on PCIe links.
Background
In the field of storage, it is well known that Solid State Disks (SSDs) have faster read and write speeds than mechanical hard disks (HDDs). Most machines currently use SATA (Serial ATA) bus standard, with a practical maximum transmission of about 600MB/s. While SSDs supporting the PCIe (peripheral component interconnect express, a high speed serial computer expansion bus standard) bus, NVMe (Non-Volatile Memory express, a hard disk transport standard) protocol would have an actual transport speed of over 1000MB/s.
In order to expand the storage capacity, more nvme hard disks need to be expanded and connected by using a JBOF (Just a bunch of nvme Flash, nvme hard disk expansion cabinet) device, the front end of the JBOF device is connected to a storage controller (namely a machine head) through a cable, and the rear end of the JBOF device is connected with an nvme SSD hard disk.
In the prior art, the front end of the JBOF device is often connected to the storage controller based on Nof of the ethernet, and the manner needs to use a protocol conversion card, so that the cost is high, the protocol is complex, and the operation of the disk is not directly connected; while there is a direct connection manner of the JOBF device based on PCIe links as shown in fig. 1, that is, the front end of the JOBF device is connected to the storage controller through PCIe cables across the chassis, pci_express_external_cable defines PCIe cable standards, but no vendor produces such PCIe cable in the market, and stock preparation is difficult.
Therefore, how to provide a cross-frame connection method for the JBOF equipment and the storage controller, which is more convenient to implement, reduces the cost, avoids the problem of difficult material preparation of PCIe cables, and is a problem which needs to be solved urgently nowadays.
Disclosure of Invention
The invention aims to provide a JBOF (just-in-line) connection method, device and system based on a PCIe link and a storage controller, so as to realize the cross-frame direct connection of JBOF equipment and the storage controller, reduce the cost and avoid the problem of difficult material preparation of PCIe cables.
In order to solve the technical problems, the invention provides a JBOF (just-in-one) connection method based on a PCIe link, which comprises the following steps:
the storage controller determines the connection state of the PCIe cable transfer card and the JBOF equipment according to PCIe configuration information of the JBOF equipment obtained through the PCIe cable transfer card;
when the connection state is changed, performing hot plug processing on the JBOF equipment, and adding or removing the JBOF equipment; the storage controller is connected with the JBOF equipment through the PCIe cable transfer card, and the x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables.
Optionally, the determining, by the storage controller, a connection state between the PCIe cable transit card and the JBOF device according to PCIe configuration information of the JBOF device obtained through the PCIe cable transit card includes:
the storage controller reads the numerical value of a first preset register in the PCIe cable switching card; the first preset register is used for storing PCIe configuration information of the JBOF equipment;
and determining the connection state according to the numerical value.
Optionally, the determining the connection state according to the numerical value includes:
if the value is 0xff, determining that the connection state is a disconnection condition;
and if the numerical value is not 0xff, determining that the connection state is the connection condition.
Optionally, the method further comprises:
configuring a second preset register of the PCIe cable transfer card, and closing a channel position overturning function of the PCIe cable transfer card; the second preset register is used for starting or closing the channel position overturning function.
Optionally, the method further comprises:
configuring a third preset register of the PCIe cable transfer card as x16 bandwidth, and setting a link control register as a retraining bit when the PCIe cable transfer card is connected with a link bandwidth of non-x 16; the third preset register is used for storing the target connection width.
Optionally, when the connection state changes, performing hot plug processing on the JBOF device, adding or removing the JBOF device, including:
determining an in-place identifier corresponding to the JBOF equipment according to the connection state;
when the connection state of the JBOF equipment is changed from the disconnection condition to the connection condition, detecting a current in-place identifier corresponding to the JBOF equipment after delaying for a preset anti-shake time;
and if the current presence identification is the presence condition, performing hot plug processing on the JBOF equipment, and adding the JBOF equipment.
Optionally, the preset anti-shake time is specifically 17s.
The invention also provides a JBOF connecting device based on the PCIe link, which is applied to the storage controller and comprises the following components:
the detection unit is used for determining the connection state of the PCIe cable transfer card and the JBOF equipment according to PCIe configuration information of the JBOF equipment obtained through the PCIe cable transfer card;
the hot plug unit is used for carrying out hot plug processing on the JBOF equipment when the connection state is changed, and adding or removing the JBOF equipment; the storage controller is connected with the JBOF equipment through the PCIe cable transfer card, and the x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables.
The present invention also provides a memory controller comprising:
a memory for storing a computer program;
and the processor is used for realizing the steps of the JBOF connection method based on the PCIe link when executing the computer program.
The invention also provides a JBOF (just-in-File) connection system based on the PCIe link, which comprises the following steps: PCIe cable adapter card, JBOF equipment and the storage controller;
the storage controller is connected with the JBOF equipment through the PCIe cable transfer card, and the x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables.
The invention provides a JBOF (just-in-File) connection method based on a PCIe link, which comprises the following steps: the storage controller determines the connection state of the PCIe cable transfer card and the JBOF equipment according to PCIe configuration information of the JBOF equipment obtained through the PCIe cable transfer card; when the connection state is changed, performing hot plug processing on the JBOF equipment, and adding or removing the JBOF equipment; the storage controller is connected with the JBOF equipment through a PCIe cable transfer card, and an x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables;
therefore, the invention avoids the problem of difficult material preparation of the PCIe cable by adopting the common SAS cable to replace the standard PCIe cable, and adds or removes the JBOF equipment by carrying out hot plug processing on the JBOF equipment when the connection state of the PCIe cable transfer card is changed, thereby avoiding the problem that the PRSNT signal of the standard PCIe cable is not available because the SAS cable is not available, and ensuring the reliability of the PCIe link. In addition, the invention also provides a JBOF (just in place) connection device, a JBOF connection system and a storage controller based on the PCIe link, which have the same beneficial effects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic topology diagram of a PCIe link-based direct connection of a JOBF device in the prior art
Fig. 2 is a flowchart of a JBOF connection method based on a PCIe link according to an embodiment of the present invention;
fig. 3 is a block diagram of a JBOF connection device based on a PCIe link according to an embodiment of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 2, fig. 2 is a flowchart of a JBOF connection method based on a PCIe link according to an embodiment of the present invention. The method may include:
step 101: and the storage controller determines the connection state of the PCIe cable transfer card and the JBOF equipment according to PCIe configuration information of the JBOF equipment obtained through the PCIe cable transfer card.
In this embodiment, the storage controller may be connected to the JBOF device through a PCIe cable adapter card, and an x16 downstream interface of the PCIe cable adapter card may be connected to the JBOF device through 4 x4SAS cables, that is, an upstream interface and an x16 downstream interface of the PCIe cable adapter card are respectively connected to the storage controller and the JBOF device in a one-to-one manner, so that a cross-frame direct connection between the storage controller and the JBOF device based on a PCIe link is realized.
Correspondingly, the PCIe cable transit card in this embodiment may be configured with an x16 downstream interface for connecting to the JBOF device, and an upstream interface (e.g., an x16 upstream interface) for connecting to the storage controller. The specific connection mode of the PCIe cable transit card and the storage controller in this embodiment may be set by a designer, for example, may be set in the same or similar manner as the uplink interface connection scheme of the storage controller and the PCIe cable transit card in the prior art, which is not limited in this embodiment.
Specifically, for the specific type of PCIe cable transit card in this embodiment, the PCIe cable transit card may be set by a designer according to a practical scenario and a user requirement, for example, a plx8733 chip as shown in fig. 1 may be adopted, or other types of PCIe cable transit cards may be adopted, which is not limited in this embodiment.
It can be appreciated that, because there is no PCIe cable with a line width of x16 in the market, the x16 downstream interface of the PCIe cable transit card in this embodiment may be set to 4 x4 physical ports, so as to connect JBOF devices through 4 x4SAS cables (e.g., mini SAS HD cables).
Correspondingly, because the SAS cable is different from the standard PCIe cable, the SAS cable has no PRSNT (in-place) signal, so that the storage controller cannot perform hot plug processing according to the cable in-place, so in the embodiment, the storage controller detects a connection state (link state) between the PCIe cable adapter card and the JBOF device through the acquired PCIe configuration information of the JBOF device, and when the connection state changes, triggers a hot plug processing flow to perform corresponding device remove and add operations.
Specifically, for the storage controller in this embodiment, the specific manner of determining the connection state between the PCIe cable transit card and the JBOF device according to PCIe configuration information of the JBOF device obtained through the PCIe cable transit card may be set by a designer according to a practical scenario and a user requirement, for example, when the storage controller directly reads PCIe configuration information of the JBOF device through the PCIe cable transit card, the connection state between the PCIe cable transit card and the JBOF device may be determined to be an in-place situation; when PCIe configuration information of the JBOF equipment cannot be directly read through the PCIe cable transit card, determining that the connection state of the PCIe cable transit card and the JBOF equipment is a disconnection state. The storage controller can also read the value of a first preset register in the PCIe cable switching card and determine the connection state of the PCIe cable switching card and the JBOF equipment according to the value of the first preset register; the first preset register is used for storing PCIe configuration information of the JBOF equipment; for example, when the PCIe cable transit card is a plx8733 chip, the storage controller may read a value of a pci_bridge_control register (i.e., a first preset register) in the PCIe cable transit card, the JBOF device disconnects a connection with an x16 downstream interface of the PCIe cable transit card or the JBOF device is turned off, the storage controller may not read PCIe configuration information of the JBOF device in the pci_bridge_control register, and the obtained result is 0xff, and may determine that the connection state is a disconnection condition.
That is, the storage controller may determine that the connection state of the PCIe cable transit card is a disconnection condition when the value of the first preset register in the PCIe cable transit card is read to be 0xff; when the numerical value of the first preset register in the PCIe cable transfer card is read to be not 0xff, determining that the connection state of the PCIe cable transfer card is the connection condition; therefore, the connection state of the PCIe cable transit card is determined according to the value of the first preset register.
Step 102: when the connection state is changed, performing hot plug processing on the JBOF equipment, and adding or removing the JBOF equipment; the storage controller is connected with the JBOF equipment through a PCIe cable transfer card, and an x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables.
It can be understood that the purpose of this step may be that when the storage controller detects that the connection state between the PCIe cable transit card and the JBOF device changes, the JBOF device is added or removed by performing hot plug processing on the JBOF device; if the storage controller detects that the connection state of the PCIe cable transfer card is changed from the disconnection state to the connection state, the hot-unplugging processing can be carried out on the JBOF equipment, and the JBOF equipment is removed; when the storage controller detects that the connection state of the PCIe cable transfer card and the JBOF equipment is changed from the connection state to the disconnection state, the hot plug processing can be carried out on the JBOF equipment, and the JBOF equipment is added.
Specifically, in this embodiment, the kernel PCIe driving hot plug processing module (pciehp) of the storage controller may be modified, and instead, when the link state changes to trigger the hot plug processing flow, the corresponding device remove and add operations are performed. When the PCIe cable adapter card is a plx8733 chip, taking linux 3.10-957 as an example, the PCIe hot plug processing flow is as follows:
pciehp_isr()->
pciehp_queue_interrupt_event()->
interrupt_event_handle()->
handle_link_event()->
pciehp_queue_power_work()->
pciehp_power_thread()->
pciehp_disable_slot()->
remove_board()->
pciehp_unconfigure_device()
in this embodiment, the pciehp_unconfiguration_device () function may be modified, and in the native kernel design of the storage controller, pciehp_get_adapter_status () is first called to determine the presence state (presence), and because the nonstandard PCIe cable used in this embodiment has no presence signal (PRSNT), the reading result is always in place, and then the function reads the pci_bridge_control register (i.e. the first preset register), at this time, if the SAS cable has been unplugged or the JBOF device is turned off, PCIe configuration information of the JBOF device is not read, and the return result is 0xff, and according to the PCIe chip manual, its normal value is not 0xff; the embodiment may be modified to determine that the JBOF device is disconnected when the data is read to be 0xff, and set the presence to false (not in place), that is, the connection state is the disconnection condition, and take the hot-plug flow.
It should be noted that, the embodiment may further include the storage controller reading, according to the obtained data reading instruction, data corresponding to the data reading instruction from an nvme hard disk in the connected JBOF device, that is, the storage controller may read the required data from the nvme hard disk of the JBOF device connected through the PCIe cable transit card.
Furthermore, based on practical experience, experimental data and a PCIe cable transfer card error manual, if the PCIe cable transfer card of the plx8733 chip is plugged into a cable where an intermediate lane (channel) is located in a lane reverse (channel position flip) mode, the PCIe link (PCIe connection) cannot be normally performed, and in order to plug the reliability of the cable, the method provided by the embodiment may further include configuring a second preset register of the PCIe cable transfer card by the storage controller, and closing a channel position flip function of the PCIe cable transfer card; the second preset register is used to activate or deactivate the channel position flip function, such as register 0x21c in the plx8733 chip (Physical layer command and status ).
Furthermore, in this embodiment, because 4 x4SAS cables are used, when the cables are actually plugged in and plugged out, the link speed of PCIe is far higher than the speed of the plugging action of the human hand, and at this time, a link bandwidth other than x16 may occur; the method provided by the embodiment can further include: the storage controller configures a third preset register of the PCIe cable switching card to be x16 bandwidth, and sets a link control register (namely a link control register) as a retrain bit when the PCIe cable switching card is connected with a link bandwidth of non-x 16; the third preset register is used for storing a target connection width, such as register 0x248 of plx8733 chip (target link width, target connection width). For example, when the PCIe cable transit card is a plx8733 chip, the memory controller may configure the 0x248 register of the plx8733 chip to be x16 bandwidth, set the retraine in the link control register, and enable PCIe link to be retrained to restore bandwidth to x16.
Specifically, as physical jitter occurs during the cable plugging process and during the hard disk plugging process, the jitter can cause the pcie link layer to be connected (link up) and disconnected (link down) for multiple times, interrupt impact can be generated on the kernel, frequent equipment deletion and addition can also occur on the service layer, and the situation becomes more serious when the hard disk is fully loaded. Therefore, the storage controller in this step can determine the in-place identifier corresponding to the JBOF device according to the connection state of the JBOF device and the PCIe cable transit card; when the connection state of the JBOF equipment and the PCIe cable switching card is changed from the disconnection state to the connection state, detecting the current in-place identifier corresponding to the JBOF equipment after delaying for the preset anti-shake time; and if the current in-place identification is in-place, performing hot plug processing on the JBOF equipment, and adding the JBOF equipment. Correspondingly, when the connection state of the JBOF equipment and the PCIe cable transfer card is changed from the connection state to the disconnection state, detecting the current in-place identifier corresponding to the JBOF equipment after delaying for the preset anti-shake time; and if the current presence identification is the non-presence condition, performing hot extraction processing on the JBOF equipment, and removing the JBOF equipment.
For example, the embodiment may be implemented in a pc ie driver of a storage controller, in which a linux kernel timer (timer) is added in the initialization of the driver, the timer is initialized, a device in-place list is defined, and whether the device is in place or not is detected after a preset anti-shake time by using an in-place identifier. The probe () function driven by the pcie can modify the timer to increase the timer delay (i.e. preset anti-shake time), preferably the preset anti-shake time can be 17s, and set the corresponding device in-place identifier, and update the device in-place list. And (3) removing the corresponding device presence identification from the remove () function driven by the pcie, and updating the device presence list. Under the design, each time when a device is detected, 17s is delayed, the device in-place identification is firstly judged in the timer overtime processing after 17s, if the device is in place, the upper layer application is notified, and the upper layer application initiates the device to add or delete the service.
In the embodiment of the invention, the common SAS cable is adopted to replace the standard PCIe cable, so that the problem of difficult material preparation of the PCIe cable is avoided, and the JBOF equipment is added or removed by performing hot plug processing on the JBOF equipment when the connection state of the PCIe cable adapter card is changed, so that the problem that the hot plug processing cannot be realized because the SAS cable does not have the PRSNT signal of the standard PCIe cable is avoided, and the reliability of a PCIe link is ensured.
Referring to fig. 3, fig. 3 is a block diagram of a JBOF connection device based on a PCIe link according to an embodiment of the present invention. The apparatus is applied to a memory controller, and may include:
the detecting unit 10 is configured to determine a connection state between the PCIe cable transit card and the JBOF device according to PCIe configuration information of the JBOF device acquired through the PCIe cable transit card;
the hot plug unit 20 is configured to perform hot plug processing on the JBOF device when the connection state changes, and add or remove the JBOF device; the storage controller is connected with the JBOF equipment through a PCIe cable transfer card, and an x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables.
Alternatively, the detecting unit 10 may include:
the register reading subunit is used for reading the numerical value of a first preset register in the PCIe cable switching card by the storage controller; the first preset register is used for storing PCIe configuration information of the JBOF equipment;
and the determining subunit is used for determining the connection state according to the numerical value.
Alternatively, the determining subunit may be specifically configured to determine that the connection state is a disconnection condition if the value is 0xff; if the value is not 0xff, the connection state is determined to be the connection condition.
Optionally, the apparatus may further include:
the overturning closing unit is used for configuring a second preset register of the PCIe cable transfer card and closing a channel position overturning function of the PCIe cable transfer card; the second preset register is used for starting or closing a channel position overturning function.
Optionally, the apparatus may further include:
the bandwidth recovery unit is used for configuring a third preset register of the PCIe cable switching card to be x16 bandwidth and setting a link control register as a retraining bit when the PCIe cable switching card is connected with a link bandwidth of non-x 16; the third preset register is used for storing the target connection width.
Optionally, the hot plug unit 20 may include:
the on-site determining subunit is used for determining an on-site identifier corresponding to the JBOF equipment according to the connection state;
the delay subunit is used for detecting the current in-place identifier corresponding to the JBOF equipment after delaying preset anti-shake time when detecting that the connection state of the JBOF equipment is changed from the disconnection state to the connection state; and if the current in-place identification is in-place, performing hot plug processing on the JBOF equipment, and adding the JBOF equipment.
Optionally, the preset anti-shake time is specifically 17s.
In this embodiment, the common SAS cable is adopted to replace the standard PCIe cable, so that the problem of difficulty in material preparation of the PCIe cable is avoided, hot plug processing is performed on JBOF equipment when the connection state of the PCIe cable adapter card is changed through the hot plug unit 20, and JBOF equipment is added or removed, so that the problem that hot plug processing cannot be realized because the SAS cable does not have a PRSNT signal of the standard PCIe cable is avoided, and the reliability of a PCIe link is ensured.
The embodiment of the invention also provides a storage controller, which can comprise: a memory for storing a computer program; and a processor, configured to implement the steps of the JBOF connection method based on a PCIe link provided in the foregoing embodiment when executing a computer program.
The embodiment of the invention also provides a JBOF (just in time) connection system based on the PCIe link, which comprises the following steps: PCIe cable transit card, JBOF equipment and memory controller provided by the above embodiments;
the storage controller is connected with the JBOF equipment through a PCIe cable transfer card, and an x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables.
In addition, the embodiment of the invention further provides a computer readable storage medium, on which a computer program is stored, and the computer program can implement the steps of the JBOF connection method based on PCIe links as provided in the above embodiment when being executed. The storage medium may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. The apparatus, system, storage controller and computer readable storage medium of the embodiments are relatively simple to describe, and the relevant points refer to the description of the method section, since they correspond to the methods of the embodiments.
The method, the device and the system for connecting the JBOF based on the PCIe link and the memory controller are described in detail. The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present invention and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.

Claims (5)

1. The JBOF connection method based on the PCIe link is characterized by comprising the following steps:
the storage controller determines the connection state of the PCIe cable transfer card and the JBOF equipment according to PCIe configuration information of the JBOF equipment obtained through the PCIe cable transfer card;
when the connection state is changed, performing hot plug processing on the JBOF equipment, and adding or removing the JBOF equipment; the storage controller is connected with the JBOF equipment through the PCIe cable transfer card, and an x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables;
the storage controller determines a connection state of the PCIe cable transit card and the JBOF device according to PCIe configuration information of the JBOF device acquired through the PCIe cable transit card, including:
the storage controller reads the numerical value of a first preset register in the PCIe cable switching card; the first preset register is used for storing PCIe configuration information of the JBOF equipment;
determining the connection state according to the numerical value;
wherein said determining said connection state according to said value comprises:
if the value is 0xff, determining that the connection state is a disconnection condition;
if the numerical value is not 0xff, determining that the connection state is a connection condition;
the JBOF connection method further includes:
configuring a second preset register of the PCIe cable transfer card, and closing a channel position overturning function of the PCIe cable transfer card; the second preset register is used for starting or closing the channel position overturning function;
the JBOF connection method further includes:
configuring a third preset register of the PCIe cable transfer card as x16 bandwidth, and setting a link control register as a retraining bit when the PCIe cable transfer card is connected with a link bandwidth of non-x 16; the third preset register is used for storing the target connection width;
when the connection state is changed, performing hot plug processing on the JBOF device, and adding or removing the JBOF device, including:
determining an in-place identifier corresponding to the JBOF equipment according to the connection state;
when the connection state of the JBOF equipment is changed from the disconnection condition to the connection condition, detecting a current in-place identifier corresponding to the JBOF equipment after delaying for a preset anti-shake time;
and if the current presence identification is the presence condition, performing hot plug processing on the JBOF equipment, and adding the JBOF equipment.
2. The PCIe link-based JBOF connection method of claim 1 wherein the preset anti-shake time is specifically 17s.
3. A JBOF connection device based on a PCIe link, applied to a storage controller, comprising:
the detection unit is used for determining the connection state of the PCIe cable transfer card and the JBOF equipment according to PCIe configuration information of the JBOF equipment obtained through the PCIe cable transfer card;
the hot plug unit is used for carrying out hot plug processing on the JBOF equipment when the connection state is changed, and adding or removing the JBOF equipment; the storage controller is connected with the JBOF equipment through the PCIe cable transfer card, and an x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables;
wherein the detection unit includes:
a register reading subunit, configured to read a value of a first preset register in the PCIe cable transit card; the first preset register is used for storing PCIe configuration information of the JBOF equipment;
a determining subunit, configured to determine the connection state according to the value;
the determining subunit is specifically configured to determine that the connection state is a disconnection condition if the numerical value is 0xff; if the numerical value is not 0xff, determining that the connection state is a connection condition;
wherein, the JBOF connecting device further includes:
the overturning closing unit is used for configuring a second preset register of the PCIe cable transit card and closing a channel position overturning function of the PCIe cable transit card; the second preset register is used for starting or closing the channel position overturning function;
wherein, the JBOF connecting device further includes:
the bandwidth recovery unit is used for configuring a third preset register of the PCIe cable transfer card to be x16 bandwidth and setting a link control register to be a retraining bit when the PCIe cable transfer card is connected with a link bandwidth which is not x 16; the third preset register is used for storing the target connection width;
wherein, the hot plug unit may include:
the on-site determining subunit is used for determining an on-site identifier corresponding to the JBOF equipment according to the connection state;
the delay subunit is used for detecting the current in-place identifier corresponding to the JBOF equipment after delaying the preset anti-shake time when detecting that the connection state of the JBOF equipment is changed from the disconnection state to the connection state; and if the current presence identification is the presence condition, performing hot plug processing on the JBOF equipment, and adding the JBOF equipment.
4. A memory controller, comprising:
a memory for storing a computer program;
processor for implementing the steps of the PCIe link-based JBOF connection method according to claim 1 or 2 when executing said computer program.
5. A JBOF connection system based on PCIe links, comprising: PCIe cable transit card, JBOF device, and storage controller as recited in claim 4;
the storage controller is connected with the JBOF equipment through the PCIe cable transfer card, and the x16 downlink interface of the PCIe cable transfer card is connected with the JBOF equipment through 4 x4SAS cables.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109783013A (en) * 2017-11-15 2019-05-21 三星电子株式会社 Configure and access the method and system of expansible object storage
CN111722990A (en) * 2020-06-21 2020-09-29 苏州浪潮智能科技有限公司 Method and device for checking cable connection between main back boards

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105701051B (en) * 2016-01-15 2019-10-15 华为技术有限公司 A kind of hot-plug method, host controller, host and PCIe bridge device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109783013A (en) * 2017-11-15 2019-05-21 三星电子株式会社 Configure and access the method and system of expansible object storage
CN111722990A (en) * 2020-06-21 2020-09-29 苏州浪潮智能科技有限公司 Method and device for checking cable connection between main back boards

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于LwIP的热插拔网络嵌入式设计方法;马亚辉;吴凡;李林;何斌;;单片机与嵌入式系统应用(第04期);全文 *

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