WO2021097727A1 - 一种电容检测电路、触控装置、终端设备和电容检测方法 - Google Patents

一种电容检测电路、触控装置、终端设备和电容检测方法 Download PDF

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WO2021097727A1
WO2021097727A1 PCT/CN2019/119791 CN2019119791W WO2021097727A1 WO 2021097727 A1 WO2021097727 A1 WO 2021097727A1 CN 2019119791 W CN2019119791 W CN 2019119791W WO 2021097727 A1 WO2021097727 A1 WO 2021097727A1
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circuit
switch
sub
capacitor
charge
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PCT/CN2019/119791
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English (en)
French (fr)
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范硕
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深圳市汇顶科技股份有限公司
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Priority to CN201980004036.8A priority Critical patent/CN113287027B/zh
Priority to PCT/CN2019/119791 priority patent/WO2021097727A1/zh
Publication of WO2021097727A1 publication Critical patent/WO2021097727A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

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  • This application relates to the field of capacitance detection, and more specifically, to a capacitance detection circuit, a touch device, and terminal equipment.
  • Capacitive sensors are widely used in various electronic devices.
  • the capacitive sensor can be used as an input device to provide input information, such as position, movement, force, and duration.
  • input information such as position, movement, force, and duration.
  • improving the detection accuracy of capacitive sensors will become an important issue.
  • the embodiments of the present application provide a capacitance detection circuit, a touch device, and terminal equipment.
  • the capacitance detection circuit, touch device and terminal equipment can accurately detect the capacitance change of the self-capacitance of the capacitor to be tested.
  • a capacitance detection circuit for detecting a capacitor to be tested.
  • the capacitance detection circuit includes a charge transfer module and a processing module.
  • the charge transfer module is used to transfer the amount of charge change caused by the capacitance change of the capacitor under test caused by the external touch to the inside of the capacitance detection circuit and store it.
  • the charge transfer module includes a charge and discharge electronic circuit, a cancellation sub-circuit and a transfer storage sub-circuit.
  • the charge and discharge electronic circuit is used to charge or discharge the capacitor under test and the offset sub-circuit.
  • the cancellation sub-circuit is used to cancel the basic charge accumulated after the capacitor under test is charged in the untouched state.
  • the transfer storage sub-circuit is used to transfer the charge change caused by the capacitance change of the capacitor under test to the capacitance detection circuit and store it in the transfer storage sub-circuit.
  • the capacitor under test is caused by the capacitance change caused by the external touch.
  • the amount of charge change is the offset of the charge difference between the sub-circuit and the capacitor under test.
  • the processing module is used to obtain the capacitance change information of the capacitor under test according to the charge stored at both ends of the transfer storage sub-circuit.
  • the capacitance value of the capacitor to be tested is often directly detected first, and then the capacitance change is obtained by making a difference with the basic capacitance value of the capacitor to be tested.
  • this application only detects the capacitance change of the capacitor to be tested, the change of the capacitance value is easier to be captured, and accurate detection can be realized, and the detection accuracy is higher.
  • the amount of charge accumulated after the cancellation sub-circuit is charged is equal to the basic amount of charge accumulated after the capacitor under test is charged in an untouched state.
  • the transfer storage sub-circuit is connected across the cancellation sub-circuit and the capacitor to be measured, and the impedance of the cancellation sub-circuit is far greater than the impedance of the transfer storage sub-circuit.
  • the interference of the external signal on the capacitance detection circuit can be further improved. Divide the voltage to attenuate the interference of external signals on the capacitance detection circuit.
  • the processing module may include a charge-to-voltage sub-circuit, an analog-to-digital conversion sub-circuit, and a digital processing sub-circuit.
  • the charge-to-voltage sub-circuit is used to convert the charge difference between the two ends of the transfer storage sub-circuit into an amplified voltage signal for further processing.
  • the analog-to-digital conversion sub-circuit is used to convert the analog signal output by the charge-to-voltage sub-circuit into a digital signal.
  • the digital processing sub-circuit is used to further analyze and process the digital signal output by the analog-to-digital conversion sub-circuit to obtain the capacitance change information of the capacitor under test.
  • the charge-to-voltage sub-circuit includes an operational amplifier and a feedback device, one end of the feedback device is connected to the inverting input end of the operational amplifier, and the other end of the feedback device is connected to the output end of the operational amplifier.
  • the charge-to-voltage sub-circuit negatively feeds back the charge difference between the two ends of the transfer storage sub-circuit to zero, and outputs a semi-circular arc signal waveform for further processing.
  • the charging and discharging electronic module may include two power sources, which are respectively used to charge the capacitor to be tested and the cancellation sub-circuit.
  • the two power sources may be current sources connected to voltage sources, and the current sources may be fixed current sources or variable current sources; the two power sources may also be voltage sources connected to resistors, and the resistors may be fixed resistors or variable resistors.
  • the present application also provides a touch device, which includes any one of the above-mentioned capacitance detection circuits.
  • the present application also provides a terminal device, and the touch control device includes any of the foregoing capacitance detection circuits.
  • This application also provides a self-capacitance detection method, which includes:
  • Step 1 In the initial state of the circuit, charge the cancellation sub-circuit and the capacitor under test so that the amount of charge accumulated at both ends of the cancellation sub-circuit is equal to the amount of charge accumulated by the capacitor under test in the untouched state The basic charge amount;
  • Step 2 Transfer and store the charge difference between the offset sub-circuit and the charge difference between the two ends of the capacitor under test to the two ends of the transfer storage sub-circuit, and the charge change caused by the change in the capacitance of the capacitor under test is transferred and stored.
  • the amount of charge change caused by the capacitance change of the capacitor under test caused by the external touch is the charge difference between the offset sub-circuit and the capacitor under test; while the charge difference is transferred, the charge difference between the two ends of the capacitor under test is transferred.
  • the charge of the capacitor and the cancellation sub-circuit is discharged to zero;
  • Step 3 Obtain the capacitance change information of the capacitor under test according to the amount of charge stored at both ends of the transfer storage sub-circuit.
  • the second step includes discharging the amount of charge at both ends of the cancellation sub-circuit and the capacitor under test to zero;
  • the processing of the signal by the processing module can be decomposed into: first the charge-to-voltage sub-circuit converts the charge at both ends of the transfer storage sub-circuit into a voltage signal, and then the analog-to-digital conversion sub-circuit The analog signal is converted into a digital signal, and then the digital processing sub-circuit obtains the capacitance change information of the capacitor under test according to the digital signal.
  • the execution sequence of a cycle is to execute step one first, and then execute step two and step three simultaneously; the execution can be repeated, and the number of executions is set by oneself. It should be noted here that, except for the step one of the first cycle that needs to be executed in the initial state of the circuit, the step one of the other cycles does not need to be executed in the initial state of the circuit.
  • flicker noise is included in the circuit.
  • Flicker noise is the main noise source in the low frequency band.
  • the noise intensity ratio is 1/f
  • the center frequency of flicker noise is the zero frequency point.
  • the flicker noise has the greatest interference on the output signal, that is, the noise interference on the capacitance detection circuit is the largest.
  • the flicker noise and the output signal can be modulated to different frequencies by switching modulation, which will effectively reduce the effect of flicker noise on the detection accuracy of the capacitance detection circuit.
  • Fig. 1 is a schematic diagram of the basic structure of a capacitance detection circuit according to the present application
  • FIG. 2 is a schematic structural diagram of a capacitance detection circuit according to an embodiment of the present application.
  • Fig. 3 is an equivalent circuit diagram of an external interference signal during charging according to an embodiment of the present application.
  • Fig. 4 is a timing diagram and waveform diagram of a capacitance detection method according to an embodiment of the present application.
  • the capacitance detection circuit 100 provided by the present application includes a charge transfer module 120 and a processing module 130.
  • the charge transfer module is used to transfer and store the change in charge caused by the change in capacitance of the capacitor 110 to be measured to the capacitance detection
  • the processing module is used to process the change in charge caused by the change in capacitance of the capacitor under test transferred and stored inside the capacitance detection circuit to obtain information on the change in capacitance of the capacitor under test.
  • the charge transfer module 120 includes a cancellation sub-circuit 121, a transfer storage sub-circuit 122 and a charging and discharging electronic circuit 123.
  • the charge and discharge electronic circuit is used to charge or discharge the cancellation sub-circuit and the capacitor under test.
  • the cancellation sub-circuit is used to cancel the basic charge accumulated after the capacitor under test is charged in the untouched state.
  • the transfer storage sub-circuit is used to transfer the charge change caused by the capacitance change of the capacitor under test to the capacitance detection circuit and store it in the transfer storage sub-circuit.
  • the capacitor under test is caused by the capacitance change caused by the external touch.
  • the amount of charge change is the offset of the charge difference between the sub-circuit and the capacitor under test.
  • the amount of charge accumulated after the capacitor under test is charged in an untouched state is called the basic charge.
  • the amount of charge accumulated after the offset sub-circuit is charged is equal to the basic amount of charge accumulated after the capacitor under test is charged.
  • due to noise interference and other factors sometimes there is a slight deviation between the amount of charge accumulated after the sub-circuit is charged and the basic amount of charge accumulated after the capacitor under test is charged. It can be seen that after charging, the difference between the amount of charge accumulated in the offset sub-circuit and the amount of charge accumulated in the capacitor under test is equal to the amount of change in the charge of the capacitor under test caused by the change in capacitance of the capacitor under test.
  • the amount of charge change of the capacitor under test refers to the difference between the amount of charge accumulated after the capacitor under test is charged in the untouched state and the basic amount of charge .
  • the processing module 130 is then used to process the amount of charge at both ends of the transfer storage sub-circuit, and the relevant information about the capacitance change of the capacitor to be tested can be detected.
  • the basic capacitance value of the capacitor under test is much larger than the capacitance change of the capacitor under test. Therefore, the existence of the basic capacitance value has a great influence on the accurate detection of the capacitance change of the capacitor under test.
  • the charge change caused by the capacitance change of the capacitor under test is transferred and stored inside the capacitance detection circuit, thereby removing the influence of the basic capacitance value, and only the charge caused by the capacitance change of the capacitor under test is detected Therefore, the accuracy of detecting the capacitance change of the capacitor under test is greatly improved.
  • the charging and discharging electronic module includes two power supplies, which are respectively used to charge the capacitor under test and the cancellation sub-circuit.
  • the two power sources may be current sources connected to voltage sources, and the current sources may be fixed current sources or variable current sources; the two power sources may also be voltage sources connected to resistors, and the resistors may be fixed resistors or variable resistors.
  • the effective charging time of the capacitor under test is equal.
  • the “capacitance value of the cancellation sub-circuit” mentioned here refers to the equivalent capacitance value of the cancellation sub-circuit as a whole. It can be seen that when the basic capacitance value of the capacitor under test in the untouched state is determined, the charge current value of the capacitor under test and the charge current value of the cancellation sub-circuit can also be adjusted, so the capacitance value of the cancellation sub-circuit can be adjusted. If it becomes very small, the corresponding area will also become smaller, so the chip area can be greatly reduced.
  • the processing module 130 may include a charge-to-voltage sub-circuit 131, an analog-to-digital conversion sub-circuit 132, and a digital processing sub-circuit 133.
  • the charge-to-voltage sub-circuit is used to convert the charge at both ends of the transfer storage sub-circuit into a voltage signal.
  • the analog-to-digital conversion sub-circuit is used to convert the analog signal output by the charge-to-voltage sub-circuit into a digital signal.
  • the digital processing sub-circuit is used to further analyze and process the digital signal output by the analog-to-digital conversion sub-circuit to obtain the capacitance change information of the capacitor under test.
  • the charge-to-voltage sub-circuit includes an operational amplifier and a feedback device, one end of the feedback device is connected to the inverting input terminal of the operational amplifier, and the other end of the feedback device is connected to the output terminal of the operational amplifier.
  • This circuit negatively feeds back the charge difference between the two ends of the transfer storage sub-circuit to zero, and outputs a semi-circular arc signal waveform for further processing.
  • the processing module further includes a low-pass filter for filtering the voltage signal output by the charge-to-voltage sub-circuit, and the analog signal output after being filtered by the low-pass filter is processed by the analog-to-digital conversion sub-circuit, To reduce the aliasing effect caused by spectrum folding during analog-to-digital conversion.
  • a low-pass filter for filtering the voltage signal output by the charge-to-voltage sub-circuit, and the analog signal output after being filtered by the low-pass filter is processed by the analog-to-digital conversion sub-circuit, To reduce the aliasing effect caused by spectrum folding during analog-to-digital conversion.
  • the transfer storage sub-circuit is connected across the cancellation sub-circuit and the capacitor to be measured, and the impedance of the cancellation sub-circuit is far greater than the impedance of the transfer storage sub-circuit.
  • the "cross-connection” here means that the cancellation sub-circuit and the capacitor to be measured are not directly connected, and the two are connected to the transfer storage sub-circuit respectively, and indirectly connected to form a loop.
  • the external interference signal will form a loop between the capacitor under test, the transfer storage sub-circuit, and the cancellation sub-circuit.
  • the sum of the voltage across the transfer storage sub-circuit and the cancellation sub-circuit is the external interference signal that enters the capacitance detection circuit. size.
  • This application also provides a self-capacitance detection method, which includes:
  • Step 1 Charge the cancellation sub-circuit and the capacitor under test so that the amount of charge accumulated at both ends of the cancellation sub-circuit is equal to the basic charge accumulated in the untouched state of the capacitor under test;
  • Step 2 Transfer and store the charge change caused by the capacitance change of the capacitor under test to both ends of the transfer storage sub-circuit.
  • the charge change caused by the capacitance change caused by the external touch of the capacitor under test is the offset sub-circuit and The charge difference between the two ends of the capacitor to be tested;
  • Step 3 Obtain the capacitance change information of the capacitor under test according to the charge stored at both ends of the transfer storage sub-circuit.
  • the "charge change caused by the capacitance change of the capacitor under test caused by the external touch” is relative to the basic charge accumulated when the capacitor under test is charged in the untouched state.
  • the difference between the basic charge accumulated after the test capacitor is charged in the touch state and the basic charge is to offset the charge difference between the sub-circuit and the capacitor under test.
  • the second step includes discharging the charges of the capacitor to be tested and the cancellation sub-circuit to zero.
  • the processing of the signal by the processing module can be decomposed into: first the charge-to-voltage sub-circuit converts the charge at both ends of the transfer storage sub-circuit into a voltage signal, and then the analog-to-digital conversion sub-circuit The analog signal is converted into a digital signal, and then the digital processing sub-circuit obtains the capacitance change information of the capacitor under test according to the digital signal.
  • the first embodiment of the present application is a capacitance detection circuit for detecting the capacitance change of the capacitor Cx to be tested.
  • the self-capacitance detection circuit includes a first capacitor C1, a second capacitor C2, two first current sources I1 and a second current source I2 connected to a voltage source VDD, a charge-to-voltage sub-circuit, an analog-to-digital converter ADC, and digital processing
  • the connection mode of the sub-circuit and 10 switches S1 ⁇ S10 is shown in Figure 2.
  • the first current source I1 and the second current source I2 are used to charge the first capacitor C1 and the capacitor Cx under test, respectively.
  • the product of the current value passing through the two ends of the capacitor under test and the capacitance value of the first capacitor is equal to the product of the current value passing through the first capacitor and the basic capacitance value of the capacitor under test. That is, during charging, the product of the current value of the second current source and the capacitance value of the first capacitor is equal to the product of the current value of the first current source and the basic capacitance value of the capacitor under test, and the effective charging time of the capacitor under test is equal to the first The effective charging time of a capacitor.
  • the amount of charge accumulated on both ends of the first capacitor is equal to the amount of charge accumulated in the untouched state of the capacitor under test, and the difference between the amount of charge accumulated in the capacitor under test and the amount of charge accumulated in the first capacitor Equal to the change in charge caused by the change in capacitance of the capacitor under test. It should be noted here that due to the influence of noise, etc., the amount of charge accumulated at both ends of the first capacitor after charging may be slightly different from the basic amount of charge accumulated after the capacitor under test is charged in an untouched state.
  • the first capacitor may be a variable capacitor, so as to adapt to different circuits and be more flexible.
  • the second capacitor may be a variable capacitor, and the capacitance value of the second capacitor will affect the waveform of the output signal of the charge-to-voltage sub-circuit. Therefore, the second capacitor can be adjusted The size of the capacitance value is used to adjust the waveform of the output signal of the charge-to-voltage sub-circuit.
  • the capacitor value of the first capacitor is much smaller than the capacitance value of the second capacitor, that is, the impedance of the first capacitor is much larger than the impedance of the second capacitor.
  • the capacitance detection circuit is often connected to a touch device, such as a touch screen of a mobile phone.
  • a touch device such as a touch screen of a mobile phone.
  • an external signal source will form a loop inside the capacitance detection circuit.
  • the loop is shown in Figure 3, and V int is an external interference signal.
  • the interference signal V int is divided on the capacitor Cx under test, the first capacitor C1 and the second capacitor C2, and the interference signal entering the capacitance detection circuit is divided into the interference signal V int on the first capacitor C1 and the second capacitor C2. Sum of pressure signals. It can be seen from the foregoing that the capacitance change information of the capacitor under test is obtained by detecting the amount of charge at both ends of the second capacitor C2, and therefore the voltage division signal of the interference signal Vint on the second capacitor C2 really affects the detection accuracy of the capacitance detection circuit.
  • the magnitude of the divided voltage signal V2 of the interference signal V int on the second capacitor C2 is as follows:
  • the divided voltage V2 of the interference signal V int on the second capacitor C2 can be approximately equal to
  • Figure 4 shows the state of the corresponding switches in different timings and the potential changes at both ends of the storage circuit and the output waveforms in the touch state:
  • Step one corresponds to the stage t0 to t1 in Figure 4.
  • the seventh switch S7 and the eighth switch S8 are closed, and the other switches are open.
  • Step two corresponds to stages t1 to t2 in Figure 4.
  • the fifth switch S5, the sixth switch S6, the ninth switch S9, and the tenth switch S10 are closed, the other switches are open, the first current source I1 charges the first capacitor C1, and the second current source I2 charges the second capacitor C2,
  • Step three corresponds to the t2-t3 stage in Figure 4.
  • the ninth switch S9 and the tenth switch S10 are turned off, the seventh switch S7 and the eighth switch S8 are closed, the fifth switch S5 and the sixth switch S6 are turned off, and the charge difference between the first capacitor C1 and the capacitor Cx under test is transferred To the second capacitor C2, at the same time the charge on both ends of the first capacitor C1 and the capacitor under test Cx is discharged to zero;
  • the first switch S1 and the third switch S3 are closed, the second switch S2 and the fourth switch S4 are open, and the charge at both ends of the second capacitor C2 passes through the charge-to-voltage sub-circuit, and the output signal waveform is a positive arc.
  • Step five repeat the step three, the difference is that the first switch S1 and the third switch S3 are open, the second switch S2 and the fourth switch S4 are closed, and the rest of the switch states are the same as the foregoing.
  • the charge at both ends of the second capacitor The quantity passes through the charge-to-voltage sub-circuit, and the output signal waveform is a negative arc shape.
  • the analog-to-digital converter ADC samples every preset time to convert the analog signal output by the charge-to-voltage sub-circuit into a digital signal.
  • the sampling interval is recorded as Ts and the signal period is Tc. It satisfies the relationship with the ADC sampling interval Ts:
  • Tc N*Ts, where N is a positive integer greater than 2
  • the digital processing sub-circuit processes the digital signal to obtain the capacitance change information of the capacitor under test.
  • flicker noise is the main noise source in the low frequency band, the noise intensity ratio is 1/f, and the center frequency point of flicker noise is the zero frequency point.
  • the flicker noise has the greatest interference on the output signal, that is, the noise interference on the capacitance detection circuit is the largest.
  • the "output signal” here includes the analog signal output after being processed by the charge-to-voltage sub-circuit, or the digital signal after being processed by the analog-to-digital conversion sub-circuit.
  • the current source is the main source of the flicker noise of the capacitance detection circuit.
  • the periodic closing and opening of the fifth switch S5 and the sixth switch S6 also controls the periodic closing and opening of the first current source I1 and the second current source I2, so that the current source
  • the center frequency of the flicker noise and the frequency of the output signal are modulated to different frequencies; and by satisfying that the capacitance of the second capacitor is much larger than the capacitance of the first capacitor Value, can reduce the interference of external signals, so can greatly improve the signal-to-noise ratio of the circuit, and improve the detection accuracy of the capacitance detection circuit.
  • the digital processing sub-circuit of the first embodiment of the present application includes a quadrature demodulation circuit. It can be seen from the foregoing that the frequency of the output signal is 1/Tc. Through the quadrature demodulation circuit, the accurate amplitude of the digital signal output by the analog-to-digital conversion sub-circuit can be obtained, which can reduce the interference of other frequencies in the output signal and improve the detection accuracy. degree.
  • the state of the capacitor under test can be judged according to a preset rule. For example, first preset the judgment threshold of the signal amplitude, if the amplitude of the digital signal exceeds the threshold, it is considered that the capacitor under test has an operation, such as a touch, etc., and then further obtain the relevant information of the touch operation; if the amplitude of the digital signal does not exceed the threshold , It is considered that the capacitor under test is not operating.
  • An embodiment of the present application further provides a touch device, which includes the capacitance detection circuit in the various embodiments of the present application described above.
  • An embodiment of the present application also provides a terminal device, and the touch control device includes the capacitance detection circuit in the foregoing various embodiments of the present application.

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Abstract

一种电容检测电路、触控装置、终端设备和电容检测方法，有利于提高电容检测的精度。该电容检测电路（100）包括电荷转移模块（120）和处理模块（130）。电荷转移模块（120）包括充放电子电路（123）、抵消子电路（121）和转移储存子电路（122）。充放电子电路（123）用于对抵消子电路（121）和待测电容器（110）进行充电。抵消子电路（121）用于抵消待测电容器（110）的基础电荷量。转移储存子电路（122）用于在待测电容器（110）及抵消子电路（121）充电后，转移并储存待测电容器（110）和抵消子电路（121）的电荷量的差值。处理模块（130）用于对转移储存子电路（122）两端的电荷差进行处理，并根据电荷差获得待测电容器（110）的电容变化信息。

Description

一种电容检测电路、触控装置、终端设备和电容检测方法 技术领域
本申请涉及电容检测领域，更具体地，涉及一种电容检测电路、触控装置和终端设备。
背景技术
电容型传感器被广泛应用于各种电子设备中，例如，该电容传感器可以用作输入设备提供输入信息，例如，位置、运动、作用力和持续时间等信息。在有些需要高精度电容检测的场景中，提升电容型传感器的检测精度将成为一个重要课题。
发明内容
本申请实施例提供了一种电容检测电路、触控装置和终端设备。所述电容检测电路、触控装置和终端设备，能够实现精准检测待测电容器的自电容的电容变化量。
第一方面，提供了一种电容检测电路，用于检测待测电容器，电容检测电路包括电荷转移模块和处理模块。电荷转移模块用于将待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量转移至电容检测电路的内部并进行储存。电荷转移模块包括充放电子电路、抵消子电路和转移储存子电路。充放电子电路用于对待测电容器、抵消子电路进行充电或放电。抵消子电路用于抵消待测电容器在未触摸状态下充电后所积累的基础电荷量。转移储存子电路用于将待测电容器的电容变化量所导致的电荷变化量转移至电容检测电路内部，并储存于转移储存子电路，待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量为抵消子电路和待测电容器两端的电荷差值。处理模块用于根据转移储存子电路两端储存的电荷获得待测电容器的电容变化信息。
现有技术中，检测触摸状态下的待测电容器的电容变化量，往往先直接检测待测电容器的电容值，再与待测电容器的基础电容值作差得到电容 变化量。相对于现有技术，本申请因为只检测所述待测电容器的电容变化量，电容值的变化更容易被捕捉，能够实现精确检测，检测精度更高。
可选地，抵消子电路充电后所积累的电荷量等于待测电容器在未触摸状态下充电后所积累的基础电荷量。
可选地，转移储存子电路跨接抵消子电路和待测电容器，且满足抵消子电路的阻抗远远大于转移储存子电路的阻抗，如此一来可以实现将外部信号对电容检测电路的干扰进一步分压，衰减外部信号对电容检测电路的干扰。
可选地，处理模块可以包括电荷转电压子电路、模数转换子电路和数字处理子电路。电荷转电压子电路用于将转移储存子电路两端的电荷差转换成放大的电压信号，以便进一步处理。模数转换子电路用于将电荷转电压子电路所输出的模拟信号转换为数字信号。数字处理子电路用于对模数转换子电路所输出的数字信号进行进一步分析处理，获得待测电容器的电容变化信息。
可选地，电荷转电压子电路包括运算放大器和反馈器件，反馈器件的一端连接至运算放大器的反向输入端，反馈器件的另一端连接至运算放大器的输出端。电荷转电压子电路将转移储存子电路两端的电荷差值负反馈至零，并输出半圆弧形的信号波形，以便于后面进一步的处理。
可选地，充放电子模块可以包括两个电源，分别用于对待测电容器和抵消子电路进行充电。两个电源可以是连接到电压源的电流源，电流源可以是固定电流源或者可变电流源；两个电源还可以是与电阻相连接的电压源，电阻可以是固定电阻或者可变电阻。
本申请还提供了一种触控装置，所述触控装置包括上述任意一种电容检测电路。
本申请还提供了一种终端设备，所述触控装置包括上述任意一种电容检测电路。
本申请还提供了一种自电容检测方法，所述电容检测方法包括：
步骤一，在电路初始状态下，对所述抵消子电路和所述待测电容器进行充电，使所述抵消子电路两端所积累的电荷量等于所述待测电容器在未触摸状态下所积累的基础电荷量；
步骤二，将所述待测电容器的电容变化量所导致的电荷变化量所述抵消子电路和所述待测电容器两端的电荷差值转移储存至所述转移储存子电路两端，所述待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量为所述抵消子电路和所述待测电容器两端的电荷差值；在所述电荷差值转移的同时，将所述待测电容器、所述抵消子电路的电荷放电至零；
步骤三，根据所述转移储存子电路两端储存的电荷量获取所述待测电容器的电容变化信息。
可选地，所述步骤二包括，将抵消子电路和待测电容器两端的电荷量放电至零；
可选地，在上述检测方法的步骤三中，处理模块对信号的处理可分解为，先由电荷转电压子电路将转移储存子电路两端的电荷转换成电压信号，接着由模数转换子电路将模拟信号转换为数字信号，再由数字处理子电路根据数字信号获得待测电容器的电容变化信息。
可选地，在一种实施例的工作过程中，一个周期的执行顺序为首先执行步骤一，然后同时执行步骤二和步骤三；可重复执行，执行次数自行设定。这里需要注意的是，除了第一个周期的步骤一需要在电路初始状态下执行，其他周期的步骤一不需要限定在电路初始状态下执行。
一般而言，在电路中包含闪烁噪声，闪烁噪声是低频段的主要噪声源，噪声强度比例于1/f，闪烁噪声的中心频点为零频点。当输出信号频率与闪烁噪声的中心频点相同时，此时闪烁噪声对输出信号的干扰最大，也即是对电容检测电路的噪声干扰最大。可以通过开关调制的方式将闪烁噪声和输出信号调制到不同频率，将有效减少闪烁噪声对电容检测电路的检测准确度的影响。
附图说明
一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，附图中具有相同参考数字标号的元件表示为类似的元件，除非有特别申明，附图中的图不构成比例限制。
图1是根据本申请的电容检测电路的基础结构示意图；
图2是根据本申请一实施例的电容检测电路的结构示意图；
图3是根据本申请一实施例充电时外部干扰信号的等效电路图；
图4是根据本申请一实施例的一种电容检测方法的时序图和波形图。
具体实施方式
下面将结合附图对本发明的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本申请涉及一种电容检测电路，应用于触控领域，用于检测待测电容器的自电容变化信息。请参阅图1，本申请提供的电容检测电路100包括：电荷转移模块120和处理模块130，电荷转移模块用于将待测电容器110的电容变化量所导致的电荷变化量转移并储存至电容检测电路内部，处理模块用于处理转移并储存至电容检测电路内部的待测电容器的电容变化量所导致的电荷变化量，以获得待测电容器的电容变化信息。
电荷转移模块120包括抵消子电路121、转移储存子电路122及充放电子电路123。充放电子电路用于对抵消子电路和待测电容器进行充电或放电。抵消子电路用于抵消待测电容器在未触摸状态下充电后所积累的基础电荷量。转移储存子电路用于将待测电容器的电容变化量所导致的电荷变化量转移至电容检测电路内部，并储存于转移储存子电路，待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量为抵消子电路和待测电容器两端的电荷差值。
待测电容器在未触摸状态下充电后所积累的电荷量，称为基础电荷量。抵消子电路充电后所积累的电荷量等于待测电容器充电后所积累的基础电荷量。但由于噪声干扰等因素，有时抵消子电路充电后所积累的电荷量与待测电容器充电后所积累的基础电荷量之间有细微偏差。由此可知，充电后，抵消子电路所积累的电荷量和待测电容器所积累的电荷量的差值等于待测电容器的电容变化量所导致的待测电容器的电荷变化量。待测电容器的电荷变化量是指相对于待测电容器在未触摸状态下充电后所积累的基础电荷量，待测电容器在触摸状态下充电后所积累的电荷量与该基础电荷量的差别量。将抵消子电路充电后所积累的电荷量和待测电容器充电后所积 累的电荷量的差值转移并储存至转移储存子电路，也即将待测电容器的电容变化量所导致的电荷变化量转移并储存至转移储存子电路。再利用处理模块130对转移储存子电路两端的电荷量进行处理，即可检测到待测电容器的电容变化的相关信息。
一般而言，待测电容器的基础电容值远远大于待测电容器的电容变化量，因此，基础电容值的存在对精确检测待测电容器的电容变化量有较大影响。在本申请中，将待测电容器的电容变化量所导致的电荷变化量转移并储存至电容检测电路内部，由此去除基础电容值的影响，只检测待测电容器的电容变化量所导致的电荷变化量，因此大大提高检测待测电容器的电容变化量的精度。
可选地，充放电子模块包括两个电源，分别用于对待测电容器和抵消子电路进行充电。两个电源可以是连接到电压源的电流源，电流源可以是固定电流源或者可变电流源；两个电源还可以是与电阻相连接的电压源，电阻可以是固定电阻或者可变电阻。
具体地，为实现充电后抵消子电路两端所积累的电荷量等于待测电容器在未触控状态下充电后所积累的电荷量，满足以下关系：当待测电容器处于未触摸状态时，充电时流过待测电容器两端的电流值与抵消子电路的电容值的乘积等于充电时流过抵消子电路两端的电流值与待测电容器的电容值的乘积，且待测电容器的有效充电时间与抵消子电路的有效充电时间相等。这里所说的“抵消子电路的电容值”指的是以抵消子电路为整体，抵消子电路的等效电容值。由此可知，当待测电容器在未触摸状态下的基础电容值确定后，待测电容器的充电电流值和抵消子电路的充电电流值的大小也可以被调节，那么抵消子电路的电容值可以变得很小，对应的面积也会变小，因此芯片面积可大大缩小。
可选地，处理模块130可以包括电荷转电压子电路131、模数转换子电路132、数字处理子电路133。电荷转电压子电路用于将转移储存子电路两端的电荷转换成电压信号。模数转换子电路用于将电荷转电压子电路所输出的模拟信号转换为数字信号。数字处理子电路用于对模数转换子电路所输出的数字信号进行进一步分析处理，获得待测电容器的电容变化信息。
可选地，电荷转电压子电路包括运算放大器和反馈器件，反馈器件的 一端连接至运算放大器的反向输入端，反馈器件的另一端连接至运算放大器的输出端。该电路将转移储存子电路两端的电荷差值负反馈至零，并输出半圆弧形的信号波形，以便于后面进一步的处理。
可选地，处理模块还包括低通滤波器，用于对电荷转电压子电路所输出的电压信号进行滤波，经过低通滤波器滤波后输出的模拟信号再用模数转换子电路进行处理，来降低模数转换时频谱折叠所导致的混叠效应。
可选地，转移储存子电路跨接抵消子电路和待测电容器，抵消子电路的阻抗远远大于转移储存子电路的阻抗。这里的“跨接”指的是抵消子电路和待测电容器不直接相连接，二者通过分别与转移储存子电路相连，间接相连形成回路。在充电时，外部干扰信号会在待测电容器、转移储存子电路、抵消子电路之间形成回路，在转移储存子电路和抵消子电路两端的电压之和即进入电容检测电路的外部干扰信号的大小。转移储存子电路的阻抗越小，外部干扰信号在转移储存子电路两端的分压就越小，对电容检测电路的实际检测的干扰就越小，因此电容检测电路的检测精度可得到提高。
本申请还提供了一种自电容检测方法，所述电容检测方法包括：
步骤一，对抵消子电路和待测电容器进行充电，使抵消子电路两端所积累的电荷量等于待测电容器在未触摸状态下所积累的基础电荷量；
步骤二，将待测电容器的电容变化量所导致的电荷变化量转移储存至转移储存子电路两端，待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量为抵消子电路和待测电容器两端的电荷差值；
步骤三，根据转移储存子电路两端储存的电荷获取待测电容器的电容变化信息。
需要注意的是，这里所说的“待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量”，为相对于待测电容器在未触摸状态下充电所积累的基础电荷量，待测电容器在触摸状态下充电后所积累的基础电荷量与该基础电荷量的差值，也即是抵消子电路和待测电容器两端的电荷差值。
可选地，所述步骤二包括，将待测电容器、抵消子电路的电荷放电至零。
可选地，在上述检测方法的步骤三中，处理模块对信号的处理可分解 为，先由电荷转电压子电路将转移储存子电路两端的电荷转换成电压信号，接着由模数转换子电路将模拟信号转换为数字信号，再由数字处理子电路根据数字信号获得待测电容器的电容变化信息。
请参阅图2，本申请第一实施例是一个电容检测电路，用于检测待测电容器Cx的电容变化量。该自电容检测电路包括第一电容器C1、第二电容器C2，两个连接到电压源VDD的第一电流源I1和第二电流源I2、电荷转电压子电路、模数转换器ADC、数字处理子电路、10个开关S1～S10，连接方式如图2所示。
第一电流源I1和第二电流源I2分别用于对第一电容器C1和待测电容器Cx进行充电。在待测电容器处于未触摸状态下，在充电时，通过待测电容器两端的电流值与第一电容器的电容值的乘积等于通过第一电容器的电流值与待测电容器的基础电容值的乘积，也即充电时，第二电流源的电流值与第一电容器的电容值的乘积等于第一电流源的电流值与待测电容器的基础电容值的乘积，且待测电容器的有效充电时长等于第一电容器的有效充电时长。因此，充电后，第一电容器两端所积累的电荷量等于待测电容器在未触摸状态下所积累的电荷量，待测电容器所积累的电荷量与第一电容器所积累的电荷量的差值等于待测电容器的电容变化量所带来的电荷变化量。这里需要注意的是，由于噪声等影响，第一电容器在充电后两端所积累的电荷量与待测电容器在未触摸状态下充电后所积累的基础电荷量可能有细微差别。
可选地，在本申请第一实施例中，第一电容器可以是可变电容器，以便适应不同电路，更加灵活。
可选地，在本申请第一实施例中，第二电容器可以是可变电容器，第二电容器的电容值的大小会影响电荷转电压子电路的输出信号的波形，因此可以通过调整第二电容器的电容值的大小来调整电荷转电压子电路的输出信号的波形。
可选地，在本申请第一实施例中，第一电容器的电容器值远远小于第二电容器的电容值，也即第一电容器的阻抗远远大于第二电容器的阻抗。一般而言，电容检测电路常外接于触控设备，比如手机的触摸屏。当电容检测电路处于充电阶段时，外部的信号源将在电容检测电路内部形成回路， 回路如图3所示，V int为外部干扰信号。干扰信号V int在待测电容器Cx、第一电容器C1、第二电容器C2上进行分压，进入电容检测电路的干扰信号大小为干扰信号V int在第一电容器C1和第二电容器C2上的分压信号之和。由前述可知，由于通过检测第二电容器C2两端的电荷量来获取待测电容器的电容变化信息，因此干扰信号V int在第二电容器C2上的分压信号才真正影响电容检测电路的检测精度。干扰信号V int在第二电容器C2上的分压信号V2的大小如下所示：
Figure PCTCN2019119791-appb-000001
一般而言，电路满足Cx＞＞C1以及Cx＞＞C2，那么干扰信号V int在第二电容器C2上的分压V2可近似等于
Figure PCTCN2019119791-appb-000002
因此，如果满足C2＞＞C1时，外部干扰信号V int对电容检测电路的影响将变得很小，干扰信号被衰减，电容检测电路的检测精确度得到提高。
介绍本申请第一实施例的一种电容检测方法，图4为对应的各个开关在不同时序的状态以及在触摸状态时储存电路两端的电位变化以及输出波形：
步骤一，对应图4的t0～t1阶段。第七开关S7和第八开关S8闭合，其余开关断开，待测电容器Cx和第一电容器C1两端的电荷在此阶段清零，该阶段所对应的时间长度为T1＝t1-t0；
步骤二，对应图4的t1～t2阶段。第五开关S5、第六开关S6、第九开关S9、第十开关S10闭合，其余开关断开，第一电流源I1对第一电容器C1充电，第二电流源I2对第二电容器C2充电，充电时长为该阶段所对应的时间T2＝t2-t1。
步骤三，对应图4的t2～t3阶段。第九开关S9、第十开关S10断开，第七开关S7、第八开关S8闭合，第五开关S5、第六开关S6断开，第一电容器C1和待测电容器Cx之间的电荷差转移到第二电容器C2上，同时第一电容器C1和待测电容器Cx两端的电荷放电至零；
同时，第一开关S1、第三开关S3闭合，第二开关S2、第四开关S4断开，第二电容器C2两端的电荷量经过电荷转电压子电路，输出信号波形为 正圆弧形，此阶段所对应的时长是T3＝t3-t2；
步骤四，重复所述步骤，此阶段对应的时长是T4＝t4-t3；
步骤五，重复所述步骤三，不同之处在于，第一开关S1、第三开关S3断开，第二开关S2、第四开关S4闭合，其余开关状态与前述相同，第二电容器两端的电荷量经过电荷转电压子电路，输出信号波形为负圆弧形，此阶段所对应的时长是T5＝t5-t4；
以上步骤二到步骤五为一个周期，周期时间为Tc＝t5-t1。
反复执行步骤二到步骤五，执行次数自行设定。
在步骤二到步骤五的反复执行过程中，模数转换器ADC每隔预设时间进行采样，将电荷转电压子电路输出的模拟信号转换为数字信号，采样间隔时长记为Ts，信号周期Tc和ADC采样间隔Ts满足关系：
Tc＝N*Ts，其中N为大于2的正整数
ADC采样输出数字信号后，数字处理子电路对数字信号进行处理，获取待测电容器的电容变化信息。
一般而言，闪烁噪声是低频段的主要噪声源，噪声强度比例于1/f，闪烁噪声的中心频点为零频点。当输出信号频率与闪烁噪声的中心频点相同时，此时闪烁噪声对输出信号的干扰最大，也即是对电容检测电路的噪声干扰最大。这里的“输出信号”包括经过电荷转电压子电路处理后输出的模拟信号、或者经过模数转换子电路处理后的数字信号。在本申请第一实施例中，电流源是电容检测电路的闪烁噪声的主要来源，将闪烁噪声和输出信号调制到不同频率，将有效减少闪烁噪声对电容检测电路的检测准确度的影响。具体地，在本申请实施例中，满足T2＝T4，T3＝T5，由图4可知，第五开关S5和第六开关S6周期性闭合和断开，该周期为Tf＝T2+T3，也即Tf＝T4+T5，由于输出信号的周期Tc＝T2+T3+T4+T5，容易得出，Tc＝2*Tf。从图2的电路可知，第五开关S5和第六开关S6的周期性闭合和断开，也控制了第一电流源I1和第二电流源I2的周期性闭合和断开，由此电流源的闪烁噪声fn从中心频率为零频点被调制到以1/Tf为中心的频段。而由前述可知，经过电荷转电压子电路后输出的信号的频率为fc＝1/Tc，且fn＝2*fc。由于输出信号为交流信号，因此fc不等于零，那么可得fn不等于fc。因此通过开关的周期性闭合和断开，实现将闪烁噪声的中心频点以及输出信号 的频率调制到不同频率上，如此可以达到减少闪烁噪声的干扰。
综上所述，通过开关的周期性闭合和断开，将闪烁噪声的中心频点以及输出信号的频率调制到不同频率上；而通过满足第二电容器的电容值远远大于第一电容器的电容值，可以减少外部信号的干扰，因此能够大大提高电路的信噪比，提高电容检测电路的检测精度。
可选地，本申请第一实施例的数字处理子电路包括正交解调电路。由前述可知，输出信号的频率是1/Tc，通过正交解调电路，可以获得模数转换子电路输出的数字信号的准确幅度大小，这样可以减少输出信号中其他频率的干扰，提高检测精确度。
获得模数转换子电路输出的数字信号的幅度信息之后，可以通过预设的规则判断待测电容器的状态。比如，先预设信号幅度的判断阈值，如果该数字信号的幅度超过阈值，则认为待测电容器有操作，比如触摸等，再进一步获取触摸操作的相关信息；如果该数字信号的幅度没有超过阈值，则认为待测电容器没有操作。
本申请实施例还提供了一种触控装置，该触控设备包括上述本申请各种实施例中的电容检测电路。
本申请实施例还提供了一种终端设备，该触控设备包括上述本申请各种实施例中的电容检测电路。
需要说明的是，在不冲突的前提下，本申请描述的各个实施例和/或各个实施例中的技术特征可以任意的相互组合，组合之后得到的技术方案也应落入本申请的保护范围。
应理解，本申请实施例中的具体的例子只是为了帮助本领域技术人员更好地理解本申请实施例，而非限制本申请实施例的范围，本领域技术人员可以在上述实施例的基础上进行各种改进和变形，而这些改进或者变形均落在本申请的保护范围内。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (21)

  1. 一种电容检测电路，用于检测待测电容器的自电容的电容变化量，其特征在于，包括电荷转移模块和处理模块；
    所述电荷转移模块，用于将所述待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量转移至所述电容检测电路的内部并进行储存，所述电荷转移模块包括：
    充放电子电路，用于对所述待测电容器、所述抵消子电路进行充电或放电；
    抵消子电路，用于抵消所述待测电容器在未触摸状态下充电后所积累的基础电荷量；
    转移储存子电路，用于将所述待测电容器的电容变化量所导致的电荷变化量转移至电容检测电路内部，并储存于所述转移储存子电路，所述待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量为所述抵消子电路和所述待测电容器两端的电荷差值；
    所述处理模块，用于根据所述转移储存子电路两端储存的电荷获得所述待测电容器的电容变化信息。
  2. 根据权利要求1所述的电容检测电路，其特征在于，所述抵消子电路充电后积累的电荷量等于所述待测电容器在未触摸状态下充电后所积累的基础电荷量。
  3. 根据权利要求2所述的电容检测电路，其特征在于，所述处理模块包括电荷转电压子电路、模数转换子电路及数字处理子电路；
    所述电荷转电压子电路用于将所述转移储存子电路两端的电荷转换成电压信号；
    所述模数转换子电路，用于将所述电荷转电压子电路输出的电压信号转换成数字信号；
    所述数字处理子电路，用于根据所述模数转换子电路转换后的数字信号获得所述待测电容器的电容变化信息。
  4. 根据权利要求3所述的电容检测电路，其特征在于，所述电荷转电压子电路包括运算放大器和反馈器件，所述反馈器件的一端连接至所述运算放大器的反向输入端，所述反馈器件的另一端连接至所述运算放大器的 输出端。
  5. 根据权利要求4所述的电容检测电路，其特征在于，所述充放电子电路包括第一电源和第二电源，所述第一电源用于对所述抵消子电路进行充电，所述第二电源用于对所述待测电容器进行充电。
  6. 根据权利要求5所述的电容检测电路，其特征在于，
    所述第一电源或所述第二电源为连接到电压源的固定电流源，或者是连接到电压源的可变电流源；或者
    所述第一电源或所述第二电源为与电阻相连接的电压源，所述电阻是可变电阻或者固定电阻。
  7. 根据权利要求5所述的电容检测电路，其特征在于，所述转移储存子电路跨接至所述抵消子电路和所述待测电容器之间。
  8. 根据权利要求7所述的电容检测电路，其特征在于，所述抵消子电路包括第一电容器，所述第一电容器是固定电容器或者可变电容器。
  9. 根据权利要求8所述的电容检测电路，其特征在于，所述转移储存子电路包括第二电容器，所述第二电容器是固定电容器或者可变电容器。
  10. 根据权利要求9所述的电容检测电路，其特征在于，所述电容检测电路包括第一开关组，所述第一开关组用于控制电荷转电压子电路，所述第一开关组包括第一开关、第二开关、第三开关及第四开关；
    所述第一开关的一端连接至所述第二电容器的一端，所述第一开关的另一端连接至运算放大器的正向输入端；
    所述第二开关的一端连接至所述第二电容器的另一端，所述第二开关的另一端连接至运算放大器的正向输入端；
    所述第三开关的一端连接至所述第二电容器的一端，所述第三开关的另一端连接至运算放大器的负向输入端；
    所述第四开关的一端连接至所述第二电容器的另一端，所述第四开关的另一端连接至运算放大器的负向输入端。
  11. 根据权利要求10所述的电容检测电路，其特征在于，所述电容检测电路还包括第二开关组和第三开关组；
    所述第二开关组包括第五开关、第六开关、第七开关和第八开关；所述第五开关的一端连接至所述第一电源，所述第五开关的另一端连接至所 述第一电容器；所述第六开关的一端连接至所述第二电源，所述第六开关的另一端连接至所述待测电容器；所述第七开关的一端与所述待测电容器的一端相连接，所述第七开关的另一端连接到地，所述第八开关的一端与所述第一电容器的一端相连接，所述第八开关的另一端连接到地；
    所述第三开关组包括第九开关及第十开关；所述第九开关的一端连接至所述待测电容器的一端，所述第九开关的另一端连接至所述第二电容器的一端，所述第十开关的一端连接至所述第二电容器的另一端，所述第十开关的另一端连接至所述第一电容器的一端。
  12. 根据权利要求3所述的电容检测电路，其特征在于，所述数字处理子电路用于获得所述模数转换子电路输出的数字信号的幅度信息，并根据所述幅度信息判断所述待测电容器表面是否有触摸，如果所述幅度信息超过预设值，则判断所述待测电容器表面有触摸，如果幅度没有超过预设值，则判断所述待测电容器表面没有触摸操作。
  13. 根据权利要求11所述的电容检测电路，所述数字处理子电路包括正交解调器，用于获得所述模数转换子电路转换后的数字信号的频率对应的幅度大小。
  14. 根据权利要求11所述的电容检测电路，其特征在于，所述处理模块还包括连接于所述电荷转电压子电路与所述模数转换子电路之间的低通滤波器，用于对所述电荷转电压子电路所输出的电压信号进行滤波。
  15. 根据权利要求2所述的电容检测电路，其特征在于，当待测电容器处于未触摸状态下，所述待测电容器两端的充电电流值和所述抵消子电路的电容值的乘积等于所述抵消子电路两端的充电电流值和所述待测电容器的基础电容值的乘积，且所述待测电容器的有效充电时间与所述抵消子电路的有效充电时间相同。
  16. 一种触控装置，其特征在于，包括：
    如权利要求1至15中任一项所述的电容检测电路。
  17. 一种终端设备，其特征在于，包括：
    如权利要求1至15中任一项所述的电容检测电路。
  18. 一种电容检测方法，其特征在于，所述方法用于权利要求1至15中任一项所述的电容检测电路，所述方法包括：
    步骤一，对所述抵消子电路和所述待测电容器进行充电，使所述抵消子电路两端所积累的电荷量等于所述待测电容器在未触摸状态下所积累的基础电荷量；
    步骤二，将所述待测电容器的电容变化量所导致的电荷变化量转移储存至所述转移储存子电路两端，所述待测电容器受到外界的触摸而引起的电容变化所导致的电荷变化量为所述抵消子电路和所述待测电容器两端的电荷差值；
    步骤三，根据所述转移储存子电路两端储存的电荷获取所述待测电容器的电容变化信息。
  19. 根据权利要求18所述的电容检测方法，其特征在于，
    所述步骤二还包括，将所述待测电容器、所述抵消子电路的电荷放电至零。
  20. 根据权利要求18所述的电容检测方法，其特征在于，所述步骤三，包括：
    所述电荷转电压子电路将所述转移储存子电路两端的电荷转换成电压信号；
    所述模数转换子电路将所述电荷转电压子电路输出的电压信号转换为数字信号；
    所述数字处理子电路处理所述模数转换子电路输出的数字信号，获得所述待测电容器的自电容变化信息。
  21. 根据权利要求20所述的电容检测方法，其特征在于，
    所述步骤一包括：闭合所述第五开关和所述第六开关，使所述第一电源和所述第二电源分别对所述第一电容器和所述待测电容器进行充电；同时断开所述第一开关和所述第三开关，断开所述第二开关和所述第四开关，使所述电荷转电压子电路不工作；
    所述步骤二，包括状态一和状态二；
    所述状态一包括，断开所述第五开关和所述第六开关，使所述充放电子电路不对所述抵消子电路和所述待测电容器充电；同时闭合所述第一开关和所述第三开关，断开所述第二开关和所述第四开关，使电荷转电压子电路输出电压信号；
    所述状态二包括，断开所述第五开关和所述第六开关，使所述充放电子电路不对所述抵消子电路和所述待测电容器充电；同时断开所述第一开关和所述第三开关，闭合所述第二开关和所述第四开关，使电荷转电压子电路输出电压信号；
    所述步骤二的所述状态一和所述状态二在执行周期中交替执行。
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