WO2021068114A1 - 一种发光二极管 - Google Patents

一种发光二极管 Download PDF

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Publication number
WO2021068114A1
WO2021068114A1 PCT/CN2019/110003 CN2019110003W WO2021068114A1 WO 2021068114 A1 WO2021068114 A1 WO 2021068114A1 CN 2019110003 W CN2019110003 W CN 2019110003W WO 2021068114 A1 WO2021068114 A1 WO 2021068114A1
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Prior art keywords
light
edge
light emitting
emitting diode
layer
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PCT/CN2019/110003
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English (en)
French (fr)
Inventor
王�锋
何安和
夏章艮
詹宇
彭康伟
林素慧
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厦门三安光电有限公司
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Application filed by 厦门三安光电有限公司 filed Critical 厦门三安光电有限公司
Priority to CN201980005919.0A priority Critical patent/CN112930604B/zh
Priority to PCT/CN2019/110003 priority patent/WO2021068114A1/zh
Priority to CN202210536824.5A priority patent/CN115000266A/zh
Publication of WO2021068114A1 publication Critical patent/WO2021068114A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/385—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector

Definitions

  • the invention relates to a small light emitting diode.
  • LEDs with a size below 100 microns without transparent substrate support are currently difficult to commercialize on a large scale in a short time due to uncertain technical routes and high costs, but transparent substrates
  • the supported small-size LEDs as an extension of small-pitch LED products and a prelude to substrate-less LEDs with sizes below 100 microns, have begun to ship LCD backlights and RGB display products, such as the P0.9 product that has been mass-produced and shipped.
  • Transparent substrates such as sapphire-supported small-size LEDs are used for light-emitting diodes, equipment, and manufacturing processes that are adapted to small-pitch LED displays, which effectively guarantees the cost-effectiveness of the product and the feasibility of mass production.
  • Fig. 1 is a small-sized flip-chip LED structure, which includes a transparent substrate 100, and a semiconductor light emitting sequence is carried on the first surface of the transparent substrate 100 ( 102, 103, 104) and the exposed edges of a certain width of the substrate around the semiconductor light emitting sequence.
  • the edges of a certain width exposed on the first surface of the substrate are used for laser undercutting and cutting.
  • the exposed edge of the transparent substrate 100 and the surface of the semiconductor light emitting sequence will be covered with an insulating dielectric layer.
  • the current undercutting process and the cutting channel width required by the splitting process which is at least 10 microns.
  • the area of the edge area exposed by the transparent substrate around the light-emitting semiconductor sequence will be relatively large.
  • the light absorption area (the insulating layer absorbs light) or the light reflection area formed by the exposed edge of the substrate The area (in the case where the insulating medium layer is a reflective layer) will also take up a relatively large proportion, resulting in serious loss of brightness of the light emitted from the sidewall of the semiconductor light emitting sequence reaching the first surface of the substrate.
  • a first light emitting diode with a small light emitting area and improved light emitting brightness which includes: a transparent substrate, a semiconductor light emitting sequence, an insulating medium layer, a first electrode and a second electrode;
  • a transparent substrate having a first surface, the first surface including an inner first area and a peripheral second area;
  • the semiconductor light emitting sequence includes a first conductivity type semiconductor layer, a light emitting layer, and a second conductivity type semiconductor layer stacked from a first surface of a transparent substrate, covering a first area of the first surface of the transparent substrate;
  • One surface of the first conductivity type semiconductor layer includes: a light-emitting layer and a second conductivity type semiconductor layer covering area and a first electrode electrical connection area;
  • An insulating dielectric layer covering at least the semiconductor light emitting sequence, and having a first opening and a second opening;
  • the first electrode and the second electrode are electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer through the first opening and the second opening, respectively;
  • the periphery of the semiconductor light emitting sequence When viewed from the top of the second conductivity type semiconductor layer, the periphery of the semiconductor light emitting sequence includes a first edge, a second edge, a third edge and a fourth edge in sequence along a circumferential direction;
  • the second area of the first surface of the transparent substrate has four widths around the first edge, the second edge, the third edge, and the fourth edge of the semiconductor light emitting sequence, defined as W1, W2, W3, and W4 ;
  • the first electrode electrical connection area of the first conductive type semiconductor layer is located at part of the first edge and at least part of the second edge, and W1 is greater than W3.
  • the W1+W3 is 10-50 microns
  • the W2+W4 is 10-50 microns.
  • the side length of the first edge of the semiconductor light emitting sequence is greater than or equal to the side length of the second edge.
  • the W1 is 10-30 microns.
  • the W3 is between 0-5 or 5-20 microns.
  • the W1:W3 ratio is (2-40):1.
  • the first electrode electrical connection area of the first conductive type semiconductor layer is located at part of the first edge and part of the second edge, but not at the third edge and the fourth edge, W1 is greater than W3 and W2 Greater than or equal to W4.
  • the W2 is 10-30 microns.
  • the W4 is between 0-5 or 5-20 microns.
  • said W2:W4 is (2-40):1.
  • the present invention also provides the following second type of light-emitting diode with a small light-emitting area and improved light-emitting brightness, which includes: a transparent substrate, a semiconductor light-emitting sequence, an insulating medium layer, a first electrode and a second electrode;
  • a transparent substrate having a first surface, the first surface including an inner first area and a peripheral second area;
  • the semiconductor light emitting sequence includes a first conductivity type semiconductor layer, a light emitting layer, and a second conductivity type semiconductor layer stacked from a first surface of a transparent substrate, covering a first area of the first surface of the transparent substrate;
  • One surface of the first conductivity type semiconductor layer includes a light-emitting layer and a second conductivity type semiconductor layer covering area and a first electrode electrical connection area;
  • An insulating dielectric layer covering at least the semiconductor light emitting sequence, and having a first opening and a second opening;
  • the first electrode and the second electrode are electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer through the first opening and the second opening, respectively;
  • the periphery of the semiconductor light emitting sequence When viewed from the top of the second conductivity type semiconductor layer, the periphery of the semiconductor light emitting sequence includes a first edge, a second edge, a third edge and a fourth edge in sequence along a circumferential direction;
  • the second area of the first surface of the transparent substrate has four widths around the first edge, the second edge, the third edge, and the fourth edge of the semiconductor light emitting sequence, defined as W1, W2, W3, and W4 ;
  • the first electrode electrical connection area of the first conductivity type semiconductor layer is located at the first edge, all the second edges and part of the third edge, W2 is greater than W4.
  • W1 is greater than or equal to W3, and W2 is greater than W4.
  • the side length of the first edge of the semiconductor light emitting sequence is greater than or equal to the side length of the second edge.
  • the W2 is 10-30 microns.
  • the W4 is between 0-5 or 5-20 microns.
  • the W1 is 10-30 microns.
  • the ratio of W2:W4 is (2-40):1.
  • the first or second type of light-emitting diode has at least one of the following characteristics:
  • the ratio of the first area of the first surface of the transparent substrate to the area of the first surface of the transparent substrate is 40% to 90%.
  • the side length of the edge of the first surface of the transparent substrate is between 200-300 micrometers or 100-200 micrometers or 40-100 micrometers.
  • the transparent substrate includes a second surface opposite to the first surface, and the second surface is the main light emitting surface.
  • the insulating dielectric layer includes multiple insulating dielectric layers or a single insulating dielectric layer, and the multilayer insulating dielectric layer is preferably a DBR layer or the single insulating dielectric layer has a thickness of 2 micrometers or more.
  • the thickness of the insulating dielectric layer covering the top surface of the semiconductor light-emitting sequence is different from the thickness covering the sidewall of the semiconductor light-emitting sequence.
  • the thickness of the insulating dielectric layer covering the sidewall of the semiconductor light-emitting sequence is 40-90% of the thickness covering the top surface of the semiconductor light-emitting sequence.
  • the surface of the second conductive type semiconductor layer further includes a transparent electrode layer.
  • the semiconductor light emitting sequence is directly grown on the first surface of the transparent substrate, or bonded to the first surface of the transparent substrate through a transparent bonding layer.
  • the insulating dielectric layer covers the second area of the first surface of the at least partially transparent substrate.
  • the present invention also provides a light emitting diode package, including a mounting substrate and at least one light emitting diode mounted on the mounting substrate, characterized in that at least one or more or all of the light emitting diodes are the aforementioned first or The second type of light-emitting diode.
  • the present invention also provides the following light-emitting diode module, comprising a mounting substrate and multiple rows and multiple columns of light-emitting diodes mounted on the mounting substrate, characterized in that at least one or more or all of the light-emitting diodes are the aforementioned first One or second type of light-emitting diodes.
  • the present invention also provides the following light-emitting diode module, including a mounting substrate and a plurality of light-emitting diodes mounted on the mounting substrate, characterized in that the plurality of light-emitting diodes are in multiple rows and multiple columns, and each light-emitting diode includes : Transparent substrate, semiconductor light emitting sequence, insulating dielectric layer, first electrode and second electrode;
  • a transparent substrate having a first surface, the first surface including an inner first area and a peripheral second area;
  • the semiconductor light emitting sequence includes a first conductivity type semiconductor layer, a light emitting layer, and a second conductivity type semiconductor layer stacked from a first surface of a transparent substrate, covering a first area of the first surface of the transparent substrate;
  • One surface of the first conductivity type semiconductor layer includes a light-emitting layer and a second conductivity type semiconductor layer covering area and a first electrode electrical connection area;
  • An insulating dielectric layer covering at least the semiconductor light emitting sequence, and having a first opening and a second opening;
  • the first electrode and the second electrode are electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer through the first opening and the second opening, respectively;
  • the second area of the first surface of the transparent substrate has four widths around the first edge, the second edge, the third edge, and the fourth edge of the semiconductor light emitting sequence, defined as W1, W2, W3, and W4 ;
  • the light emitting diodes in the row closest to one side of the mounting substrate have a third edge of the semiconductor light emitting sequence parallel to and closest to the one side of the mounting substrate than other edges, and W1 is greater than W3.
  • the light emitting diodes in a row closest to the other side of the mounting substrate have a fourth edge of the semiconductor light emitting sequence parallel to and closest to the other side of the mounting substrate compared to the other edges, and W2 is greater than W4.
  • the W1+W3 is 10-50 microns
  • the W2+W4 is 10-50 microns.
  • the W1 is 10-30 microns, and the W3 is between 0-5 or 5-20 microns.
  • the W1:W3 ratio is (2-40):1.
  • the W2 is 10-30 microns, and the W4 is between 0-5 or 5-20 microns.
  • the ratio of W2:W4 is (2-40):1.
  • the side length of the first edge of the semiconductor light emitting sequence is greater than or equal to the side length of the second edge.
  • the multiple rows of light-emitting diodes include at least one row of red light-emitting diodes, one row of green light-emitting diodes, and one row of blue light-emitting diodes.
  • the multiple rows and multiple columns of light-emitting diodes are all blue light-emitting diodes.
  • the mounting substrate includes two horizontal sides and two longitudinal sides, and the light-emitting diodes are arranged in multiple rows along the horizontal sides of the mounting substrate, and are arranged along the longitudinal sides of the mounting substrate.
  • Multiple columns; LEDs in the first column and LEDs in the last column are respectively the third edge of the semiconductor light emitting sequence closest to and parallel to the two horizontal sides of the mounting substrate, the LEDs in the first row and the LEDs in the last row
  • the fourth edges of the semiconductor light-emitting sequence are respectively arranged closest to and parallel to the two longitudinal sides of the mounting substrate.
  • the present invention also provides the following RGB display device, which is characterized in that it includes the aforementioned light emitting diode modules spliced together.
  • the present invention also provides the following backlight display screen, which is characterized in that it includes the aforementioned light-emitting diode modules spliced together to form a backlight light source.
  • the present invention will illustrate the beneficial effects of the present invention in detail through examples.
  • Figure 1 is a schematic cross-sectional view of the light-emitting diode mentioned in the background art
  • Figure 2 is a schematic plan view of the light emitting diode mentioned in the background art
  • FIGS. 3 to 4 are schematic diagrams of the structure of the light emitting diode mentioned in the first embodiment, FIG. 3 is a schematic plan view, and FIG. 4 is a schematic cross-sectional view taken along the dotted line on the schematic plan view of FIG. 3.
  • FIG. 5 is a graph showing the relationship between the proportion of the horizontal cross-sectional area of the first surface of the transparent substrate covered by the light-emitting semiconductor sequence of the light emitting diode and the horizontal cross-sectional area of the first surface of the transparent substrate of the light emitting diode.
  • FIG. 6 to 16 are schematic structural diagrams of the manufacturing process flow of the light-emitting diode mentioned in the second embodiment.
  • 7 is a longitudinal cross-sectional view of the plan view shown in FIG. 8 along the dotted line position
  • FIG. 9 is a longitudinal cross-sectional view of the plan view shown in FIG. 10 along the dotted line position
  • FIG. 13 is a schematic plan view
  • 15 is a schematic cross-sectional structure diagram of any two semiconductor light emitting sequences in FIG. 14 supported on an unseparated transparent substrate.
  • 16 is a schematic cross-sectional view of a semiconductor light emitting sequence in the circle in FIG. 14 supported on a separate transparent substrate.
  • Figure 17 is a schematic diagram of the package structure.
  • FIG. 18 is a schematic diagram of the planar structure of the light emitting diode mentioned in the second embodiment.
  • Fig. 19 is the backlight display screen mentioned in the third embodiment.
  • FIGS. 20-22 are schematic plan views of the package modules for the backlight display screen mentioned in the third embodiment being spliced on the backlight board.
  • Figs. 23-24 are plan views and schematic cross-sectional views of the light emitting diode mentioned in the third embodiment.
  • the present invention provides a light-emitting diode 10 with a small light-emitting area and improved light-emitting brightness, as shown in the cross-sectional schematic diagram of FIG. 3, which includes the following stacked layers: a transparent substrate 100, a semiconductor light-emitting sequence, an insulating medium layer 106, and a first The electrode 107 and the second electrode 108.
  • the transparent substrate 100 may be an insulating substrate or a conductive substrate.
  • the transparent substrate 100 may be a growth substrate for growing a semiconductor light-emitting sequence, such as a sapphire substrate, or a transparent bonding layer of the semiconductor light-emitting sequence bonded on the transparent substrate 100.
  • the transparent substrate 100 includes a first surface, a second surface, and sidewalls. The first surface and the second surface are opposite to each other.
  • the transparent substrate 100 includes a plurality of protrusions formed at least on at least a portion of the first surface.
  • the transparent substrate 100 may be a patterned sapphire substrate.
  • the light emitting diode may be a small light emitting diode with a small horizontal area.
  • the size of the light emitting diode may be reflected by the size of the first surface of the transparent substrate.
  • the side length of the first surface of the transparent substrate 100 is preferably less than or equal to 300.
  • the micrometer is preferably between 100-300 micrometers, or 100-200 micrometers, or smaller than 100 micrometers, preferably between 40 micrometers and 100 micrometers.
  • the horizontal area (horizontal cross-sectional area) of the first surface of the transparent substrate is less than 90,000 square microns, or smaller, such as more than 10,000 square microns and less than 50,000 microns, or less than 10,000 square microns, and more than 2,000 square microns (for example, 40 microns * 60 microns). ).
  • the thickness of the transparent substrate 100 is between 40-150 microns, the thicker case is 80-150 microns, and the thinner case is 40-80 microns.
  • the thickness of the semiconductor light-emitting sequence is between 1 and 10 microns.
  • the light-emitting diode of this embodiment has the above-mentioned horizontal area and thickness, so the light-emitting diode can be easily applied to various electronic devices that require small and thin light-emitting devices.
  • a partial area of the first surface of the transparent substrate 100 is covered by the semiconductor light emitting sequence, so the first surface of the transparent substrate 100 is divided into a first area covered by the semiconductor light emitting sequence and a second area around the semiconductor light emitting sequence.
  • the light-emitting diode has a certain width of cutting lanes reserved for substrate separation processes such as laser undercutting and splitting during the manufacturing process. After the separation process, the cutting lanes form the first surface of the transparent substrate 100 around the light-emitting semiconductor sequence. area.
  • the width of the cutting lane is at least 10 microns and at most 50 microns.
  • the second surface of the transparent substrate 100 is the light-emitting surface of the light-emitting diode, and is the main light-emitting area.
  • the second area of the first surface of the transparent substrate 100 is not covered by the semiconductor light-emitting sequence, that is, during the manufacturing process of the semiconductor light-emitting element, the semiconductor light-emitting sequence is separated on the substrate surface before the substrate is separated, exposing the transparent substrate
  • the second area on the first surface of 100 can reduce the stress generated by the semiconductor light-emitting sequence on the substrate, thereby promoting the reduction of the bending of the light-emitting diode during the manufacturing process, preventing damage to the semiconductor light-emitting sequence, and improving the manufacturing yield.
  • the first area covered by the semiconductor light emitting sequence is smaller than the horizontal area of the first surface of the transparent substrate 100.
  • the ratio of the horizontal cross-sectional area of the first region of the first surface of the transparent substrate 100 to the horizontal cross-sectional area of the first surface of the transparent substrate is 40% to 90%. As the size becomes smaller, the area ratio of the semiconductor light-emitting sequence also becomes smaller.
  • the coverage area ratio of the semiconductor light-emitting sequence is about 86%
  • the area of the second area of the first surface of the substrate around the semiconductor light-emitting sequence occupies The ratio is 14%.
  • the semiconductor light emitting sequence includes a first conductivity type semiconductor layer 102, a light emitting layer 103, and a second conductivity type semiconductor layer 104.
  • the specific semiconductor light emitting sequence may include III-V type nitride semiconductors, such as (Al, Ga, In ) A nitride-based semiconductor of N or a phosphide semiconductor including (Al, Ga, In)P or an arsenide-based semiconductor of (Al, Ga, In)As.
  • the first conductive type semiconductor layer 102 may include n-type impurities (for example, Si, Ge, Sn), and the second conductive type semiconductor layer 104 may include p-type impurities (for example, Mg, Sr, Ba).
  • the light-emitting layer 103 may include a multiple quantum well structure (MQW), and the element composition ratio of the semiconductor may be adjusted to emit a desired wavelength.
  • the second conductivity type semiconductor layer 104 may be a p-type semiconductor layer.
  • the first surface of the first conductive type semiconductor layer 102 is divided into a region covered by the mesa 201 and a first electrode electrical connection region.
  • the mesa 201 includes a combination of a light emitting layer 103 and a second conductivity type semiconductor layer 104 on the light emitting layer 103.
  • the surface of the electrical connection area of the first electrode is not covered by the mesa, and is used for the electrical connection of the first electrode 106 to the first conductivity type semiconductor layer 102.
  • the actual area of the electrical connection area formed by the first electrode 107 on the surface of the first conductivity type semiconductor layer 102 can be It is less than or equal to the area of the surface of the first conductivity type semiconductor layer 102 that is exposed in the process for positioning the electrical connection area.
  • a contact electrode 105 is located on the second conductivity type semiconductor layer 104.
  • the contact electrode 105 may be in ohmic contact with the second conductive type semiconductor layer 104.
  • the contact electrode 105 may include a transparent conductive layer.
  • the transparent conductive layer may also include, for example, indium tin oxide, zinc oxide, zinc indium tin oxide, indium zinc oxide, zinc tin oxide, gallium indium tin oxide, indium gallium oxide, zinc gallium oxide, aluminum-doped zinc oxide, fluorine-doped At least one of a light-transmitting conductive oxide such as tin oxide and a light-transmitting metal layer such as Ni/Au.
  • the conductive oxide may further include various dopants.
  • the thickness of the contact electrode 105 is 50-300 nanometers.
  • the surface contact resistance of the contact electrode 105 and the second conductivity type semiconductor layer 104 is preferably lower than the surface contact resistance of the metal electrode on the second conductivity type semiconductor layer 104, so the forward voltage (Vf) can be reduced and the luminous efficiency can be improved. .
  • the insulating dielectric layer 106 covers the top surface and sidewalls of the semiconductor light emitting sequence and the second area of the first surface of the transparent substrate 100. Specifically, when there is a contact electrode 105, the top surface and sidewalls of the contact electrode 105 and the semiconductor light-emitting sequence not covered by the contact electrode 105 are covered by the insulating dielectric layer 106. In addition, the insulating dielectric layer 106 can further at least partially or completely cover the second area exposed on the first surface of the transparent substrate, which can ensure that it covers the sidewalls of the semiconductor light-emitting sequence more stably, while preventing water vapor from entering the periphery of the semiconductor light-emitting sequence. , Reduce the risk of leakage.
  • the insulating medium layer 106 is an insulating reflective layer, covering the top surface and sidewalls of the semiconductor light emitting sequence.
  • the insulating medium layer 106 can reflect at least 80% or further at least 90% of the light intensity of the light radiated by the light-emitting layer reaching its surface.
  • the insulating dielectric layer 106 may specifically include a Bragg reflector.
  • the Bragg reflector can be formed by repeatedly stacking at least two insulating media with different refractive indexes, and can be formed into 4 to 20 pairs.
  • the insulating dielectric layer can include TiO 2 , SiO 2 , HfO 2 , and ZrO 2 , Nb 2 O 5 , MgF 2 and so on.
  • the insulating dielectric layer 106 may alternately deposit TiO 2 layers/SiO 2 layers.
  • Each layer of the Bragg reflector may have an optical thickness of 1/4 of the peak wavelength of the radiation band of the light-emitting layer.
  • the uppermost layer of the Bragg reflector may be formed of SiNx.
  • the layer formed of SiNx has excellent moisture resistance and can protect the light emitting diode from moisture.
  • the lowermost layer of the insulating dielectric layer 106 may have a bottom layer or an interface layer that improves the film quality of the distributed Bragg reflector.
  • the insulating dielectric layer 106 may include an interface layer formed of SiO 2 with a thickness of about 0.2-1.0 microns, and a TiO 2 /SiO 2 layer stacked on the interface layer according to a specific period.
  • the insulating medium layer 106 can also be just a single layer of insulating medium layer.
  • the reflectivity is generally lower than the Bragg reflective layer, and at least 40% of the light is emitted from the insulating medium layer 106, preferably at least 1 micron or more.
  • the thickness is 2 micrometers or more, such as SiO 2 , which has excellent moisture resistance and can protect the light emitting diode from moisture.
  • the insulating dielectric layer 106 has at least one first opening 1061 and one second opening 1062, and the first electrode 107 and the second electrode 108 are formed on the surface of the insulating dielectric layer 106.
  • the first electrode 107 is in contact with the first electrode electrical contact area of the first conductive type semiconductor layer 102 through the first opening 1061 to form an electrical connection
  • the second electrode 108 is in contact with the surface of the second conductive type semiconductor layer 102 through the second opening 1062
  • the electrode 105 contacts to form an electrical connection.
  • the contact electrode 105 may also have an opening, and the second electrode 108 may partially contact the surface of the second conductive semiconductor layer 104 through the one opening of the contact electrode 105.
  • the resistance between the second electrode 108 and the second conductivity type semiconductor layer 104 is higher than the resistance between the contact electrode 105 and the second conductivity type semiconductor layer 104, so as to minimize the current flow directly between the second electrode and the second conductivity type semiconductor layer 104.
  • the contact position of the layer 104 is crowded.
  • the periphery of the semiconductor light emitting sequence when viewed from the top surface of the semiconductor light emitting sequence, includes a first edge E1, a second edge E2, a third edge E3, and a fourth edge E4 in sequence along a circumferential direction.
  • the second area of the first surface of the transparent substrate 100 has four widths around the first edge E1, the second edge E2, the third edge E3, and the fourth edge E4 of the semiconductor light emitting sequence, defined as W1, W2, W3 And W4, the width here is defined as the horizontal width.
  • the first edge E1 is greater than or equal to the side length of the second edge E2
  • the third edge E3 is greater than or equal to the side length of the fourth edge E4.
  • the separation of the transparent substrate usually adopts a hidden cutting and splitting process.
  • W1+W3, W2+W4 are the exposed transparent substrates between adjacent semiconductor light-emitting sequences before the transparent substrate is separated.
  • the width of the cutting lane on the bottom first surface, and W1+W3 and W2+W4 are between 10-50 microns.
  • the first electrode electrical connection region is formed at the edge of the semiconductor light emitting sequence rather than the middle position of the semiconductor light emitting sequence stacked layer, and forms the light emitting area of the mesa formed by the combination of the light emitting layer and the second conductive semiconductor layer.
  • the first electrode electrical connection area of the first conductivity type semiconductor layer 102 is set to be located at part of the first edge E1 and at least part of the second edge E2, that is, the first electrode electrical connection position is set at the edge position of the semiconductor light emitting sequence. Facilitate the diffusion and distribution of current between the first electrode and the second electrode.
  • the first electrode electrical connection area of the first conductivity type semiconductor layer 102 is an exposed area, and it is located only at a part of the first edge E1 and a part of the second edge E2. That is, the first electrode electrical connection area of the first conductive type semiconductor layer does not extend to the third edge and the fourth edge.
  • the second area of the first surface of the substrate around the mesa occupies a relatively large proportion.
  • the light radiated from the sidewalls around the mesa reaches the second area of the first surface of the substrate due to light absorption or reflection.
  • This embodiment provides the following improvement: the second area of the first surface of the transparent substrate is along the semiconductor
  • the four edges around the light-emitting sequence have the following width relationship: W1 is greater than W3 and or W2 is greater than W4.
  • the width of W3 and or W4 By reducing the width of W3 and or W4, the area of the second area of the first surface of the transparent substrate around the mesa is reduced.
  • the ratio of light absorption or reflection from the sidewalls around the mesa through the insulating dielectric layer to the second area of the first surface of the transparent substrate will decrease, and the ratio of direct light emission will increase, so as to reach the second surface of the transparent substrate.
  • W1 or W2 is greater than or equal to 10 micrometers, more preferably between 10-30 micrometers, according to the size of the cutting bead required by the current laser undercutting process.
  • W2 or W4 is less than or equal to 20 microns, or further preferably less than or equal to 5 microns.
  • the ratio of the width of the second area of the first surface of the transparent substrate around the first edge to the width of the second area of the first surface of the transparent substrate around the third edge is 2-40 times, for example, 2 ⁇ 10 times, or 10 to 20 times, or 20 to 40 times.
  • the ratio of the width of the second area of the first surface of the transparent substrate around the second edge to the width of the second area of the first surface of the transparent substrate around the fourth edge is 2-10 times, or 10 ⁇ 40 times, or 10 to 20 times, or 20 to 40 times.
  • the first surface of the transparent substrate 100 includes a first conductivity type semiconductor layer 102, a light emitting layer 103, and a second conductivity type semiconductor layer 104 stacked in sequence.
  • the contact electrode 105 is ITO and covers the surface of the second conductivity type semiconductor layer 104.
  • a mask is formed by one or two photomasks, and part of the contact electrode 105 and part of the second conductivity type semiconductor layer 104 and the light-emitting layer 103 are etched to expose part of the first conductivity type semiconductor layer 102 and Several mesas are formed, and the mesas include the light-emitting layer 103, the second conductivity type semiconductor layer 104 and the contact electrode 105.
  • a mask is formed by a photomask, and a portion of the first surface of the transparent substrate 100 is exposed by etching along the first conductive semiconductor layer 102 between adjacent mesas to form a plurality of independent semiconductor light emitting devices. sequence.
  • a scribe area is formed around the exposed first surface of the transparent substrate 100 for each semiconductor light-emitting sequence, and each semiconductor light-emitting sequence includes edges defining four different directions along a surrounding direction, namely, a first edge E1 and a second edge E2. , The third edge E3 and the fourth edge E4.
  • the first conductive type semiconductor layer of each semiconductor light emitting sequence includes a first surface and an opposite second surface, and the first surface includes a mesa covering area and a first electrode electrical connection area.
  • the first electrode electrical connection area is located at part of the first edge E1 and part of the second edge E2 of the semiconductor light emitting sequence.
  • the plated insulating dielectric layer 106 covers the contact electrode 105 and the surface and sidewalls of the exposed semiconductor light emitting sequence, and the second area covering the first surface of the transparent substrate 100.
  • the thickness of the insulating dielectric layer 106 on the sidewall of the semiconductor light-emitting sequence is generally lower than the top surface of the semiconductor light-emitting sequence and the second surface of the first surface of the transparent substrate due to the shadow effect.
  • the thickness on the sidewall of the semiconductor light emitting sequence is 40% to 90% of the thickness of the top surface of the semiconductor sequence.
  • the insulating dielectric layer 106 is an insulating reflective layer, because of the difference in thickness, the reflectivity of the sidewall of the semiconductor light-emitting sequence will be lower than the reflectivity of the top surface of the semiconductor sequence, and the light radiated by the light-emitting layer is easily transmitted through the sidewall of the mesa. After reaching the second area of the first surface of the transparent substrate, reflection occurs, resulting in the loss of the brightness of the second surface of the transparent substrate 100.
  • the insulating dielectric layer 106 forms a first opening in the first electrode electrical connection area of the first conductive type semiconductor layer 102, and forms a second opening on the surface of the contact electrode 105.
  • a first electrode 107 and a second electrode 108 are respectively formed on the surface of the insulating dielectric layer 106, and the first electrode 107 and the second electrode 108 respectively pass through the first opening and the second opening to contact the electrode 105 It is in contact with the first electrode electrical connection area of the first conductive type semiconductor layer 102.
  • the first electrode 107 and the second electrode 108 include a contact layer and a eutectic layer, and the contact layer and the eutectic layer are made of metal.
  • the minimum horizontal distance between the first electrode 107 and the second electrode 108 on the insulating dielectric layer 106 is preferably 5 microns.
  • the part of the first surface of the transparent substrate 100 covered by the insulating dielectric layer 106 between adjacent semiconductor light-emitting sequences is used as a scribe line, and the width of the scribe line is between 10-50 microns.
  • a laser beam is used to scan from the position of the dotted line of the cutting lane in the figure to form several modified explosion points inside the transparent substrate below the cutting lane.
  • a splitting knife is used to split the transparent substrate 100 along the cutting path, and the modified explosion point formed inside the transparent substrate along the dashed line of the transparent substrate will form a fracture surface to obtain each individual light-emitting diode.
  • Scribe width of 20 microns for example, a broken line in both directions X and Y as a scan path to scan the laser beam inside the substrate to form a plurality of modified burst point, wherein the X-direction as shown in FIG.
  • the laser scanning path at the position of the dashed line deviates from the center position of the cutting track by 5 micrometers to the right, and the laser scanning path at the position of the dashed line in the Y direction deviates from the center position of the cutting track by 5 micrometers upward.
  • the structure shown in FIG. 16 is a light-emitting diode circled in FIG. 14.
  • the second area of the first surface of the transparent substrate 100 that is not covered by the semiconductor light emitting sequence is along the semiconductor
  • the four edges E1, E2, E3, and E4 of the light-emitting sequence have four widths W1, W2, W3, and W4, respectively.
  • W1 is 5 microns
  • W2 the width of W3
  • W4 is 15 micrometers.
  • the electrical contact area of the first electrode is located at the first edge E1 and the second edge E2 of the mesa, and the first edge E1 and the second edge E2 are at the level of the mesa.
  • the side length is lower than the horizontal side length of the mesa at the third edge E3 and the fourth edge E4, and the sidewalls around the mesa at the third edge E3 and the fourth edge E4 are larger than the light emission ratio around the mesa at the edge E1 and the second edge E2, Therefore, by designing the W3 and W4 of the second area of the first surface of the transparent substrate to be smaller, it is possible to effectively reduce the light transmitted by the side walls around the mesa around the third edge E3 and the fourth edge E4 from reaching the second area of the transparent substrate around the mesa.
  • the light reflection or light absorption loss caused by the area promotes the direct radiation of light after being emitted from the side wall, which increases the light output ratio on the side of the second surface of the transparent substrate and improves the brightness.
  • the width of W1 and W3 is less than or equal to 20 microns. Or further, the width of W1 and W3 is less than or equal to 5 microns, and the separation position is away from the center of the dicing lane, and is closer to the semiconductor light-emitting sequence. With the help of the stress generated by the semiconductor light-emitting sequence on the transparent substrate, the efficiency of the split can be improved.
  • the width of W1 is at least 1 micron
  • the width of W3 is at least 1 micron. If W1 and W3 are too small, the stealth laser beam will be too close to the semiconductor light-emitting sequence, which will adversely damage the layer structure of the semiconductor light-emitting sequence.
  • the small-size light-emitting diode provided by the present invention can be widely used in display or backlight packaging or applications, and can particularly meet the high-brightness requirements of backlight products.
  • this embodiment provides a package as shown in FIG. 17, at least one light-emitting diode is mounted on a mounting substrate 30, and the mounting substrate 30 is an insulating substrate, such as a package module substrate for an RGB display screen or a substrate for a backlight display. Module substrate.
  • One surface of the mounting substrate 30 has a first electrode 301 and a second electrode 302 that are electrically isolated.
  • the light emitting diode is located on a surface of the mounting substrate 30, and the first electrode 307 and the second electrode 308 of the light emitting diode are connected to the first electrode 301 and the second electrode 302 through the first coupling portion 303 and the second coupling portion 304, respectively.
  • the first bonding portion 303 and the second bonding portion 304 include but are not limited to solder, such as eutectic solder or reflow solder.
  • the small-sized light-emitting diode package of this embodiment can be widely used in backlight modules and RGB display modules.
  • a backlight module with a small-size direct-light arrangement of light-emitting diodes is adopted.
  • the dynamic contrast of the screen is improved, and a better display effect is obtained.
  • the brightness of the overall backlight module can also be increased.
  • the structure shown in FIG. 18 is an alternative structure of the light-emitting diode shown in FIG. 4 in the first embodiment, and the first electrode electrical connection area on the surface of the first conductive type semiconductor layer extends to the part of the semiconductor light emitting sequence
  • the first edge E1, all the second edges E2, and part of the third edge E3 do not extend to the fourth edge E4.
  • the location of the electrical connection area of the first electrode is suitable for a structure with a large aspect ratio of the side length of the semiconductor light-emitting sequence, so as to facilitate the uniform diffusion of current.
  • the side length of the first edge E1 is greater than the side length E2 of the second edge.
  • the side length of the first edge E1 is greater than three times the side length of the second edge E2.
  • W1+W3 and W2+W4 are between 10-50 microns.
  • W4 is less than or equal to 20 microns, or more preferably, less than or equal to 5 microns; W4 is between 10 and 30 microns.
  • the first electrode contact area is a square area on the surface of the first conductivity type semiconductor layer.
  • RGB modules Due to the limited size of single-chip packaging modules for backlights or display screens made of small-sized light-emitting diodes supported by transparent substrates, it is necessary to use backlight packaging modules or RGB modules for further splicing to obtain RGB display or backlight display backlight light source .
  • This embodiment further provides the following display device for backlight, such as a TV, which includes a backlight light source, the backlight light source includes a back plate, and the back plate adopts a conventional SECC (electrolytic lead zinc-plated steel plate) substrate,
  • a conventional SECC electrolytic lead zinc-plated steel plate
  • an aluminum substrate may be spliced and fixed on the backplane by a plurality of backlight modules shown in FIGS. 19-20.
  • 19 shows a schematic diagram of the structure of a backlight light source obtained by splicing multiple blue light emitting diode modules 30 on a backlight board, which is along the X direction, and the mounting substrate of the two modules includes multiple rows of light emitting diode modules.
  • the edges of the two modules are each arranged with a row of the closest LEDs, and the distance between the two closest rows of LEDs is defined as D1.
  • this embodiment also provides the following package module for backlight display (liquid crystal display).
  • the module includes a mounting substrate 30.
  • the mounting substrate 30 has four sides, respectively On two horizontal and two vertical sides, there are multiple rows and multiple columns of light-emitting diodes mounted on the mounting substrate 30; the light-emitting diodes are all blue light-emitting diodes, and the blue light-emitting diodes are all flip-chip light-emitting diodes, or the multiple
  • the column of light-emitting diodes includes a row of blue light-emitting diodes, a row of red light-emitting diodes, and a row of green light-emitting diodes.
  • the light emitted by the three-color light-emitting diodes can be mixed to form white light.
  • the light-emitting diode mounted on the mounting substrate 30 has the following structural features: a transparent substrate, a semiconductor light-emitting sequence, an insulating dielectric layer, a first electrode and a second electrode; the transparent substrate has a first surface, the first surface including The inner first area and the outer second area; a semiconductor light emitting sequence, including a first conductive semiconductor layer, a light emitting layer, and a second conductive semiconductor layer stacked from the first surface of the transparent substrate, covering the transparent substrate A first area on the first surface; a surface of the first conductive semiconductor layer includes a light-emitting layer, a second conductive semiconductor layer covering area and a first electrode electrical connection area; an insulating dielectric layer covering at least the semiconductor light emitting sequence, and having The first opening and the second opening; the first electrode and the second electrode are respectively electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer through the first opening and the second opening; the first surface of the transparent substrate
  • the second area has four widths around the first edge
  • W1+W3 and W2+W4 are between 10-50 microns.
  • W3 is less than or equal to 20 microns, or more preferably, less than or equal to 5 microns;
  • W1 is between 10 and 30 microns.
  • a row of light emitting diodes closest to the horizontal side of the mounting substrate has a third edge of the semiconductor light emitting sequence parallel to and closest to the one side of the mounting substrate compared to other edges, and W2 is greater than W4.
  • W3 is less than or equal to 20 microns, or more preferably, less than or equal to 5 microns; W1 is between 10 and 30 microns.
  • the light emitting diode may be the light emitting diode shown in FIG. 4 in the first embodiment.
  • the width of W3 and or W4 in the second area on the first surface of the transparent substrate is reduced to reduce the light reaching width to W3
  • the light absorption or light reflection loss of the second area on the first surface of the transparent substrate of W4 improves the light brightness around the third edge side and the fourth edge side of the semiconductor light emitting sequence, and improves the splicing problem.
  • the light-emitting diode may be the light-emitting diode of the second embodiment.
  • the third edge and the fourth edge of the semiconductor light emitting sequence are close to the edge of the mounting substrate, and W1 is greater than W3, and W2 is greater than W4.
  • the light emitting diode on the mounting substrate 30 has a different structure from the light emitting diode shown in FIG.
  • the structure of the light-emitting diode can refer to FIGS. 23-24, including: a transparent substrate 100, a semiconductor light-emitting sequence (102-104), an insulating dielectric layer 106, a first electrode 107 and a second electrode 108, and the first surface of the transparent substrate 100 There are second regions with different widths around the four edges of the semiconductor light emitting sequence on the side.
  • the semiconductor light-emitting sequence has first, second, third, and fourth edges in sequence along a circumferential direction, and the second area where the first surface of the transparent substrate 100 is exposed around the first to fourth edges has different widths W1, W2, W3 and W4, the width of W1+W3 is 10-50 microns, the width of W2+W4 is 10-50 microns, where W1 is greater than W3 or further W2 is greater than W4.
  • the first electrode electrical connection area exposed by the first conductivity type semiconductor layer 102 is formed by opening a hole on the surface of the second conductivity type semiconductor layer 104 to expose a portion of the first conductivity type semiconductor layer 102 Moreover, the positional relationship between the first electrode electrical connection area and the first edge and the second edge of the semiconductor light-emitting sequence does not need to be defined.
  • the insulating dielectric layer 106 covers the inner sidewall of the opening, and the insulating dielectric layer 106 has a first opening that exposes the surface of the first conductivity type semiconductor layer 102 at the bottom of the opening.
  • the first electrode 107 is connected to the first opening of the insulating dielectric layer 106.
  • the first conductivity type semiconductor layer 102 is in contact.
  • each module is an RGB module for display screens, including a mounting substrate 30 and a mounting substrate mounted on the mounting substrate.
  • the diodes are all flip-chip light-emitting diodes, and at the same time, every three three-color light-emitting diodes are adjacent, and the three-color light can be mixed to form white light and form a pixel.

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Abstract

本发明提供如下发光二极管，其包括透明衬底，透明衬底的第一表面包括半导体发光序列覆盖的第一区域以及第二区域；半导体发光序列包括第一导电型半导体层、发光层以及第二导电类型半导体层，第一导电型半导体层一表面具有发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；绝缘介质层，覆盖半导体发光序列，并且具有第一开口和第二开口；半导体发光序列的周边沿着一环绕方向依次包括为第一、第二、第三和第四边缘；所述透明衬底第一表面的第二区域在半导体发光序列的第一、第二、第三和第四边缘周围分别具有W1、W2、W3和W4四个宽度；第一电极电连接区域位于部分的第一边缘以及部分的第二边缘，W1大于W3。

Description

一种发光二极管 技术领域
本发明涉及一种小型发光二极管。
背景技术
随着LED发光二极管成本的下降和技术的进步，再加上最近LED照明行业增长乏力，国内外LED发光二极管和封装巨头纷纷开始寻找新的市场增长点，小尺寸的LED作为市场前景广阔的新技术，近两年尤其受关注，其中100微米以下尺寸的无透明衬底支撑的LED目前因为存在技术路线不确定和成本较高的原因，短时间内难以大规模商业化，而有透明衬底支撑的小尺寸LED作为小间距LED产品的延伸和100微米以下尺寸的无基板的LED的前奏，已经开始在LCD背光和RGB显示产品开始出货，例如已经量产出货的P0.9的有透明衬底如蓝宝石支撑的小尺寸LED因为所使用的发光二极管、设备、制程均是承接至小间距LED显示屏，因此有效保证产品的高性价比和量产可行性。
其中一种有透明衬底支撑的小尺寸LED的结构如图1所示，为一小尺寸倒装LED的结构，包括透明衬底100、透明衬底100的第一表面上承载半导体发光序列(102、103、104)以及半导体发光序列周围的衬底露出的一定宽度的边缘，衬底第一表面露出的一定宽度的边缘用于激光隐切和切割，图2示出了平面示意图，边缘的具有个宽度：W1、W2、W3、W4，通常W1＝W2＝W3＝W4。透明衬底100露出的边缘以及半导体发光序列的表面会覆盖一层绝缘介质层。然而，受限于目前隐切工艺以及劈裂工艺所需的切割道宽度，至少为10微米。随着LED发光二极管的尺寸缩小，透明衬底在发光半导体序列周围露出的边缘区域的面积占比会相对较大，衬底露出的边缘形成的光吸收面积(绝缘层吸收光)或光反射区域面积(绝缘介质层为反射层的情况)占比也会相应较大，导致半导体发光序列侧壁发出的光到达衬底的第一表面亮度损失严重。
发明概述
技术问题
问题的解决方案
技术解决方案
基于本发明的目的，提供如下具有小发光面积，发光亮度提升的第一种发光二极管，其包括：透明衬底、半导体发光序列、绝缘介质层、第一电极和第二电极；
透明衬底，具有第一表面，所述第一表面包括内部的第一区域以及外围的第二区域；
半导体发光序列，包括自透明衬底的第一表面堆叠的第一导电型半导体层、发光层和第二导电型半导体层，覆盖所述透明衬底第一表面第一区域；
第一导电型半导体层的一表面包括：发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；
绝缘介质层，至少覆盖所述半导体发光序列，并且具有第一开口和第二开口；
第一电极和第二电极，分别通过第一开口和第二开口电连接第一导电型半导体层以及第二导电型半导体层；
自第二导电型半导体层俯视，半导体发光序列的周边沿着一环绕方向依次包括为第一边缘、第二边缘、第三边缘和第四边缘；
所述透明衬底第一表面的第二区域在所述半导体发光序列的第一边缘、第二边缘、第三边缘和第四边缘周围分别具有四个宽度，定义为W1、W2、W3和W4；
其特征在于：所述第一导电型半导体层的第一电极电连接区域位于部分的第一边缘以及至少部分的第二边缘，W1大于W3。
优选地，所述W1+W3为10～50微米，所述W2+W4为10～50微米。
优选地，所述半导体发光序列的第一边缘的边长大于等于第二边缘的边长。
优选地，所述的W1为10～30微米。
优选地，所述W3介于0～5或5～20微米之间。
优选地，所述的W1∶W3为(2～40)∶1。
优选地，所述第一导电型半导体层的第一电极电连接区域位于部分的第一边缘以及部分的第二边缘，未位于所述第三边缘和所述第四边缘，W1大于W3且W2大于等于W4。
更优选地，所述的W2为10～30微米。
更优选地，所述W4介于0～5或5～20微米之间。
更优选地，所述的W2∶W4为(2～40)∶1。
本发明同时提供如下具有小发光面积，发光亮度提升的第二种发光二极管，其包括：透明衬底、半导体发光序列、绝缘介质层、第一电极和第二电极；
透明衬底，具有第一表面，所述第一表面包括内部的第一区域以及外围的第二区域；
半导体发光序列，包括自透明衬底的第一表面堆叠的第一导电型半导体层、发光层和第二导电型半导体层，覆盖所述透明衬底第一表面第一区域；
第一导电型半导体层的一表面包括发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；
绝缘介质层，至少覆盖所述半导体发光序列，并且具有第一开口和第二开口；
第一电极和第二电极，分别通过第一开口和第二开口电连接第一导电型半导体层以及第二导电型半导体层；
自第二导电型半导体层俯视，半导体发光序列的周边沿着一环绕方向依次包括为第一边缘、第二边缘、第三边缘和第四边缘；
所述透明衬底第一表面的第二区域在所述半导体发光序列的第一边缘、第二边缘、第三边缘和第四边缘周围分别具有四个宽度，定义为W1、W2、W3和W4；
其特征在于：所述第一导电型半导体层的第一电极电连接区域位于第一边缘、全部第二边缘以及部分的第三边缘，W2大于W4。
优选地，W1大于等于W3，W2大于W4。
优选地，所述的半导体发光序列的第一边缘的边长大于等于第二边缘的边长。
优选地，所述的W2为10～30微米。
优选地，所述W4介于0～5或5～20微米之间。
优选地，所述的W1为10～30微米。
优选地，所述的W2∶W4为(2～40)∶1。
更优选地，第一种或第二种发光二极管具备如下至少之一的特征：
所述的透明衬底的第一表面的第一区域与透明衬底的第一表面的面积的比例为 40％～90％。
所述的透明衬底的第一表面的边缘的边长介于200～300微米或100～200微米或40～100微米。
所述的透明衬底包括第二表面，与第一表面相对，第二表面为主要出光面。
所述的绝缘介质层包括多层绝缘介质层或一单层绝缘介质层，多层绝缘介质层优选的为DBR层或所述的单层的绝缘介质层的厚度为2微米以上。
所述的绝缘介质层覆盖在半导体发光序列的顶表面的厚度不同于覆盖在半导体发光序列的侧壁的厚度。
所述的绝缘介质层覆盖在半导体发光序列的侧壁的厚度为覆盖在半导体发光序列的顶表面的厚度的40～90％。
所述的第二导电型半导体层的表面还包括透明电极层。
所述的半导体发光序列直接生长在透明衬底的第一表面，或者通过透明键合层键合在透明衬底的第一表面。
绝缘介质层覆盖所述至少部分透明衬底第一表面的第二区域。
本发明同时提供一种发光二极管封装体，包括安装基板和安装在所述安装基板上的至少一个发光二极管，其特征在于，所述发光二极管至少一个或多个或全部为前述的第一种或第二种发光二极管。
本发明同时提供如下一种发光二极管模组，包括安装基板和安装在所述安装基板上的多行和多列发光二极管，其特征在于，所述发光二极管至少一个或多个或全部为前述第一种或第二种发光二极管。
本发明同时提供提供如下一种发光二极管模组，包括安装基板和安装在所述安装基板上的多个发光二极管，其特征在于，多个发光二极管为多行和多列，每一个发光二极管包括：透明衬底、半导体发光序列、绝缘介质层、第一电极和第二电极；
透明衬底，具有第一表面，所述第一表面包括内部的第一区域以及外围的第二区域；
半导体发光序列，包括自透明衬底的第一表面堆叠的第一导电型半导体层、发光层和第二导电型半导体层，覆盖所述透明衬底第一表面第一区域；
第一导电型半导体层的一表面包括发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；
绝缘介质层，至少覆盖所述半导体发光序列，并且具有第一开口和第二开口；
第一电极和第二电极，分别通过第一开口和第二开口电连接第一导电型半导体层以及第二导电型半导体层；
所述透明衬底第一表面的第二区域在所述半导体发光序列的第一边缘、第二边缘、第三边缘和第四边缘周围分别具有四个宽度，定义为W1、W2、W3和W4；
其特征在于：最靠近安装基板的一边侧的一列的发光二极管具有半导体发光序列的第三边缘平行于且相较于其它边缘最靠近于安装基板的所述一边侧，且W1大于W3。
优选地，最靠近安装基板的另一边侧的一行的发光二极管具有半导体发光序列的第四边缘平行于且相较于其它边缘最靠近于安装基板的所述另一边侧，且W2大于W4。
优选地，所述W1+W3为10～50微米，所述W2+W4为10～50微米。
优选地，所述的W1为10～30微米，所述的W3介于0～5或5～20微米之间。
优选地，所述的W1∶W3为(2～40)∶1。
优选地，所述的W2为10～30微米，所述W4介于0～5或5～20微米之间。
优选地，所述的W2∶W4为(2～40)∶1。
优选地，所述的半导体发光序列的第一边缘的边长大于等于第二边缘的边长。
优选地，所述多列发光二极管至少包括一列红光发光二极管、一列绿光发光二极管和一列蓝光发光二极管。
优选地，所述的多行以及多列发光二极管都是蓝光发光二极管。
优选地，所述的安装基板上包括两水平边侧和两纵向边侧，发光二极管沿着所述的安装基板的水平边侧排列为多行，沿着所述的安装基板的纵向边侧排列为多列；第一列的发光二极管和最后一列发光二极管分别以半导体发光序列的第三边缘最靠近且平行于所述安装基板的两水平边侧，第一行的发光二极管和最后一行发光二极管分别以半导体发光序列的第四边缘最靠近且平行于所述安装基板的两纵向边侧排列。
本发明同时提供如下一种RGB显示装置，其特征在于：包括前述的发光二极管模组拼接在一起。
本发明同时提供如下一种背光显示屏，其特征在于：包括前述的发光二极管模组拼接在一起形成背光光源。
发明的有益效果
有益效果
本发明将通过实施例进行详细说明本发明的有益效果。
对附图的简要说明
附图说明
附图1为背景技术中提到的发光二极管的剖面示意图；
附图2为背景技术中提到的发光二极管的平面示意图；
附图3～4为实施例一中所提及的发光二极管的结构示意图，图3为平面示意图，图4为沿着图3的平面示意图上虚线位置获得的剖面示意图。
附图5为发光二极管的发光半导体序列覆盖在透明衬底的第一表面的水平截面面积占比与发光二极管的透明衬底的第一表面水平截面面积关系曲线图。
附图6～16为实施例二中所提及的发光二极管的制作工艺流程的结构示意图。其中，图7为图8所示平面图沿着虚线位置纵向的剖面图；图9为图10所示的平面图沿着虚线位置纵向的剖面图；其中图13为平面示意图，图12为图13中虚线获得的剖面示意图。图15为图14中任意两个半导体发光序列支撑在未分离的透明衬底上的剖面结构示意图。图16为图14中圈中的一个半导体发光序列支撑在已经分离的单独的透明衬底上的剖面示意图。
附图17为封装结构示意图。
附图18为实施例二中所提及的发光二极管的平面结构示意图。
附图19为实施例三中所提及的背光显示屏。
附图20～22为实施例三中所提及的背光显示屏用的封装模组拼接在背光板上的平面示意图。
附图23～24为施例三中所提及的发光二极管平面图以及剖面示意图。
附图标记：
10                    发光二极管
100                   透明衬底
102                   第一导电型半导体层
103                   发光层
104                   第二导电型半导体层
105                   接触电极层
106                   绝缘介质层
107                   第一电极
108                   第二电极
E1                    第一边缘
E2                    第二边缘
E3                    第三边缘
E4                    第四边缘
W1、W2、W3、W4        宽度
1061                  第一开口
1062                  第二开口
30                    安装基板
301                   第一电极
302                   第二电极
303                   第一结合部
304                   第二结合部
发明实施例
本发明的实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。
在本发明的下述实施例中，涉及到表示方位的词，例如，“上”、“下”、“左”、“右”、“水平”、“垂直”等，仅仅是为了使本领域技术人员更好地理解本发明，而不能被理解为限定本发明。
实施例一
本发明提供如下一种具有小发光面积，发光亮度提升的发光二极管10，如图3所示的剖面示意图，其包括如下堆叠层：透明衬底100、半导体发光序列、绝缘介质层106、第一电极107和第二电极108。
下面针对各结构堆叠层进行详细描述。
其中，如图3所示，透明衬底100可为绝缘性基板或导电性基板。透明衬底100可为使半导体发光序列生长的生长基板，如蓝宝石基板，也可以是半导体发光序列透明键合层键合在透明基板100上。透明衬底100包括第一表面、第二表面以及侧壁，其中第一表面和第二表面相对，透明衬底100包括至少形成在第一表面的至少一部分区域的多个突起。例如，透明衬底100可以为经图案化的蓝宝石基板。
发光二极管可为具有较小的水平面积的小型发光二极管，发光二极管的尺寸可以通过透明衬底的第一表面的尺寸反映，例如透明衬底100的第一表面的边长尺寸优选地小于等于300微米，较佳地，介于100～300微米之间，或者100～200微米，或为100微米以下更小的尺寸，优选的介于40微米～100微米之间。透明衬底第一表面的水平面积(水平截面面积)为90000平方微米以下，或者较小的如10000平方微米以上50000微米以下，或者10000平方微米以下，2000平方微米以上(例如40微米*60微米)。所述的透明衬底100的厚度介于40～150微米之间，较厚的情况为80～150微米，较薄的情况为40微米～80微米。半导体发光序列的厚度介于1～10微米之间。本实施例的发光二极管具有上述水平面积及厚度，因此所述发光二极管可容易地应用到要求小型和或薄型发光装置的各种电子装置。
所述透明衬底100第一表面部分区域被半导体发光序列覆盖，因此透明衬底100第一表面被划分为内部被半导体发光序列覆盖的第一区域和半导体发光序列周围的第二区域。发光二极管因为制造过程中为衬底分离工艺如激光隐切以及劈裂预留了一定宽度的切割道，切割道经过分离工艺处理后形成发光半导体序列 周围的透明衬底100的第一表面第二区域。切割道的宽度至少10微米，至多50微米。
透明衬底100的第二表面为发光二极管的出光面，且为主要出光区域。
透明衬底100的第一表面的第二区域未被半导体发光序列覆盖，即在半导体发光元件制作过程中，半导体发光序列在衬底经过分离之前就已经在衬底表面进行分离，露出透明衬底100的第一表面的第二区域，可以降低半导体发光序列在衬底上产生的应力，从而可以促进发光二极管在制造过程中的弯曲减少，防止半导体发光序列受损，提高制作良率。
如图5所示，自第二导电型半导体层俯视，所述的半导体发光序列的覆盖的第一区域小于透明衬底100的第一表面的水平面积。优选的，所述的透明衬底100的第一表面的第一区域的水平截面面积占据透明衬底的第一表面的水平截面面积比例为40％～90％。随着尺寸变小，半导体发光序列的面积占比也相应变小。例如当发光二极管的水平面积即衬底的第一表面的面积为28000平方微米，半导体发光序列的覆盖面积比为86％左右，半导体发光序列周围的衬底的第一表面的第二区域面积占比为14％。
半导体发光序列包括第一导电型半导体层102、发光层103及第二导电型半导体层104，具体的半导体发光序列可包括III-V型氮化物类半导体，例如可包括如(Al、Ga、In)N的氮化物类半导体或者包括(Al、Ga、In)P的磷化物半导体或者(Al、Ga、In)As的砷化物类半导体。第一导电型半导体层102可包括n型杂质(例如，Si、Ge、Sn)，第二导电型半导体层104可包括p型杂质(例如，Mg、Sr、Ba)。并且，上述杂质类型也可以相反。发光层103可包括多量子阱构造(MQW)，可调节半导体的元素组成比，以便射出所期望的波长。在本实施例中，第二导电型半导体层104可为p型半导体层。
如图4所示，第一导电型半导体层102的第一表面被划分为台面201覆盖的区域和第一电极电连接区域。台面201包括发光层103和发光层103上的第二导电型半导体层104组合。
第一电极电连接区域表面未被台面覆盖，用于第一电极106电连接第一导电型半导体层102，实际的第一电极107在第一导电型半导体层102表面形成的电连接 区域面积可小于等于工艺上为位置该电连接区域而暴露的第一导电型半导体层102表面的区域面积。
为了在第二电极108与第二导电型半导体层104之间的电性连接，一接触电极105位于第二导电型半导体层104上。接触电极105可与第二导电型半导体层104欧姆接触。接触电极105可包括透明导电层。透明导电层例如还可包括如氧化铟锡、氧化锌、氧化锌铟锡、氧化铟锌、氧化锌锡、氧化镓铟锡、氧化铟镓、氧化锌镓、铝掺杂氧化锌、氟掺杂氧化锡等的透光性导电氧化物、及如Ni/Au等的透光性金属层中的至少一种。所述导电性氧化物还可包括各种掺杂剂。优选地，接触电极105的厚度是50～300纳米。所述的接触电极105与第二导电型半导体层104的表面接触电阻优选地低于金属电极在第二导电型半导体层104的表面接触电阻，因此可以降低顺向电压(Vf)，提高发光效率。
绝缘介质层106覆盖所述半导体发光序列的顶表面和侧壁以及所述透明衬底100第一表面的第二区域。具体的，当存在接触电极105时，接触电极105以及未被接触电极105覆盖的半导体发光序列的顶表面和侧壁均被绝缘介质层106覆盖。并且绝缘介质层106可进一步至少部分或完全覆盖在透明衬底的第一表面露出的第二区域，可以保证其更稳定的覆盖在半导体发光序列的侧壁，同时防止水汽进入半导体发光序列的周围，降低漏电风险。
优选地，绝缘介质层106为绝缘反射层，覆盖半导体发光序列的顶表面和侧壁，当发光层辐射的光通过接触电极105到达绝缘介质层106的表面时，可通过绝缘介质层106反射大部分的光返回至半导体发光序列中，并且大部分穿过透明衬底的第二表面侧出光，减少光从半导体发光序列表面以及侧壁穿出导致光损失。优选地，绝缘介质层106能够对所述发光层辐射的光到达其表面的至少80％或者进一步的至少90％比例的光强进行反射。绝缘介质层106具体的可包括布拉格反射器。所述布拉格反射器能够以折射率不同的至少两种绝缘介质重复堆叠的方式形成，可形成为4对至20对，例如所述绝缘介质层可包括TiO 2、SiO 2、HfO 2、ZrO 2、Nb 2O 5、MgF 2等。在一些实施例中，绝缘介质层106可呈交替地沉积TiO 2层/SiO 2层。
布拉格反射器的每一层可具有发光层辐射波段的峰值波长的1/4的光学厚度。 布拉格反射器的最上部层可由SiNx形成。由SiNx形成的层的防湿性优异，可保护发光二极管免受湿气的影响。
绝缘介质层106包括布拉格反射器的情况下，绝缘介质层106的最下部层可具有提高分布布拉格反射器的膜质量的底层或界面层。例如，绝缘介质层106可包括约0.2～1.0微米厚度的由SiO 2形成的界面层及在界面层上按照特定周期堆叠层TiO 2/SiO 2。
绝缘介质层106也可以仅仅是单独的一层绝缘介质层，优选地，反射率通常会低于布拉格反射层，至少40％的光从该绝缘介质层106射出，优选地，至少1微米或更优选地为2微米以上的厚度，如SiO 2，具有防湿性优异，可保护发光二极管免受湿气的影响。
绝缘介质层106具有至少一个第一开口1061和一个第二开口1062，第一电极107和第二电极108形成在绝缘介质层106的表面。第一电极107通过第一开口1061在第一导电型半导体层102的第一电极电接触区域接触形成电性连接，第二电极108通过第二开口1062与第二导电型半导体层102表面的接触电极105接触形成电连接。接触电极105也可以具有一个开口，第二电极108可部分通过接触电极105的所述一个开口与第二导电型半导体层104的表面形成接触。优选的，第二电极108与第二导电型半导体层104之间的电阻高于接触电极105与第二导电型半导体层104的电阻，以尽量减少电流直接在第二电极与第二导电型半导体层104接触的位置拥挤。
如图4所示，自半导体发光序列的顶表面俯视，半导体发光序列的周边沿着一环绕方向依次包括第一边缘E1、第二边缘E2、第三边缘E3和第四边缘E4。
透明衬底100的第一表面的第二区域在半导体发光序列的第一边缘E1、第二边缘E2、第三边缘E3以及第四边缘E4周围分别具有四个宽度，定义为W1、W2、W3和W4，此处的宽度定义为水平宽度。优选地，第一边缘E1大于等于第二边缘E2的边长，第三边缘E3大于等于第四边缘E4的边长。
根据现有的发光二极管的制作工艺，透明衬底的分离通常采用隐切加劈裂工艺，W1+W3、W2+W4即在透明衬底分离之前相邻半导体发光序列之间的暴露的透明衬底第一表面的切割道的宽度，并且W1+W3以及W2+W4介于10～50微米。
针对小尺寸的发光二极管，为获得第一电极接触区域而需要蚀刻第二导电型半导体层以及发光层以露出部分第一导电型半导体层表面，其中台面形成工艺比开孔工艺获得的发光区域面占比会更大，可提升发光区域面积占比，提高发光亮度。因此本发明将第一电极电连接区域形成在半导体发光序列的边缘位置而非半导体发光序列堆叠层的中间位置，并形成发光层以及第二导电型半导体层组合而成的台面的发光区域。
第一导电型半导体层102的第一电极电连接区域设置为位于部分的第一边缘E1和至少部分的第二边缘E2，即第一电极电连接位置设置在半导体发光序列的边缘位置，可有利于电流在第一电极以及第二电极之间的扩散分布。
作为一个实施例方式，如图4所示，所述第一导电型半导体层102的第一电极电连接区域为一暴露区域，并且仅位于部分第一边缘E1和部分第二边缘E2。即第一导电型半导体层的第一电极电连接区域未延伸至所述第三边缘和第四边缘。
作为一个优选的实施方式，所述的台面为一个。
针对如图4所示的透明衬底支撑的小尺寸发光二极管，由于台面形成的发光区域面积占比较小，台面周围的衬底的第一表面的第二区域占比相对较大，为了降低从台面周围侧壁辐射出去的光到达衬底第一表面的第二区域上因为吸光或反射而造成的光损失，本实施例提供如下改进：透明衬底的第一表面的第二区域沿着半导体发光序列周围的四个边缘具有如下的宽度关系：W1大于W3和或W2大于W4，通过降低W3和或W4的宽度，缩小台面周围的透明衬底的第一表面的第二区域的面积占比，光从台面周围侧壁穿过绝缘介质层到达透明衬底的第一表面的第二区域后发生吸光或反射的比例会降低，直接出光的比例会上升，从而达到透明衬底的第二表面侧的出光亮度提升的目的。
作为一个优选的实施方式，根据目前激光隐切工艺所需的切割道大小，W1或W2大于等于10微米，更优选地，介于10～30微米。
作为一个优选的实施方式，W2或W4小于等于20微米，或者进一步的优选小于等于5微米。
作为一个优选的实施方式，第一边缘周围透明衬底第一表面的第二区域的宽度与第三边缘周围透明衬底第一表面的第二区域的宽度的比值为2～40倍，例如2～1 0倍，或者10～20倍，或者20～40倍。
作为一个优选的实施方式，第二边缘周围透明衬底第一表面的第二区域的宽度与第四边缘周围透明衬底第一表面的第二区域的宽度的比值为2～10倍，或者10～40倍，或者10～20倍，或者20～40倍。
下面对本实施例的发光二极管的制作工艺进行详细说明。
如图6所示，透明衬底100第一表面包括依次堆叠的第一导电型半导体层102、发光层103和第二导电型半导体层104。
接触电极105为ITO，覆盖在第二导电型半导体层104的表面。
如图7～8所示，通过一次光罩或两次光罩形成掩膜，蚀刻部分接触电极105以及部分第二导电型半导体层104、发光层103，露出部分第一导电类型半导体层102并形成数个台面，数个台面包括发光层103和第二导电型半导体层104以及接触电极105。
如8～9所示，通过一次光罩形成掩膜，沿着相邻台面之间的第一导电型半导体层102进行蚀刻露出透明衬底100的部分第一表面，形成多个独立的半导体发光序列。围绕每一半导体发光序列透明衬底100露出的第一表面形成切割道区域，并且每一半导体发光序列包括沿着一个环绕方向定义四个不同方向的边缘，即第一边缘E1、第二边缘E2、第三边缘E3和第四边缘E4。
每一半导体发光序列的第一导电类型半导体层包括第一表面和相对的第二表面，第一表面包括一台面覆盖区域和第一电极电连接区域。第一电极电连接区域位于半导体发光序列的部分第一边缘E1和部分第二边缘E2。
如图11所示，镀绝缘介质层106覆盖在接触电极105以及暴露的半导体发光序列的表面、侧壁以及覆盖在透明衬底100的第一表面的第二区域。现有的镀膜工艺，如蒸镀或溅射镀膜，由于阴影效应导致绝缘介质层106通常在半导体发光序列的侧壁厚度会低于半导体发光序列的顶表面以及透明衬底的第一表面的第二区域，导致半导体发光序列的侧壁上的厚度为半导体序列的顶表面的厚度的40～90％。
若绝缘介质层106为绝缘反射层，因为厚度的差异容易导致在半导体发光序列的侧壁的反射率会低于半导体序列的顶表面的反射率，发光层辐射的光从台面 的侧壁容易透射出，到达透明衬底的第一表面第二区域，发生反射，导致透明衬底100的第二表面的出光亮度损失。
绝缘介质层106在第一导电型半导体层102的第一电极电连接区域制作第一开口，在接触电极105的表面制作第二开口。
如图12～13所示，在绝缘介质层106的表面分别制作第一电极107和第二电极108，第一电极107和第二电极108分别通过该第一开口和第二开口与接触电极105和第一导电型半导体层102的第一电极电连接区域接触。第一电极107和第二电极108包括接触层和共晶层，并且接触层和共晶层为金属材质。第一电极107和第二电极108在绝缘介质层106上的最小水平间距优选地为5微米。
如图13～14所示，相邻半导体发光序列之间的被绝缘介质层106覆盖的透明衬底100的第一表面的部分作为切割道，切割道的宽度为10～50微米之间。在切割道上，通过激光光束从图中切割道的虚线位置进行扫描，以在切割道下方透明衬底的内部形成数个改质爆点。采用劈裂刀沿着切割道对透明衬底100进行劈裂，透明衬底沿图中虚线下方的透明衬底内部形成的改质爆点将形成断裂面以获得每一个独立发光二极管。
以切割道的宽度为20微米为例，以X和Y两个方向的虚线作为扫描路径激光光束进行扫描以在衬底内部形成多个改质爆点，其中如图中所示的 X方向的虚线位置处的激光扫描路径向右偏离切割道的中心位置5微米， Y方向的虚线位置处的激光扫描路径则向上偏离切割道的中心位置5微米。
如图16所示的结构为图14中圈出的一颗的发光二极管，通过控制激光光束扫描的位置，使透明衬底100的第一表面未被半导体发光序列覆盖的第二区域沿着半导体发光序列的四个边缘E1、E2、E3、E4分别具有四个宽度W1、W2、W3和W4，以切割道的宽度为20微米为例，以W1的宽度为5微米为例，W2的宽度为15微米，以W3的宽度为5微米为例，W4的宽度为15微米。通过上述设计，由于自第二导电型半导体层104一侧俯视，第一电极的电接触区域位于台面的第一边缘E1以及第二边缘E2，第一边缘E1以及第二边缘E2的台面的水平边长低于第三边缘E3以及第四边缘E4的台面的水平边长，在第三边缘E3以及第四边缘E4的台面周围侧壁大于边缘E1以及第二边缘E2的台面周围的出光比例，因此通过设计透明衬 底的第一表面第二区域的W3和W4更小，可以有效降低第三边缘E3以及第四边缘E4的台面周围侧壁透过的光到达台面周围透明衬底的第二区域造成的光反射或光吸收损失，促进光从侧壁射出后直接辐射出去，提升透明衬底的第二表面一侧的出光比例，提升亮度。
优选的，W1和W3的宽度小于等于20微米。或者进一步的W1和W3的宽度小于等于5微米，分离位置偏离切割道中心，距离半导体发光序列更近，借助半导体发光序列在透明衬底上产生的应力，可提升裂片的效率。W1的宽度至少为1微米，W3的宽度至少为1微米，若W1以及W3过小，隐切激光光束将过于靠近半导体发光序列，将不利地破坏半导体发光序列的层结构。
本发明提供的小尺寸发光二极管可以广泛运用于显示或背光的封装体或应用上，特别可以满足背光产品的高亮度需求。
具体地，本实施例提供如图17所示的封装体，至少一个发光二极管安装到安装基板30上，安装基板30为绝缘性基板，如RGB显示屏用的封装模组基板或背光显示用的模组基板，安装基板30的一表面具有电隔离的第一电极301和第二电极302。发光二极管位于安装基板30的一表面上，发光二极管的第一电极307和第二电极308分别通过第一结合部303和第二结合部304与第一电极301和第二电极302连接。第一结合部303和第二结合部304包括但不限于是焊料，如共晶焊或回流焊料。
本实施例的小尺寸的发光二极管的封装体可以广泛运用于背光用的模组和RGB显示的模组。例如目前为在LCD显示器上为实现高动态范围图像(High-Dynamic Range，HDR)的显示效果，采用小尺寸的发光二极管直下式排列方式的背光模组。通过控制背光模组单个位置的点亮和关闭，以提高屏幕的动态对比度，得到更好的显示效果。同时通过提升单个发光二极管的亮度，也可以提升整体背光模组的亮度。
实施例二
如图18所示的结构，为实施例一中图4所示发光二极管的一个替代性的结构，所述的第一导电型半导体层表面的第一电极电连接区域延伸至半导体发光序列的部分第一边缘E1、全部第二边缘E2以及部分第三边缘E3，未延伸至第四边缘E 4。该第一电极的电连接区域的设置位置适用于半导体发光序列的边长的长宽比值较大的结构，以利于电流的均匀扩散。其中第一边缘E1的边长大于第二边缘的边长E2，较佳的，第一边缘E1的边长大于第二边缘E2的边长的三倍。半导体发光序列的第二边缘E2周围的透明衬底的第一表面第二区域的宽度W2大于第四边缘E4周围的宽度W4。通过此设计，可以有效降低光从半导体发光序列第四边缘所对应的台面侧壁射出的光达到衬底的第一表面第二区域表面后被反射或吸收导致的损失。优选地，W1+W3以及W2+W4介于10～50微米。较佳的，W4小于等于20微米，或者更佳地，小于等于5微米；W4介于10～30微米。
较佳的，所述的第一电极接触区域在第一导电型半导体层的表面为一个方形区域，W2与W4的关系并无需特别限定，W2可大于等于W4或W2小于W4；或者更优选地，W2＝W4。
实施例三
由于目前小尺寸有透明衬底支撑的发光二极管制作的背光用或显屏用单片封装模组尺寸有限，需要采用背光用封装模组或RGB模组进一步拼接获得RGB显示屏或背光显示背光光源。
本实施例进一步提供如下一种背光用的显示装置，例如电视，其包括背光光源，背光光源包括背板，背板采用常规的SECC(电解亚铅镀锌钢板)材质基板，
或者用铝基板，由前述的图19～20所示的多个背光模组拼接固定在背板上。图19所示的是多片蓝光发光二极管模组30拼接在背光板上获得的背光光源的结构示意图，其沿着 X方向，两片模组的安装基板上包括多列发光二极管的模组，沿着 X方向进行拼接时，两片模组的边缘各排列有一列最临近的发光二极管，最临近的两列发光二极管之间的间距定义为D1。由于安装基板边缘之间存在的间隙导致两片模组在相邻边侧拼接时，D1与一片模组内的两相邻两列的发光二极管之间的间距W1，通常是前者大于后者，容易出现拼接暗线的问题。对于RGB模组拼接为显示屏时，也存在同样的问题。
作为一个实施方式，本实施例同时提供如下一种背光显示(液晶显示)用的封装模组，如图19所示，模组包括安装基板30所述安装基板30具有四个边侧，分别为两水平和两垂直边侧，安装在所述安装基板30上的发光二极管多行以及多 列；所述发光二极管均为蓝光发光二极管，蓝光发光二极管均采用倒装发光二极管，或者所述的多列发光二极管中包括一行蓝光发光二极管、一行红光发光二极管以及一行绿光二极管，三色发光二极管的发光可混合形成白光。
安装在安装基板30上的发光二极管具有如下的结构特征：透明衬底、半导体发光序列、绝缘介质层、第一电极和第二电极；透明衬底，具有第一表面，所述第一表面包括内部的第一区域以及外围的第二区域；半导体发光序列，包括自透明衬底的第一表面堆叠的第一导电型半导体层、发光层和第二导电型半导体层，覆盖所述透明衬底第一表面第一区域；第一导电型半导体层的一表面包括发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；绝缘介质层，至少覆盖所述半导体发光序列，并且具有第一开口和第二开口；第一电极和第二电极，分别通过第一开口和第二开口电连接第一导电型半导体层以及第二导电型半导体层；所述透明衬底第一表面的第二区域在所述半导体发光序列的第一边缘、第二边缘、第三边缘和第四边缘周围分别具有四个宽度，定义为W1、W2、W3和W4；最靠近安装基板的纵向边侧的一列的发光二极管具有半导体发光序列的第三边缘平行于且相较于其它边缘最靠近于安装基板的所述一边侧，且W1大于W3。其中，W1+W3以及W2+W4介于10～50微米。较佳的，W3小于等于20微米，或者更佳地，小于等于5微米；W1介于10～30微米。
或者进一步的，最靠近安装基板的水平边侧的一行的发光二极管具有半导体发光序列的第三边缘平行于且相较于其它边缘最靠近于安装基板的所述一边侧，且W2大于W4。较佳的，W3小于等于20微米，或者更佳地，小于等于5微米；W1介于10～30微米。
如图20所示，发光二极管可以是实施例一中图4所示的发光二极管。以半导体发光序列的第三边缘以及第四边缘靠近安装基板的水平边侧以及纵向边侧，通过将透明衬底第一表面第二区域的W3和或W4的宽度缩小，降低光到达宽度为W3和W4的透明衬底的第一表面第二区域的光吸收或光反射损失，提升半导体发光序列的第三边缘侧和第四边缘侧侧面周围的光亮度，改善拼接问题。
或者如图21所示，发光二极管可以是实施例二的发光二极管。以半导体发光序列的第三边缘以及第四边缘靠近安装基板的边缘，并且W1大于W3，W2大于W4 。
或者如图22所示，所述的安装基板30上的发光二极管具有不同于图4所示的发光二极管的结构。发光二极管的结构可参考图23～24，包括：透明衬底100、半导体发光序列(102～104)、绝缘介质层106、第一电极107和第二电极108，透明衬底100的第一表面侧的半导体发光序列四个边缘周围具有不同宽度的第二区域。半导体发光序列周围沿着一个环绕方向依次具有第一、第二、第三、第四边缘，第一至第四边缘周围露出透明衬底100第一表面的第二区域具有不同的宽度为W1、W2、W3和W4，W1+W3的宽度是10～50微米，W2+W4的宽度是10～50微米，其中W1大于W3或者进一步的W2大于W4。不同于图4所示的发光二极管的特征在于：第一导电型半导体层102露出的第一电极电连接区域为自第二导电类型半导体层104表面开孔暴露部分第一导电型半导体层102形成，且第一电极电连接区域与半导体发光序列的第一边缘、第二边缘并无需限定位置关系。绝缘介质层106覆盖在开孔的内侧壁，并且绝缘介质层106具有第一开口暴露开孔的底部第一导电型半导体层102的表面，第一电极107通过绝缘介质层106的第一开口与第一导电型半导体层102接触。
为解决RGB显示屏拼接暗线的问题，为一个替代性的实施方式，如图19～22所示的每一片模组为显示屏用的RGB模组，包括安装基板30和安装在所述安装基板30上的至少三列发光二极管；所述至少三列发光二极管至少包括一列红光发光二极管R、一列绿光发光二极管G和一列蓝光发光二极管B，红光发光二极管、绿光发光二极管和蓝光发光二极管均采用倒装发光二极管，同时每三个三色的发光二极管相邻，三色发光可混合形成白光，并构成一个像素。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明，本领域技术人员可以在不脱离本发明的精神和范围的情况下作出各种修改和变型，这样的修改和变型均落入由所附权利要求所限定的范围之内。

Claims (42)

  1. 一种发光二极管，其包括：透明衬底、半导体发光序列、绝缘介质层、第一电极和第二电极；
    透明衬底，具有第一表面，所述第一表面包括内部的第一区域以及外围的第二区域；
    半导体发光序列，包括自透明衬底的第一表面堆叠的第一导电型半导体层、发光层和第二导电型半导体层，覆盖所述透明衬底第一表面第一区域；
    第一导电型半导体层的一表面包括：发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；
    绝缘介质层，至少覆盖所述半导体发光序列，并且具有第一开口和第二开口；
    第一电极和第二电极，分别通过第一开口和第二开口电连接第一导电型半导体层以及第二导电型半导体层；
    自第二导电型半导体层俯视，半导体发光序列的周边沿着一环绕方向依次包括为第一边缘、第二边缘、第三边缘和第四边缘；
    所述透明衬底第一表面的第二区域在所述半导体发光序列的第一边缘、第二边缘、第三边缘和第四边缘周围分别具有四个宽度，定义为W1、W2、W3和W4；
    其特征在于：所述第一导电型半导体层的第一电极电连接区域位于部分的第一边缘以及部分的第二边缘，W1大于W3。
  2. 根据权利要求1所述的一种发光二极管，其特征在于：所述W1+W3为10～50微米，所述W2+W4为10～50微米。
  3. 根据权利要求1所述的一种发光二极管，其特征在于：所述半导体发光序列的第一边缘的边长大于等于第二边缘的边长。
  4. 根据权利要求1或4所述的一种发光二极管，其特征在于：所述的W1为10～30微米。
  5. 根据权利要求1或4所述的一种发光二极管，其特征在于：所述W3 介于0～5或5～20微米之间。
  6. 根据权利要求1或4所述的一种发光二极管，其特征在于：所述的W1∶W3为(2～40)∶1。
  7. 根据权利要求1所述的一种发光二极管，其特征在于：所述第一导电型半导体层的第一电极电连接区域未位于所述第三边缘和所述第四边缘，W1大于W3且W2大于等于W4。
  8. 根据权利要求1或4所述的一种发光二极管，其特征在于：所述的W2为10～30微米。
  9. 根据权利要求1或4所述的一种发光二极管，其特征在于：所述W4介于0～5或5～20微米之间。
  10. 根据权利要求1或4所述的一种发光二极管，其特征在于：所述的W2∶W4为(2～40)∶1。
  11. 一种发光二极管，其包括：透明衬底、半导体发光序列、绝缘介质层、第一电极和第二电极；
    透明衬底，具有第一表面，所述第一表面包括内部的第一区域以及外围的第二区域；
    半导体发光序列，包括自透明衬底的第一表面堆叠的第一导电型半导体层、发光层和第二导电型半导体层，覆盖所述透明衬底第一表面第一区域；
    第一导电型半导体层的一表面包括发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；
    绝缘介质层，至少覆盖所述半导体发光序列，并且具有第一开口和第二开口；
    第一电极和第二电极，分别通过第一开口和第二开口电连接第一导电型半导体层以及第二导电型半导体层；
    自第二导电型半导体层俯视，半导体发光序列的周边沿着一环绕方向依次包括为第一边缘、第二边缘、第三边缘和第四边缘；
    所述透明衬底第一表面的第二区域在所述半导体发光序列的第一 边缘、第二边缘、第三边缘和第四边缘周围分别具有四个宽度，定义为W1、W2、W3和W4；
    其特征在于：所述第一导电型半导体层的第一电极电连接区域位于第一边缘、全部第二边缘以及部分的第三边缘，W2大于W4。
  12. 根据权利要求11所述的一种发光二极管，其特征在于：W1大于等于W3。
  13. 根据权利要求11所述的一种发光二极管，其特征在于：所述的半导体发光序列的第一边缘的边长大于等于第二边缘的边长。
  14. 根据权利要求11所述的一种发光二极管，其特征在于：所述的W2为10～30微米。
  15. 根据权利要求12所述的一种发光二极管，其特征在于：所述W4介于0～5或5～20微米之间。
  16. 根据权利要求12所述的一种发光二极管，其特征在于：所述的W2∶W4为(2～40)∶1。
  17. 根据权利要求12所述的一种发光二极管，其特征在于：所述的W1为10～30微米。
  18. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的透明衬底的第一表面的第一区域与透明衬底的第一表面的面积的比例为40％～90％。
  19. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的透明衬底的第一表面的边缘的边长介于200～300微米或100～200微米或40～100微米。
  20. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的透明衬底包括第二表面，与第一表面相对，第二表面为主要出光面。
  21. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的绝缘介质层包括多层绝缘介质层或一单层绝缘介质层，多层绝缘介质层优选的为DBR层或所述的单层的绝缘介质层的厚度为2微米 以上。
  22. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的绝缘介质层覆盖在半导体发光序列的顶表面的厚度不同于覆盖在半导体发光序列的侧壁的厚度。
  23. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的绝缘介质层覆盖半导体发光序列的侧壁的厚度为覆盖在半导体发光序列的顶表面的厚度的40～90％。
  24. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的第二导电型半导体层的表面还包括透明电极层。
  25. 根据权利要求1或11所述的一种发光二极管，其特征在于：所述的半导体发光序列直接生长在透明衬底的第一表面，或者通过透明键合层键合在透明衬底的第一表面。
  26. 根据权利要求1或11所述的一种发光二极管，其特征在于：绝缘介质层覆盖所述至少部分透明衬底第一表面的第二区域。
  27. 一种发光二极管封装体，包括安装基板和安装在所述安装基板上的至少一个发光二极管，其特征在于，所述发光二极管至少一个或多个或全部为权利要求1-26中任一项所述的发光二极管。
  28. 一种发光二极管模组，包括安装基板和安装在所述安装基板上的多行和多列发光二极管，其特征在于，所述发光二极管至少一个或多个或全部为权利要求1-26中任一项所述的发光二极管。
  29. 一种发光二极管模组，包括安装基板和安装在所述安装基板上的多个发光二极管，其特征在于，多个发光二极管为多行和多列，每一个发光二极管包括：透明衬底、半导体发光序列、绝缘介质层、第一电极和第二电极；
    透明衬底，具有第一表面，所述第一表面包括内部的第一区域以及外围的第二区域；
    半导体发光序列，包括自透明衬底的第一表面堆叠的第一导电型半导体层、发光层和第二导电型半导体层，覆盖所述透明衬底第 一表面第一区域；
    第一导电型半导体层的一表面包括发光层和第二导电型半导体层覆盖区域以及第一电极电连接区域；
    绝缘介质层，至少覆盖所述半导体发光序列，并且具有第一开口和第二开口；
    第一电极和第二电极，分别通过第一开口和第二开口电连接第一导电型半导体层以及第二导电型半导体层；
    所述透明衬底第一表面的第二区域在所述半导体发光序列的第一边缘、第二边缘、第三边缘和第四边缘周围分别具有四个宽度，定义为W1、W2、W3和W4；
    其特征在于：最靠近安装基板的一边侧的一列的发光二极管具有半导体发光序列的第三边缘平行于且相较于其它边缘最靠近于安装基板的所述一边侧，且W1大于W3。
  30. 根据权利要求29所述的一种发光二极管模组，其特征在于：所述的发光二极管为权利要求1～25任一项前述的发光二极管。
  31. 根据权利要求29所述的一种发光二极管模组，其特征在于：最靠近安装基板的另一边侧的一行的发光二极管具有半导体发光序列的第四边缘平行于且相较于其它边缘最靠近于安装基板的所述另一边侧，且W2大于W4。
  32. 根据权利要求29所述的一种发光二极管模组，其特征在于：所述W1+W3为10～50微米，所述W2+W4为10～50微米。
  33. 根据权利要求29所述的一种发光二极管模组，其特征在于：所述的W1为10～30微米，所述的W3介于0～5或5～20微米之间。
  34. 根据权利要求29所述的一种发光二极管模组，其特征在于：所述的W1∶W3为(2～40)∶1。
  35. 根据权利要求29所述的一种发光二极管模组，其特征在于：所述的W2为10～30微米，所述W4介于0～5或5～20微米之间。
  36. 根据权利要求29所述的一种发光二极管模组，其特征在于：所述 的W2∶W4为(2～40)∶1。
  37. 根据权利要求29所述的一种发光二极管模组，其特征在于：所述的半导体发光序列的第一边缘的边长大于等于第二边缘的边长。
  38. 根据权利要求29～35任一项所述的一种发光二极管模组，其特征在于：所述多列发光二极管至少包括一列红光发光二极管、一列绿光发光二极管和一列蓝光发光二极管。
  39. 根据权利要求29～35任一项所述的一种发光二极管模组，其特征在于：所述的多行以及多列发光二极管都是蓝光发光二极管。
  40. 根据权利要求29～35任一项所述的一种发光二极管模组，其特征在于：所述的安装基板上包括两水平边侧和两纵向边侧，发光二极管沿着所述的安装基板的水平边侧排列为多行，沿着所述的安装基板的纵向边侧排列为多列；第一列的发光二极管和最后一列发光二极管分别以半导体发光序列的第三边缘最靠近且平行于所述安装基板的两水平边侧，第一行的发光二极管和最后一行发光二极管分别以半导体发光序列的第四边缘最靠近且平行于所述安装基板的两纵向边侧排列。
  41. 一种RGB显示装置，其特征在于：包括多个权利要求27～36，38任一项中所述的发光二极管模组拼接在一起。
  42. 一种背光显示屏，其特征在于：包括多个权利要求27～38任一项中所述的发光二极管模组拼接在一起形成背光光源。
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