WO2021038900A1 - Electrolytic capacitor - Google Patents

Electrolytic capacitor Download PDF

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Publication number
WO2021038900A1
WO2021038900A1 PCT/JP2020/000372 JP2020000372W WO2021038900A1 WO 2021038900 A1 WO2021038900 A1 WO 2021038900A1 JP 2020000372 W JP2020000372 W JP 2020000372W WO 2021038900 A1 WO2021038900 A1 WO 2021038900A1
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WIPO (PCT)
Prior art keywords
laminate
electrolytic capacitor
external electrode
layer
outer layer
Prior art date
Application number
PCT/JP2020/000372
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French (fr)
Japanese (ja)
Inventor
康浩 玉谷
剛史 古川
和哉 楠田
清水　敬
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株式会社村田製作所
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Publication of WO2021038900A1 publication Critical patent/WO2021038900A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02—Mountings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/008—Terminals
    • H01G9/012—Terminals specially adapted for solid capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/004—Details
    • H01G9/04—Electrodes or formation of dielectric layers thereon
    • H01G9/048—Electrodes or formation of dielectric layers thereon characterised by their structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G9/00—Electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices; Processes of their manufacture
    • H01G9/15—Solid electrolytic capacitors

Definitions

  • the present invention relates to electrolytic capacitors.
  • An electrolytic capacitor such as a solid electrolytic capacitor is manufactured by, for example, forming a dielectric layer on the surface of an anode made of a valve acting metal such as aluminum, and then forming a cathode on the surface of the dielectric layer.
  • Patent Document 1 a rectangular anode made of a valve acting metal is provided with an insulating portion and separated into an anode portion and a cathode portion in the short side direction, and a dielectric oxide film layer and a solid electrolyte layer are provided on the surface of the cathode portion.
  • a solid electrolytic capacitor consisting of electrodes is disclosed.
  • Patent Document 2 describes a plurality of anodes and a plurality of anodes alternately laminated via at least a dielectric layer, at least one anode extraction portion, at least one cathode extraction portion, and a single anode terminal.
  • the anode is electrically connected to the anode lead-out portion
  • the anode is electrically connected to the cathode lead-out portion
  • the anode lead-out portion and the cathode lead-out portion are predetermined, including a single cathode terminal.
  • a capacitor that is drawn out in one direction, the anode pull-out portion is connected to the anode terminal, and the cathode lead-out portion is connected to the cathode terminal.
  • Patent Document 2 describes that a solid electrolytic capacitor in which a plurality of anodes and a plurality of cathodes are alternately laminated together with a dielectric layer at least via a solid electrolyte layer may be used.
  • each capacitor element is laminated along the height direction (also referred to as the thickness direction). That is, each capacitor element is laminated substantially perpendicular to the mounting surface of the mounting board on which the solid electrolytic capacitor should be mounted. Therefore, each capacitor element is connected to the mounting electrode of the mounting substrate via an external electrode formed on the side surface.
  • the solid electrolytic capacitors described in Patent Documents 1 and 2 have the following problems. (1) As the height of the solid electrolytic capacitor becomes lower and the entire solid electrolytic capacitor becomes thinner, it becomes difficult to increase the number of laminated capacitor elements. (2) Since each capacitor element is connected to the mounting electrode of the mounting board via an external electrode formed on the side surface, the conductive path to the mounting board of each capacitor element becomes long, and the mounting board of each capacitor element becomes long. The distance to is different.
  • the present invention has been made to solve the above problems, and an object of the present invention is to provide an electrolytic capacitor in which the distance to the mounting surface of each capacitor element is short and the ESR and ESL can be reduced.
  • the electrolytic capacitor of the present invention includes a plurality of laminated capacitor elements, and the capacitor element includes an electrode having a dielectric layer on its surface and a cathode facing the anode via the dielectric layer.
  • the capacitor element includes an electrode having a dielectric layer on its surface and a cathode facing the anode via the dielectric layer.
  • An electrolytic capacitor including an electrically connected second external electrode, wherein the laminate has a bottom surface facing the mounting surface of the mounting substrate on which the electrolytic capacitor is mounted and an upper surface facing the bottom surface.
  • an electrolytic capacitor in which the distance to the mounting surface of each capacitor element is short and the ESR and ESL can be reduced.
  • FIG. 1 (a) is a perspective view schematically showing an example of an electrolytic capacitor according to the first embodiment of the present invention
  • FIG. 1 (b) shows an electrolytic capacitor shown in FIG. 1 (a) mounted on a mounting substrate.
  • FIG. 2A is a perspective view schematically showing an example of a laminated body obtained by removing the outer layer insulator from the electrolytic capacitor shown in FIG. 1A
  • FIG. 2B is shown in FIG. 2A.
  • FIG. 3A is a perspective view of the electrolytic capacitor shown in FIG. 1A as viewed from the bottom surface
  • FIG. 3B shows the first external electrode and the second external electrode and the second from the electrolytic capacitor shown in FIG. 3A. It is a perspective view which shows typically the state which removed the external electrode.
  • FIG. 4 is a perspective view schematically showing an example of a capacitor element sheet.
  • FIG. 5 is a perspective view schematically showing an example of a laminated body block.
  • FIG. 6 is a perspective view schematically showing an example of a laminated body block.
  • 7 (a) and 7 (b) are perspective views schematically showing an example of a step of individualizing a laminated block with a resin film.
  • 8 (a) and 8 (b) are perspective views schematically showing an example of a process of forming an outer layer insulator.
  • FIG. 9 (a) and 9 (b) are perspective views schematically showing an example of a process of forming the first external electrode and the second external electrode.
  • FIG. 10 is a perspective view of an example of the electrolytic capacitor according to the second embodiment of the present invention as viewed from the bottom.
  • FIG. 11 is a perspective view of an example of the electrolytic capacitor according to the third embodiment of the present invention as viewed from the bottom.
  • FIG. 12 is a perspective view of an example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom.
  • FIG. 13 is a perspective view of another example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom.
  • the electrolytic capacitor of the present invention will be described.
  • the present invention is not limited to the following configurations, and can be appropriately modified and applied without changing the gist of the present invention. It should be noted that a combination of two or more desirable configurations of each of the embodiments described below is also the present invention.
  • the electrolytic capacitor according to each embodiment shown below is a solid electrolytic capacitor having a solid electrolyte layer, but the electrolytic capacitor of the present invention may be an electrolytic capacitor using an electrolytic solution instead of the solid electrolyte. It may be an electrolytic capacitor using an electrolytic solution together with a solid electrolyte.
  • FIG. 1 (a) is a perspective view schematically showing an example of an electrolytic capacitor according to the first embodiment of the present invention
  • FIG. 1 (b) shows an electrolytic capacitor shown in FIG. 1 (a) mounted on a mounting substrate.
  • FIG. 2A is a perspective view schematically showing an example of a laminated body obtained by removing the outer layer insulator from the electrolytic capacitor shown in FIG. 1A
  • FIG. 2B is shown in FIG. 2A.
  • the electrolytic capacitor 1 shown in FIG. 1 (a) includes the rectangular parallelepiped laminated body 5 shown in FIGS. 2 (a) and 2 (b), and outer layer insulators 7a, 7b, 7c provided around the laminated body 5. It includes 7d, 7e and 7f. As shown in FIGS. 2A and 2B, the laminated body 5 includes a plurality of laminated capacitor elements 3. The electrolytic capacitor 1 is mounted on the mounting board 9 as shown in FIG. 1 (b).
  • the capacitor element 3 includes an anode 11 having a dielectric layer 19 on its surface and a cathode 15 facing the anode 11 via the dielectric layer 19.
  • the laminate 5 faces the bottom surface 5f facing the mounting surface 9c (see FIG. 1B) of the mounting board 9 on which the electrolytic capacitor 1 should be mounted, and the bottom surface 5f.
  • the outer layer insulators 7a, 7b, 7c, 7d, 7e and 7f are the first outer layer insulator 7a provided on the first end surface 5a of the laminated body 5 and the first outer layer insulator 7a of the laminated body 5.
  • the fifth outer layer insulator 7e provided on the second side surface 5e of the laminated body 5 and the sixth outer layer insulator 7f provided on the bottom surface 5f of the laminated body 5 are included.
  • the direction connecting the first end surface 5a and the second end surface 5b of the laminated body 5 is the length direction (the direction indicated by L in FIGS. 1B and 2A), and the first side surface 5c and the first side surface 5c of the laminated body 5.
  • the direction connecting the two side surfaces 5e is the width direction (the direction indicated by W in FIGS. 1B and 2A), and the direction connecting the bottom surface 5f and the top surface 5d of the laminated body 5 is the thickness direction (FIG. 1 (b). )
  • the plurality of capacitor elements 3 are stacked along the length direction (L direction) as shown in FIG. 2A. Therefore, the stacking direction of the capacitor elements 3 is substantially parallel to the mounting surface 9c of the mounting substrate 9 (see FIG. 1B).
  • the plurality of capacitor elements 3 are laminated so as to be close to and equidistant from the mounting surface 9c of the mounting substrate 9. Therefore, the distance to the positive mounting electrode 9a 1 or the negative mounting electrode 9a 2 provided on the mounting surface 9c of each capacitor element 3 can be shortened. As a result, the electrolytic capacitor 1 can be reduced in ESR and ESL.
  • the electrolytic capacitor 1 has a dimension of 3.5 mm in the L direction, a dimension of 2.8 mm in the W direction, and a dimension of 1.9 mm in the T direction.
  • the dimension L in the length direction of the laminate 5, the dimension W in the width direction of the laminate 5, and the dimension T in the thickness direction of the laminate 5 satisfy L> W> T. .. Alternatively, it is also preferable to satisfy W> L> T.
  • the electrolytic capacitor 1 in which a plurality of capacitor elements 3 are stacked along the length direction (L direction) when L> W> T or W> L> T is satisfied, the plurality of capacitor elements 3 have a thickness. Compared with the electrolytic capacitors stacked along the direction (T direction), the number of stacked capacitor elements 3 is increased, and multiple parallelization is possible. As a result, the ESR of the electrolytic capacitor 1 can be reduced.
  • the outer shape of the capacitance portion of the plurality of capacitor elements 3 constitutes the outer shape of the laminated body 5.
  • the capacity can be increased.
  • FIG. 3A is a perspective view of the electrolytic capacitor shown in FIG. 1A as viewed from the bottom surface
  • FIG. 3B shows the first external electrode and the second external electrode and the second from the electrolytic capacitor shown in FIG. 3A. It is a perspective view which shows typically the state which removed the external electrode.
  • the electrolytic capacitor 1 includes a first external electrode 13 electrically connected to an anode 11 exposed from the laminate 5, and a cathode exposed from the laminate 5.
  • a second external electrode 17 that is electrically connected to the 15 is provided.
  • the first external electrode 13 is provided on the bottom surface 5f of the laminate 5 so as to be electrically connected to the anode 11 exposed from the bottom surface 5f of the laminate 5, and the second external electrode 17 is the bottom surface of the laminate 5. It is provided on the bottom surface 5f of the laminate 5 so as to be electrically connected to the cathode 15 exposed from 5f.
  • the distance to the positive mounting electrode 9a 1 or the negative mounting electrode 9a 2 provided on the mounting surface 9c of each capacitor element 3 can be shortened.
  • the electrolytic capacitor 1 can be reduced in ESR and ESL.
  • the anode 11 is exposed from the first opening 7f 1 formed in the sixth layer insulator 7f formed on the bottom surface 5f of the laminate 5.
  • the cathode 15 is exposed from the second opening 7f 2 formed in the sixth outer layer insulator 7f formed on the bottom surface 5f of the laminated body 5.
  • the first opening 7f 1 and the second opening 7f 2 are formed by removing the sixth outer layer insulator 7f by thermal processing or ablation processing with a laser.
  • an ultraviolet (UV) laser (wavelength 355 nm), a green laser (wavelength 532 nm), an infrared (IR) laser (wavelength 1064 nm), a carbon dioxide gas (CO 2 ) laser (wavelength 10.6 ⁇ m) and the like are used.
  • a UV laser or a green laser that can be finely processed by ablation processing is preferable.
  • the wavelength is preferably 248 nm or more and 532 nm or less.
  • the first opening 7f 1 and the second opening 7f 2 can be formed in the sixth outer layer insulator 7f by performing laser processing at a desired position of the sixth outer layer insulator 7f. it can. Therefore, the anode 11 and the cathode 15 can be selectively exposed on the bottom surface 5f of the laminated body 5.
  • the anode 11 constituting the capacitor element 3 has a valve acting metal leaf at the center, and has a porous layer (not shown) such as an etching layer on the surface.
  • a dielectric layer 19 is provided on the surface of the porous layer.
  • valve acting metal examples include simple metals such as aluminum, tantalum, niobium, titanium, zirconium, magnesium and silicon, or alloys containing these metals. Among these, aluminum or an aluminum alloy is preferable.
  • the shape of the valve acting metal is not particularly limited, but it is preferably flat, more preferably foil.
  • the porous layer is preferably an etching layer that has been etched with hydrochloric acid or the like.
  • the thickness of the valve acting metal foil before the etching treatment is preferably 60 ⁇ m or more, and preferably 180 ⁇ m or less. Further, the thickness of the valve acting metal foil (core portion) that has not been etched after the etching treatment is preferably 10 ⁇ m or more, and preferably 70 ⁇ m or less.
  • the thickness of the porous layer is designed according to the withstand voltage and capacitance required for the electrolytic capacitor, but the total thickness of the porous layers on both sides of the valve acting metal foil is preferably 10 ⁇ m or more, and 120 ⁇ m or less. Is preferable.
  • the anode 11 is drawn out to the bottom surface 5f of the laminated body 5 and is electrically connected to the first external electrode 13.
  • the dielectric layer 19 is preferably made of an oxide film of the valve acting metal.
  • an aluminum foil is used as a valve acting metal foil, it is oxidized to form a dielectric layer by anodization in an aqueous solution containing boric acid, phosphoric acid, adipic acid, or a sodium salt or ammonium salt thereof.
  • a film can be formed.
  • the dielectric layer 19 has pores (recesses) formed by being formed along the surface of the porous layer.
  • the thickness of the dielectric layer 19 is designed according to the withstand voltage and capacitance required for the electrolytic capacitor, but is preferably 10 nm or more, and preferably 100 nm or less.
  • the cathode 15 constituting the capacitor element 3 includes a solid electrolyte layer 15a formed on the dielectric layer 19, a conductive layer 15b formed on the solid electrolyte layer 15a, and a cathode extraction layer formed on the conductive layer 15b. 15c and 15c are laminated. Therefore, the electrolytic capacitor 1 is a solid electrolytic capacitor provided with a solid electrolyte layer 15a as a part of the cathode 15.
  • Examples of the material constituting the solid electrolyte layer 15a include conductive polymers having pyrroles, thiophenes, anilines and the like as skeletons.
  • Examples of the conductive polymer having thiophenes as a skeleton include PEDOT [poly (3,4-ethylenedioxythiophene)], and PEDOT: PSS complexed with polystyrene sulfonic acid (PSS) as a dopant. It may be.
  • a polymer film such as poly (3,4-ethylenedioxythiophene) is formed on the surface of the dielectric layer using a treatment liquid containing a monomer such as 3,4-ethylenedioxythiophene. It is formed by a method of applying a dispersion of a polymer such as poly (3,4-ethylenedioxythiophene) to the surface of the dielectric layer and drying it. It is preferable to form the solid electrolyte layer for the inner layer that fills the pores (recesses), and then form the solid electrolyte layer for the outer layer that covers the entire dielectric layer.
  • the solid electrolyte layer 15a is formed by forming the above-mentioned treatment liquid or dispersion liquid on the dielectric layer by sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, dipping, or the like to form a predetermined region or a partitioned region. It can be formed over the entire size of the capacitor element sheet 23.
  • the thickness of the solid electrolyte layer 15a is preferably 2 ⁇ m or more, and preferably 20 ⁇ m or less.
  • the conductive layer 15b is provided to electrically and mechanically connect the solid electrolyte layer 15a and the cathode extraction layer 15c.
  • it is preferably a carbon layer, a graphene layer or a silver layer formed by applying a conductive paste such as a carbon paste, a graphene paste or a silver paste.
  • a conductive paste such as a carbon paste, a graphene paste or a silver paste.
  • it may be a composite layer in which a silver layer is provided on the carbon layer or the graphene layer, or a mixed layer in which the carbon paste or the graphene paste and the silver paste are mixed.
  • the conductive layer 15b is formed by forming a conductive paste such as carbon paste on the solid electrolyte layer by sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, dipping, etc., thereby forming a predetermined region or a capacitor element. It can be formed over the entire size of the sheet 23.
  • the thickness of the conductive layer 15b is preferably 2 ⁇ m or more, and preferably 20 ⁇ m or less.
  • the cathode extraction layer 15c can be formed of a metal foil or an electrode paste layer.
  • a metal foil it is preferably composed of at least one metal selected from the group consisting of Al, Cu, Ag and alloys containing these metals as main components.
  • the metal foil is made of the above metal, the resistance value of the metal foil can be reduced and the ESR can be reduced.
  • metal foil a metal foil having a surface coated with carbon or titanium by a film forming method such as sputtering or vapor deposition may be used. It is more preferable to use carbon coated aluminum foil.
  • the thickness of the metal foil is not particularly limited, but from the viewpoint of handling in the manufacturing process, miniaturization, and reduction of ESR, it is preferably 20 ⁇ m or more, and preferably 50 ⁇ m or less.
  • the cathode extraction layer 15c can be formed in a predetermined region by forming the electrode paste on the conductive layer by sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, dipping or the like. it can.
  • the electrode paste an electrode paste containing Ag, Cu, or Ni as a main component is preferable.
  • the thickness of the electrode paste layer can be made thinner than when a metal foil is used, and in the case of screen printing, the thickness may be 2 ⁇ m or more and 20 ⁇ m or less. It is possible.
  • the cathode extraction layer 15c is drawn out to the bottom surface 5f of the laminated body 5 and is electrically connected to the second external electrode 17.
  • the first outer layer insulator 7a and the second outer layer insulator 7b are provided on both main surfaces in the length direction (L direction), which is the stacking direction, and the third outer layer insulator 7c and the fifth outer layer insulator 7e are width.
  • the fourth outer layer insulator 7d and the sixth outer layer insulator 7f are provided on both main surfaces in the direction (W direction), and are provided on both main surfaces in the thickness direction (T direction).
  • the first outer layer insulator 7a and the second outer layer insulator 7b contain at least a resin.
  • the resin for example, polypropylene resin, polyethylene resin (including PET resin), nylon resin, polyimide resin, silicone resin, epoxy resin, glass epoxy resin, liquid crystal polymer and the like are preferably used.
  • first outer layer insulator 7a and the second outer layer insulator 7b preferably have a film shape.
  • the first outer layer insulator 7a and the second outer layer insulator 7b may include a metal layer or an oxide layer between the resin films.
  • the metal layer it is preferable to use aluminum, copper, nickel, silver or the like.
  • the metal layer is preferably a metal foil, but may be a metal vapor deposition film or the like. It is preferable to use silica, alumina or the like as the oxide layer. Oxides such as silica and alumina may be contained as a filler in the resin film.
  • the first outer layer insulator 7a and the second outer layer insulator 7b may be a so-called aluminum laminated film in which a resin film, an aluminum foil, and a resin film have a sandwich structure.
  • the method for forming the first outer layer insulator 7a and the second outer layer insulator 7b will be described later.
  • the third outer layer insulator 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f include an insulator made of resin or an insulator made of oxide.
  • the resin insulator for example, an epoxy resin, a phenol resin, a polyimide resin, a silicone resin, a polyamide resin, a liquid crystal polymer or the like is preferably used.
  • the form of the resin is preferably a liquid resin.
  • the filler for example, silica particles, alumina particles, metal particles and the like are preferably used.
  • the insulator made of oxide for example, it is preferable to use an oxide film formed when the laminate is individualized by laser processing, electric discharge machining, or the like as the insulator.
  • the method for forming the third outer layer insulator 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f will be described later.
  • the first outer layer insulator 7a and the second outer layer insulator 7b are composed of a resin film
  • the third outer layer insulator 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f is preferably composed of an insulating paste layer.
  • the capacitance portion of the capacitor element 3 can be expanded and the capacity can be increased.
  • the first external electrode 13 and the second external electrode 17 are provided for each capacitor element 3. Therefore, in the mounting structure shown in FIG. 1B, the first external electrode 13 and the second external electrode 17 are directly connected to the positive mounting electrode 9a 1 and the negative mounting electrode 9a 2 of the mounting substrate 9 via the solder 9b, respectively. Has been done.
  • an external electrode connecting the capacitor elements 3 to each other becomes unnecessary, and the number of layers of the external electrode can be reduced. Cost reduction is possible.
  • the first external electrode 13 is formed on the first plating layer 13a formed on the anode 11 (see FIG. 3B) exposed from the bottom surface 5f of the laminated body 5.
  • the second plating layer 13b to be formed is included.
  • the second external electrode 17 is a first plating layer 17a formed on the cathode 15 (see FIG. 3B) exposed from the bottom surface 5f of the laminated body 5, and a second plating layer 17b formed on the first plating layer 17a. And include.
  • the first plating layer 13a is preferably formed by a zincate treatment. That is, the surface of the aluminum foil of the anode 11 exposed from the bottom surface 5f of the laminate 5 is alkaline-etched to remove the oxide film of the anode 11, and then Zn plating is performed. Next, a Ni plating layer is formed as the first plating layer 13a by performing replacement plating with electroless Ni plating. Although the cathode 15 may be other than aluminum, a Ni plating layer is similarly formed as the first plating layer 17a during the zincate treatment.
  • the second plating layers 13b and 17b are preferably formed by performing electrolytic Sn plating.
  • the Ni plating layers which are the first plating layers 13a and 17a, are formed mainly for improving the moisture resistance
  • the Sn plating layers, which are the second plating layers 13b and 17b, are mainly formed for improving the solderability. ing.
  • the first external electrode 13 and the second external electrode 17 preferably include a plating layer.
  • a plating layer By not using an expensive resin electrode having a relatively high resistance for the external electrode, it is possible to reduce the ESR and the cost.
  • FIG. 4 is a perspective view schematically showing an example of the capacitor element sheet.
  • a valve acting metal foil such as an aluminum foil constituting the anode 11 is prepared.
  • the valve action metal foil has a porous layer such as an etching layer on the surface.
  • the surface of the porous layer is anodized to form the dielectric layer 19.
  • a solid electrolyte layer 15a is formed on the dielectric layer 19 by screen printing, spray coating, dispenser coating, inkjet printing, or dipping, followed by screen printing, spray coating, dispenser coating, inkjet printing, or dipping on the solid electrolyte layer 15a.
  • a conductive layer 15b such as a carbon layer is formed by dipping, and a cathode drawing layer 15c is further formed on the conductive layer 15b by sheet lamination or screen printing, spray coating, dispenser coating, inkjet printing, or dipping.
  • FIG. 5 is a perspective view schematically showing an example of a laminated body block.
  • the laminated body block 25 is obtained by laminating a plurality of capacitor element sheets 23. It is preferable that the plurality of capacitor element sheets 23 are laminated in a viscous state before the cathode extraction layer 15c is dried.
  • FIG. 6 is a perspective view schematically showing an example of a laminated block with a resin film.
  • resin films 27a and 27b are placed above and below the laminate block 25 and thermocompression-bonded with a vacuum thermocompression bonding device or an atmospheric press device to form a molded body, whereby the laminate block with a resin film is formed. 27 is obtained.
  • the thickness of the laminated block 27 with the resin film (the length indicated by t in FIG. 6) is the dimension in the length direction (L direction) of the electrolytic capacitor 1 to be manufactured.
  • the thickness of the laminated block 27 with the resin film may be the dimension in the width direction (W direction) of the electrolytic capacitor 1 to be manufactured.
  • FIGS. 7 (a) and 7 (b) are perspective views schematically showing an example of a step of individualizing a laminated block with a resin film.
  • the laminate block 27 with a resin film shown in FIG. 7 (b) can be obtained by cutting the laminate block 27 with a resin film by dicing, a laser, or the like to separate the blocks 27.
  • the capacitor element sheet 23 is divided into the capacitor element 3.
  • the resin film 27a placed on the upper surface of the laminated body block 27 with the resin film becomes the first outer layer insulator 7a, and the resin film 27b placed on the lower surface becomes the second outer layer insulator 7b.
  • the length (length indicated by l in FIG. 7B) and width (length indicated by w in FIG. 7B) of the laminate 29 with the resin film are the laminations constituting the electrolytic capacitor 1 to be produced. It is preferable that the body 5 has a thickness direction (T direction) and a width direction (W direction).
  • FIGS. 8 (a) and 8 (b) are perspective views schematically showing an example of a step of forming the outer layer insulator.
  • the laminate 29 with the resin film is tilted and aligned in the direction in which the shortest dimension is the thickness direction.
  • the third outer layer is insulated by screen-printing, spray-coating, or dipping the insulating paste on the first side surface, the upper surface, the second side surface, and the bottom surface of the laminate 29 with the resin film.
  • the body 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f are formed, respectively.
  • FIGS. 9 (a) and 9 (b) are perspective views schematically showing an example of a process of forming the first external electrode and the second external electrode.
  • a part of the sixth outer layer insulator 7f is removed by laser processing to form the first opening 7f 1 and the second opening 7f 2 .
  • the laser oscillator 21 irradiates the laser beam 21a at a desired position of the sixth outer layer insulator 7f to form the first opening 7f 1 and the second opening 7f 2 .
  • the anode 11 is exposed from the first opening 7f 1 and the cathode 15 is exposed from the second opening 7f 2.
  • a Ni plating layer is formed as the first plating layer 13a on the exposed anode 11 by the zincate treatment, and the first plating layer 17a is formed on the exposed cathode 15.
  • a Ni plating layer is formed as.
  • the Ni plating layers which are the first plating layers 13a and 17a Sn plating layers are formed as the second plating layers 13b and 17b by Sn plating, respectively.
  • the first external electrode 13 that is electrically connected to the anode 11 exposed from the first opening 7f 1 is formed, and is electrically connected to the cathode 15 exposed from the second opening 7f 2.
  • the second external electrode 17 is formed.
  • the electrolytic capacitor 1 is obtained. As shown in FIG. 1B, the electrolytic capacitor 1 thus obtained is mounted on the mounting substrate 9 via the solder 9b.
  • the first external electrode and the second external electrode include a plating layer, the plating layer is provided across a plurality of capacitor elements, and the plurality of capacitor elements are connected to each other. It is electrically connected via the plating layer.
  • the contact area with the mounting electrode is larger than that in the first embodiment, so that the ESR can be further reduced.
  • FIG. 10 is a perspective view of an example of the electrolytic capacitor according to the second embodiment of the present invention as viewed from the bottom.
  • the first external electrode 13A includes a first plating layer 13a and a second plating layer 13b formed on the first plating layer 13a.
  • the second plating layer 13b is provided so as to straddle the plurality of capacitor elements 3 by plating growth, surface modification, or the like, and the plurality of capacitor elements 3 are electrically connected to each other via the second plating layer 13b.
  • the second external electrode 17A includes a first plating layer 17a and a second plating layer 17b formed on the first plating layer 17a.
  • the second plating layer 17b is provided across the plurality of capacitor elements 3 by plating growth, surface modification, or the like, and the plurality of capacitor elements 3 are electrically connected to each other via the second plating layer 17b.
  • the first external electrode and the second external electrode include a plating layer, further include a conductive paste layer on the plating layer, and the conductive paste layer is It is provided across a plurality of capacitor elements, and the plurality of capacitor elements are electrically connected to each other via the conductive paste layer.
  • the contact area with the mounting electrode is larger than that in the first embodiment, so that the ESR can be further reduced.
  • FIG. 11 is a perspective view of an example of the electrolytic capacitor according to the third embodiment of the present invention as viewed from the bottom.
  • the first external electrode 13B includes a first plating layer 13a and a conductive paste layer 13c formed on the first plating layer 13a.
  • the conductive paste layer 13c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 13c.
  • the second external electrode 17B includes a first plating layer 17a and a conductive paste layer 17c formed on the first plating layer 17a.
  • the conductive paste layer 17c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 17c.
  • the conductive paste layers 13c and 17c are formed, for example, by printing a solder paste on the first plating layers 13a and 17a.
  • a solder paste As the conductive paste layers 13c and 17c, not only solder paste but also Ni paste, Cu paste, Ag paste and the like can be used. If necessary, a plating layer may be formed on the conductive paste layers 13c and 17c.
  • the first external electrode is attached to the first side surface and the bottom surface of the laminate so as to be electrically connected to the anode exposed from the first side surface and the bottom surface of the laminate.
  • the second external electrodes are provided on the second side surface and the bottom surface of the laminate so as to be electrically connected to the cathode exposed from the second side surface and the bottom surface of the laminate.
  • the capacitor element and the external electrode are connected by multipath (parallel) between the side surface and the bottom surface of the laminated body. As a result, low ESR can be achieved.
  • FIG. 12 is a perspective view of an example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom.
  • the electrolytic capacitor 1C shown in FIG. 12 although not shown, the anode 11 is exposed from the first side surface 5c and the bottom surface 5f of the laminate 5, and the cathode 15 is exposed from the second side surface 5e and the bottom surface 5f of the laminate 5.
  • the first external electrode 13C is provided on the first side surface 5c and the bottom surface 5f of the laminate 5 so as to be electrically connected to the anode 11 exposed from the first side surface 5c and the bottom surface 5f of the laminate 5.
  • the second external electrode 17C is provided on the second side surface 5e and the bottom surface 5f of the laminate 5 so as to be electrically connected to the cathode 15 exposed from the second side surface 5e and the bottom surface 5f of the laminate 5.
  • the first external electrode 13C includes a first plating layer 13a and a conductive paste layer 13c formed on the first plating layer 13a on the bottom surface 5f of the laminated body 5.
  • the conductive paste layer 13c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 13c.
  • the first external electrode 13C further includes a first plating layer 13a and a conductive paste layer 13d formed on the first plating layer 13a on the first side surface 5c of the laminated body 5.
  • the conductive paste layer 13d is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 13d.
  • the first plating layer 13a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 13a provided on the first side surface 5c of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
  • the second external electrode 17C includes a first plating layer 17a and a conductive paste layer 17c formed on the first plating layer 17a on the bottom surface 5f of the laminated body 5.
  • the conductive paste layer 17c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 17c.
  • the second external electrode 17C further includes a first plating layer 17a and a conductive paste layer 17d formed on the first plating layer 17a on the second side surface 5e of the laminated body 5.
  • the conductive paste layer 17d is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 17d.
  • the first plating layer 17a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 17a provided on the second side surface 5e of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
  • FIG. 13 is a perspective view of another example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom.
  • the electrolytic capacitor 1D shown in FIG. 13 although not shown, the anode 11 is exposed from the first side surface 5c and the bottom surface 5f of the laminate 5, and the cathode 15 is exposed from the second side surface 5e and the bottom surface 5f of the laminate 5.
  • the first external electrode 13D is integrated with the first side surface 5c and the bottom surface 5f of the laminate 5 so as to be electrically connected to the anode 11 exposed from the first side surface 5c and the bottom surface 5f of the laminate 5.
  • the second external electrode 17D is integrated with the second side surface 5e and the bottom surface 5f of the laminate 5 so as to be electrically connected to the cathode 15 exposed from the second side surface 5e and the bottom surface 5f of the laminate 5. It is provided as an electrode.
  • the first external electrode 13D includes a first plating layer 13a and a conductive paste layer 13e formed on the first plating layer 13a.
  • the conductive paste layer 13e is integrated not only on the bottom surface 5f of the laminate 5 but also on the first side surface 5c by being simultaneously formed by screen printing or the like.
  • the first plating layer 13a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 13a provided on the first side surface 5c of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
  • the second external electrode 17D includes a first plating layer 17a and a conductive paste layer 17e formed on the first plating layer 17a.
  • the conductive paste layer 17e is integrated not only on the bottom surface 5f of the laminate 5 but also on the second side surface 5e by being simultaneously formed by screen printing or the like.
  • the first plating layer 17a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 17a provided on the second side surface 5e of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
  • the conductive paste layers 13c, 13d, 13e, 17c, 17d, 17e are formed, for example, by printing a solder paste.
  • As the conductive paste layers 13c, 13d, 13e, 17c, 17d, 17e not only solder paste but also Ni paste, Cu paste, Ag paste and the like can be used. If necessary, a plating layer may be formed on the conductive paste layers 13c, 13d, 13e, 17c, 17d, 17e.
  • the electrolytic capacitor of the present invention is not limited to the above embodiment, and various applications and modifications can be added within the scope of the present invention regarding the configuration, manufacturing conditions, and the like of the electrolytic capacitor.
  • the dimension L in the length direction of the laminate, the dimension W in the width direction of the laminate, and the dimension T in the thickness direction of the laminate satisfy L> T> W. Good.
  • the outer shape of the capacitance portion of the plurality of capacitor elements does not have to constitute the outer shape of the laminated body.
  • the first external electrode and the second external electrode do not have to include a plating layer.
  • the capacitor elements may be manufactured one by one to prepare a laminated body.
  • Electrolytic capacitor 3 Capacitor element 5 Laminated body 5a First end surface of laminated body 5b Second end surface of laminated body 5c First side surface of laminated body 5d Upper surface of laminated body 5e Second side surface of laminated body 5f Bottom surface of laminated body 7a 1st outer layer insulator 7b 2nd outer layer insulator 7c 3rd outer layer insulator 7d 4th outer layer insulator 7e 5th outer layer insulator 7f 6th outer layer insulator 7f 1 1st opening 7f 2nd 2 Opening 9 Mounting substrate 9a 1 Plus mounting electrode 9a 2 Negative mounting electrode 9b Solder 9c Mounting surface 11 Anodes 13, 13A, 13B, 13C, 13D First external electrode 13a First plating layer 13b Second plating layer 13c, 13d, 13e Conductive paste layer 15 Capacitor 15a Solid electrolyte layer 15b Conductive layer 15c Catabol extraction layer 17, 17A, 17B, 17C, 17D Second external

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Abstract

An electrolytic capacitor according to the present invention comprises a plurality of capacitor elements that are stacked upon each other. With respect to this electrolytic capacitor, each one of the capacitor elements is provided with: a multilayer body which has a rectangular parallelepiped shape and comprises a positive electrode that has a dielectric layer in the surface and a negative electrode that faces the positive electrode, with the dielectric layer being interposed therebetween; an outer insulating body which is arranged around the multilayer body; a first external electrode which is electrically connected to the positive electrode that is exposed from the multilayer body; and a second external electrode which is electrically connected to the negative electrode that is exposed from the multilayer body. If the direction connecting a first end face and a second end face of the multilayer body is taken as the longitudinal direction, the direction connecting a first lateral surface and a second lateral surface of the multilayer body is taken as the width direction, and the direction connecting the bottom surface and the upper surface of the multilayer body is taken as the thickness direction, the above-described plurality of capacitor elements are stacked in the longitudinal direction.

Description

電解コンデンサElectrolytic capacitor
本発明は、電解コンデンサに関する。 The present invention relates to electrolytic capacitors.
固体電解コンデンサ等の電解コンデンサは、例えば、アルミニウム等の弁作用金属からなる陽極の表面に誘電体層を形成した後、誘電体層の表面に陰極を形成する等の方法により作製される。 An electrolytic capacitor such as a solid electrolytic capacitor is manufactured by, for example, forming a dielectric layer on the surface of an anode made of a valve acting metal such as aluminum, and then forming a cathode on the surface of the dielectric layer.
近年、電解コンデンサには小型化及び大容量化が望まれている。さらに、高周波に対応して低ＥＳＲ（等価直列抵抗）化のみならず、過渡応答性に優れた低ＥＳＬ（等価直列インダクタンス）化が要求されている。 In recent years, it has been desired to reduce the size and capacity of electrolytic capacitors. Further, not only low ESR (equivalent series resistance) corresponding to high frequency, but also low ESL (equivalent series inductance) excellent in transient response is required.
特許文献１には、弁作用金属からなる矩形状の陽極体を絶縁部を設けて短辺方向で陽極部と陰極部に分離し、この陰極部の表面に誘電体酸化皮膜層、固体電解質層、陰極層が順次積層形成されたコンデンサ素子と、このコンデンサ素子を単独または２枚以上積層した状態で陰極部に接続されたコム端子と、このコム端子ならびに陽極部の一部が夫々外表面に露呈する状態で上記コンデンサ素子を被覆した絶縁性の外装樹脂と、この外装樹脂の長辺側の側面に対向して設けられ、上記コム端子とコンデンサ素子の陽極部が夫々接続された一対の外部電極からなる固体電解コンデンサが開示されている。 In Patent Document 1, a rectangular anode made of a valve acting metal is provided with an insulating portion and separated into an anode portion and a cathode portion in the short side direction, and a dielectric oxide film layer and a solid electrolyte layer are provided on the surface of the cathode portion. , A capacitor element in which the cathode layers are sequentially laminated, a comb terminal connected to the cathode portion in a state where one or two or more of these capacitor elements are laminated, and a part of the comb terminal and the anode portion are on the outer surface, respectively. A pair of external resins that are provided facing the long side side surface of the insulating exterior resin that coats the capacitor element in an exposed state, and the comb terminal and the anode portion of the capacitor element are connected to each other. A solid electrolytic capacitor consisting of electrodes is disclosed.
特許文献２には、少なくとも誘電体層を介して交互に積層された複数の陽極および複数の陰極と、少なくとも一つの陽極引き出し部と、少なくとも一つの陰極引き出し部と、単一の陽極端子と、単一の陰極端子とを含み、上記陽極がそれぞれ上記陽極引き出し部に電気的に接続され、上記陰極がそれぞれ上記陰極引き出し部に電気的に接続され、上記陽極引き出し部および上記陰極引き出し部が所定の一方向に引き出され、上記陽極引き出し部が上記陽極端子に接続され、上記陰極引き出し部が上記陰極端子に接続されたコンデンサが開示されている。特許文献２には、誘電体層とともに少なくとも固体電解質層を介して複数の陽極と複数の陰極とが交互に積層される固体電解コンデンサであってもよいことが記載されている。 Patent Document 2 describes a plurality of anodes and a plurality of anodes alternately laminated via at least a dielectric layer, at least one anode extraction portion, at least one cathode extraction portion, and a single anode terminal. The anode is electrically connected to the anode lead-out portion, the anode is electrically connected to the cathode lead-out portion, and the anode lead-out portion and the cathode lead-out portion are predetermined, including a single cathode terminal. Disclosed is a capacitor that is drawn out in one direction, the anode pull-out portion is connected to the anode terminal, and the cathode lead-out portion is connected to the cathode terminal. Patent Document 2 describes that a solid electrolytic capacitor in which a plurality of anodes and a plurality of cathodes are alternately laminated together with a dielectric layer at least via a solid electrolyte layer may be used.
特開２００４－２５９９２９号公報Japanese Unexamined Patent Publication No. 2004-259929 特開２００３－１７８９３３号公報Japanese Unexamined Patent Publication No. 2003-178933
特許文献１及び２によれば、ＥＳＲ及びＥＳＬの低い固体電解コンデンサを提供することができるとされている。しかしながら、特許文献１及び２に記載の固体電解コンデンサでは、いずれも、各コンデンサ素子が高さ方向（厚さ方向ともいう）に沿って積層されている。すなわち、固体電解コンデンサが実装されるべき実装基板の実装面に対して各コンデンサ素子が略垂直に積層されている。そのため、各コンデンサ素子は、側面に形成された外部電極を介して、実装基板の実装電極に接続される。 According to Patent Documents 1 and 2, it is possible to provide a solid electrolytic capacitor having low ESR and ESL. However, in each of the solid electrolytic capacitors described in Patent Documents 1 and 2, each capacitor element is laminated along the height direction (also referred to as the thickness direction). That is, each capacitor element is laminated substantially perpendicular to the mounting surface of the mounting board on which the solid electrolytic capacitor should be mounted. Therefore, each capacitor element is connected to the mounting electrode of the mounting substrate via an external electrode formed on the side surface.
したがって、特許文献１及び２に記載の固体電解コンデンサにおいては、以下の問題がある。
（１）固体電解コンデンサの高さが低くなり、固体電解コンデンサ全体が薄くなるほど、コンデンサ素子の積層数を増やすことが難しくなる。
（２）各コンデンサ素子は、側面に形成された外部電極を介して実装基板の実装電極に接続されるため、各コンデンサ素子の実装基板までの導電経路が長くなるとともに、各コンデンサ素子の実装基板までの距離が異なる。 Therefore, the solid electrolytic capacitors described in Patent Documents 1 and 2 have the following problems.
(1) As the height of the solid electrolytic capacitor becomes lower and the entire solid electrolytic capacitor becomes thinner, it becomes difficult to increase the number of laminated capacitor elements.
(2) Since each capacitor element is connected to the mounting electrode of the mounting board via an external electrode formed on the side surface, the conductive path to the mounting board of each capacitor element becomes long, and the mounting board of each capacitor element becomes long. The distance to is different.
本発明は上記の問題を解決するためになされたものであり、各コンデンサ素子の実装面までの距離が短く、低ＥＳＲ化及び低ＥＳＬ化が可能な電解コンデンサを提供することを目的とする。 The present invention has been made to solve the above problems, and an object of the present invention is to provide an electrolytic capacitor in which the distance to the mounting surface of each capacitor element is short and the ESR and ESL can be reduced.
本発明の電解コンデンサは、積層されている複数のコンデンサ素子を含み、上記コンデンサ素子が、表面に誘電体層を有する陽極と、上記誘電体層を介して上記陽極に対向する陰極とを含む、直方体状の積層体と、上記積層体の周囲に設けられる外層絶縁体と、上記積層体から露出する上記陽極と電気的に接続される第１外部電極と、上記積層体から露出する上記陰極と電気的に接続される第２外部電極と、を備える電解コンデンサであって、上記積層体は、上記電解コンデンサが実装されるべき実装基板の実装面に対向する底面と、上記底面に対向する上面と、上記底面及び上記上面に直交する第１端面と、上記第１端面に対向する第２端面と、上記底面、上記上面、上記第１端面及び上記第２端面に直交する第１側面と、上記第１側面に対向する第２側面と、を有し、上記積層体の第１端面及び第２端面を結ぶ方向を長さ方向、上記積層体の第１側面及び第２側面を結ぶ方向を幅方向、上記積層体の底面及び上面を結ぶ方向を厚さ方向としたとき、上記複数のコンデンサ素子が、長さ方向に沿って積層されている。 The electrolytic capacitor of the present invention includes a plurality of laminated capacitor elements, and the capacitor element includes an electrode having a dielectric layer on its surface and a cathode facing the anode via the dielectric layer. A rectangular laminate, an outer layer insulator provided around the laminate, a first external electrode electrically connected to the anode exposed from the laminate, and a cathode exposed from the laminate. An electrolytic capacitor including an electrically connected second external electrode, wherein the laminate has a bottom surface facing the mounting surface of the mounting substrate on which the electrolytic capacitor is mounted and an upper surface facing the bottom surface. A first end surface orthogonal to the bottom surface and the upper surface, a second end surface facing the first end surface, and a first side surface orthogonal to the bottom surface, the upper surface, the first end surface, and the second end surface. It has a second side surface facing the first side surface, and the direction connecting the first end surface and the second end surface of the laminated body is the length direction, and the direction connecting the first side surface and the second side surface of the laminated body is the length direction. When the width direction and the direction connecting the bottom surface and the upper surface of the laminated body are the thickness direction, the plurality of capacitor elements are laminated along the length direction.
本発明によれば、各コンデンサ素子の実装面までの距離が短く、低ＥＳＲ化及び低ＥＳＬ化が可能な電解コンデンサを提供することができる。 According to the present invention, it is possible to provide an electrolytic capacitor in which the distance to the mounting surface of each capacitor element is short and the ESR and ESL can be reduced.
図１（ａ）は、本発明の第１実施形態に係る電解コンデンサの一例を模式的に示す斜視図であり、図１（ｂ）は、図１（ａ）に示す電解コンデンサが実装基板に実装された実装構造の一例を模式的に示す斜視図である。FIG. 1 (a) is a perspective view schematically showing an example of an electrolytic capacitor according to the first embodiment of the present invention, and FIG. 1 (b) shows an electrolytic capacitor shown in FIG. 1 (a) mounted on a mounting substrate. It is a perspective view which shows an example of the mounted mounting structure schematically. 図２（ａ）は、図１（ａ）に示す電解コンデンサから外層絶縁体を除いた積層体の一例を模式的に示す斜視図であり、図２（ｂ）は、図２（ａ）に示す積層体に含まれるコンデンサ素子の構成の一例を模式的に示す斜視図である。FIG. 2A is a perspective view schematically showing an example of a laminated body obtained by removing the outer layer insulator from the electrolytic capacitor shown in FIG. 1A, and FIG. 2B is shown in FIG. 2A. It is a perspective view which shows typically an example of the structure of the capacitor element included in the laminated body shown. 図３（ａ）は、図１（ａ）に示す電解コンデンサを底面から見た斜視図であり、図３（ｂ）は、図３（ａ）に示す電解コンデンサから第１外部電極及び第２外部電極を除いた状態を模式的に示す斜視図である。FIG. 3A is a perspective view of the electrolytic capacitor shown in FIG. 1A as viewed from the bottom surface, and FIG. 3B shows the first external electrode and the second external electrode and the second from the electrolytic capacitor shown in FIG. 3A. It is a perspective view which shows typically the state which removed the external electrode. 図４は、コンデンサ素子シートの一例を模式的に示す斜視図である。FIG. 4 is a perspective view schematically showing an example of a capacitor element sheet. 図５は、積層体ブロックの一例を模式的に示す斜視図である。FIG. 5 is a perspective view schematically showing an example of a laminated body block. 図６は、積層体ブロックの一例を模式的に示す斜視図である。FIG. 6 is a perspective view schematically showing an example of a laminated body block. 図７（ａ）及び図７（ｂ）は、樹脂フィルム付き積層体ブロックを個片化する工程の一例を模式的に示す斜視図である。7 (a) and 7 (b) are perspective views schematically showing an example of a step of individualizing a laminated block with a resin film. 図８（ａ）及び図８（ｂ）は、外層絶縁体を形成する工程の一例を模式的に示す斜視図である。8 (a) and 8 (b) are perspective views schematically showing an example of a process of forming an outer layer insulator. 図９（ａ）及び図９（ｂ）は、第１外部電極及び第２外部電極を形成する工程の一例を模式的に示す斜視図である。9 (a) and 9 (b) are perspective views schematically showing an example of a process of forming the first external electrode and the second external electrode. 図１０は、本発明の第２実施形態に係る電解コンデンサの一例を底面から見た斜視図である。FIG. 10 is a perspective view of an example of the electrolytic capacitor according to the second embodiment of the present invention as viewed from the bottom. 図１１は、本発明の第３実施形態に係る電解コンデンサの一例を底面から見た斜視図である。FIG. 11 is a perspective view of an example of the electrolytic capacitor according to the third embodiment of the present invention as viewed from the bottom. 図１２は、本発明の第４実施形態に係る電解コンデンサの一例を底面から見た斜視図である。FIG. 12 is a perspective view of an example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom. 図１３は、本発明の第４実施形態に係る電解コンデンサの別の一例を底面から見た斜視図である。FIG. 13 is a perspective view of another example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom.
以下、本発明の電解コンデンサについて説明する。
しかしながら、本発明は、以下の構成に限定されるものではなく、本発明の要旨を変更しない範囲において適宜変更して適用することができる。なお、以下において記載する各実施形態の望ましい構成を２つ以上組み合わせたものもまた本発明である。 Hereinafter, the electrolytic capacitor of the present invention will be described.
However, the present invention is not limited to the following configurations, and can be appropriately modified and applied without changing the gist of the present invention. It should be noted that a combination of two or more desirable configurations of each of the embodiments described below is also the present invention.
以下に示す各実施形態に係る電解コンデンサは、固体電解質層を有する固体電解コンデンサであるが、本発明の電解コンデンサは、固体電解質に代えて電解液を使用した電解コンデンサであってもよいし、固体電解質とともに電解液を使用した電解コンデンサであってもよい。 The electrolytic capacitor according to each embodiment shown below is a solid electrolytic capacitor having a solid electrolyte layer, but the electrolytic capacitor of the present invention may be an electrolytic capacitor using an electrolytic solution instead of the solid electrolyte. It may be an electrolytic capacitor using an electrolytic solution together with a solid electrolyte.
［第１実施形態］
（電解コンデンサ）
図１（ａ）は、本発明の第１実施形態に係る電解コンデンサの一例を模式的に示す斜視図であり、図１（ｂ）は、図１（ａ）に示す電解コンデンサが実装基板に実装された実装構造の一例を模式的に示す斜視図である。図２（ａ）は、図１（ａ）に示す電解コンデンサから外層絶縁体を除いた積層体の一例を模式的に示す斜視図であり、図２（ｂ）は、図２（ａ）に示す積層体に含まれるコンデンサ素子の構成の一例を模式的に示す斜視図である。 [First Embodiment]
(Electrolytic capacitor)
FIG. 1 (a) is a perspective view schematically showing an example of an electrolytic capacitor according to the first embodiment of the present invention, and FIG. 1 (b) shows an electrolytic capacitor shown in FIG. 1 (a) mounted on a mounting substrate. It is a perspective view which shows an example of the mounted mounting structure schematically. FIG. 2A is a perspective view schematically showing an example of a laminated body obtained by removing the outer layer insulator from the electrolytic capacitor shown in FIG. 1A, and FIG. 2B is shown in FIG. 2A. It is a perspective view which shows typically an example of the structure of the capacitor element included in the laminated body shown.
図１（ａ）に示す電解コンデンサ１は、図２（ａ）及び図２（ｂ）に示す直方体状の積層体５と、積層体５の周囲に設けられる外層絶縁体７ａ、７ｂ、７ｃ、７ｄ、７ｅ及び７ｆとを備える。図２（ａ）及び図２（ｂ）に示すように、積層体５は、積層されている複数のコンデンサ素子３を含む。電解コンデンサ１は、図１（ｂ）に示すように、実装基板９に実装される。 The electrolytic capacitor 1 shown in FIG. 1 (a) includes the rectangular parallelepiped laminated body 5 shown in FIGS. 2 (a) and 2 (b), and outer layer insulators 7a, 7b, 7c provided around the laminated body 5. It includes 7d, 7e and 7f. As shown in FIGS. 2A and 2B, the laminated body 5 includes a plurality of laminated capacitor elements 3. The electrolytic capacitor 1 is mounted on the mounting board 9 as shown in FIG. 1 (b).
コンデンサ素子３は、図２（ｂ）に示すように、表面に誘電体層１９を有する陽極１１と、誘電体層１９を介して陽極１１に対向する陰極１５とを含む。 As shown in FIG. 2B, the capacitor element 3 includes an anode 11 having a dielectric layer 19 on its surface and a cathode 15 facing the anode 11 via the dielectric layer 19.
積層体５は、図２（ａ）に示すように、電解コンデンサ１が実装されるべき実装基板９の実装面９ｃ（図１（ｂ）参照）に対向する底面５ｆと、底面５ｆに対向する上面５ｄと、底面５ｆ及び上面５ｄに直交する第１端面５ａと、第１端面５ａに対向する第２端面５ｂと、底面５ｆ、上面５ｄ、第１端面５ａ及び第２端面５ｂに直交する第１側面５ｃと、第１側面５ｃに対向する第２側面５ｅとを有する。 As shown in FIG. 2A, the laminate 5 faces the bottom surface 5f facing the mounting surface 9c (see FIG. 1B) of the mounting board 9 on which the electrolytic capacitor 1 should be mounted, and the bottom surface 5f. The top surface 5d, the first end surface 5a orthogonal to the bottom surface 5f and the top surface 5d, the second end surface 5b facing the first end surface 5a, the bottom surface 5f, the top surface 5d, the first end surface 5a and the second end surface 5b orthogonal to the second end surface 5b. It has one side surface 5c and a second side surface 5e facing the first side surface 5c.
外層絶縁体７ａ、７ｂ、７ｃ、７ｄ、７ｅ及び７ｆは、図１（ａ）に示すように、積層体５の第１端面５ａに設けられる第１外層絶縁体７ａと、積層体５の第２端面５ｂに設けられる第２外層絶縁体７ｂと、積層体５の第１側面５ｃに設けられる第３外層絶縁体７ｃと、積層体５の上面５ｄに設けられる第４外層絶縁体７ｄと、積層体５の第２側面５ｅに設けられる第５外層絶縁体７ｅと、積層体５の底面５ｆに設けられる第６外層絶縁体７ｆとを含む。 As shown in FIG. 1A, the outer layer insulators 7a, 7b, 7c, 7d, 7e and 7f are the first outer layer insulator 7a provided on the first end surface 5a of the laminated body 5 and the first outer layer insulator 7a of the laminated body 5. A second outer layer insulator 7b provided on the two end faces 5b, a third outer layer insulator 7c provided on the first side surface 5c of the laminate 5, and a fourth outer layer insulator 7d provided on the upper surface 5d of the laminate 5. The fifth outer layer insulator 7e provided on the second side surface 5e of the laminated body 5 and the sixth outer layer insulator 7f provided on the bottom surface 5f of the laminated body 5 are included.
積層体５の第１端面５ａ及び第２端面５ｂを結ぶ方向を長さ方向（図１（ｂ）及び図２（ａ）中、Ｌで示す方向）、積層体５の第１側面５ｃ及び第２側面５ｅを結ぶ方向を幅方向（図１（ｂ）及び図２（ａ）中、Ｗで示す方向）、積層体５の底面５ｆ及び上面５ｄを結ぶ方向を厚さ方向（図１（ｂ）及び図２（ａ）中、Ｔで示す方向）としたとき、複数のコンデンサ素子３は、図２（ａ）に示すように、長さ方向（Ｌ方向）に沿って積層されている。したがって、コンデンサ素子３の積層方向は、実装基板９の実装面９ｃに対して略平行となる（図１（ｂ）参照）。 The direction connecting the first end surface 5a and the second end surface 5b of the laminated body 5 is the length direction (the direction indicated by L in FIGS. 1B and 2A), and the first side surface 5c and the first side surface 5c of the laminated body 5. The direction connecting the two side surfaces 5e is the width direction (the direction indicated by W in FIGS. 1B and 2A), and the direction connecting the bottom surface 5f and the top surface 5d of the laminated body 5 is the thickness direction (FIG. 1 (b). ) And the direction indicated by T in FIG. 2A), the plurality of capacitor elements 3 are stacked along the length direction (L direction) as shown in FIG. 2A. Therefore, the stacking direction of the capacitor elements 3 is substantially parallel to the mounting surface 9c of the mounting substrate 9 (see FIG. 1B).
複数のコンデンサ素子３を長さ方向（Ｌ方向）に沿って積層することにより、複数のコンデンサ素子３が実装基板９の実装面９ｃに対して近距離かつ等距離になるように積層される。そのため、各コンデンサ素子３の実装面９ｃに設けられているプラス実装電極９ａ１又はマイナス実装電極９ａ２までの距離を短くすることができる。その結果、電解コンデンサ１の低ＥＳＲ化及び低ＥＳＬ化が可能となる。 By stacking the plurality of capacitor elements 3 along the length direction (L direction), the plurality of capacitor elements 3 are laminated so as to be close to and equidistant from the mounting surface 9c of the mounting substrate 9. Therefore, the distance to the positive mounting electrode 9a 1 or the negative mounting electrode 9a 2 provided on the mounting surface 9c of each capacitor element 3 can be shortened. As a result, the electrolytic capacitor 1 can be reduced in ESR and ESL.
一例として、電解コンデンサ１は、Ｌ方向の寸法が３．５ｍｍ、Ｗ方向の寸法が２．８ｍｍ、Ｔ方向の寸法が１．９ｍｍである。 As an example, the electrolytic capacitor 1 has a dimension of 3.5 mm in the L direction, a dimension of 2.8 mm in the W direction, and a dimension of 1.9 mm in the T direction.
電解コンデンサ１では、積層体５の長さ方向の寸法Ｌ、積層体５の幅方向の寸法Ｗ、及び、積層体５の厚さ方向の寸法Ｔは、Ｌ＞Ｗ＞Ｔを満たすことが好ましい。あるいは、Ｗ＞Ｌ＞Ｔを満たすことも好ましい。複数のコンデンサ素子３が長さ方向（Ｌ方向）に沿って積層されている電解コンデンサ１では、Ｌ＞Ｗ＞Ｔ、又は、Ｗ＞Ｌ＞Ｔを満たす場合、複数のコンデンサ素子３が厚さ方向（Ｔ方向）に沿って積層されている電解コンデンサと比べて、コンデンサ素子３の積層数が増大し、多並列化することができる。その結果、電解コンデンサ１の低ＥＳＲ化が可能となる。 In the electrolytic capacitor 1, it is preferable that the dimension L in the length direction of the laminate 5, the dimension W in the width direction of the laminate 5, and the dimension T in the thickness direction of the laminate 5 satisfy L> W> T. .. Alternatively, it is also preferable to satisfy W> L> T. In the electrolytic capacitor 1 in which a plurality of capacitor elements 3 are stacked along the length direction (L direction), when L> W> T or W> L> T is satisfied, the plurality of capacitor elements 3 have a thickness. Compared with the electrolytic capacitors stacked along the direction (T direction), the number of stacked capacitor elements 3 is increased, and multiple parallelization is possible. As a result, the ESR of the electrolytic capacitor 1 can be reduced.
電解コンデンサ１では、図２（ｂ）に示すように、複数のコンデンサ素子３の容量部の外形が、積層体５の外形を構成していることが好ましい。この場合、容量部を除いて、陽極１１と陰極１５を絶縁するような構成や、陽極引き出し部および陰極引き出し部といった構成が積層体５の内部に存在しないため、大容量化が可能となる。 In the electrolytic capacitor 1, as shown in FIG. 2B, it is preferable that the outer shape of the capacitance portion of the plurality of capacitor elements 3 constitutes the outer shape of the laminated body 5. In this case, since there is no configuration such as insulating the anode 11 and the cathode 15 or a configuration such as an anode lead-out portion and a cathode lead-out portion inside the laminate 5 except for the capacitance portion, the capacity can be increased.
図３（ａ）は、図１（ａ）に示す電解コンデンサを底面から見た斜視図であり、図３（ｂ）は、図３（ａ）に示す電解コンデンサから第１外部電極及び第２外部電極を除いた状態を模式的に示す斜視図である。
図３（ａ）及び図３（ｂ）に示すように、電解コンデンサ１は、積層体５から露出する陽極１１と電気的に接続される第１外部電極１３と、積層体５から露出する陰極１５と電気的に接続される第２外部電極１７とを備える。 FIG. 3A is a perspective view of the electrolytic capacitor shown in FIG. 1A as viewed from the bottom surface, and FIG. 3B shows the first external electrode and the second external electrode and the second from the electrolytic capacitor shown in FIG. 3A. It is a perspective view which shows typically the state which removed the external electrode.
As shown in FIGS. 3A and 3B, the electrolytic capacitor 1 includes a first external electrode 13 electrically connected to an anode 11 exposed from the laminate 5, and a cathode exposed from the laminate 5. A second external electrode 17 that is electrically connected to the 15 is provided.
第１外部電極１３は、積層体５の底面５ｆから露出する陽極１１と電気的に接続されるように、積層体５の底面５ｆに設けられ、第２外部電極１７は、積層体５の底面５ｆから露出する陰極１５と電気的に接続されるように、積層体５の底面５ｆに設けられている。この場合、各コンデンサ素子３の実装面９ｃに設けられているプラス実装電極９ａ１又はマイナス実装電極９ａ２までの距離を短くすることができる。その結果、電解コンデンサ１の低ＥＳＲ化及び低ＥＳＬ化が可能となる。 The first external electrode 13 is provided on the bottom surface 5f of the laminate 5 so as to be electrically connected to the anode 11 exposed from the bottom surface 5f of the laminate 5, and the second external electrode 17 is the bottom surface of the laminate 5. It is provided on the bottom surface 5f of the laminate 5 so as to be electrically connected to the cathode 15 exposed from 5f. In this case, the distance to the positive mounting electrode 9a 1 or the negative mounting electrode 9a 2 provided on the mounting surface 9c of each capacitor element 3 can be shortened. As a result, the electrolytic capacitor 1 can be reduced in ESR and ESL.
陽極１１は、積層体５の底面５ｆ上に形成された第６外層絶縁体７ｆに形成された第１開口部７ｆ１から露出している。陰極１５は、積層体５の底面５ｆ上に形成された第６外層絶縁体７ｆに形成された第２開口部７ｆ２から露出している。 The anode 11 is exposed from the first opening 7f 1 formed in the sixth layer insulator 7f formed on the bottom surface 5f of the laminate 5. The cathode 15 is exposed from the second opening 7f 2 formed in the sixth outer layer insulator 7f formed on the bottom surface 5f of the laminated body 5.
第１開口部７ｆ１及び第２開口部７ｆ２は、第６外層絶縁体７ｆをレーザーによる熱加工またはアブレーション加工で除去することにより形成される。 The first opening 7f 1 and the second opening 7f 2 are formed by removing the sixth outer layer insulator 7f by thermal processing or ablation processing with a laser.
レーザーとしては、紫外線（ＵＶ）レーザー（波長３５５ｎｍ）、グリーンレーザー（波長５３２ｎｍ）、赤外線（ＩＲ）レーザー（波長１０６４ｎｍ）、炭酸ガス（ＣＯ２）レーザー（波長１０．６μｍ）などが用いられる。特に、アブレーション加工で微細加工が可能なＵＶレーザー又はグリーンレーザーが好ましい。波長としては２４８ｎｍ以上５３２ｎｍ以下が好ましい。 As the laser, an ultraviolet (UV) laser (wavelength 355 nm), a green laser (wavelength 532 nm), an infrared (IR) laser (wavelength 1064 nm), a carbon dioxide gas (CO 2 ) laser (wavelength 10.6 μm) and the like are used. In particular, a UV laser or a green laser that can be finely processed by ablation processing is preferable. The wavelength is preferably 248 nm or more and 532 nm or less.
上記のレーザーを用いれば、第６外層絶縁体７ｆの所望の位置にレーザー加工を行うことにより、第６外層絶縁体７ｆに第１開口部７ｆ１及び第２開口部７ｆ２を形成することができる。そのため、積層体５の底面５ｆに陽極１１及び陰極１５を選択的に露出させることができる。 By using the above laser, the first opening 7f 1 and the second opening 7f 2 can be formed in the sixth outer layer insulator 7f by performing laser processing at a desired position of the sixth outer layer insulator 7f. it can. Therefore, the anode 11 and the cathode 15 can be selectively exposed on the bottom surface 5f of the laminated body 5.
（コンデンサ素子）
コンデンサ素子３を構成する陽極１１は、弁作用金属箔を中心に有し、エッチング層等の多孔質層（図示しない）を表面に有している。多孔質層の表面には誘電体層１９が設けられている。 (Capacitor element)
The anode 11 constituting the capacitor element 3 has a valve acting metal leaf at the center, and has a porous layer (not shown) such as an etching layer on the surface. A dielectric layer 19 is provided on the surface of the porous layer.
弁作用金属としては、例えば、アルミニウム、タンタル、ニオブ、チタン、ジルコニウム、マグネシウム、ケイ素等の金属単体、又は、これらの金属を含む合金等が挙げられる。これらの中では、アルミニウム又はアルミニウム合金が好ましい。 Examples of the valve acting metal include simple metals such as aluminum, tantalum, niobium, titanium, zirconium, magnesium and silicon, or alloys containing these metals. Among these, aluminum or an aluminum alloy is preferable.
弁作用金属の形状は特に限定されないが、平板状であることが好ましく、箔状であることがより好ましい。また、多孔質層は塩酸等によりエッチング処理されたエッチング層であることが好ましい。 The shape of the valve acting metal is not particularly limited, but it is preferably flat, more preferably foil. Further, the porous layer is preferably an etching layer that has been etched with hydrochloric acid or the like.
エッチング処理前の弁作用金属箔の厚さが６０μｍ以上であることが好ましく、１８０μｍ以下であることが好ましい。また、エッチング処理後にエッチングされていない弁作用金属箔（芯部）の厚さが１０μｍ以上であることが好ましく、７０μｍ以下であることが好ましい。多孔質層の厚さは電解コンデンサに要求される耐電圧、静電容量に合わせて設計されるが、弁作用金属箔の両側の多孔質層を合わせて１０μｍ以上であることが好ましく、１２０μｍ以下であることが好ましい。 The thickness of the valve acting metal foil before the etching treatment is preferably 60 μm or more, and preferably 180 μm or less. Further, the thickness of the valve acting metal foil (core portion) that has not been etched after the etching treatment is preferably 10 μm or more, and preferably 70 μm or less. The thickness of the porous layer is designed according to the withstand voltage and capacitance required for the electrolytic capacitor, but the total thickness of the porous layers on both sides of the valve acting metal foil is preferably 10 μm or more, and 120 μm or less. Is preferable.
陽極１１は、積層体５の底面５ｆに引き出されて第１外部電極１３に電気的に接続される。 The anode 11 is drawn out to the bottom surface 5f of the laminated body 5 and is electrically connected to the first external electrode 13.
誘電体層１９は、上記弁作用金属の酸化皮膜からなることが好ましい。例えば、弁作用金属箔としてアルミニウム箔が用いられる場合、ホウ酸、リン酸、アジピン酸、又は、それらのナトリウム塩、アンモニウム塩等を含む水溶液中で陽極酸化することにより、誘電体層となる酸化皮膜を形成することができる。 The dielectric layer 19 is preferably made of an oxide film of the valve acting metal. For example, when an aluminum foil is used as a valve acting metal foil, it is oxidized to form a dielectric layer by anodization in an aqueous solution containing boric acid, phosphoric acid, adipic acid, or a sodium salt or ammonium salt thereof. A film can be formed.
誘電体層１９は、多孔質層の表面に沿って形成されることにより細孔（凹部）が形成されている。誘電体層１９の厚さは電解コンデンサに要求される耐電圧、静電容量に合わせて設計されるが、１０ｎｍ以上であることが好ましく、１００ｎｍ以下であることが好ましい。 The dielectric layer 19 has pores (recesses) formed by being formed along the surface of the porous layer. The thickness of the dielectric layer 19 is designed according to the withstand voltage and capacitance required for the electrolytic capacitor, but is preferably 10 nm or more, and preferably 100 nm or less.
コンデンサ素子３を構成する陰極１５は、誘電体層１９上に形成される固体電解質層１５ａと、固体電解質層１５ａ上に形成される導電層１５ｂと、導電層１５ｂ上に形成される陰極引き出し層１５ｃとが積層されてなる。したがって、電解コンデンサ１は、陰極１５の一部として固体電解質層１５ａが設けられている固体電解コンデンサである。 The cathode 15 constituting the capacitor element 3 includes a solid electrolyte layer 15a formed on the dielectric layer 19, a conductive layer 15b formed on the solid electrolyte layer 15a, and a cathode extraction layer formed on the conductive layer 15b. 15c and 15c are laminated. Therefore, the electrolytic capacitor 1 is a solid electrolytic capacitor provided with a solid electrolyte layer 15a as a part of the cathode 15.
固体電解質層１５ａを構成する材料としては、例えば、ピロール類、チオフェン類、アニリン類等を骨格とした導電性高分子等が挙げられる。チオフェン類を骨格とする導電性高分子としては、例えば、ＰＥＤＯＴ［ポリ（３，４－エチレンジオキシチオフェン）］が挙げられ、ドーパントとなるポリスチレンスルホン酸（ＰＳＳ）と複合化させたＰＥＤＯＴ：ＰＳＳであってもよい。 Examples of the material constituting the solid electrolyte layer 15a include conductive polymers having pyrroles, thiophenes, anilines and the like as skeletons. Examples of the conductive polymer having thiophenes as a skeleton include PEDOT [poly (3,4-ethylenedioxythiophene)], and PEDOT: PSS complexed with polystyrene sulfonic acid (PSS) as a dopant. It may be.
固体電解質層１５ａは、例えば、３，４－エチレンジオキシチオフェン等のモノマーを含む処理液を用いて、誘電体層の表面にポリ（３，４－エチレンジオキシチオフェン）等の重合膜を形成する方法や、ポリ（３，４－エチレンジオキシチオフェン）等のポリマーの分散液を誘電体層の表面に塗布して乾燥させる方法等によって形成される。なお、細孔（凹部）を充填する内層用の固体電解質層を形成した後、誘電体層全体を被覆する外層用の固体電解質層を形成することが好ましい。 For the solid electrolyte layer 15a, for example, a polymer film such as poly (3,4-ethylenedioxythiophene) is formed on the surface of the dielectric layer using a treatment liquid containing a monomer such as 3,4-ethylenedioxythiophene. It is formed by a method of applying a dispersion of a polymer such as poly (3,4-ethylenedioxythiophene) to the surface of the dielectric layer and drying it. It is preferable to form the solid electrolyte layer for the inner layer that fills the pores (recesses), and then form the solid electrolyte layer for the outer layer that covers the entire dielectric layer.
固体電解質層１５ａは、上記の処理液または分散液を、スポンジ転写、スクリーン印刷、スプレー塗布、ディスペンサ塗布、インクジェット印刷、ディップ等によって誘電体層上に形成することにより、区画された所定の領域あるいはコンデンサ素子シート２３のサイズ全域に形成することができる。 The solid electrolyte layer 15a is formed by forming the above-mentioned treatment liquid or dispersion liquid on the dielectric layer by sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, dipping, or the like to form a predetermined region or a partitioned region. It can be formed over the entire size of the capacitor element sheet 23.
固体電解質層１５ａの厚さは２μｍ以上であることが好ましく、２０μｍ以下であることが好ましい。 The thickness of the solid electrolyte layer 15a is preferably 2 μm or more, and preferably 20 μm or less.
導電層１５ｂは、固体電解質層１５ａと陰極引き出し層１５ｃとを電気的におよび機械的に接続させるために設けられている。例えば、カーボンペースト、グラフェンペースト、銀ペーストのような導電性ペーストを付与することによって形成されてなるカーボン層、グラフェン層又は銀層であることが好ましい。また、カーボン層やグラフェン層の上に銀層が設けられた複合層や、カーボンペーストやグラフェンペーストと銀ペーストを混合する混合層であってもよい。 The conductive layer 15b is provided to electrically and mechanically connect the solid electrolyte layer 15a and the cathode extraction layer 15c. For example, it is preferably a carbon layer, a graphene layer or a silver layer formed by applying a conductive paste such as a carbon paste, a graphene paste or a silver paste. Further, it may be a composite layer in which a silver layer is provided on the carbon layer or the graphene layer, or a mixed layer in which the carbon paste or the graphene paste and the silver paste are mixed.
導電層１５ｂは、カーボンペースト等の導電性ペーストをスポンジ転写、スクリーン印刷、スプレー塗布、ディスペンサ塗布、インクジェット印刷、ディップ等によって固体電解質層上に形成することにより、区画された所定の領域あるいはコンデンサ素子シート２３のサイズ全域に形成することができる。 The conductive layer 15b is formed by forming a conductive paste such as carbon paste on the solid electrolyte layer by sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, dipping, etc., thereby forming a predetermined region or a capacitor element. It can be formed over the entire size of the sheet 23.
導電層１５ｂの厚さは２μｍ以上であることが好ましく、２０μｍ以下であることが好ましい。 The thickness of the conductive layer 15b is preferably 2 μm or more, and preferably 20 μm or less.
陰極引き出し層１５ｃは、金属箔または電極ペースト層により形成することができる。 The cathode extraction layer 15c can be formed of a metal foil or an electrode paste layer.
金属箔の場合は、Ａｌ、Ｃｕ、Ａｇ及びこれらの金属を主成分とする合金からなる群より選択される少なくとも一種の金属からなることが好ましい。金属箔が上記の金属からなると、金属箔の抵抗値を低減させることができ、ＥＳＲを低減させることができる。 In the case of a metal foil, it is preferably composed of at least one metal selected from the group consisting of Al, Cu, Ag and alloys containing these metals as main components. When the metal foil is made of the above metal, the resistance value of the metal foil can be reduced and the ESR can be reduced.
また、金属箔として、表面にスパッタや蒸着等の成膜方法によりカーボンコートやチタンコートがされた金属箔を用いてもよい。カーボンコートされたアルミニウム箔を用いることがより好ましい。 Further, as the metal foil, a metal foil having a surface coated with carbon or titanium by a film forming method such as sputtering or vapor deposition may be used. It is more preferable to use carbon coated aluminum foil.
金属箔の厚さは特に限定されないが、製造工程でのハンドリング、小型化、およびＥＳＲを低減させる観点からは、２０μｍ以上であることが好ましく、５０μｍ以下であることが好ましい。 The thickness of the metal foil is not particularly limited, but from the viewpoint of handling in the manufacturing process, miniaturization, and reduction of ESR, it is preferably 20 μm or more, and preferably 50 μm or less.
電極ペースト層の場合は、電極ペーストをスポンジ転写、スクリーン印刷、スプレー塗布、ディスペンサ塗布、インクジェット印刷、ディップ等によって導電層上に形成することにより、所定の領域に陰極引き出し層１５ｃを形成することができる。電極ペーストとしては、Ａｇ、Ｃｕ、またはＮｉを主成分とする電極ペーストが好ましい。 In the case of the electrode paste layer, the cathode extraction layer 15c can be formed in a predetermined region by forming the electrode paste on the conductive layer by sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, dipping or the like. it can. As the electrode paste, an electrode paste containing Ag, Cu, or Ni as a main component is preferable.
陰極引き出し層１５ｃを電極ペースト層とする場合、電極ペースト層の厚さを金属箔を用いる場合よりも薄くすることが可能であり、スクリーン印刷の場合、２μｍ以上、２０μｍ以下の厚さとすることも可能である。 When the cathode extraction layer 15c is used as the electrode paste layer, the thickness of the electrode paste layer can be made thinner than when a metal foil is used, and in the case of screen printing, the thickness may be 2 μm or more and 20 μm or less. It is possible.
陰極引き出し層１５ｃは、積層体５の底面５ｆに引き出されて第２外部電極１７に電気的に接続される。 The cathode extraction layer 15c is drawn out to the bottom surface 5f of the laminated body 5 and is electrically connected to the second external electrode 17.
（外層絶縁体）
第１外層絶縁体７ａ及び第２外層絶縁体７ｂは、積層方向である長さ方向（Ｌ方向）の両主面に設けられ、第３外層絶縁体７ｃ及び第５外層絶縁体７ｅは、幅方向（Ｗ方向）の両主面に設けられ、第４外層絶縁体７ｄ及び第６外層絶縁体７ｆは、厚さ方向（Ｔ方向）の両主面に設けられている。 (Outer layer insulator)
The first outer layer insulator 7a and the second outer layer insulator 7b are provided on both main surfaces in the length direction (L direction), which is the stacking direction, and the third outer layer insulator 7c and the fifth outer layer insulator 7e are width. The fourth outer layer insulator 7d and the sixth outer layer insulator 7f are provided on both main surfaces in the direction (W direction), and are provided on both main surfaces in the thickness direction (T direction).
第１外層絶縁体７ａ及び第２外層絶縁体７ｂは、少なくとも樹脂を含む。樹脂としては、例えば、ポリプロピレン樹脂、ポリエチレン樹脂（ＰＥＴ樹脂を含む）、ナイロン樹脂、ポリイミド樹脂、シリコーン樹脂、エポキシ樹脂、ガラスエポキシ樹脂、液晶ポリマー等を用いることが好ましい。 The first outer layer insulator 7a and the second outer layer insulator 7b contain at least a resin. As the resin, for example, polypropylene resin, polyethylene resin (including PET resin), nylon resin, polyimide resin, silicone resin, epoxy resin, glass epoxy resin, liquid crystal polymer and the like are preferably used.
また、第１外層絶縁体７ａ及び第２外層絶縁体７ｂは、フィルム状を有することが好ましい。 Further, the first outer layer insulator 7a and the second outer layer insulator 7b preferably have a film shape.
第１外層絶縁体７ａ及び第２外層絶縁体７ｂは、樹脂フィルムの間に金属層または酸化物層を含んでもよい。金属層としては、アルミニウム、銅、ニッケル、銀等を用いることが好ましい。金属層は、金属箔であることが好ましいが、金属蒸着膜等でもよい。酸化物層としては、シリカ、アルミナ等を用いることが好ましい。シリカ、アルミナ等の酸化物は、樹脂フィルムの中にフィラーとして含まれていてもよい。 The first outer layer insulator 7a and the second outer layer insulator 7b may include a metal layer or an oxide layer between the resin films. As the metal layer, it is preferable to use aluminum, copper, nickel, silver or the like. The metal layer is preferably a metal foil, but may be a metal vapor deposition film or the like. It is preferable to use silica, alumina or the like as the oxide layer. Oxides such as silica and alumina may be contained as a filler in the resin film.
第１外層絶縁体７ａ及び第２外層絶縁体７ｂは、樹脂フィルムとアルミニウム箔と樹脂フィルムとがサンドイッチ構造になった、いわゆるアルミラミネートフィルムでもよい。 The first outer layer insulator 7a and the second outer layer insulator 7b may be a so-called aluminum laminated film in which a resin film, an aluminum foil, and a resin film have a sandwich structure.
第１外層絶縁体７ａ及び第２外層絶縁体７ｂの形成方法については後述する。 The method for forming the first outer layer insulator 7a and the second outer layer insulator 7b will be described later.
第３外層絶縁体７ｃ、第４外層絶縁体７ｄ、第５外層絶縁体７ｅ及び第６外層絶縁体７ｆは、樹脂による絶縁体、または酸化物による絶縁体を含む。樹脂による絶縁体としては、例えば、エポキシ樹脂、フェノール樹脂、ポリイミド樹脂、シリコーン樹脂、ポリアミド樹脂、液晶ポリマー等を用いることが好ましい。樹脂の形態は、液状樹脂が好ましい。また、フィラーとしては、例えば、シリカ粒子、アルミナ粒子、金属粒子等を用いることが好ましい。酸化物による絶縁体としては、例えば、レーザー加工や放電加工等により、積層体を個片化するときに生じる酸化膜を絶縁体として用いることが好ましい。 The third outer layer insulator 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f include an insulator made of resin or an insulator made of oxide. As the resin insulator, for example, an epoxy resin, a phenol resin, a polyimide resin, a silicone resin, a polyamide resin, a liquid crystal polymer or the like is preferably used. The form of the resin is preferably a liquid resin. Further, as the filler, for example, silica particles, alumina particles, metal particles and the like are preferably used. As the insulator made of oxide, for example, it is preferable to use an oxide film formed when the laminate is individualized by laser processing, electric discharge machining, or the like as the insulator.
第３外層絶縁体７ｃ、第４外層絶縁体７ｄ、第５外層絶縁体７ｅ及び第６外層絶縁体７ｆの形成方法については後述する。 The method for forming the third outer layer insulator 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f will be described later.
中でも、第１外層絶縁体７ａ及び第２外層絶縁体７ｂは、樹脂フィルムから構成され、第３外層絶縁体７ｃ、第４外層絶縁体７ｄ、第５外層絶縁体７ｅ及び第６外層絶縁体７ｆは、絶縁ペースト層から構成されることが好ましい。この場合、絶縁構造を積層体５の内部ではなく積層体５の表面で補償することができるため、コンデンサ素子３の容量部が拡大し、大容量化が可能となる。 Among them, the first outer layer insulator 7a and the second outer layer insulator 7b are composed of a resin film, and the third outer layer insulator 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f. Is preferably composed of an insulating paste layer. In this case, since the insulating structure can be compensated not on the inside of the laminated body 5 but on the surface of the laminated body 5, the capacitance portion of the capacitor element 3 can be expanded and the capacity can be increased.
（外部電極）
図３（ａ）では、第１外部電極１３及び第２外部電極１７は、コンデンサ素子３毎に設けられている。したがって、図１（ｂ）に示す実装構造において、第１外部電極１３及び第２外部電極１７は、半田９ｂを介して実装基板９のプラス実装電極９ａ１及びマイナス実装電極９ａ２にそれぞれ直接接続されている。 (External electrode)
In FIG. 3A, the first external electrode 13 and the second external electrode 17 are provided for each capacitor element 3. Therefore, in the mounting structure shown in FIG. 1B, the first external electrode 13 and the second external electrode 17 are directly connected to the positive mounting electrode 9a 1 and the negative mounting electrode 9a 2 of the mounting substrate 9 via the solder 9b, respectively. Has been done.
実装基板９のプラス実装電極９ａ１又はマイナス実装電極９ａ２に直接接続することにより、コンデンサ素子３同士をつなぐ外部電極が不要となり、外部電極の層数を減らすことができるため、低ＥＳＲ化及び低コスト化が可能となる。 By directly connecting to the positive mounting electrode 9a 1 or the negative mounting electrode 9a 2 of the mounting substrate 9, an external electrode connecting the capacitor elements 3 to each other becomes unnecessary, and the number of layers of the external electrode can be reduced. Cost reduction is possible.
図３（ａ）では、第１外部電極１３は、積層体５の底面５ｆから露出する陽極１１（図３（ｂ）参照）の上に形成される第１めっき層１３ａと、その上に形成される第２めっき層１３ｂとを含む。第２外部電極１７は、積層体５の底面５ｆから露出する陰極１５（図３（ｂ）参照）の上に形成される第１めっき層１７ａと、その上に形成される第２めっき層１７ｂとを含む。 In FIG. 3A, the first external electrode 13 is formed on the first plating layer 13a formed on the anode 11 (see FIG. 3B) exposed from the bottom surface 5f of the laminated body 5. The second plating layer 13b to be formed is included. The second external electrode 17 is a first plating layer 17a formed on the cathode 15 (see FIG. 3B) exposed from the bottom surface 5f of the laminated body 5, and a second plating layer 17b formed on the first plating layer 17a. And include.
第１めっき層１３ａは、ジンケート処理により形成されることが好ましい。すなわち、積層体５の底面５ｆから露出する陽極１１のアルミニウム箔の表面をアルカリエッチングし、陽極１１の酸化膜を除去した後、Ｚｎめっきを行う。次に、無電解Ｎｉめっきによる置換めっきを行うことにより、第１めっき層１３ａとしてＮｉめっき層が形成される。陰極１５においてはアルミニウム以外の場合もあるが、ジンケート処理の際に同様に第１めっき層１７ａとしてＮｉめっき層が形成される。 The first plating layer 13a is preferably formed by a zincate treatment. That is, the surface of the aluminum foil of the anode 11 exposed from the bottom surface 5f of the laminate 5 is alkaline-etched to remove the oxide film of the anode 11, and then Zn plating is performed. Next, a Ni plating layer is formed as the first plating layer 13a by performing replacement plating with electroless Ni plating. Although the cathode 15 may be other than aluminum, a Ni plating layer is similarly formed as the first plating layer 17a during the zincate treatment.
第２めっき層１３ｂ及び１７ｂは、電解Ｓｎめっきを行うことにより形成されることが好ましい。 The second plating layers 13b and 17b are preferably formed by performing electrolytic Sn plating.
第１めっき層１３ａ及び１７ａであるＮｉめっき層は、主として耐湿性向上のために形成されており、第２めっき層１３ｂ及び１７ｂであるＳｎめっき層は、主として半田付け性向上のために形成されている。 The Ni plating layers, which are the first plating layers 13a and 17a, are formed mainly for improving the moisture resistance, and the Sn plating layers, which are the second plating layers 13b and 17b, are mainly formed for improving the solderability. ing.
このように、第１外部電極１３及び第２外部電極１７は、めっき層を含むことが好ましい。外部電極に比較的高抵抗で高価な樹脂電極などを使用しないことにより、低ＥＳＲ化及び低コスト化が可能となる。 As described above, the first external electrode 13 and the second external electrode 17 preferably include a plating layer. By not using an expensive resin electrode having a relatively high resistance for the external electrode, it is possible to reduce the ESR and the cost.
（電解コンデンサの製造方法）
以下、本発明の電解コンデンサの製造方法の一例として、図１（ａ）に示す電解コンデンサ１の製造方法について説明する。 (Manufacturing method of electrolytic capacitor)
Hereinafter, the method for manufacturing the electrolytic capacitor 1 shown in FIG. 1A will be described as an example of the method for manufacturing the electrolytic capacitor of the present invention.
［１］コンデンサ素子シートの作製
図４は、コンデンサ素子シートの一例を模式的に示す斜視図である。
まず、陽極１１を構成するアルミニウム箔等の弁作用金属箔を準備する。弁作用金属箔は、エッチング層等の多孔質層を表面に有する。多孔質層の表面に陽極酸化を行って誘電体層１９を形成する。誘電体層１９上にスクリーン印刷、スプレー塗布、ディスペンサ塗布、インクジェット印刷、またはディップにより固体電解質層１５ａを形成し、続けて固体電解質層１５ａ上にスクリーン印刷、スプレー塗布、ディスペンサ塗布、インクジェット印刷、またはディップによりカーボン層等の導電層１５ｂを形成し、さらに導電層１５ｂ上に陰極引き出し層１５ｃをシート積層又はスクリーン印刷、スプレー塗布、ディスペンサ塗布、インクジェット印刷、またはディップにより形成する。上記工程により、図４に示すコンデンサ素子シート２３が得られる。 [1] Fabrication of Capacitor Element Sheet FIG. 4 is a perspective view schematically showing an example of the capacitor element sheet.
First, a valve acting metal foil such as an aluminum foil constituting the anode 11 is prepared. The valve action metal foil has a porous layer such as an etching layer on the surface. The surface of the porous layer is anodized to form the dielectric layer 19. A solid electrolyte layer 15a is formed on the dielectric layer 19 by screen printing, spray coating, dispenser coating, inkjet printing, or dipping, followed by screen printing, spray coating, dispenser coating, inkjet printing, or dipping on the solid electrolyte layer 15a. A conductive layer 15b such as a carbon layer is formed by dipping, and a cathode drawing layer 15c is further formed on the conductive layer 15b by sheet lamination or screen printing, spray coating, dispenser coating, inkjet printing, or dipping. By the above steps, the capacitor element sheet 23 shown in FIG. 4 is obtained.
［２］コンデンサ素子シートの積層及び熱圧着
図５は、積層体ブロックの一例を模式的に示す斜視図である。
図５に示すように、複数のコンデンサ素子シート２３を積層することにより、積層体ブロック２５が得られる。なお、陰極引き出し層１５ｃが乾燥前の粘性のある状態で複数のコンデンサ素子シート２３を積層することが好ましい。 [2] Lamination and thermocompression bonding of capacitor element sheets FIG. 5 is a perspective view schematically showing an example of a laminated body block.
As shown in FIG. 5, the laminated body block 25 is obtained by laminating a plurality of capacitor element sheets 23. It is preferable that the plurality of capacitor element sheets 23 are laminated in a viscous state before the cathode extraction layer 15c is dried.
図６は、樹脂フィルム付き積層体ブロックの一例を模式的に示す斜視図である。
図６に示すように、積層体ブロック２５の上下に樹脂フィルム２７ａ及び２７ｂを載置し、真空熱圧着装置または大気プレス装置により熱圧着して成形体とすることにより、樹脂フィルム付き積層体ブロック２７が得られる。 FIG. 6 is a perspective view schematically showing an example of a laminated block with a resin film.
As shown in FIG. 6, resin films 27a and 27b are placed above and below the laminate block 25 and thermocompression-bonded with a vacuum thermocompression bonding device or an atmospheric press device to form a molded body, whereby the laminate block with a resin film is formed. 27 is obtained.
樹脂フィルム付き積層体ブロック２７の厚さ（図６中、ｔで示す長さ）は、作製する電解コンデンサ１の長さ方向（Ｌ方向）の寸法となるようにすることが好ましい。なお、樹脂フィルム付き積層体ブロック２７の厚さは、作製する電解コンデンサ１の幅方向（Ｗ方向）の寸法となるようにしてもよい。 It is preferable that the thickness of the laminated block 27 with the resin film (the length indicated by t in FIG. 6) is the dimension in the length direction (L direction) of the electrolytic capacitor 1 to be manufactured. The thickness of the laminated block 27 with the resin film may be the dimension in the width direction (W direction) of the electrolytic capacitor 1 to be manufactured.
［３］樹脂フィルム付き積層体ブロックの個片化
図７（ａ）及び図７（ｂ）は、樹脂フィルム付き積層体ブロックを個片化する工程の一例を模式的に示す斜視図である。
図７（ａ）に示すように、樹脂フィルム付き積層体ブロック２７をダイシングやレーザー等でカットして個片化することにより、図７（ｂ）に示す樹脂フィルム付き積層体２９が得られる。コンデンサ素子シート２３は分割されてコンデンサ素子３となる。樹脂フィルム付き積層体ブロック２７の上面に載置されていた樹脂フィルム２７ａは第１外層絶縁体７ａとなり、下面に載置されていた樹脂フィルム２７ｂは第２外層絶縁体７ｂとなる。 [3] Individualization of Laminated Block with Resin Film FIGS. 7 (a) and 7 (b) are perspective views schematically showing an example of a step of individualizing a laminated block with a resin film.
As shown in FIG. 7 (a), the laminate block 27 with a resin film shown in FIG. 7 (b) can be obtained by cutting the laminate block 27 with a resin film by dicing, a laser, or the like to separate the blocks 27. The capacitor element sheet 23 is divided into the capacitor element 3. The resin film 27a placed on the upper surface of the laminated body block 27 with the resin film becomes the first outer layer insulator 7a, and the resin film 27b placed on the lower surface becomes the second outer layer insulator 7b.
樹脂フィルム付き積層体２９の長さ（図７（ｂ）中、ｌで示す長さ）及び幅（図７（ｂ）中、ｗで示す長さ）は、作製する電解コンデンサ１を構成する積層体５の厚さ方向（Ｔ方向）の寸法及び幅方向（Ｗ方向）の寸法となるようにすることが好ましい。 The length (length indicated by l in FIG. 7B) and width (length indicated by w in FIG. 7B) of the laminate 29 with the resin film are the laminations constituting the electrolytic capacitor 1 to be produced. It is preferable that the body 5 has a thickness direction (T direction) and a width direction (W direction).
［４］外層絶縁体の形成
図８（ａ）及び図８（ｂ）は、外層絶縁体を形成する工程の一例を模式的に示す斜視図である。
図８（ａ）に示すように、樹脂フィルム付き積層体２９を倒して、最も短い寸法が厚さ方向となるような方向に整列させる。その後、樹脂フィルム付き積層体２９の第１側面、上面、第２側面及び底面に絶縁ペーストをスクリーン印刷、スプレー塗布、またはディップすることにより、図８（ｂ）に示すように、第３外層絶縁体７ｃ、第４外層絶縁体７ｄ、第５外層絶縁体７ｅ及び第６外層絶縁体７ｆをそれぞれ形成する。上記工程により、外層絶縁体付き積層体３１が得られる。 [4] Formation of Outer Layer Insulator FIGS. 8 (a) and 8 (b) are perspective views schematically showing an example of a step of forming the outer layer insulator.
As shown in FIG. 8A, the laminate 29 with the resin film is tilted and aligned in the direction in which the shortest dimension is the thickness direction. Then, as shown in FIG. 8B, the third outer layer is insulated by screen-printing, spray-coating, or dipping the insulating paste on the first side surface, the upper surface, the second side surface, and the bottom surface of the laminate 29 with the resin film. The body 7c, the fourth outer layer insulator 7d, the fifth outer layer insulator 7e, and the sixth outer layer insulator 7f are formed, respectively. By the above steps, a laminated body 31 with an outer layer insulator is obtained.
［５］外部電極の形成
図９（ａ）及び図９（ｂ）は、第１外部電極及び第２外部電極を形成する工程の一例を模式的に示す斜視図である。
図９（ａ）に示すように、レーザー加工により第６外層絶縁体７ｆの一部を除去して第１開口部７ｆ１及び第２開口部７ｆ２を形成する。具体的には、第６外層絶縁体７ｆの所望の位置に、レーザー発振器２１からレーザー光２１ａを照射して第１開口部７ｆ１及び第２開口部７ｆ２を形成する。これにより、第１開口部７ｆ１から陽極１１を露出させ、第２開口部７ｆ２から陰極１５を露出させる。 [5] Formation of External Electrode FIGS. 9 (a) and 9 (b) are perspective views schematically showing an example of a process of forming the first external electrode and the second external electrode.
As shown in FIG. 9A, a part of the sixth outer layer insulator 7f is removed by laser processing to form the first opening 7f 1 and the second opening 7f 2 . Specifically, the laser oscillator 21 irradiates the laser beam 21a at a desired position of the sixth outer layer insulator 7f to form the first opening 7f 1 and the second opening 7f 2 . As a result, the anode 11 is exposed from the first opening 7f 1 and the cathode 15 is exposed from the second opening 7f 2.
次に、図９（ｂ）に示すように、ジンケート処理により、露出した陽極１１の上に第１めっき層１３ａとしてＮｉめっき層を形成するとともに、露出した陰極１５の上に第１めっき層１７ａとしてＮｉめっき層を形成する。 Next, as shown in FIG. 9B, a Ni plating layer is formed as the first plating layer 13a on the exposed anode 11 by the zincate treatment, and the first plating layer 17a is formed on the exposed cathode 15. A Ni plating layer is formed as.
さらに、第１めっき層１３ａ及び１７ａであるＮｉめっき層の上に、Ｓｎめっきにより、第２めっき層１３ｂ及び１７ｂとしてＳｎめっき層をそれぞれ形成する。上記工程により、第１開口部７ｆ１から露出する陽極１１と電気的に接続される第１外部電極１３が形成されるとともに、第２開口部７ｆ２から露出する陰極１５と電気的に接続される第２外部電極１７が形成される。 Further, on the Ni plating layers which are the first plating layers 13a and 17a, Sn plating layers are formed as the second plating layers 13b and 17b by Sn plating, respectively. By the above step, the first external electrode 13 that is electrically connected to the anode 11 exposed from the first opening 7f 1 is formed, and is electrically connected to the cathode 15 exposed from the second opening 7f 2. The second external electrode 17 is formed.
以上により、電解コンデンサ１が得られる。このようにして得られた電解コンデンサ１は、図１（ｂ）に示すように、半田９ｂを介して実装基板９に実装される。 From the above, the electrolytic capacitor 1 is obtained. As shown in FIG. 1B, the electrolytic capacitor 1 thus obtained is mounted on the mounting substrate 9 via the solder 9b.
［第２実施形態］
本発明の第２実施形態に係る電解コンデンサでは、第１外部電極及び第２外部電極は、めっき層を含み、上記めっき層は、複数のコンデンサ素子を跨いで設けられ、複数のコンデンサ素子同士が上記めっき層を介して電気的に接続されている。 [Second Embodiment]
In the electrolytic capacitor according to the second embodiment of the present invention, the first external electrode and the second external electrode include a plating layer, the plating layer is provided across a plurality of capacitor elements, and the plurality of capacitor elements are connected to each other. It is electrically connected via the plating layer.
第２実施形態においては、第１実施形態に比べて実装電極との接触面積が大きくなるため、更なる低ＥＳＲ化が可能となる。 In the second embodiment, the contact area with the mounting electrode is larger than that in the first embodiment, so that the ESR can be further reduced.
図１０は、本発明の第２実施形態に係る電解コンデンサの一例を底面から見た斜視図である。
図１０に示す電解コンデンサ１Ａでは、第１外部電極１３Ａは、第１めっき層１３ａと、その上に形成される第２めっき層１３ｂとを含む。第２めっき層１３ｂは、めっき成長または表面改質等により複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が第２めっき層１３ｂを介して電気的に接続されている。 FIG. 10 is a perspective view of an example of the electrolytic capacitor according to the second embodiment of the present invention as viewed from the bottom.
In the electrolytic capacitor 1A shown in FIG. 10, the first external electrode 13A includes a first plating layer 13a and a second plating layer 13b formed on the first plating layer 13a. The second plating layer 13b is provided so as to straddle the plurality of capacitor elements 3 by plating growth, surface modification, or the like, and the plurality of capacitor elements 3 are electrically connected to each other via the second plating layer 13b.
同様に、第２外部電極１７Ａは、第１めっき層１７ａと、その上に形成される第２めっき層１７ｂとを含む。第２めっき層１７ｂは、めっき成長または表面改質等により複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が第２めっき層１７ｂを介して電気的に接続されている。 Similarly, the second external electrode 17A includes a first plating layer 17a and a second plating layer 17b formed on the first plating layer 17a. The second plating layer 17b is provided across the plurality of capacitor elements 3 by plating growth, surface modification, or the like, and the plurality of capacitor elements 3 are electrically connected to each other via the second plating layer 17b.
［第３実施形態］
本発明の第３実施形態に係る電解コンデンサでは、第１外部電極及び第２外部電極は、めっき層を含み、上記めっき層の上に導電性ペースト層をさらに含み、上記導電性ペースト層は、複数のコンデンサ素子を跨いで設けられ、複数のコンデンサ素子同士が上記導電性ペースト層を介して電気的に接続されている。 [Third Embodiment]
In the electrolytic capacitor according to the third embodiment of the present invention, the first external electrode and the second external electrode include a plating layer, further include a conductive paste layer on the plating layer, and the conductive paste layer is It is provided across a plurality of capacitor elements, and the plurality of capacitor elements are electrically connected to each other via the conductive paste layer.
第３実施形態においては、第２実施形態と同様、第１実施形態に比べて実装電極との接触面積が大きくなるため、更なる低ＥＳＲ化が可能となる。 In the third embodiment, as in the second embodiment, the contact area with the mounting electrode is larger than that in the first embodiment, so that the ESR can be further reduced.
図１１は、本発明の第３実施形態に係る電解コンデンサの一例を底面から見た斜視図である。
図１１に示す電解コンデンサ１Ｂでは、第１外部電極１３Ｂは、第１めっき層１３ａと、その上に形成される導電性ペースト層１３ｃとを含む。導電性ペースト層１３ｃは、複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が導電性ペースト層１３ｃを介して電気的に接続されている。 FIG. 11 is a perspective view of an example of the electrolytic capacitor according to the third embodiment of the present invention as viewed from the bottom.
In the electrolytic capacitor 1B shown in FIG. 11, the first external electrode 13B includes a first plating layer 13a and a conductive paste layer 13c formed on the first plating layer 13a. The conductive paste layer 13c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 13c.
同様に、第２外部電極１７Ｂは、第１めっき層１７ａと、その上に形成される導電性ペースト層１７ｃとを含む。導電性ペースト層１７ｃは、複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が導電性ペースト層１７ｃを介して電気的に接続されている。 Similarly, the second external electrode 17B includes a first plating layer 17a and a conductive paste layer 17c formed on the first plating layer 17a. The conductive paste layer 17c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 17c.
導電性ペースト層１３ｃ、１７ｃは、例えば、第１めっき層１３ａ、１７ａの上に半田ペーストを印刷することにより形成される。導電性ペースト層１３ｃ、１７ｃとしては、半田ペーストに限らず、Ｎｉペースト、Ｃｕペースト、Ａｇペーストなどを使用することが可能である。必要に応じて、導電性ペースト層１３ｃ、１７ｃの上にめっき層を形成してもよい。 The conductive paste layers 13c and 17c are formed, for example, by printing a solder paste on the first plating layers 13a and 17a. As the conductive paste layers 13c and 17c, not only solder paste but also Ni paste, Cu paste, Ag paste and the like can be used. If necessary, a plating layer may be formed on the conductive paste layers 13c and 17c.
［第４実施形態］
本発明の第４実施形態に係る電解コンデンサでは、第１外部電極は、積層体の第１側面及び底面から露出する陽極と電気的に接続されるように、積層体の第１側面及び底面に設けられ、第２外部電極は、積層体の第２側面及び底面から露出する陰極と電気的に接続されるように、積層体の第２側面及び底面に設けられている。 [Fourth Embodiment]
In the electrolytic capacitor according to the fourth embodiment of the present invention, the first external electrode is attached to the first side surface and the bottom surface of the laminate so as to be electrically connected to the anode exposed from the first side surface and the bottom surface of the laminate. The second external electrodes are provided on the second side surface and the bottom surface of the laminate so as to be electrically connected to the cathode exposed from the second side surface and the bottom surface of the laminate.
第４実施形態においては、コンデンサ素子と外部電極とが、積層体の側面と底面とのマルチパス（並列）で接続される。その結果、低ＥＳＲ化が可能となる。 In the fourth embodiment, the capacitor element and the external electrode are connected by multipath (parallel) between the side surface and the bottom surface of the laminated body. As a result, low ESR can be achieved.
図１２は、本発明の第４実施形態に係る電解コンデンサの一例を底面から見た斜視図である。
図１２に示す電解コンデンサ１Ｃでは、図示されていないが、陽極１１が積層体５の第１側面５ｃ及び底面５ｆから露出し、陰極１５が積層体５の第２側面５ｅ及び底面５ｆから露出している。そして、第１外部電極１３Ｃは、積層体５の第１側面５ｃ及び底面５ｆから露出する陽極１１と電気的に接続されるように、積層体５の第１側面５ｃ及び底面５ｆに設けられ、第２外部電極１７Ｃは、積層体５の第２側面５ｅ及び底面５ｆから露出する陰極１５と電気的に接続されるように、積層体５の第２側面５ｅ及び底面５ｆに設けられている。 FIG. 12 is a perspective view of an example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom.
In the electrolytic capacitor 1C shown in FIG. 12, although not shown, the anode 11 is exposed from the first side surface 5c and the bottom surface 5f of the laminate 5, and the cathode 15 is exposed from the second side surface 5e and the bottom surface 5f of the laminate 5. ing. The first external electrode 13C is provided on the first side surface 5c and the bottom surface 5f of the laminate 5 so as to be electrically connected to the anode 11 exposed from the first side surface 5c and the bottom surface 5f of the laminate 5. The second external electrode 17C is provided on the second side surface 5e and the bottom surface 5f of the laminate 5 so as to be electrically connected to the cathode 15 exposed from the second side surface 5e and the bottom surface 5f of the laminate 5.
第１外部電極１３Ｃは、積層体５の底面５ｆにおいて、第１めっき層１３ａと、その上に形成される導電性ペースト層１３ｃとを含む。導電性ペースト層１３ｃは、複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が導電性ペースト層１３ｃを介して電気的に接続されている。第１外部電極１３Ｃは、さらに、積層体５の第１側面５ｃにおいて、第１めっき層１３ａと、その上に形成される導電性ペースト層１３ｄとを含む。導電性ペースト層１３ｄは、複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が導電性ペースト層１３ｄを介して電気的に接続されている。なお、積層体５の底面５ｆに設けられた第１めっき層１３ａと積層体５の第１側面５ｃに設けられた第１めっき層１３ａとは、積層体５の角部を挟んで連続的に設けられていてもよい。 The first external electrode 13C includes a first plating layer 13a and a conductive paste layer 13c formed on the first plating layer 13a on the bottom surface 5f of the laminated body 5. The conductive paste layer 13c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 13c. The first external electrode 13C further includes a first plating layer 13a and a conductive paste layer 13d formed on the first plating layer 13a on the first side surface 5c of the laminated body 5. The conductive paste layer 13d is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 13d. The first plating layer 13a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 13a provided on the first side surface 5c of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
同様に、第２外部電極１７Ｃは、積層体５の底面５ｆにおいて、第１めっき層１７ａと、その上に形成される導電性ペースト層１７ｃとを含む。導電性ペースト層１７ｃは、複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が導電性ペースト層１７ｃを介して電気的に接続されている。第２外部電極１７Ｃは、さらに、積層体５の第２側面５ｅにおいて、第１めっき層１７ａと、その上に形成される導電性ペースト層１７ｄとを含む。導電性ペースト層１７ｄは、複数のコンデンサ素子３を跨いで設けられ、複数のコンデンサ素子３同士が導電性ペースト層１７ｄを介して電気的に接続されている。なお、積層体５の底面５ｆに設けられた第１めっき層１７ａと積層体５の第２側面５ｅに設けられた第１めっき層１７ａとは、積層体５の角部を挟んで連続的に設けられていてもよい。 Similarly, the second external electrode 17C includes a first plating layer 17a and a conductive paste layer 17c formed on the first plating layer 17a on the bottom surface 5f of the laminated body 5. The conductive paste layer 17c is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 17c. The second external electrode 17C further includes a first plating layer 17a and a conductive paste layer 17d formed on the first plating layer 17a on the second side surface 5e of the laminated body 5. The conductive paste layer 17d is provided so as to straddle the plurality of capacitor elements 3, and the plurality of capacitor elements 3 are electrically connected to each other via the conductive paste layer 17d. The first plating layer 17a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 17a provided on the second side surface 5e of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
図１３は、本発明の第４実施形態に係る電解コンデンサの別の一例を底面から見た斜視図である。
図１３に示す電解コンデンサ１Ｄでは、図示されていないが、陽極１１が積層体５の第１側面５ｃ及び底面５ｆから露出し、陰極１５が積層体５の第２側面５ｅ及び底面５ｆから露出している。そして、第１外部電極１３Ｄは、積層体５の第１側面５ｃ及び底面５ｆから露出する陽極１１と電気的に接続されるように、積層体５の第１側面５ｃ及び底面５ｆに一体化されて設けられ、第２外部電極１７Ｄは、積層体５の第２側面５ｅ及び底面５ｆから露出する陰極１５と電気的に接続されるように、積層体５の第２側面５ｅ及び底面５ｆに一体化されて設けられている。 FIG. 13 is a perspective view of another example of the electrolytic capacitor according to the fourth embodiment of the present invention as viewed from the bottom.
In the electrolytic capacitor 1D shown in FIG. 13, although not shown, the anode 11 is exposed from the first side surface 5c and the bottom surface 5f of the laminate 5, and the cathode 15 is exposed from the second side surface 5e and the bottom surface 5f of the laminate 5. ing. Then, the first external electrode 13D is integrated with the first side surface 5c and the bottom surface 5f of the laminate 5 so as to be electrically connected to the anode 11 exposed from the first side surface 5c and the bottom surface 5f of the laminate 5. The second external electrode 17D is integrated with the second side surface 5e and the bottom surface 5f of the laminate 5 so as to be electrically connected to the cathode 15 exposed from the second side surface 5e and the bottom surface 5f of the laminate 5. It is provided as an electrode.
第１外部電極１３Ｄは、第１めっき層１３ａと、その上に形成される導電性ペースト層１３ｅとを含む。導電性ペースト層１３ｅは、積層体５の底面５ｆだけでなく第１側面５ｃにもスクリーン印刷等により同時に形成されることで一体化されている。なお、積層体５の底面５ｆに設けられた第１めっき層１３ａと積層体５の第１側面５ｃに設けられた第１めっき層１３ａとは、積層体５の角部を挟んで連続的に設けられていてもよい。 The first external electrode 13D includes a first plating layer 13a and a conductive paste layer 13e formed on the first plating layer 13a. The conductive paste layer 13e is integrated not only on the bottom surface 5f of the laminate 5 but also on the first side surface 5c by being simultaneously formed by screen printing or the like. The first plating layer 13a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 13a provided on the first side surface 5c of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
同様に、第２外部電極１７Ｄは、第１めっき層１７ａと、その上に形成される導電性ペースト層１７ｅとを含む。導電性ペースト層１７ｅは、積層体５の底面５ｆだけでなく第２側面５ｅにもスクリーン印刷等により同時に形成されることで一体化されている。なお、積層体５の底面５ｆに設けられた第１めっき層１７ａと積層体５の第２側面５ｅに設けられた第１めっき層１７ａとは、積層体５の角部を挟んで連続的に設けられていてもよい。 Similarly, the second external electrode 17D includes a first plating layer 17a and a conductive paste layer 17e formed on the first plating layer 17a. The conductive paste layer 17e is integrated not only on the bottom surface 5f of the laminate 5 but also on the second side surface 5e by being simultaneously formed by screen printing or the like. The first plating layer 17a provided on the bottom surface 5f of the laminated body 5 and the first plating layer 17a provided on the second side surface 5e of the laminated body 5 continuously sandwich the corner portion of the laminated body 5. It may be provided.
導電性ペースト層１３ｃ、１３ｄ、１３ｅ、１７ｃ、１７ｄ、１７ｅは、例えば、半田ペーストを印刷することにより形成される。導電性ペースト層１３ｃ、１３ｄ、１３ｅ、１７ｃ、１７ｄ、１７ｅとしては、半田ペーストに限らず、Ｎｉペースト、Ｃｕペースト、Ａｇペーストなどを使用することが可能である。必要に応じて、導電性ペースト層１３ｃ、１３ｄ、１３ｅ、１７ｃ、１７ｄ、１７ｅの上にめっき層を形成してもよい。 The conductive paste layers 13c, 13d, 13e, 17c, 17d, 17e are formed, for example, by printing a solder paste. As the conductive paste layers 13c, 13d, 13e, 17c, 17d, 17e, not only solder paste but also Ni paste, Cu paste, Ag paste and the like can be used. If necessary, a plating layer may be formed on the conductive paste layers 13c, 13d, 13e, 17c, 17d, 17e.
［その他の実施形態］
本発明の電解コンデンサは、上記実施形態に限定されるものではなく、電解コンデンサの構成、製造条件等に関し、本発明の範囲内において、種々の応用、変形を加えることが可能である。 [Other Embodiments]
The electrolytic capacitor of the present invention is not limited to the above embodiment, and various applications and modifications can be added within the scope of the present invention regarding the configuration, manufacturing conditions, and the like of the electrolytic capacitor.
例えば、本発明の電解コンデンサにおいて、積層体の長さ方向の寸法Ｌ、積層体の幅方向の寸法Ｗ、及び、積層体の厚さ方向の寸法Ｔは、Ｌ＞Ｔ＞Ｗを満たしてもよい。 For example, in the electrolytic capacitor of the present invention, the dimension L in the length direction of the laminate, the dimension W in the width direction of the laminate, and the dimension T in the thickness direction of the laminate satisfy L> T> W. Good.
本発明の電解コンデンサにおいては、複数のコンデンサ素子の容量部の外形が、積層体の外形を構成していなくてもよい。 In the electrolytic capacitor of the present invention, the outer shape of the capacitance portion of the plurality of capacitor elements does not have to constitute the outer shape of the laminated body.
本発明の電解コンデンサにおいて、第１外部電極及び第２外部電極は、めっき層を含まなくてもよい。 In the electrolytic capacitor of the present invention, the first external electrode and the second external electrode do not have to include a plating layer.
本発明の電解コンデンサを製造する際には、コンデンサ素子シートを積層して積層体ブロックを作製する代わりに、コンデンサ素子を１個ずつ作製して積層体を作製してもよい。 When manufacturing the electrolytic capacitor of the present invention, instead of laminating the capacitor element sheets to form a laminated body block, the capacitor elements may be manufactured one by one to prepare a laminated body.
１、１Ａ、１Ｂ、１Ｃ、１Ｄ　電解コンデンサ
３　コンデンサ素子
５　積層体
５ａ　積層体の第１端面
５ｂ　積層体の第２端面
５ｃ　積層体の第１側面
５ｄ　積層体の上面
５ｅ　積層体の第２側面
５ｆ　積層体の底面
７ａ　第１外層絶縁体
７ｂ　第２外層絶縁体
７ｃ　第３外層絶縁体
７ｄ　第４外層絶縁体
７ｅ　第５外層絶縁体
７ｆ　第６外層絶縁体
７ｆ１　第１開口部
７ｆ２　第２開口部
９　実装基板
９ａ１　プラス実装電極
９ａ２　マイナス実装電極
９ｂ　半田
９ｃ　実装面
１１　陽極
１３、１３Ａ、１３Ｂ、１３Ｃ、１３Ｄ　第１外部電極
１３ａ　第１めっき層
１３ｂ　第２めっき層
１３ｃ、１３ｄ、１３ｅ　導電性ペースト層
１５　陰極
１５ａ　固体電解質層
１５ｂ　導電層
１５ｃ　陰極引き出し層
１７、１７Ａ、１７Ｂ、１７Ｃ、１７Ｄ　第２外部電極
１７ａ　第１めっき層
１７ｂ　第２めっき層
１７ｃ、１７ｄ、１７ｅ　導電性ペースト層
１９　誘電体層
２１　レーザー発振器
２１ａ　レーザー光
２３　コンデンサ素子シート
２５　積層体ブロック
２７　樹脂フィルム付き積層体ブロック
２７ａ、２７ｂ　樹脂フィルム
２９　樹脂フィルム付き積層体
３１　外層絶縁体付き積層体 1, 1A, 1B, 1C, 1D Electrolytic capacitor 3 Capacitor element 5 Laminated body 5a First end surface of laminated body 5b Second end surface of laminated body 5c First side surface of laminated body 5d Upper surface of laminated body 5e Second side surface of laminated body 5f Bottom surface of laminated body 7a 1st outer layer insulator 7b 2nd outer layer insulator 7c 3rd outer layer insulator 7d 4th outer layer insulator 7e 5th outer layer insulator 7f 6th outer layer insulator 7f 1 1st opening 7f 2nd 2 Opening 9 Mounting substrate 9a 1 Plus mounting electrode 9a 2 Negative mounting electrode 9b Solder 9c Mounting surface 11 Anodes 13, 13A, 13B, 13C, 13D First external electrode 13a First plating layer 13b Second plating layer 13c, 13d, 13e Conductive paste layer 15 Capacitor 15a Solid electrolyte layer 15b Conductive layer 15c Catabol extraction layer 17, 17A, 17B, 17C, 17D Second external electrode 17a First plating layer 17b Second plating layer 17c, 17d, 17e Conductive paste layer 19 Dielectric layer 21 Laser oscillator 21a Laser light 23 Capacitor element sheet 25 Laminated block 27 Laminated block with resin film 27a, 27b Resin film 29 Laminated body with resin film 31 Laminated body with outer layer insulator

Claims (10)

  1. 　積層されている複数のコンデンサ素子を含み、前記コンデンサ素子が、表面に誘電体層を有する陽極と、前記誘電体層を介して前記陽極に対向する陰極とを含む、直方体状の積層体と、
    　前記積層体の周囲に設けられる外層絶縁体と、
    　前記積層体から露出する前記陽極と電気的に接続される第１外部電極と、
    　前記積層体から露出する前記陰極と電気的に接続される第２外部電極と、を備える電解コンデンサであって、
    　前記積層体は、前記電解コンデンサが実装されるべき実装基板の実装面に対向する底面と、前記底面に対向する上面と、前記底面及び前記上面に直交する第１端面と、前記第１端面に対向する第２端面と、前記底面、前記上面、前記第１端面及び前記第２端面に直交する第１側面と、前記第１側面に対向する第２側面と、を有し、
    　前記積層体の第１端面及び第２端面を結ぶ方向を長さ方向、前記積層体の第１側面及び第２側面を結ぶ方向を幅方向、前記積層体の底面及び上面を結ぶ方向を厚さ方向としたとき、
    　前記複数のコンデンサ素子が、長さ方向に沿って積層されている、電解コンデンサ。     A rectangular laminate comprising a plurality of laminated capacitor elements, wherein the capacitor element includes an anode having a dielectric layer on its surface and a cathode facing the anode via the dielectric layer.
    An outer layer insulator provided around the laminate and
    A first external electrode electrically connected to the anode exposed from the laminate,
    An electrolytic capacitor comprising a second external electrode electrically connected to the cathode exposed from the laminate.
    The laminate is provided on a bottom surface facing the mounting surface of the mounting substrate on which the electrolytic capacitor is to be mounted, an upper surface facing the bottom surface, a first end surface orthogonal to the bottom surface and the upper surface, and the first end surface. It has a second end surface facing each other, a first side surface orthogonal to the bottom surface, the upper surface, the first end surface and the second end surface, and a second side surface facing the first side surface.
    The direction connecting the first end face and the second end face of the laminated body is the length direction, the direction connecting the first side surface and the second side surface of the laminated body is the width direction, and the direction connecting the bottom surface and the upper surface of the laminated body is the thickness. When set in the direction
    An electrolytic capacitor in which the plurality of capacitor elements are laminated along the length direction.
  2. 　前記積層体の長さ方向の寸法Ｌ、前記積層体の幅方向の寸法Ｗ、及び、前記積層体の厚さ方向の寸法Ｔは、Ｌ＞Ｗ＞Ｔ、又は、Ｗ＞Ｌ＞Ｔを満たす、請求項１に記載の電解コンデンサ。 The dimension L in the length direction of the laminate, the dimension W in the width direction of the laminate, and the dimension T in the thickness direction of the laminate satisfy L> W> T or W> L> T. , The electrolytic capacitor according to claim 1.
  3. 　前記第１外部電極は、前記積層体の底面から露出する前記陽極と電気的に接続されるように、前記積層体の底面に設けられ、
    　前記第２外部電極は、前記積層体の底面から露出する前記陰極と電気的に接続されるように、前記積層体の底面に設けられている、請求項１又は２に記載の電解コンデンサ。     The first external electrode is provided on the bottom surface of the laminate so as to be electrically connected to the anode exposed from the bottom surface of the laminate.
    The electrolytic capacitor according to claim 1 or 2, wherein the second external electrode is provided on the bottom surface of the laminate so as to be electrically connected to the cathode exposed from the bottom surface of the laminate.
  4. 　前記第１外部電極は、前記積層体の第１側面及び底面から露出する前記陽極と電気的に接続されるように、前記積層体の第１側面及び底面に設けられ、
    　前記第２外部電極は、前記積層体の第２側面及び底面から露出する前記陰極と電気的に接続されるように、前記積層体の第２側面及び底面に設けられている、請求項１又は２に記載の電解コンデンサ。     The first external electrode is provided on the first side surface and bottom surface of the laminate so as to be electrically connected to the anode exposed from the first side surface and bottom surface of the laminate.
    The first or second aspect of the laminate, wherein the second external electrode is provided on the second side surface and the bottom surface of the laminate so as to be electrically connected to the cathode exposed from the second side surface and the bottom surface of the laminate. 2. The electrolytic capacitor according to 2.
  5. 　前記複数のコンデンサ素子の容量部の外形が、前記積層体の外形を構成している、請求項１～４のいずれか１項に記載の電解コンデンサ。 The electrolytic capacitor according to any one of claims 1 to 4, wherein the outer shape of the capacitance portion of the plurality of capacitor elements constitutes the outer shape of the laminated body.
  6. 　前記第１外部電極及び前記第２外部電極は、めっき層を含む、請求項１～５のいずれか１項に記載の電解コンデンサ。 The electrolytic capacitor according to any one of claims 1 to 5, wherein the first external electrode and the second external electrode include a plating layer.
  7. 　前記第１外部電極及び前記第２外部電極は、前記複数のコンデンサ素子毎に設けられ、前記実装基板の実装電極にそれぞれ直接接続されている、請求項１～６のいずれか１項に記載の電解コンデンサ。 The method according to any one of claims 1 to 6, wherein the first external electrode and the second external electrode are provided for each of the plurality of capacitor elements and are directly connected to the mounting electrodes of the mounting substrate. Electrolytic capacitor.
  8. 　前記めっき層は、前記複数のコンデンサ素子を跨いで設けられ、
    　前記複数のコンデンサ素子同士が前記めっき層を介して電気的に接続されている、請求項６に記載の電解コンデンサ。     The plating layer is provided so as to straddle the plurality of capacitor elements.
    The electrolytic capacitor according to claim 6, wherein the plurality of capacitor elements are electrically connected to each other via the plating layer.
  9. 　前記第１外部電極及び前記第２外部電極は、前記めっき層の上に導電性ペースト層をさらに含み、
    　前記導電性ペースト層は、前記複数のコンデンサ素子を跨いで設けられ、
    　前記複数のコンデンサ素子同士が前記導電性ペースト層を介して電気的に接続されている、請求項６に記載の電解コンデンサ。     The first external electrode and the second external electrode further include a conductive paste layer on the plating layer.
    The conductive paste layer is provided so as to straddle the plurality of capacitor elements.
    The electrolytic capacitor according to claim 6, wherein the plurality of capacitor elements are electrically connected to each other via the conductive paste layer.
  10. 　前記外層絶縁体は、前記積層体の第１端面に設けられる第１外層絶縁体と、前記積層体の第２端面に設けられる第２外層絶縁体と、前記積層体の第１側面に設けられる第３外層絶縁体と、前記積層体の上面に設けられる第４外層絶縁体と、前記積層体の第２側面に設けられる第５外層絶縁体と、前記積層体の底面に設けられる第６外層絶縁体と、を含み、
    　前記第１外層絶縁体及び前記第２外層絶縁体は、樹脂フィルムから構成され、
    　前記第３外層絶縁体、前記第４外層絶縁体、前記第５外層絶縁体及び前記第６外層絶縁体は、絶縁ペースト層から構成される、請求項１～９のいずれか１項に記載の電解コンデンサ。     The outer layer insulator is provided on the first outer layer insulator provided on the first end surface of the laminate, the second outer layer insulator provided on the second end surface of the laminate, and the first side surface of the laminate. A third outer layer insulator, a fourth outer layer insulator provided on the upper surface of the laminate, a fifth outer layer insulator provided on the second side surface of the laminate, and a sixth outer layer provided on the bottom surface of the laminate. Insulator, including
    The first outer layer insulator and the second outer layer insulator are made of a resin film.
    The third outer layer insulator, the fourth outer layer insulator, the fifth outer layer insulator, and the sixth outer layer insulator are composed of an insulating paste layer, according to any one of claims 1 to 9. Electrolytic capacitor.
PCT/JP2020/000372 2019-08-26 2020-01-09 Electrolytic capacitor WO2021038900A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288321A (en) * 1989-04-28 1990-11-28 Matsushita Electric Ind Co Ltd Chip-shaped solid electrolytic capacitor
JP2003178933A (en) * 2001-10-05 2003-06-27 Matsushita Electric Ind Co Ltd Capacitor
JP2019079866A (en) * 2017-10-20 2019-05-23 株式会社村田製作所 Manufacturing method of solid electrolytic capacitor and solid electrolytic capacitor
WO2019156120A1 (en) * 2018-02-08 2019-08-15 株式会社村田製作所 Electrolytic capacitor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288321A (en) * 1989-04-28 1990-11-28 Matsushita Electric Ind Co Ltd Chip-shaped solid electrolytic capacitor
JP2003178933A (en) * 2001-10-05 2003-06-27 Matsushita Electric Ind Co Ltd Capacitor
JP2019079866A (en) * 2017-10-20 2019-05-23 株式会社村田製作所 Manufacturing method of solid electrolytic capacitor and solid electrolytic capacitor
WO2019156120A1 (en) * 2018-02-08 2019-08-15 株式会社村田製作所 Electrolytic capacitor

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