WO2021023293A1

WO2021023293A1 - Charging circuit, charging chip, terminal, and charging system

Info

Publication number: WO2021023293A1
Application number: PCT/CN2020/107724
Authority: WO
Inventors: 田晨
Original assignee: Oppo广东移动通信有限公司
Priority date: 2019-08-08
Filing date: 2020-08-07
Publication date: 2021-02-11
Also published as: CN112350390A; CN112350390B

Abstract

The present application relates to a charging circuit, a charging chip, a terminal, and a charging system. At least two parallel connected transistor paths are used in a quick charge path, and each transistor path at least comprises one transistor; the charging path can implement quick charge for a device to be charged. In the charging circuit, the use of the parallel connected transistor paths reduces the impedance of the entire quick charge path and thus reduces the heating amount of the quick charge path; moreover, the use of the at least two parallel connected transistor paths can increase the number of transistors and also the heat dissipation area, thereby better facilitating reducing the heat amount of the entire quick charge path and then greatly reducing the heat amount of a complete machine.

Description

Charging circuit, charging chip, terminal and charging system

Technical field

This application relates to the field of charging technology, in particular to a charging circuit, a charging chip, a terminal and a charging system.

Background technique

With the development of electronic technology, electronic devices have become indispensable devices in people's lives. In order to facilitate user experience, electronic devices have more and more functions.

For electronic devices, the more functions they consume, the faster they consume power, and they naturally need to be continuously charged. However, the busy life and the high frequency use of electronic devices have prompted people to have higher and higher requirements for the charging time of electronic devices, for example, shortening the charging time of electronic devices, and charging electronic devices anytime, anywhere. Therefore, fast charging has become a development trend of charging technology. In fast charging technology, in order to reduce the heating of electronic equipment, the method of replacing transistors with smaller impedance is usually adopted. However, it is difficult to choose the model resources of transistors with lower impedance. Even if there is, its cost and supply will become the bottleneck. .

Therefore, the existing fast charging technology has a technical problem of how to better reduce the heat generation of the electronic device.

Summary of the invention

Based on this, it is necessary to provide a charging circuit, a charging chip, a terminal and a charging system in response to the technical problem of how to better reduce the heating of electronic equipment in the above-mentioned existing fast charging technology.

In a first aspect, an embodiment of the present application provides a charging circuit, the charging circuit includes: a fast charging path and a control circuit; the fast charging path includes at least two parallel transistor paths; each transistor path includes at least one transistor;

The first pole of the transistor in the transistor path is connected to the energy storage device of the device to be charged, the second pole of the transistor in the transistor path is connected to the charging interface; the control electrode of the transistor in the transistor path is connected to the control circuit;

The control circuit is used to provide a conduction voltage for the fast charging path, so that when the fast charging path is in a conducting state, the charging current is transferred to the energy storage device through the fast charging path.

In one of the embodiments, the above-mentioned control circuit includes a conduction control unit and a switch control unit;

The input terminal of the conduction control unit is connected to the charging interface and the clock signal terminal, and the output terminal of the conduction control unit is connected to the control electrode of the transistor in the transistor path;

The input terminal of the switch control unit is connected to the switch signal terminal, and the output terminal of the switch control unit is connected to the control electrode of the transistor in the transistor path;

The conduction control unit is used to provide a conduction voltage for the transistor in the transistor path when the switch control unit is turned off.

In one of the embodiments, the above-mentioned switch control unit includes a plurality of parallel switch control sub-units, and each switch control sub-unit is connected to a corresponding transistor path; then the turn-on control unit is used for when each switch control sub-unit is turned off. The corresponding transistor path provides the turn-on voltage.

In one of the embodiments, the aforementioned conduction control unit includes a charging signal input subunit, a clock signal input subunit, and a signal processing subunit;

The input end of the charging signal input subunit is connected to the charging interface, and the output end is connected to the input end of the signal processing subunit; the input end of the clock signal input subunit is connected to the clock signal end, and the output end is connected to the input end of the signal processing subunit; the signal processing subunit The output terminal of the unit is connected to the control electrode of the transistor in the transistor path;

The charging signal input subunit is used to input the charging signal to the signal processing subunit;

The clock signal input subunit is used to input the clock signal to the signal processing subunit;

The signal processing sub-unit is used to provide the turn-on voltage for the transistor in the transistor path according to the charging signal and the clock signal.

In one of the embodiments, the charging signal input unit includes an anti-backflow subunit; the input end of the anti-backflow subunit is connected to the charging interface, and the output end of the anti-backflow subunit is connected to the input end of the signal processing unit; the anti-backflow subunit is used for Prevent the charging voltage from backflowing.

In one of the embodiments, the above-mentioned charging signal input unit further includes a filter subunit; the input end of the filter subunit is connected to the charging interface; the output end of the filter subunit is connected to the input end of the backflow prevention subunit;

The filter subunit is used to filter out the noise signal that enters with the charging voltage.

In one of the embodiments, the above-mentioned control circuit further includes a protection unit;

The input end of the protection unit is connected to the charging interface, and the output end is connected to the control electrode of the transistor in the transistor path; the protection unit is used to prevent the transistor in the transistor path from entering a negative voltage.

In the second aspect, an embodiment of the present application provides a charging chip, which includes any one of the charging circuits provided in the embodiment of the first aspect.

In a third aspect, an embodiment of the present application provides a terminal, and the terminal includes the charging chip provided in the foregoing embodiment of the second aspect.

In one of the embodiments, the distance between the transistor paths in the fast charging path of the terminal is greater than a preset distance threshold.

In one of the embodiments, if the fast charge path includes the first transistor path and the second transistor path, the first transistor path is set in the circuit board main board area of the terminal, and the second transistor path is set in the circuit board small board of the terminal. Area.

In a fourth aspect, an embodiment of the present application provides a charging system, the charging system includes a power adapter and a terminal as provided in the foregoing third aspect;

The power adapter charges the terminal through the USB port of the terminal.

The charging circuit, charging chip, terminal and charging system provided by the embodiments of the present application adopt at least two parallel transistor paths in the fast charging path, each transistor path includes at least one transistor, and the charging path can be implemented as The device to be charged performs fast charging. In the charging circuit, the impedance of the entire fast charging path is reduced due to the use of parallel transistor paths, thereby reducing the heat generation of the fast charging path, and at least two parallel transistor paths are used. Increasing the number of transistors also increases the heat dissipation area, which further promotes the reduction of heat in the entire fast charging path, which can greatly reduce the heat of the whole machine.

Description of the drawings

FIG. 1 is a schematic diagram of a fast charging circuit provided by an embodiment;

2 is a block diagram of the internal structure of a charging circuit provided by an embodiment;

3 is a block diagram of the internal structure of a charging circuit provided by an embodiment;

4 is a block diagram of the internal structure of a charging circuit provided by an embodiment;

5 is a block diagram of the internal structure of a charging circuit provided by an embodiment;

6 is a block diagram of the internal structure of a charging circuit provided by an embodiment;

FIG. 7 is a block diagram of the internal structure of a charging circuit provided by an embodiment;

FIG. 8 is a block diagram of the internal structure of a charging circuit provided by an embodiment;

FIG. 9 is a structural block diagram of a terminal according to an embodiment;

Fig. 10 is a structural block diagram of a charging system provided by an embodiment.

Description of reference signs:

01: MCU; 02: AP;

03: Battery; 04: MOS tube;

05: Drive circuit; 06: USB seat;

07: Data line; 08: Adapter;

10: Fast charging channel; 11: Control circuit;

112: Switch control unit; 1111: Charge signal input subunit;

1112: Clock signal input sub-unit; 1113: Signal processing sub-unit;

12: Terminal; 101: First transistor path;

102: The second transistor path; 13: The main board area of the circuit board;

14: Circuit board small board area; 15: Charging system;

17: Power adapter; 121: USB port.

detailed description

In order to make the purpose, technical solutions, and advantages of this application clearer, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the application, and not used to limit the application.

A schematic circuit diagram of a fast charging technology is shown in Figure 1. It consists of Microcontroller Unit (MCU) 01, Application Processor (AP) 02, battery 03, MOS tube 04, drive circuit 05, USB The base 06, the data line 07 and the adapter 08 constitute. Among them, the drive voltage generated by the drive circuit 05 in Figure 1 is the superposition of the voltage VBUS output by the adapter 08 and the VCLK output by the MCU01. The drive circuit 05 is controlled by the MCU01 to control the on and off of the MOS tube 04 to achieve fast Entry and exit of charging.

In the circuit diagram shown in Figure 1, according to the characteristics of the MOS tube, within a certain range of source and gate (GS) voltages, the higher the GS voltage, the smaller the on-resistance of the MOS. The MOS can be reduced by increasing the GS voltage. The RDSon impedance can reduce the heat of the MOS by replacing the MOS tube with a smaller on-resistance or increasing the GS voltage of the MOS tube when charging with high current. However, according to the characteristics of the corresponding relationship between the on-resistance of the MOS tube and the GS voltage, when the GS voltage is increased to a certain extent, the on-resistance will not change. If the on-resistance is to be reduced, the on-resistance can only be replaced. MOS transistors with smaller impedance and MOS transistors with smaller on-resistance are difficult to choose, and their cost and supply become a bottleneck. Therefore, the embodiments of the present application provide a charging circuit that can reduce the heat generation of the MOS, thereby reducing the heat generation of the whole machine. As shown in FIG. 2, the charging circuit includes a fast charging path 10 and a control circuit 11. The fast charging path 10 includes at least two parallel transistor paths 101; each transistor path 101 includes at least one transistor. Among them, the first pole of the transistor in the transistor path is connected to the energy storage device V1 of the device to be charged, and the second pole of the transistor in the transistor path is connected to the charging interface V2; the control electrode of the transistor in the transistor path is connected to the control circuit 11, where the control circuit 11 It is used to provide a turn-on voltage for the fast charging path 10 so that when the fast charging path 10 is in a conductive state, the charging current is transferred to the energy storage device V1 through the fast charging path 10.

In this embodiment, the device to be charged refers to an electronic device that needs to be charged, such as various personal computers, notebook computers, smart phones, tablet computers, and portable wearable devices, which are not limited in this embodiment. The energy storage device of the device to be charged refers to the energy storage device of the electronic device that needs to be charged, such as a rechargeable battery of the electronic device. The charging interface represents an interface that can be connected to a power supply device when the device to be charged is charged. The power supply device may include a power adapter, a power bank, etc., which is not limited in this embodiment.

Among them, in the charging circuit, the charging circuit includes two modes: working state and non-working state. When the charging circuit is in working state, the fast charging path needs to be in the conducting state, and it can be realized when the fast charging path is conducting. Charging of the device to be charged. The control circuit provides a conduction voltage for the fast charging path, so that when the fast charging path is in a conducting state, after the power supply device is connected to the charging interface, the charging current is transmitted to the energy storage device through the fast charging path. Among them, the fast charge path includes at least two parallel transistor paths, and each transistor path includes a transistor. The control circuit controls the conduction of the transistor in each transistor path, and the fast charge path is turned on. At this time, the fast charge path In working condition.

Optionally, as shown in FIG. 3, which is a schematic diagram of the transistor path including the first transistor M1 and the second transistor M2, the first electrode of the first transistor M1 is connected to the energy storage device V1 of the device to be charged, and the first transistor M1 The second electrode of the second transistor M2 is connected to the second electrode; the first electrode of the second transistor M2 is connected to the charging interface V2; the control electrode of the first transistor M1 and the control electrode of the second transistor M2 are both connected to the control circuit 11. Among them, each transistor path includes a first transistor and a second transistor; the fast charge path is turned on, and all the parallel transistor paths are turned on, that is, the first transistor and the first transistor in each transistor path are required to be turned on. Therefore, When the first transistor and the second transistor are turned on, the control circuit is required to provide a turn-on voltage for the first transistor and the second transistor, so that the first transistor and the second transistor are both in the on state.

In the fast charging path of the charging circuit, two transistor paths are controlled by a control circuit, which will not increase the unnecessary hardware cost, and the parallel two transistor paths can reduce the impedance of the fast charging path. For example, if the impedance of a single transistor is R and the impedance of a transistor path is 2*R, then the impedance of two parallel transistor paths is R, which is equivalent to using two parallel transistor paths in the fast charge path to replace the original The total heat generation of the fast charging path can be changed from I*I*2*R to I*I*R. In this way, the total heat generation is reduced to half of the previous one, and the heat of the entire fast charging path will be reduced even more. many.

In the charging circuit provided by this embodiment, since at least two parallel transistor paths are used in the fast charging path, each transistor path includes at least one transistor. In the charging circuit, the parallel transistor paths are used to reduce the overall fast charge path. The impedance of the charging path reduces the heat generation of the fast charging path, and the use of at least two parallel transistor paths increases the number of transistors and also increases the heat dissipation area, which further promotes the reduction of heat in the entire fast charging path, thereby greatly reducing Reduce the heat of the whole machine.

It should be noted that in the embodiments of the present application, multiple transistor paths in the fast charge path are connected in parallel, and each transistor path includes a first transistor and a second transistor. Therefore, one transistor is used in the following embodiments. When the path includes the first transistor and the second transistor, the connection relationship with other circuits describes the fast charging process of the entire embodiment. In practical applications, each transistor in the multiple parallel transistor path is the same as the first transistor in the following embodiment. The connection mode and working mode of the first transistor are the same.

The control circuit in the foregoing embodiment is described below. Based on the foregoing embodiment, the present application also provides a charging circuit. As shown in FIG. 4, the foregoing control circuit 11 includes a conduction control unit 111 and a switch control unit 112. The input end of the conduction control unit 111 is connected to the charging interface V2 and the clock signal terminal CLK, the output end of the conduction control unit 111 is connected to the control poles of the first transistor M1 and the second transistor M2; the input end of the switch control unit 112 is connected to the switch The signal terminal SW, the output terminal of the switch control unit 112 is connected to the control electrodes of the first transistor M1 and the second transistor M2; the turn-on control unit 111 is used to connect the first transistor M1 and the second transistor M1 when the switch control unit 112 is turned off. The transistor M2 provides the turn-on voltage.

In this embodiment, the input terminal of the conduction control unit 111 is connected to the charging interface V2 and the clock signal terminal CLK, and the output terminal of the conduction control unit 11 is connected to the control electrode of the first transistor M2. The input terminal of the switch control unit 112 is connected to the switch signal terminal SW, and the output terminal of the switch control unit 112 is connected to the control electrode of the second transistor M2. Both the clock signal terminal CLK and the switch signal terminal SW can be set on the controller of the device to be charged. When the controller detects that the external power supply device is connected to the charging interface V2 to charge the energy storage device V1, it outputs a clock signal from the clock signal terminal CLK. The switch signal is output from the switch signal terminal SW. The clock signal terminal CLK and the switch signal terminal SW can also be set in other positions, which are not limited in the embodiment of the present application, and can be set according to actual conditions.

Wherein, when the charging circuit is in a non-operating state, the switch control unit 112 receives the switch signal and turns on to ground the control electrodes of the first transistor M1 and the second transistor M2. At this time, the first transistor M1 and the second transistor M2 The gate voltage of is 0V, the first transistor and the second transistor are both cut off, that is, the transistor path is cut off, and each transistor path is composed of at least two parallel transistor paths, and the entire fast charge path is also in the cut-off state. When the charging circuit is in the working state, the switch control unit 112 receives the switch signal and turns off, and then the conduction control unit 111 provides the conduction voltage for the first transistor M1 and the second transistor M2 when the switch control unit 112 is turned off. One transistor M1 and the second transistor M2 are both turned on, that is, the transistor path is turned on, and the entire fast charging path is also in the on state, and the external power supply device is connected to the charging interface V2 to charge the energy storage device V1 through the fast charging path. Because the parallel transistor path can reduce the impedance of the entire fast charging path, thereby reducing the heat of the charging circuit.

Based on the foregoing embodiment, as shown in FIG. 5, the present application provides an embodiment. The foregoing conduction control unit 111 includes a charging signal input subunit 1111, a clock signal input subunit 1112, and a signal processing subunit 1113. The input end of the signal input subunit 1111 is connected to the charging interface V2, and the output end is connected to the input end of the signal processing subunit 1113; the input end of the clock signal input subunit 1112 is connected to the clock signal end CLK, and the output end is connected to the input of the signal processing subunit 1113 The output terminal of the signal processing subunit 1113 is connected to the control electrodes of the first transistor M1 and the second transistor M2; the charging signal input subunit 1111 is used to input the charging signal of the charging interface V2 to the signal processing subunit 1113; clock signal The input subunit 1112 is used to input a clock signal to the signal processing subunit 1113; the signal processing subunit 1113 is used to provide a turn-on voltage for the first transistor M1 and the second transistor M2 according to the charging signal and the clock signal.

In this embodiment, the input end of the charging signal input subunit 1111 is connected to the charging interface V2, and the output end is connected to the input end of the signal processing subunit 1113. When the charging circuit is in working state, the charging signal input subunit 1111 receives the connection of the external charging device The charging signal outputted by the charging interface V2 is then transmitted to the signal processing subunit 1113. When the charging circuit is in a non-working state, if the charging device does not input a charging signal from the charging interface V2, the charging signal input subunit 1111 does not work. Among them, the input terminal of the clock signal input subunit 1112 is connected to the clock signal terminal CLK, and the output terminal is connected to the input terminal of the signal processing subunit 1113. When the charging circuit is in the working state, the clock signal input subunit 1112 receives the clock signal and transfers the clock signal. The signal is input to the signal processing subunit 1113. When the charging circuit is in a non-working state, the clock signal input subunit 1112 does not work. Wherein, the input terminal of the signal processing subunit 1113 is connected to the output terminal of the charging signal input subunit 1111 and the output terminal of the clock signal input subunit 1112, and the output terminal of the signal processing subunit 1113 is connected to the first transistor M1 and the second transistor M2. For the control electrode, when the charging circuit is in working state, the signal processing subunit 1113 receives the charging signal and the clock signal, processes the charging signal and the clock signal, and inputs the processed signal to the first transistor M1 and the second transistor M2. The control electrode provides a turn-on voltage for the first transistor M1 and the second transistor M2. When the charging circuit is in a non-working state, and the signal processing sub-unit 1113 does not receive the charging signal and the clock signal, the signal processing sub-unit 1113 does not work. In this embodiment, the charge signal input subunit, the clock signal input subunit and the signal processing subunit are used to control the turn-on and turn-off of the transistor path in the fast charging path, so as to control the normal operation of the entire fast charging path. Effectively quickly charge the device to be charged.

Wherein, in one embodiment, the charging signal input unit includes an anti-backflow subunit. The input terminal of the anti-backflow subunit is connected to the charging interface, and the output terminal of the anti-backflow subunit is connected to the input terminal of the signal processing unit; To prevent backflow of the charging voltage. Optionally, the charging signal input unit further includes a filtering sub-unit; the input end of the filtering sub-unit is connected to the charging interface; the output end of the filtering sub-unit is connected to the input end of the anti-backflow sub-unit; the filtering sub-unit is used to filter out the input with the charging voltage Noise signal. For this embodiment, a specific schematic circuit diagram is provided. As shown in FIG. 6, the charging signal input subunit 1111 includes a first resistor R1, a first diode D1, and a first capacitor C1; one end of the first resistor R1 Connect the charging port V2, the other end is connected to the anode of the first diode D1 and one end of the first capacitor C1; the cathode of the first diode D1 is connected to the input end of the signal processing sub-unit 1111; the other end of the first capacitor C1 is grounded . Optionally, the clock signal input subunit 1112 includes a second capacitor C2, one end of the second capacitor C2 receives the clock signal, and the other end is connected to the input end of the signal processing subunit 1113. Optionally, the aforementioned signal processing subunit 1111 includes a second diode D2, a second resistor R2, a third capacitor C3, and a third resistor R3; the anode of the second diode D2 is connected to the output of the charging signal input subunit 1111 Terminal and the output terminal of the clock signal input subunit 1112, the cathode is connected to one end of the second resistor R2 and one end of the third capacitor C3; the other end of the second resistor R2 is connected to the control electrodes of the first transistor M1 and the second transistor M2; The other end of the three capacitor C3 is grounded; one end of the third resistor R3 is connected to the control electrodes of the first transistor M1 and the second transistor M2, and the other end is grounded.

In this embodiment, when the charging circuit is in working state, the charging voltage input from the charging interface V2 by the external power supply device is input from one end of the first resistor R1, and then added to the node J1 through the first diode D1, that is, the charging signal is input To the signal processing sub-unit 1113. Among them, the function of the first diode D1 is to prevent backflow. The first resistor R1 and the first capacitor C1 form a filter circuit, which can filter out the noise signal input along with the charging voltage. Wherein, when the charging circuit is in the working state, the clock signal is input from one end of the second capacitor C2, and the other end of the second capacitor C2 is added to the node J1, that is, the clock signal is input to the signal processing subunit 1113. Among them, the function of the second capacitor C2 is to store energy and filter. Wherein, the anode of the second diode D2 is connected to the node J1, and the cathode is connected to one end of the second resistor R2 and one end of the second capacitor C2. When the charging circuit is in the working state, the charging signal and the clock signal on the node J1 are input from the anode of the second diode D2 and subjected to superposition processing to obtain a processed signal. Then, the processed signal is applied to the node J2 through the second resistor R2, which provides a turn-on voltage for the first transistor M1 and the second transistor M2, so that the first transistor M1 and the second transistor M2 are turned on. Through the charging circuit provided by this embodiment, the transistor path can be effectively controlled on and off, so as to realize the rapid charging of the device to be charged.

Wherein, in another embodiment, the above-mentioned switch control unit includes a plurality of parallel switch control sub-units, and each switch control sub-unit is connected to the corresponding transistor path; then the turn-on control unit is used for when each switch control sub-unit is turned off , Provide turn-on voltage for the corresponding transistor path. In the fast charge path shown in this embodiment, each transistor path is individually connected to a switch control sub-unit. In this way, the conduction control unit can provide the corresponding transistor path with a conduction voltage when each switch control sub-unit is turned off. In order to make each transistor path have separate conduction application scenarios. For the internal structure of the switch control unit, please continue to refer to the circuit diagram shown in FIG. 6, where the switch control unit 112 includes a third transistor M3 and a third diode D3; the control electrode of the third transistor M3 is connected to the switch signal terminal SW, The source of the three transistor M3 is connected to the anode of the third diode D3, the drain of the third transistor M3 is connected to the control electrodes of the first transistor M1 and the second transistor M2; the cathode of the third diode D3 is grounded.

In this embodiment, the control electrode of the third transistor M3 is connected to the switch signal terminal SW. When the charging circuit is in working state, the switch signal output by the switch signal terminal SW turns off the third transistor M3, and the conduction control unit 111 provides the conduction voltage for the first transistor M1 and the second transistor M2. After the second transistor M2 and the second transistor M2 are both turned on, the external power supply device starts to charge the energy storage device V1 from the charging interface V2. When the charging circuit is in a non-operating state, the switching signal output by the switching signal terminal SW turns on the third transistor M3. Since the source of the third transistor M3 is grounded through the third diode D3, the drain of the third transistor M3 is connected The control electrode of the second transistor M2. Therefore, when the third transistor M3 is turned on, the drain voltage of the third transistor M3 is 0V, and the control electrode voltage of the first transistor M1 and the second transistor M2 is 0V, that is, the first transistor M1 and the second transistor M2 are turned off, and the fast charging path is closed. At this time, the external power supply device no longer charges the energy storage device V1 from the charging interface V2. Through the charging circuit provided in this embodiment, the on and off of the fast charging path can be effectively controlled.

In addition, in one embodiment, as shown in FIG. 7, the control circuit 11 further includes a protection unit 113, wherein the input end of the protection unit 113 is connected to the charging interface V2, and the output end is connected to the first transistor M1 and the second transistor M2. Control electrode; protection unit 113, used to prevent the transistor in the transistor path from entering negative voltage, that is, when the external power supply device inputs a negative voltage from the charging interface V2 to protect the first transistor M1 and the second transistor M2. Optionally, as shown in FIG. 8, the protection unit 113 includes a fourth transistor M4, a fifth transistor M5, and a fourth resistor R4; wherein, the control electrode of the fourth transistor M4 is connected to the control electrode of the fifth transistor M5 and the fourth transistor M5. One end of the resistor R4, the source of the fourth transistor M4 is connected to the charging interface V2, the drain of the fourth transistor M4 is connected to the drain of the fifth transistor M5; the source of the fifth transistor M5 is connected to the first transistor M1 and the second transistor M2 The control electrode; Among them, the other end of the fourth resistor R4 is grounded.

In this embodiment, the protection circuit is used to prevent negative pressure from being input to the first transistor M1 and the second transistor M2 by the protection unit 113 when the external power supply device inputs a negative voltage from the charging interface V2. The transistor M2 causes damage. Specifically, when the external power supply device inputs a negative voltage from the charging interface V2, the fourth transistor M4 and the fifth transistor M5 are turned on to prevent the negative voltage from being input to the control electrode of the second transistor M2. In this way, the protection unit can protect the first transistor M1 and the second transistor M2, that is, the entire fast charging path is protected, and then the entire charging circuit is protected.

The first pole and the second pole of the transistor mentioned in the above embodiments, the embodiment of the present application provides an embodiment, if the first pole of the first transistor is sourced, the second pole of the first transistor is drained; if The first electrode of the second transistor has a source, and the second transistor has a drain. Optionally, in another embodiment, if the first electrode of the first transistor is drained, the second electrode of the first transistor is sourced; if the first electrode of the second transistor is drained, the first electrode of the second transistor is drained. Diode source.

Wherein, the drain of the first transistor M1 is connected to the energy storage device V1, the source of the first transistor M1 is connected to the source of the second transistor M2, and the drain of the second transistor M2 is connected to the charging interface V2; or, the first transistor M1 The source is connected to the energy storage device V1, the drain of the first transistor M1 is connected to the drain of the second transistor M2, and the source of the second transistor M2 is connected to the charging interface V2. The control circuit 11 provides a turn-on voltage for the first transistor M1 and the second transistor M2, the first transistor M1 and the second transistor M2 are both turned on, and the charging interface V2 charges the energy storage device V1 through the first transistor M1 and the second transistor M2 . Optionally, as shown in FIG. 1, the first transistor M1 and the second transistor M2 are both NMOS transistors.

Through the description of the above embodiments, it is not difficult to understand that the embodiments of the present application can effectively reduce the path impedance by increasing the number of parallel transistor paths and placing the parallel paths in different positions, and sharing the same control circuit can reduce the electronic The equipment temperature rises, and in high-current applications, the requirements for transistor selection are also reduced, and the requirements for cost and supply chain are further reduced, thereby effectively solving the existing rapid charging technology in the prior art to reduce electronic equipment The problem of fever.

In addition, the present application also provides a charging chip, which includes the charging circuit provided in the foregoing embodiment. That is, any of the charging circuits provided in the above embodiments can be applied to the charging chip, where the charging chip can be applied to any electronic device to realize rapid charging of the electronic device.

As shown in FIG. 9, an embodiment of the present application also provides a terminal 12, which includes the charging circuit provided in the foregoing embodiment, or includes a charging chip made by the foregoing charging circuit. Optionally, the terminal 12 is fast The distance between the transistor paths in the charging path is greater than the preset distance threshold. Optionally, if the fast charge path includes the first transistor path 101 and the second transistor path 102, the first transistor path 101 is provided in the circuit board area 13 of the terminal, and the second transistor path 102 is provided in the circuit board of the terminal. Small board area 14.

Among them, in practical applications, the charging circuit in the above embodiment can be made into a chip and used in any kind of terminal. The terminal is an electronic device that needs electricity. When used in a terminal, the charging circuit is fast. The distance between the transistor paths in the charging path can be greater than the preset distance threshold. The distance between the transistor paths is not limited in this embodiment, and it may be a distance calculated based on the center point of each transistor path, or The distance calculated with the edge as the standard can be determined according to the actual application, as long as it is ensured that the paths of the transistors are distributed in the terminal. Optionally, it is set that the fast charge path of the terminal includes two parallel transistor paths, that is, the fast charge path includes a first transistor path and a second transistor path, and the first transistor path is set in the main board area of the circuit board of the terminal, The second transistor path is arranged in the small board area of the circuit board of the terminal, where the main board area and the small board area are located at different positions of the terminal. For example, the main board area may be a circuit board equipped with core chips such as processors and communication modules. It can be an accessory board of the main board, for example, it can be used to connect speakers, receivers and the main board. Optionally, in order to further disperse the heat dissipation of the transistor paths, transistors can be arranged only in the small board area, so that the transistor paths are dispersed. Set in the terminal, it can effectively disperse the heat of the fast charging path and further reduce the heat of the terminal.

As shown in FIG. 10, in another embodiment, this embodiment provides a charging system 15. The charging system 15 includes a power adapter 17 and a terminal 12 as in the above embodiment; the power adapter 17 passes through the USB port 121 of the terminal. Charge the terminal 12.

In this embodiment, the charging interface of the terminal is a USB port, and the first pole of the second transistor M2 of the charging circuit can be connected to a power adapter through the USB port, so that the power adapter can charge the terminal. The charging system includes a terminal and a power adapter, and the power adapter charges the terminal through the USB port of the mobile terminal. Since the above-mentioned terminal can reduce the heat of the electronic device by means of fast charging channels and distributed settings, the problem of serious heating of the entire charging system when the power adapter is charging the terminal is avoided.

The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described. However, as long as there is no contradiction between the combinations of these technical features, they should It is considered as the range described in this specification.

The above-mentioned embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the scope of the invention patent. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of this application, several modifications and improvements can be made, and these all fall within the protection scope of this application. Therefore, the scope of protection of the patent of this application shall be subject to the appended claims.

Claims

A charging circuit, characterized in that the charging circuit includes: a fast charging path and a control circuit; the fast charging path includes at least two parallel transistor paths; each of the transistor paths includes at least one transistor;

The first electrode of the transistor in the transistor path is connected to the energy storage device of the device to be charged, the second electrode of the transistor in the transistor path is connected to the charging interface; the control electrode of the transistor in the transistor path is connected to the control circuit;

The control circuit is used to provide a conduction voltage for the fast charging path, so that when the fast charging path is in a conducting state, the charging current is transferred to the energy storage device through the fast charging path.
The charging circuit according to claim 1, wherein the transistor path includes a first transistor and a second transistor; the first pole of the first transistor is connected to the energy storage device of the device to be charged, and the first transistor The second electrode of a transistor is connected to the second electrode of the second transistor; the first electrode of the second transistor is connected to the charging interface; the control electrode of the first transistor and the control electrode of the second transistor are both Connected to the control circuit;

The control circuit provides a turn-on voltage for the first transistor and the second transistor, so that both the first transistor and the second transistor are in a conductive state.
The charging circuit according to claim 2, wherein the control circuit comprises a conduction control unit and a switch control unit;

The input terminal of the conduction control unit is connected to the charging interface and the clock signal terminal, and the output terminal of the conduction control unit is connected to the control electrode of the transistor in the transistor path;

The input terminal of the switch control unit is connected to the switch signal terminal, and the output terminal of the switch control unit is connected to the control electrode of the transistor in the transistor path;

The turn-on control unit is used to provide a turn-on voltage for the transistor in the transistor path when the switch control unit is turned off.
The charging circuit according to claim 3, wherein the transistor path includes a first transistor and a second transistor; the output terminal of the conduction control unit is connected to the first transistor and the second transistor. Control pole; the input terminal of the switch control unit is connected to the switch signal terminal, and the output terminal of the switch control unit is connected to the control poles of the first transistor and the second transistor; the conduction control unit uses When the switch control unit is turned off, a turn-on voltage is provided for the first transistor and the second transistor.
The charging circuit according to claim 3, wherein the switch control unit comprises a plurality of parallel switch control sub-units, each of the switch control sub-units is connected to a corresponding transistor path; then the conduction control unit uses When each switch control subunit is turned off, a turn-on voltage is provided for the corresponding transistor path.
The charging circuit according to claim 5, wherein the switch control unit comprises a third transistor and a third diode; the control electrode of the third transistor is connected to the switch signal terminal, and the third transistor The source of the third diode is connected to the anode of the third diode, the drain of the third transistor is connected to the control electrodes of the first transistor and the second transistor; the cathode of the third diode is grounded.
The charging circuit according to claim 5, wherein the conduction control unit comprises a charging signal input subunit, a clock signal input subunit and a signal processing subunit;

The input end of the charging signal input sub-unit is connected to the charging interface, and the output end is connected to the input end of the signal processing sub-unit; the input end of the clock signal input sub-unit is connected to the clock signal end, and the output end is connected to the The input terminal of the signal processing subunit; the output terminal of the signal processing subunit is connected to the control electrode of the transistor in the transistor path;

The charging signal input subunit is used to input a charging signal to the signal processing subunit;

The clock signal input subunit is used to input a clock signal to the signal processing subunit;

The signal processing subunit is configured to provide a turn-on voltage for the transistor in the transistor path according to the charging signal and the clock signal.
The charging circuit according to claim 7, wherein the charging signal input unit comprises an anti-backflow subunit; the input end of the anti-backflow subunit is connected to the charging interface, and the output terminal of the anti-backflow subunit Connected to the input end of the signal processing unit;

The anti-backflow subunit is used to prevent the charging voltage from backflowing.
The charging circuit according to claim 7, wherein the charging signal input unit further comprises a filtering sub-unit; the input of the filtering sub-unit is connected to the charging interface; the output of the filtering sub-unit is connected to the The input terminal of the anti-backflow sub-unit;

The filtering subunit is used to filter out noise signals that enter with the charging voltage.
The charging circuit according to any one of claims 7-9, wherein the charging signal input subunit further comprises a first resistor, a first diode and a first capacitor; one end of the first resistor is connected The other end of the charging interface is connected to the anode of the first diode and one end of the first capacitor; the cathode of the first diode is connected to the input end of the signal processing subunit; The other end of the capacitor is grounded.
The charging circuit according to any one of claims 7-9, wherein the clock signal input subunit comprises a second capacitor, one end of the second capacitor receives the clock signal, and the other end is connected to the signal processor The input terminal of the unit.
The charging circuit according to any one of claims 7-9, wherein the signal processing sub-unit includes a second diode, a second resistor, a third capacitor, and a third resistor; the second diode The anode of the tube is connected to the output end of the charging signal input subunit and the output end of the clock signal input subunit, and the cathode is connected to one end of the second resistor and one end of the third capacitor; The other end is connected to the control electrodes of the first transistor and the second transistor; the other end of the third capacitor is grounded; one end of the third resistor is connected to the control electrodes of the first transistor and the second transistor , The other end is grounded.
The charging circuit according to claim 1, wherein the control circuit further comprises a protection unit;

The input terminal of the protection unit is connected to the charging interface, and the output terminal is connected to the control electrode of the transistor in the transistor path;

The protection unit is used to prevent the transistor in the transistor path from entering a negative voltage.
The charging circuit according to claim 13, wherein the protection unit comprises a fourth transistor, a fifth transistor and a fourth resistor; wherein the control electrode of the fourth transistor is connected to the control electrode of the fifth transistor And one end of the fourth resistor, the source of the fourth transistor is connected to the charging interface, the drain of the fourth transistor is connected to the drain of the fifth transistor; the source of the fifth transistor is connected The control electrodes of the first transistor and the second transistor; wherein the other end of the fourth resistor is grounded.
2. The charging circuit of claim 1, wherein if the first electrode of the first transistor is sourced, the second electrode of the first transistor is drained; if the first electrode of the second transistor is Source, the second electrode of the second transistor is the drain.
A charging chip, wherein the charging chip includes the charging circuit according to any one of claims 1-15.
A terminal, characterized in that the terminal includes the charging chip according to claim 16.
The terminal according to claim 17, wherein the distance between each transistor path in the fast charging path of the terminal is greater than a preset distance threshold.
The terminal according to claim 17 or 18, wherein if the fast charge path includes a first transistor path and a second transistor path, the first transistor path is arranged in the main board area of the circuit board of the terminal , The second transistor path is arranged in the small board area of the circuit board of the terminal.
A charging system, wherein the charging system comprises a power adapter and the terminal according to any one of claims 17-18;

The power adapter charges the terminal through the USB port of the terminal.