WO2021022600A1 - Chip on film group, display module and bonding method for chip on film group - Google Patents

Chip on film group, display module and bonding method for chip on film group Download PDF

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WO2021022600A1
WO2021022600A1 PCT/CN2019/104212 CN2019104212W WO2021022600A1 WO 2021022600 A1 WO2021022600 A1 WO 2021022600A1 CN 2019104212 W CN2019104212 W CN 2019104212W WO 2021022600 A1 WO2021022600 A1 WO 2021022600A1
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chip
film
films
connection terminals
rows
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PCT/CN2019/104212
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French (fr)
Chinese (zh)
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李文芳
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深圳市华星光电技术有限公司
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Publication of WO2021022600A1 publication Critical patent/WO2021022600A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels

Abstract

Provided are a chip on film (COF) group, a display module and a bonding method for the COF group. The COF group comprises multiple COFs, the multiple COFs are laminated, and connection terminals on each of the COFs are exposed to connect to external signals, multiple connection terminals arranged in a row are provided on each of the COFs, and multiple connection terminals on the multiple COFs are arranged in multiple rows, so that the spacing between two adjacent connection terminals on a COF can be increased, thereby preventing the connection terminals on the COF from being short-circuited due to spacing being too narrow, and preventing poor bonding of the COF.

Description

覆晶薄膜组、显示模组及覆晶薄膜组的邦定方法Chip-on-chip film group, display module and bonding method of chip-on film group 技术领域Technical field
本发明涉及显示技术领域,尤其涉及一种覆晶薄膜组、显示模组及覆晶薄膜组的邦定方法。The present invention relates to the field of display technology, in particular to a bonding method of a chip-on-chip film group, a display module, and a chip-on-chip film group.
背景技术Background technique
薄膜晶体管(Thin Film Transistor,TFT)是目前液晶显示装置(Liquid Crystal Display,LCD)和有源矩阵驱动式有机电致发光显示装置(Active Matrix Organic Light-Emitting Diode,AMOLED)中的主要驱动元件,直接关系平板显示装置的显示性能。Thin Film Transistor (TFT) is a current liquid crystal display device (Liquid Crystal Display, LCD) and active matrix organic light-emitting display device (Active Matrix Organic Light-Emitting Diode, AMOLED) is the main driving element, directly related to the display performance of the flat panel display device.
现有市场上的液晶显示器大部分为背光型液晶显示器,其包括液晶显示面板及背光模组(backlight module)。液晶显示面板的工作原理是在薄膜晶体管阵列基板(Thin Film Transistor Array Substrate,TFT Array Substrate)与彩色滤光片(Color Filter,CF)基板之间灌入液晶分子,并在两片基板上分别施加像素电压和公共电压,通过像素电压和公共电压之间形成的电场控制液晶分子的旋转方向,以将背光模组的光线透射出来产生画面。Most of the liquid crystal displays on the market are backlit liquid crystal displays, which include a liquid crystal display panel and a backlight module. The working principle of the liquid crystal display panel is based on the thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate) and the color filter (Color Filter, CF) The liquid crystal molecules are filled between the substrates, and the pixel voltage and the common voltage are applied to the two substrates. The electric field formed between the pixel voltage and the common voltage controls the rotation direction of the liquid crystal molecules to reduce the backlight module The light is transmitted out to produce a picture.
OLED器件通常包括:基板、设于基板上的阳极、设于阳极上的空穴注入层、设于空穴注入层上的空穴传输层、设于空穴传输层上的发光层、设于发光层上的电子传输层、设于电子传输层上的电子注入层及设于电子注入层上的阴极。OLED器件的发光原理为半导体材料和有机发光材料在电场驱动下,通过载流子注入和复合导致发光。具体的,OLED器件通常采用氧化铟锡(ITO)电极和金属电极分别作为器件的阳极和阴极,在一定电压驱动下,电子和空穴分别从阴极和阳极注入到电子传输层和空穴传输层,电子和空穴分别经过电子传输层和空穴传输层迁移到发光层,并在发光层中相遇,形成激子并使发光分子激发,后者经过辐射弛豫而发出可见光。 OLED devices usually include: a substrate, an anode provided on the substrate, a hole injection layer provided on the anode, a hole transport layer provided on the hole injection layer, a light emitting layer provided on the hole transport layer, An electron transport layer on the light-emitting layer, an electron injection layer provided on the electron transport layer, and a cathode provided on the electron injection layer. The light-emitting principle of OLED devices is that semiconductor materials and organic light-emitting materials are driven by an electric field to cause light emission through carrier injection and recombination. Specifically, OLED devices usually use indium tin oxide (ITO) electrodes and metal electrodes as the anode and cathode of the device, respectively. Under a certain voltage drive, electrons and holes are injected from the cathode and anode to the electron transport layer and hole transport layer, respectively. , Electrons and holes migrate to the light-emitting layer through the electron transport layer and the hole transport layer respectively, and meet in the light-emitting layer to form excitons and excite light-emitting molecules, the latter emit visible light through radiation relaxation.
目前由于市场趋势,大众消费者对电视尺寸的刷新率,及分辨率要求越来越高,刷新率越高,需要的覆晶薄膜(COF)数目越多,但是由于尺寸限制,COF数目越多,相对应的COF的宽度也会变小,例如8K分辨率、120HZ刷新率采用1G1D架构(1G1D架构是指一条栅极线对应连接一行子像素,一条数据线对应连接一列子像素)的显示器会引起充电不足的问题,解决充电不足的问题则需要将8K分辨率、120HZ刷新率的显示器做成HG2D架构(HG2D架构是指一条栅极线对应连接两行子像素,两条数据线对应连接一列子像素),这样就需要48颗960通道的COF,由于液晶面板宽度的问题,现有技术的COF 邦定(bonding)方法,会使的的COF的金手指的线宽(pitch)很小,即使使用二合一(2 in 1)的1920通道的COF的金手指的线宽也会很小,会引起邦定不良的问题。At present, due to market trends, mass consumers demand higher and higher refresh rates and resolutions for TV sizes. The higher the refresh rate, the more chip-on-chip (COF) required, but due to size limitations, the greater the number of COFs. , The width of the corresponding COF will also become smaller. For example, a display with a resolution of 8K and a refresh rate of 120HZ adopts a 1G1D architecture (1G1D architecture means that a gate line corresponds to a row of sub-pixels, and a data line corresponds to a column of sub-pixels). Cause the problem of insufficient charging. To solve the problem of insufficient charging, a display with 8K resolution and 120HZ refresh rate needs to be made into HG2D architecture (HG2D architecture means that one gate line is connected to two rows of sub-pixels, and two data lines are connected to one. Column sub-pixels), this requires 48 COFs with 960 channels. Due to the width of the liquid crystal panel, the prior art COF bonding method will make the COF golden finger pitch very small. Even if the two-in-one (2 in 1) 1920 channel COF gold finger has a small line width, it will cause poor bonding.
技术问题technical problem
本发明的目的在于提供一种覆晶薄膜组,可以防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。The object of the present invention is to provide a chip-on-chip film assembly, which can prevent the connection terminals on the chip-on-chip film from being short-circuited due to the narrow pitch and avoid poor bonding of the chip-on-chip film.
本发明的目的还在于提供一种显示模组,可以防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。The object of the present invention is also to provide a display module, which can prevent the connection terminals on the flip chip film from being short-circuited due to the narrow pitch, and avoid poor bonding of the flip chip film.
本发明的目的还在于提供一种覆晶薄膜组的邦定方法,可以防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。The object of the present invention is also to provide a bonding method of the chip on film group, which can prevent the connection terminals on the chip on film from being short-circuited due to the narrow pitch, and avoid poor bonding of the chip on film.
技术解决方案Technical solutions
为实现上述目的,本发明提供了一种覆晶薄膜组,包括:多个覆晶薄膜;所述多个覆晶薄膜叠置并裸露出每一所述覆晶薄膜上的连接端子以连接外部信号。In order to achieve the above objective, the present invention provides a chip-on-chip film set, including: a plurality of chip-on-chip films; the plurality of chip-on-chip films are stacked and exposed to connect the external connection terminals on each of the chip-on-chip films. signal.
每个覆晶薄膜上设有呈一行排列的多个连接端子;所述多个覆晶薄膜的多个连接端子呈多行排布。Each chip on film is provided with multiple connection terminals arranged in a row; the multiple connection terminals of the multiple chip on films are arranged in multiple rows.
所述覆晶薄膜的数量为两个,所述两个覆晶薄膜叠置使分别位于所述两个覆晶薄膜上的两行连接端子呈两行排布。The number of the chip on film is two, and the two chip on film are stacked so that the two rows of connection terminals respectively located on the two chip on film are arranged in two rows.
所述多个覆晶薄膜叠置使分别位于所述多个覆晶薄膜上的多行连接端子交错排布。The plurality of chip-on-chip films are stacked so that the plurality of rows of connection terminals respectively located on the plurality of chip-on films are arranged alternately.
每个覆晶薄膜上位于同一行的多个连接端子相互平行;每个覆晶薄膜的每相邻两个连接端子之间的间距相同。The multiple connection terminals located in the same row on each chip on film are parallel to each other; the distance between every two adjacent connection terminals of each chip on film is the same.
所述覆晶薄膜组叠置后的整体形状为矩形;所述覆晶薄膜各自的形状均为“L”形。The overall shape of the stack of the chip-on-chip film group is rectangular; the shape of each of the chip-on-chip films is an "L" shape.
每个覆晶薄膜包括第一部以及所述第一部垂直连接的第二部;Each chip on film includes a first part and a second part vertically connected to the first part;
至少一个所述覆晶薄膜的第一部重叠覆盖另一所述覆晶薄膜的第一部,所述覆晶薄膜在叠置后的第二部的边缘平齐。At least one first part of the chip on film overlaps and covers the first part of the other chip on film, and the edge of the second part of the chip on film is flush after the overlap.
所述多个连接端子位于覆晶薄膜的第一部上;每个覆晶薄膜上还设有位于第二部上的驱动芯片。The multiple connection terminals are located on the first part of the chip on film; each chip on the film is also provided with a driving chip on the second part.
本发明还提供一种显示模组,包括:显示面板以及设于所述显示面板上的多个如上所述的覆晶薄膜组。The present invention also provides a display module including: a display panel and a plurality of the above-mentioned flip-chip film groups arranged on the display panel.
本发明还提供一种覆晶薄膜组的邦定方法,包括如下步骤:The present invention also provides a bonding method of the flip chip film group, which includes the following steps:
步骤S1、将多个如上所述的覆晶薄膜组中的一个覆晶薄膜的多个连接端子与显示面板邦定;Step S1, bonding a plurality of connection terminals of a chip-on-chip film in the plurality of chip-on-chip film groups as described above to the display panel;
步骤S2、重复步骤S1直至将所有覆晶薄膜组中的多个覆晶薄膜的多个连接端子均与显示面板邦定。Step S2, Step S1 is repeated until the multiple connection terminals of the multiple chip on film groups in all the chip on film groups are bonded to the display panel.
有益效果Beneficial effect
本发明的有益效果:本发明的覆晶薄膜组包括多个覆晶薄膜;所述多个覆晶薄膜叠置并裸露出每一所述覆晶薄膜上的连接端子以连接外部信号,每个覆晶薄膜上设有呈一行排列的多个连接端子;所述多个覆晶薄膜的多个连接端子呈多行排布,可以增加一个覆晶薄膜上相邻两个连接端子之间的间距,防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。本发明的显示模组,可以防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。本发明的覆晶薄膜组的邦定方法,可以防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。The beneficial effects of the present invention: the chip-on-chip film set of the present invention includes a plurality of chip-on-chip films; the plurality of chip-on-chip films overlap and expose the connection terminals on each of the chip-on films to connect external signals, each The chip on film is provided with a plurality of connection terminals arranged in a row; the plurality of connection terminals of the plurality of chip on film are arranged in multiple rows, which can increase the distance between two adjacent connection terminals on a chip on film , To prevent the connection terminals on the flip chip film from being short-circuited due to the narrow pitch, and avoid poor bonding of the flip chip film. The display module of the present invention can prevent the connection terminals on the flip chip film from being short-circuited due to the narrow spacing, and avoid poor bonding of the flip chip film. The bonding method of the chip-on-chip film assembly of the present invention can prevent the connection terminals on the chip-on-chip film from being short-circuited due to the narrow spacing, and avoid poor bonding of the chip-on-chip film.
附图说明Description of the drawings
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。In order to further understand the features and technical content of the present invention, please refer to the following detailed description and accompanying drawings of the present invention. However, the accompanying drawings are only provided for reference and illustration and are not used to limit the present invention.
附图中,In the attached picture,
图1为本发明的覆晶薄膜组的结构示意图;FIG. 1 is a schematic diagram of the structure of the flip chip film group of the present invention;
图2和图3为本发明的覆晶薄膜组的一个覆晶薄膜的示意图;2 and 3 are schematic diagrams of a chip on film of the chip on film group of the present invention;
图4为本发明的显示模组的结构示意图;4 is a schematic diagram of the structure of the display module of the present invention;
图5为本发明的覆晶薄膜组的邦定方法的流程图。FIG. 5 is a flowchart of the bonding method of the flip chip film group of the present invention.
本发明的实施方式Embodiments of the invention
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。In order to further explain the technical means adopted by the present invention and its effects, the following describes in detail the preferred embodiments of the present invention and the accompanying drawings.
请参阅图1至图3,本发明提供一种覆晶薄膜组,包括:多个覆晶薄膜20;所述多个覆晶薄膜20叠置并裸露出每一所述覆晶薄膜20上的连接端子211以连接外部信号。1 to 3, the present invention provides a chip on film set, including: a plurality of chip on film 20; the plurality of chip on film 20 is stacked and exposed on each of the chip on film 20 The terminal 211 is connected to connect an external signal.
具体的,每个覆晶薄膜20上设有呈一行排列的多个连接端子211;所述多个覆晶薄膜20的多个连接端子211呈多行排布。Specifically, each chip on film 20 is provided with a plurality of connection terminals 211 arranged in a row; the plurality of connection terminals 211 of the plurality of chip on film 20 are arranged in multiple rows.
需要说明的是,本发明的覆晶薄膜组中的多个覆晶薄膜叠置并裸露出每一所述覆晶薄膜上的连接端子以连接外部信号,多个覆晶薄膜20上均设有呈一行排列的多个连接端子211,所述多个覆晶薄膜20的多个连接端子211呈多行排布,相当于将现有技术中一个覆晶薄膜用一个覆晶薄膜组替代,也就是将现有技术中呈一行分布的连接端子分别用多行排布的连接端子替代,可以增加一个覆晶薄膜20上相邻两个连接端子211之间的间距,防止覆晶薄膜20上的连接端子211由于间距过窄而导致短路,避免覆晶薄膜20邦定不良。It should be noted that a plurality of flip-chip films in the set of flip-chip films of the present invention are stacked and exposed the connection terminals on each of the flip-chip films to connect to external signals, and the plurality of flip-chip films 20 are provided with A plurality of connection terminals 211 arranged in a row, and the plurality of connection terminals 211 of the plurality of chip on film 20 are arranged in multiple rows, which is equivalent to replacing one chip on film with one chip on film group in the prior art. That is, the connection terminals distributed in one row in the prior art are replaced with the connection terminals arranged in multiple rows, which can increase the distance between two adjacent connection terminals 211 on the flip chip film 20 to prevent The connection terminals 211 are short-circuited due to the narrow pitch, which prevents poor bonding of the chip on film 20.
具体的,请参阅图1,本发明的优选实施例中所述覆晶薄膜20的数量为两个,所述两个覆晶薄膜20叠置使分别位于所述两个覆晶薄膜20上的两行连接端子211呈两行排布,当然本发明的覆晶薄膜20的数量也可以为三个、四个或五个等等,相应的,三个覆晶薄膜20的多个连接端子211呈三行排布,四个覆晶薄膜20的多个连接端子211呈四行排布,本发明在此不做限制。Specifically, please refer to FIG. 1. In the preferred embodiment of the present invention, the number of the chip on film 20 is two, and the two chip on film 20 are superimposed so that the two on the chip The two rows of connection terminals 211 are arranged in two rows. Of course, the number of the chip on film 20 of the present invention can also be three, four, or five, etc. Correspondingly, there are multiple connection terminals 211 of the three chip on film 20 It is arranged in three rows, and the multiple connection terminals 211 of the four chip on film 20 are arranged in four rows, and the present invention is not limited herein.
具体的,所述多个覆晶薄膜20叠置使分别位于所述多个覆晶薄膜20上的多行连接端子211交错排布,可以进一步增加一个覆晶薄膜20上相邻两个连接端子211之间的间距。Specifically, the plurality of chip-on-chip films 20 are stacked so that the multiple rows of connection terminals 211 respectively located on the plurality of chip-on-films 20 are arranged alternately, which can further add two adjacent connection terminals on one chip-on-chip 20 The spacing between 211.
具体的,每个覆晶薄膜20上位于同一行的多个连接端子211相互平行;每个覆晶薄膜20的每相邻两个连接端子211之间的间距相同。Specifically, the multiple connection terminals 211 in the same row on each chip on film 20 are parallel to each other; the distance between every two adjacent connection terminals 211 of each chip on film 20 is the same.
请参阅图2及图3,所述多个覆晶薄膜20叠置后的整体形状为矩形;所述覆晶薄膜20各自的形状均为“L”形;2 and 3, the overall shape of the multiple chip on film 20 after being stacked is rectangular; the shape of each of the chip on film 20 is an "L" shape;
每个覆晶薄膜20包括第一部212以及所述第一部212垂直连接的第二部213;Each chip on film 20 includes a first portion 212 and a second portion 213 vertically connected to the first portion 212;
至少一个所述覆晶薄膜20的第一部212覆盖另一所述覆晶薄膜20的第一部212,所述覆晶薄膜20在叠置后的第二部213的边缘平齐,将多个形状为“L”形的覆晶薄膜20共同构成形状为矩形的覆晶薄膜组。At least one first part 212 of the chip on film 20 covers the first part 212 of the other chip on film 20, and the edge of the second part 213 after being stacked is flush with the chip on film 20. The "L"-shaped chip on film 20 together form a rectangular chip on film group.
例如,当两个覆晶薄膜20叠置时,两个覆晶薄膜20中位于下方的覆晶薄膜20的第一部212的长度可以大于或等于位于上方的覆晶薄膜20的第一部212的长度;For example, when two chip on film 20 are stacked, the length of the first portion 212 of the chip on film 20 located below of the two chip on film 20 may be greater than or equal to the first portion 212 of the chip on film 20 located above. length;
两个覆晶薄膜20中位于下方的覆晶薄膜20的第一部212的宽度可以大于位于上方的覆晶薄膜20的第一部212的宽度;The width of the first portion 212 of the chip on film 20 located below of the two chip on film 20 may be greater than the width of the first portion 212 of the chip on film 20 located above;
两个覆晶薄膜20中位于下方的覆晶薄膜20的第二部213的长度和宽度可以分别等于位于上方的覆晶薄膜20的第二部213的长度和宽度。The length and width of the second portion 213 of the chip on film 20 located below of the two chip on film 20 may be equal to the length and width of the second portion 213 of the chip on film 20 located above, respectively.
具体的,所述多个连接端子211位于覆晶薄膜20的第一部212上;每个覆晶薄膜20上还设有位于第二部213上的驱动芯片30。Specifically, the multiple connection terminals 211 are located on the first part 212 of the chip on film 20; each chip on film 20 is further provided with a driving chip 30 on the second part 213.
请参阅图4,基于上述的覆晶薄膜组,本发明还提供一种显示模组,包括:显示面板10以及设于所述显示面板10上的多个如上所述的覆晶薄膜组11。Please refer to FIG. 4, based on the above-mentioned chip-on-chip film group, the present invention also provides a display module, including: a display panel 10 and a plurality of the above-mentioned chip-on-chip film groups 11 provided on the display panel 10.
具体的,所述显示面板10包括相对设置的TFT阵列基板101与CF基板102;所述TFT阵列基板101包括与覆晶薄膜组11邦定的外部引脚绑定(Outer Lead Bonding,OLB)端111;所述多个覆晶薄膜组11中的每个覆晶薄膜20的多个连接端子211均与外部引脚绑定端111邦定。Specifically, the display panel 10 includes a TFT array substrate 101 and a CF substrate 102 disposed oppositely; the TFT array substrate 101 includes an outer lead bonding (OLB) terminal bonded to the flip chip group 11 111; the multiple connection terminals 211 of each of the multiple chip on film groups 11 are bonded to the external pin binding ends 111.
具体的,所述显示面板10的驱动电路为HG2D架构,即所述显示面板10包括呈阵列分布的多个子像素、多条沿竖直方向延伸的数据线以及多条沿水平方向延伸的栅极线;每一栅极线对应连接两行子像素,每两条数据线对应连接一列子像素。Specifically, the driving circuit of the display panel 10 is of HG2D architecture, that is, the display panel 10 includes a plurality of sub-pixels distributed in an array, a plurality of data lines extending in a vertical direction, and a plurality of gates extending in a horizontal direction. Line; each gate line is connected to two rows of sub-pixels, and every two data lines is connected to a column of sub-pixels.
请参阅图5,基于上述的覆晶薄膜组,本发明还提供一种覆晶薄膜组的邦定方法,包括如下步骤:Referring to FIG. 5, based on the above-mentioned chip-on-chip film group, the present invention also provides a method for bonding the chip-on-chip film group, which includes the following steps:
步骤S1、将多个如上所述的覆晶薄膜组11中的一个覆晶薄膜20的多个连接端子211与显示面板10邦定;Step S1, bonding the multiple connection terminals 211 of one chip on film 20 in the multiple chip on film groups 11 described above to the display panel 10;
步骤S2、重复步骤S1直至将所有覆晶薄膜组11中的多个覆晶薄膜20的多个连接端子211均与显示面板10邦定。Step S2, step S1 is repeated until the multiple connection terminals 211 of the multiple chip on film 20 in all the chip on film groups 11 are bonded to the display panel 10.
需要说明的是,本发明的覆晶薄膜组中的多个覆晶薄膜20上均设有呈一行排列的多个连接端子211,所述多个覆晶薄膜20的多个连接端子211呈多行排布,相当于将现有技术中一个覆晶薄膜用一个覆晶薄膜组替代,也就是将现有技术中呈一行分布的连接端子分别用多行排布的连接端子替代,可以增加一个覆晶薄膜20上相邻两个连接端子211之间的间距,在邦定过程中,依次将多个覆晶薄膜20的多个连接端子211与显示面板10邦定,可以防止覆晶薄膜20上的连接端子211由于间距过窄而导致短路,避免覆晶薄膜20邦定不良。It should be noted that the plurality of chip-on-chip films 20 in the chip-on-chip film group of the present invention are each provided with a plurality of connection terminals 211 arranged in a row, and the plurality of connection terminals 211 of the plurality of chip-on films 20 are multi- The row arrangement is equivalent to replacing one chip-on-chip film group in the prior art with a chip-on-chip film group, that is, replacing the connection terminals arranged in a row in the prior art with connection terminals arranged in multiple rows, and one can be added. The distance between two adjacent connection terminals 211 on the chip on film 20. During the bonding process, the connection terminals 211 of the chip on film 20 are sequentially bonded to the display panel 10 to prevent the chip on film 20 from being bonded. The connecting terminals 211 on the upper side are short-circuited due to the narrow spacing, which prevents poor bonding of the chip on film 20.
综上所述,本发明的覆晶薄膜组包括多个覆晶薄膜;所述多个覆晶薄膜叠置并裸露出每一所述覆晶薄膜上的连接端子以连接外部信号,每个覆晶薄膜上设有呈一行排列的多个连接端子;所述多个覆晶薄膜的多个连接端子呈多行排布,可以增加一个覆晶薄膜上相邻两个连接端子之间的间距,防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。本发明的显示模组,可以防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。本发明的覆晶薄膜组的邦定方法,可以防止覆晶薄膜上的连接端子由于间距过窄而导致短路,避免覆晶薄膜邦定不良。In summary, the chip-on-chip film set of the present invention includes a plurality of chip-on-chip films; the plurality of chip-on-chip films are stacked and exposed to the connecting terminals on each of the chip-on-films to connect external signals. A plurality of connection terminals arranged in a row are provided on the chip-on-chip film; the plurality of connection terminals of the plurality of chip-on-chip films are arranged in multiple rows, which can increase the distance between two adjacent connection terminals on one chip-on-chip film, Prevent the connection terminals on the flip chip film from causing short circuits due to the narrow pitch, and avoid poor bonding of the chip flip film. The display module of the present invention can prevent the connection terminals on the flip chip film from being short-circuited due to the narrow spacing, and avoid poor bonding of the flip chip film. The bonding method of the chip-on-chip film assembly of the present invention can prevent the connection terminals on the chip-on-chip film from being short-circuited due to the narrow spacing, and avoid poor bonding of the chip-on-chip film.
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。As mentioned above, for those of ordinary skill in the art, various other corresponding changes and modifications can be made according to the technical solutions and technical ideas of the present invention, and all these changes and modifications shall fall within the protection scope of the claims of the present invention. .

Claims (20)

  1. 一种覆晶薄膜组,包括:多个覆晶薄膜;所述多个覆晶薄膜叠置并裸露出每一所述覆晶薄膜上的连接端子以连接外部信号。A chip-on-chip film set includes: a plurality of chip-on-chip films; the plurality of chip-on-chip films are stacked and exposed to connect an external signal to a connection terminal on each of the chip-on-chip films.
  2. 如权利要求1所述的覆晶薄膜组,其中,每个覆晶薄膜上设有呈一行排列的多个连接端子;所述多个覆晶薄膜的多个连接端子呈多行排布。3. The chip-on-chip group of claim 1, wherein each chip-on-film is provided with a plurality of connection terminals arranged in a row; the plurality of connection terminals of the plurality of chip-on-chip films are arranged in a plurality of rows.
  3. 如权利要求2所述的覆晶薄膜组,其中,所述覆晶薄膜的数量为两个,所述两个覆晶薄膜叠置使分别位于所述两个覆晶薄膜上的两行连接端子呈两行排布。3. The chip-on-chip film set of claim 2, wherein the number of the chip-on-chip films is two, and the two chip-on-chip films are superimposed so that two rows of connection terminals respectively located on the two chip-on films Arranged in two rows.
  4. 如权利要求2所述的覆晶薄膜组,其中,所述多个覆晶薄膜叠置使分别位于所述多个覆晶薄膜上的多行连接端子交错排布。3. The chip-on-chip film set of claim 2, wherein the plurality of chip-on-chip films are stacked so that the plurality of rows of connection terminals respectively located on the plurality of chip-on films are alternately arranged.
  5. 如权利要求1所述的覆晶薄膜组,其中,每个覆晶薄膜上位于同一行的多个连接端子相互平行;每个覆晶薄膜的每相邻两个连接端子之间的间距相同。3. The chip-on-chip film assembly of claim 1, wherein a plurality of connection terminals in the same row on each chip-on-chip film are parallel to each other; and the distance between every two adjacent connection terminals of each chip-on-chip film is the same.
  6. 如权利要求1所述的覆晶薄膜组,其中,所述多个覆晶薄膜叠置后的整体形状为矩形;所述覆晶薄膜各自的形状均为“L”形。3. The chip-on-chip film assembly of claim 1, wherein the overall shape of the plurality of chip-on-chip films after stacking is rectangular; each of the chip-on-chip films has an "L" shape.
  7. 如权利要求6所述的覆晶薄膜组,其中,每个覆晶薄膜包括第一部以及所述第一部垂直连接的第二部;7. The chip on film group of claim 6, wherein each chip on film comprises a first part and a second part vertically connected to the first part;
    至少一个所述覆晶薄膜的第一部覆盖另一所述覆晶薄膜的第一部,所述覆晶薄膜在叠置后的第二部的边缘平齐。At least one first part of the chip on film covers the first part of the other chip on film, and the edge of the second part of the chip on film is flush after being stacked.
  8. 如权利要求7所述的覆晶薄膜组,其中,所述多个连接端子位于覆晶薄膜的第一部上;每个覆晶薄膜上还设有位于第二部上的驱动芯片。8. The chip-on-chip film assembly of claim 7, wherein the plurality of connection terminals are located on the first part of the chip-on-chip film; each of the flip-chip films is further provided with a driving chip located on the second part.
  9. 一种显示模组,包括:显示面板以及设于所述显示面板上的多个覆晶薄膜组;A display module includes: a display panel and a plurality of flip-chip film groups arranged on the display panel;
    所述覆晶薄膜组包括:多个覆晶薄膜;所述多个覆晶薄膜叠置并裸露出每一所述覆晶薄膜上的连接端子以连接外部信号。The chip-on-chip film group includes: a plurality of chip-on-chip films; the plurality of chip-on-chip films are stacked and exposed to a connection terminal on each of the chip-on-chip films to connect to external signals.
  10. 如权利要求9所述的显示模组,其中,每个覆晶薄膜上设有呈一行排列的多个连接端子;所述多个覆晶薄膜的多个连接端子呈多行排布。9. The display module of claim 9, wherein each of the flip chip films is provided with a plurality of connection terminals arranged in a row; the plurality of connection terminals of the plurality of flip chip films are arranged in a plurality of rows.
  11. 如权利要求10所述的显示模组,其中,所述覆晶薄膜的数量为两个,所述两个覆晶薄膜叠置使分别位于所述两个覆晶薄膜上的两行连接端子呈两行排布。The display module of claim 10, wherein the number of the flip chip films is two, and the two flip chip films are superimposed so that the two rows of connecting terminals respectively located on the two flip chip films appear Arranged in two rows.
  12. 如权利要求10所述的显示模组,其中,所述多个覆晶薄膜叠置使分别位于所述多个覆晶薄膜上的多行连接端子交错排布。10. The display module of claim 10, wherein the plurality of flip chip films are stacked so that the plurality of rows of connection terminals respectively located on the plurality of flip chip films are alternately arranged.
  13. 如权利要求9所述的显示模组,其中,每个覆晶薄膜上位于同一行的多个连接端子相互平行;每个覆晶薄膜的每相邻两个连接端子之间的间距相同。9. The display module as claimed in claim 9, wherein the multiple connection terminals located in the same row on each chip on film are parallel to each other; and the distance between every two adjacent connection terminals of each chip on film is the same.
  14. 如权利要求9所述的显示模组,其中,所述多个覆晶薄膜叠置后的整体形状为矩形;所述覆晶薄膜各自的形状均为“L”形。9. The display module of claim 9, wherein the overall shape of the plurality of chip-on-chip films after being stacked is rectangular; the shape of each of the chip-on-chip films is an "L" shape.
  15. 如权利要求14所述的显示模组,其中,每个覆晶薄膜包括第一部以及所述第一部垂直连接的第二部;15. The display module of claim 14, wherein each chip on film comprises a first part and a second part vertically connected to the first part;
    至少一个所述覆晶薄膜的第一部覆盖另一所述覆晶薄膜的第一部,所述覆晶薄膜在叠置后的第二部的边缘平齐。At least one first part of the chip on film covers the first part of the other chip on film, and the edge of the second part of the chip on film is flush after being stacked.
  16. 如权利要求15所述的显示模组,其中,所述多个连接端子位于覆晶薄膜的第一部上;每个覆晶薄膜上还设有位于第二部上的驱动芯片。15. The display module of claim 15, wherein the plurality of connection terminals are located on the first part of the flip chip film; each of the flip chip films is further provided with a driving chip located on the second part.
  17. 一种覆晶薄膜组的邦定方法,其中,所述覆晶薄膜组包括:多个覆晶薄膜;所述多个覆晶薄膜叠置并裸露出每一所述覆晶薄膜上的连接端子以连接外部信号;A method for bonding a chip-on-chip film group, wherein the chip-on-chip film group includes: a plurality of chip-on-chip films; and the plurality of chip-on-chip films are stacked and exposed to the connecting terminals on each of the chip-on-chip films To connect external signals;
    所述覆晶薄膜组的邦定方法包括如下步骤:The bonding method of the chip on film group includes the following steps:
    步骤S1、将多个覆晶薄膜组中的一个覆晶薄膜的多个连接端子与显示面板邦定;Step S1, bonding a plurality of connection terminals of a chip on film in a plurality of chip on film groups to the display panel;
    步骤S2、重复步骤S1直至将所有覆晶薄膜组中的多个覆晶薄膜的多个连接端子均与显示面板邦定。Step S2, Step S1 is repeated until the multiple connection terminals of the multiple chip on film groups in all the chip on film groups are bonded to the display panel.
  18. 如权利要求17所述的覆晶薄膜组的邦定方法,其中,每个覆晶薄膜上设有呈一行排列的多个连接端子;所述多个覆晶薄膜的多个连接端子呈多行排布。17. The method for bonding a chip-on-chip group as claimed in claim 17, wherein each chip-on-film is provided with a plurality of connection terminals arranged in a row; the plurality of connection terminals of the plurality of chip-on-films are arranged in a plurality of rows Arrangement.
  19. 如权利要求18所述的覆晶薄膜组的邦定方法,其中,所述覆晶薄膜的数量为两个,所述两个覆晶薄膜叠置使分别位于所述两个覆晶薄膜上的两行连接端子呈两行排布。The method for bonding the chip-on-chip film set of claim 18, wherein the number of the chip-on-chip film is two, and the two chip-on-chip films are superimposed such that the The two rows of connecting terminals are arranged in two rows.
  20. 如权利要求18所述的覆晶薄膜组的邦定方法,其中,所述多个覆晶薄膜叠置使分别位于所述多个覆晶薄膜上的多行连接端子交错排布。21. The method for bonding a chip-on-chip film group according to claim 18, wherein the plurality of chip-on-chip films are stacked such that a plurality of rows of connection terminals respectively located on the plurality of chip-on films are arranged in a staggered manner.
PCT/CN2019/104212 2019-08-06 2019-09-03 Chip on film group, display module and bonding method for chip on film group WO2021022600A1 (en)

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