WO2021022461A1

WO2021022461A1 - Inverted light-emitting diode

Info

Publication number: WO2021022461A1
Application number: PCT/CN2019/099322
Authority: WO
Inventors: 王�锋; 何安和; 夏章艮; 聂恩松; 彭康伟; 林素慧
Original assignee: 厦门三安光电有限公司
Priority date: 2019-08-05
Filing date: 2019-08-05
Publication date: 2021-02-11
Also published as: US20220149243A1; CN111480241A

Abstract

An inverted light-emitting diode (LED), comprising a patterned substrate (100) and an epitaxial light-emitting layer (200) located on the substrate. A partial region of the substrate is exposed from the epitaxial light-emitting layer, protrusions (111) of the exposed region of the substrate are at least partially covered by an insulating protective layer, the insulating protective layer on the protrusions of the exposed region of the substrate has high and low undulations, and the height (h) of the peak of the undulations is 0 to 0.5 micrometers. By means of reducing the fluctuation of undulations of the insulating protective layer near the epitaxial light-emitting layer, the insulating protective layer is prevented from breaking due to changes in stress in the insulating protective layer, the structure of the insulating protective layer is complete and may further enhance the reliability of a chip.

Description

Flip-chip light-emitting diode

Technical field

The invention relates to the field of semiconductor technology, in particular to designing a patterned substrate structure for flip-chip light emitting diodes.

Background technique

Light-emitting diodes are semiconductor devices that convert electrical energy into light energy and become LED (Light Emitting Diode) chips. According to different packaging forms, light-emitting diodes can be simply divided into front-mounted light-emitting diodes, flip-chip light-emitting diodes and vertical light-emitting diodes. Among them, flip-chip light-emitting diodes have the advantages of no wire bonding process, high current drive, and high reliability. Therefore, flip-chip light-emitting diodes must have very good applications in general lighting, backlight, flash, display, and car lights. .

In order to improve the light-emitting efficiency of light-emitting diodes, patterned substrates are widely used in the production of flip-chip light-emitting diodes. Taking the gallium nitride-based blue light-emitting diodes with sapphire substrate as an example, the substrate pattern will facilitate epitaxial growth and blue light emission , To reduce light reflection at the interface of GaN and sapphire.

Referring to Figure 1, the packaging process of flip-chip light-emitting diodes uses solder paste for packaging and bonding. In order to prevent current caused by solder paste leakage, an insulating protective layer (Passivation Layer, referred to as: PV layer) is covered on the outside of the semiconductor layer as an isolation layer. Before the wafer is split into individual core particles, the insulating protective layer is located between the core particles and the core particles. In order to completely cover the sidewalls of the semiconductor with an insulating protective layer, an isolation layer etching process is used in the chip process to remove part of the epitaxial light-emitting layer, and at least expose the edge of the substrate, and then on the top of the epitaxial light-emitting layer, sidewalls and exposed The substrate is covered with an insulating protective layer. On the one hand, because the exposed substrate surface has pattern protrusions, such as patterned conical protrusions, the areas between the individual patterns and the top of the conical PSS pattern become stress concentration areas.

Refer to Figure 2 when covering the insulating protective layer, the bumps will cause the insulating protective layer to be unevenly covered or the insulating protective layer to crack, causing the solder paste to drill into the insulating protective layer from the gap (refer to the dark line in the wire frame area in the picture), causing a short circuit Risk, in the long-term aging process, there is a risk that the solder paste passes through the gap and is connected to u-GaN (the undoped gallium nitride at the bottom layer in the epitaxial layer) to cause a short circuit. Compared with small-size or micro-size chips, conventional-size chips have larger chip volumes. This phenomenon will become more and more serious as the chip size continues to shrink, especially Mini LED or Micro LED; on the other hand, due to exposure The surface of the substrate has patterned protrusions, which are easy to absorb metal debris, dirt, etc. in the subsequent chip manufacturing process or package die-attach process, resulting in die-bonding solder paste remaining on the chip edge and causing abnormalities such as IR (high leakage current).

Summary of the invention

technical problem

The solution to the problem

Technical solutions

In order to solve the above problems, in the flip-chip manufacturing process, in order to prevent cracks in the stress concentration area of the insulating protective layer on the patterned substrate (PSS substrate) at the isolation groove between the core particles and the core particles on the wafer, this The invention provides multiple solutions.

After the isolation groove between the core particle and the core particle is made in the chip process of the wafer of the present invention, the PSS pattern at the edge of the light-emitting diode is reduced or secondary patterned to reduce the passivation film layer at the edge of the light-emitting diode The stress concentration phenomenon, from the top view, the isolation groove is located at the edge of each LED core particle.

Specifically, the present invention provides a flip-chip light-emitting diode, which includes a substrate with a series of protrusions on the surface and an epitaxial light-emitting layer on the substrate. The protrusions are the surface pattern of the substrate. It is made by pattern imprinting, wet etching or dry etching. The material of the substrate includes sapphire, silicon, silicon carbide or gallium arsenide. The convex shapes on the substrate include cone, triangular pyramid, hexagonal cone, cone-like, and Triangular cone or similar hexagonal cone.

The epitaxial light-emitting layer can be made of gallium nitride-based materials, including a first semiconductor layer, a second semiconductor layer and an active layer located between the two covering the substrate, a first electrode connected to the first semiconductor layer, and The second semiconductor layer is connected to the second electrode, and a part of the substrate is exposed from the first semiconductor layer. The first semiconductor layer may include an N-side layer and a buffer layer. The buffer layer is used to reduce the crystal lattice between the substrate and the N-side layer. Mismatch, thereby promoting the crystal growth of the N-side layer. The buffer layer basically has no direct influence on the function of the semiconductor. The second semiconductor layer includes the P-side layer. In some cases, the order can be reversed. The active layer includes multiple quantum wells. The exposed area of the substrate at least partly serves to reserve space for the insulating protective layer covering the sidewall of the light-emitting diode. The protrusions in the exposed bottom area are at least partially covered by the insulating protective layer. The insulating protective layer on the protrusions has high and low fluctuations. The peak height of the fluctuations is 0 to 0.5 microns, of which 0 micron is the ideal state, that is, the insulating protective layer on the protrusions is basically free. ups and downs. A certain height of bumps, such as 0.5 micron bumps, can improve the light extraction efficiency of the side surface of the LED.

According to the present invention, preferably, the height of the protrusions in the area covered by the insulating protective layer of the substrate is at least partly lower than the height of the protrusions in the area covered by the first semiconductor layer of the substrate. The shape of the light-emitting area is similar or the same but the same proportion is reduced. The equal proportion here means that the proportion is close, and it does not limit the proportion to be completely consistent. The edge of the light-emitting diode substrate is at least partially wrapped by the insulating protective layer, or the entire periphery is covered by the insulating protective layer.

According to the present invention, preferably, the protrusion height of the area covered by the first semiconductor layer of the substrate is 1 to 2 microns, or 2 to 2.5 microns. For example, with a sapphire substrate, maintaining a certain height of the substrate protrusion is beneficial to reduce epitaxial mismatch and reduce epitaxial dislocation defects. A certain height of the substrate protrusion covers the semiconductor layer, and the growth direction of linear lattice defects also deviates from the semiconductor layer. In the normal direction of the main surface, a certain height of the substrate protrusion realizes that the semiconductor layer has a region in which the lattice defect density is reduced. This region containing reduced (i.e., fewer) defects can be used to form the active layer region of the semiconductor device, resulting in improved light emitting diode performance characteristics.

The ratio of the height of the protrusion of the area covered by the first semiconductor layer of the substrate to the height of the peak height of the insulating protection layer on the protrusion of the exposed area of the substrate is greater than 3.

According to the present invention, preferably, the protrusion height of the area covered by the insulating protective layer of the substrate is at least partly 0 to 1 μm, or 1 to 2.5 μm. The protrusions in the exposed area of the substrate can be removed or partially removed by chemical etching or ICP etching (ion beam assisted radical etching), which includes the area to be covered by the insulating protective layer, and the removal also includes the fully exposed protrusions Area to reduce the height of the protrusions in the exposed area of the substrate, and then make a covering insulating protective layer. Since the patterned substrate itself is a roughened surface, the higher the surface roughness of the substrate covered by the insulating protective layer, the easier it is to adsorb dirt. Lowering the pattern height is beneficial to reduce the adsorption and eliminate the risk of chip short circuit.

According to the present invention, preferably, in order to further reduce the stress concentration of the insulating film layer in the area covered by the insulating protective layer, the convex pattern of the area covered by the insulating protective layer is reduced and the etching process is optimized. It is made into a partial arc-shaped or platform-shaped pattern. When the insulating protective layer covers the protrusions, it will facilitate the smooth transition of the top of the protrusions and reduce the phenomenon of stress concentration on the top of the pattern, that is, the top of the protrusions in the area covered by the insulating protective layer It is arc-shaped or platform-shaped.

According to the present invention, preferably, the gap between the PSS pattern protrusions and the pattern protrusions will have greater stress after covering the insulating protective layer due to surface fluctuations. The protrusion density of the area covered by the insulating protective layer is designed to be the substrate The first semiconductor layer covers 1/10 to 1/2 of the protrusion density of the region. By reducing the pattern density at the edge of the core particle, the purpose of smoothly transitioning the insulating protective layer and reducing the stress of the insulating film layer is achieved. Specifically, for example, the distance between the protrusions in the area covered by the insulating protective layer is enlarged to 2 microns or more, so as to flatten the insulating protective layer as much as possible.

According to the present invention, preferably, the insulating protective layer covering at least part of the substrate protrusions is made of a flexible insulating material, and the ductility of the flexible insulating material is used to eliminate or reduce film layer stress and reduce the fluctuation of the insulating protective layer. Cover it with a conventional insulating protective layer.

According to the present invention, preferably, the material of the insulating protection layer can be relatively rigid silicon dioxide, silicon nitride, titanium oxide, tantalum oxide or niobium oxide, or it can be a Bragg reflector DBR, or a flexible insulating material, such as Insulating plastic material.

According to the present invention, preferably, the thickness of the insulating protection layer at least partially covering the protrusions of the substrate is 0.5 to 2 microns, or 2 to 5 microns. The design of the insulating protection layer in Mini products requires comprehensive consideration of multiple factors, for example, With the characteristics of small size and concentrated current, the design hopes to reduce the thickness of the insulating protective layer as much as possible to improve the heat dissipation capacity and reliability of the product. The present invention takes the insulating protective layer as an example with a thickness of 2 microns to ensure that the insulating protective layer will not be short-circuited by the eutectic electrode and the P-type region due to cracking (except for steep cracks, including too thin, easy to break when grabbing the thimble, etc.) , Caused by core particle failure.

The conventional Mini product has a smaller chip size than a conventional size product, which leads to an increase in the difficulty of the splitting process. As a common countermeasure, the epitaxial light-emitting layer between the core particle and the core particle is removed to expose the substrate.

According to the present invention, preferably, the ratio of the protrusion height of at least part of the substrate covered by the insulating protective layer to the thickness of the insulating protective layer covering the substrate protrusion is greater than 0.5. Under the condition that the thickness of the insulating protective layer is limited, the The technical solution can keep the protrusion height as much as possible.

According to the present invention, preferably, the chip size of the flip-chip light emitting diode is not greater than 250 micrometers*250 micrometers. According to the present invention, preferably, the flip-chip light emitting diode is a micro light emitting diode (Micro LED), for example, having a length from 2 to 100 microns, or 100 to 500 microns. The flip-chip light emitting diode has a width from 2 to 100 microns, or 100 to 500 microns. Flip-chip LEDs have a height from 2 to 100 microns, or 100 to 200 microns.

According to the present invention, preferably, the peak height of the undulations of the insulating protection layer is greater than 0 to less than or equal to 0.5 microns. After the substrate is removed from the bumps, it is necessary to prevent damage caused by excessive etching, and the insulating protection layer has a non-absolutely flat surface.

According to the present invention, preferably, the area covered by the insulating protective layer of the substrate is at least partially located at the edge of the light emitting diode, or the area covered by the insulating protective layer of the substrate is located on the entire periphery of the light emitting diode.

According to the present invention, preferably, the protrusion of the area covered by the first semiconductor layer of the substrate includes a first part and a second part. The second part can be stacked on the first part, wherein the second part is a removable part. In addition to the process, the second part is easily separated from the first part. Here, it is easy to mean that the process is simple and the reliability is high. The protrusions in the area covered by the insulating protective layer of the substrate only include the first part.

According to the present invention, preferably, the convex surface of the first part is a smooth surface, which facilitates smooth coverage of the insulating protective layer and reduces the problem of cracking caused by high and low fluctuations.

The beneficial effects of the invention

Beneficial effect

The beneficial effects of the present invention include the complete structure of the insulating protection layer at the edge of the chip, which can further improve the long-term reliability of the chip, the manufacturing process is simple, the effect on the brightness is small, and the technical application range is wide.

Brief description of the drawings

Description of the drawings

The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the specification, together with the embodiments of the present invention, are used to explain the present invention, and do not constitute a limitation to the present invention. In addition, the figure data is a descriptive summary and is not drawn to scale.

FIG. 1 is a schematic diagram of a cross-sectional structure of a flip-chip light emitting diode in the background art;

FIG. 2 is a photograph of an insulating protective layer covering a flip-chip light-emitting diode substrate in the background art;

3 is a schematic diagram of the cross-sectional structure of the flip-chip light-emitting diode of Embodiment 1;

4 is a photograph of an insulating protective layer covering the flip-chip light-emitting diode substrate of Embodiment 1;

5 to 11 are schematic diagrams of cross-sectional structures of flip-chip light emitting diodes according to Embodiment 2 to Embodiment 6;

Figures 12 and 13 are schematic diagrams of protrusion structures in two embodiments of Embodiment 6;

14 and 15 are schematic diagrams of the cross-sectional structure of the flip-chip light emitting diode according to the seventh embodiment.

Indicated in the figure: 100: substrate, 110, 111, 112: bumps, 110': first part, 110": second part, 110"': third part, 200: epitaxial light-emitting layer, 211: N-side layer , 212: buffer layer, 221: P side layer, 230: active layer, 310: first electrode, 320: second electrode, 400: insulating protective layer, 500: current spreading layer.

Invention embodiment

Embodiments of the invention

Several specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. However, the following description and description of the embodiments do not constitute any limitation to the protection scope of the present invention.

It should be understood that the terms used in the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. It is further understood that when the terms "comprising" and "including" are used in the present invention, they are used to indicate the existence of stated features, wholes, steps, components, and/or packages, and do not exclude one or more other features, The existence or addition of wholes, steps, components, packages, and/or combinations thereof.

Unless otherwise defined, all terms (including technical and scientific terms) used in the present invention have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention belongs. It should be further understood that the terms used in the present invention should be understood as having meanings consistent with the meanings of these terms in the context of this specification and related fields, and should not be understood in an idealized or overly formal sense, except for the present invention Clearly defined as such.

3 are respectively schematic cross-sectional views schematically showing light emitting diodes according to example embodiments of the inventive concept.

Referring to FIG. 3, according to the first embodiment of the light emitting diode (LED) of the present invention, the light emitting diode is a flip-chip light-emitting diode, especially a small-size or micro-size flip-chip light-emitting diode, for example, the size is not greater than 250 microns * 250 Micron Mini LEDs have lengths and widths of 100 microns to 500 microns, and heights of 100 microns to 200 microns. As a unit, they can include a substrate 100 with a series of protrusions (110) on the surface and a substrate 100 on the substrate. Epitaxial light emitting layer 200. If the light-emitting diode is micron-sized, the flip-chip light-emitting diode is a micro-LED, for example, has a length from 2 to 100 microns, a width from 2 to 100 microns, and a height from 2 to 100 microns.

Nitride compound semiconductors, which are the constituent materials of blue light-emitting diodes and green light-emitting diodes, are prone to cause a lot of displacement due to lattice mismatch, because compared with lattice-matched compound semiconductors (such as GaAs compound semiconductors), there is no suitable A substrate and a compound semiconductor, which can form a grown crystal layer having the same lattice constant as the substrate. As a result, the active layer (light-emitting layer) is easily affected by defects due to displacement, and becomes electrically and mechanically fragile.

Therefore, in this embodiment, a patterned wafer is used as the growth substrate 100 to reduce the influence of epitaxial growth caused by the above-mentioned substrate mismatch. A series of bumps 110 patterns on the surface of the substrate 100 can be embossed, dry etched or wet. Method etching production. The shape of the protrusion 110 on the substrate 100 includes a cone, a triangular pyramid, a hexagonal pyramid, a similar cone, a triangular pyramid or a hexagonal pyramid. The light-emitting efficiency of the overall light-emitting diode can be improved by adjusting the shape or size of the substrate pattern. The epitaxial light-emitting layer 200 includes a first semiconductor layer (N-type), a second semiconductor layer (P-type) covering a substrate, and an active layer 230 between them. The electrodes of the light emitting diode include a first electrode 310 and a second electrode 320, which are in ohmic contact with the N-side layer and the P-side layer respectively. When voltage is provided to the first electrode 310 and the second electrode 320, the current flows from the second electrode 320 through the epitaxial light-emitting layer 200 to the first electrode 310, and is distributed laterally in the epitaxial structure of the epitaxial light-emitting layer 200, making it The photoelectric effect occurs to produce photons. The active layer 230 may have different wavelengths of excitation light according to different materials and process conditions. The above-mentioned epitaxial light-emitting layer 200 may be adhered to the heat-dissipating substrate by using metal organic compound chemical vapor deposition (MOCVD) on the growth substrate 100 or by flip-chip technology. The above-mentioned light emitting diode is a blue light emitting diode, and the material of the epitaxial light emitting layer 200 is a GaN-based compound. The first electrode 310 and/or the second electrode 320 can generally be directly formed on the epitaxial light-emitting layer 200 to connect to an external power source and stimulate the quantum well layer (active layer) to emit light.

The substrate material provided by the manufacturing process of this embodiment can be selected from sapphire, silicon, silicon carbide or gallium arsenide. This embodiment preferably takes a gallium nitride-based device as an example. A sapphire substrate 100 is used. The first semiconductor layer may include an N-side layer 211 and a buffer layer 212. The buffer layer 212 is located between the N-side layer 211 and the substrate 100. The layer 212 is in contact with the substrate 100, and the buffer layer 212 is used to reduce the lattice mismatch between the substrate 100 and the N-side layer 211, thereby promoting the crystal growth of the N-side layer 211. The buffer layer 212 basically has no direct influence on the function of the semiconductor. In order to establish an electrical connection between the first electrode 310 and the N-side layer 211, a part of the mesas of the N-side layer 211 needs to be exposed. The N-side layer 211 will generate free electrons, and the P-side layer 221 will have a certain concentration of holes. The electrons and holes are combined in the active layer multi-quantum well under the action of an electric field, causing the energy level to be lowered and releasing energy in the form of photons And emit light to produce a light-emitting state on the entire surface. The active layer 230 may be a multiple quantum well (MQW) used to restrict the movement of electrons and holes. By increasing the collision probability of electrons and holes, the electron-hole binding rate and luminous efficiency are increased.

In the flip-chip light emitting diode of the type emitting light from the substrate 100 side, by partially removing the N-side layer 211, an N-side groove or terrace is formed, exposing the opening of the N-side layer 211 for making the first electrode 310. For ground light emission, it is important to design the first electrode 310 (N-side electrode) to minimize its area (width) and prevent electrical degradation, considering the relationship between current and diffusion and the characteristics of contact resistance. Moreover, in order to realize a light-emitting diode with higher brightness, the key point is to increase the area of the light-emitting layer. In a light emitting diode having a certain external size, the area of the active layer can be increased by reducing the area of the first electrode 310 (N-side electrode).

On the other hand, in view of the requirements of the step of assembling the flip-chip light-emitting diode (assembled on the circuit board or package base), it is necessary for the pad portion to have a size guaranteed in the wire bonding step and the die bonding step (without reducing the mechanical strength) Or reduce installation performance). This requirement is contrary to the requirement of reducing the area of the first electrode 310 (N-side electrode).

Therefore, the first electrode 310 (N-side electrode) is generally reduced in size as much as possible, while ensuring the smallest pad area that has no effect on mounting, and is set to minimize the interval between the first electrode 310 and the second electrode 320 (N-side electrode and P-side electrode). When a high electric field such as static electricity is applied to the light emitting diode, the high electric field is directly applied to the space between the compound semiconductor layer and the first/second electrode. Therefore, the withstand voltage characteristic of the insulating protective layer 400 between the electrodes is an important factor that determines the electrostatic breakdown strength of the light emitting diode.

The light from the active layer 230 is directly emitted to the outside through the substrate 100 or reflected by the second electrode 320 and then emitted to the outside through the second electrode 320. As a material for forming the second electrode 320, for example, silver (Ag) having high reflectance is used. In order to improve the reliability of the second electrode 320, the second electrode 320 is usually covered with an insulating protective layer 400 by a CVD method such as plasma CVD or a PVD method such as vacuum deposition or sputtering. The insulating protection layer 400 is respectively disposed on the first electrode 310 and the second electrode 320 and the openings above them, and a current spreading layer is disposed between the second electrode 320, the insulating protection layer 400 and the second semiconductor layer (P side layer 221) 500, such as ITO (Indium Tin Oxide), which is a frequently used material, functions to guide current from the second electrode 320 to be more uniformly injected into the second semiconductor layer. The current spreading layer 500 is located under the second electrode 320 and above the second semiconductor layer. The insulating protection layer 400 may be an electrically insulating material. For example, the insulating protection layer 400 may be silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate, or a combination thereof. The combination may be a Bragg reflector (DBR), for example. The insulating protection layer 400 has different functions according to the designed position. For example, covering the sidewall of the epitaxial light-emitting layer is used to prevent leakage of conductive material and electrically connect the first semiconductor layer and the second semiconductor layer, and reduce the short-circuit abnormality of the light-emitting diode.

Depending on the size of the light emitting diode, it is necessary to reduce the thickness of the insulating protective layer 400, increase the overlap area between the second electrode 320 and the extended portion of the first electrode 310 disposed on the insulating protective layer 400, and form the insulating protective layer 400 for use For materials with a relatively high dielectric constant, the thickness of the insulating protection layer 400 in this embodiment is 2-5 microns, and the insulating protection layer may also be a Bragg reflector DBR.

In general technology, pinholes or cracks are prone to occur in insulating films formed based on CVD or PVD methods, and when there are steep portions due to electrode structures or device structures (such as substrate pattern protrusions), it may be difficult to use insulation The protective layer 400 firmly covers the steep part. In addition, due to the presence of contaminants or foreign objects, pinholes or cracks may occur in the insulating protective layer 400. In addition, the steep part may become a discontinuous growth point of the insulating protective layer 400.

In order to form an effective protection for the device, the flip-chip light-emitting diode chip structure reserves a part of the uncovered epitaxial light-emitting layer 200 area on the substrate 100, partially wraps the insulating protective layer 400 around the epitaxial light-emitting layer 200, and the insulating protective layer 400 also It is partially covered on the patterned substrate 100. The area covered by the insulating protection layer 400 of the substrate 100 is at least partly located at the edge of the light emitting diode, or the area covered by the insulating protection layer 400 is located on the entire periphery of the light emitting diode. For example, for Mini LEDs, since the area of the epitaxial light-emitting layer 200 is compressed as much as possible, the sidewall protection effect significantly affects the performance of the device. This problem is due to the larger size of the conventional-sized light-emitting diodes, and the edge current of the substrate 100 is released. It can be ignored. On the contrary, due to the increased edge current density of the epitaxial light-emitting layer 200 for small-sized chips, the problem of preventing leakage of the edge insulating protective layer 400 should be paid attention to. In this embodiment, the patterned growth substrate 100 is exposed from the epitaxial light-emitting layer 200 by shrinking The protrusion 110 reduces the steepness of the surface of the substrate 100 and reduces the influence of the pattern of the substrate 100 on the insulating protection layer 400, especially the influence on the insulating protection layer 400 located at the edge of the epitaxial light-emitting layer.

The substrate 100 is exposed from the epitaxial light-emitting layer 200 (specifically, the first semiconductor layer), the protrusions in the exposed area of the substrate 100 are at least partially covered by the insulating protective layer 400, and the insulating protective layer 400 on the protrusions in the exposed area of the substrate 100 has The height of the bump 111 is reduced after being reduced. The height h1 of the bump 111 is 0 to 1 micron. The undulations of the insulating protective layer 400 on it are alleviated. The peak height of the insulating protective layer 400 in this area (marked as h in the figure) It is 0 to 0.5 microns. Methods for reducing the height of the protrusions on the surface of the substrate 100 include wet etching or dry etching. The height h2 of the substrate protrusion 112 covered by the epitaxial light-emitting layer 200 is 2 to 2.5 microns. In this embodiment, the ratio of the height h2 of the protrusion 112 in the area covered by the first semiconductor layer of the substrate 100 to the height h of the peak height h of the insulating protective layer 400 on the protrusion 111 in the exposed area of the substrate is greater than 3, and the pattern change is not The quality of the epitaxial growth of the substrate is affected, and the insulation protection layer 400 can be smoothed.

The height of the protrusion 111 in the area covered by the insulating protective layer 400 of the substrate 100 is at least partially 1/10 to 1/2 of the height h2 of the protrusion 112 in the area covered by the first semiconductor layer of the substrate 100. The height of the bump 111 has a certain relationship with the thickness of the insulating protective layer 400. The bump 111 is then covered with an insulating protective layer 400. The insulating protective layer 400 smoothly transitions between the two bumps 111 to eliminate pinholes or cracks. . This embodiment focuses on the design of the substrate 100 and the insulating protection layer 400, and the other components and processes of the chip are briefly described.

Referring to FIG. 4, and a top view photograph focusing on the insulating protective layer 400 covering the substrate protrusion 111, as shown in the photograph, the insulating protective layer 400 is continuous and complete, preferably covering the surface of the substrate 100 and the epitaxial light-emitting layer 200, Finally, the light-emitting diode wafers that have completed the chip process are cut into core pellets and further subjected to resin molding and packaging to complete various light-emitting diodes such as shell-type and surface-mounting types.

The second to seventh embodiments provided by the present invention are similar to the technical problems to be solved in the first embodiment. They are all for preventing the insulating protective layer 400 from cracking due to the steep shape of the substrate 100. The main design difference is the change of the protrusion of the substrate 100, because the overall structure such as the epitaxial light-emitting layer 200 and the first electrode 310, the second electrode 320, the insulating protective layer 400, the transparent conductive layer 500, etc. are substantially the same. The description is not repeated in the embodiment.

Referring to FIG. 5, according to the second embodiment of the light-emitting diode cited in the present invention, in this embodiment, there is no substrate pattern in the area covered by the epitaxial light-emitting layer 200 on the periphery of the chip. The process method of the embodiment includes the processing flow of the substrate 100 In the production of the substrate pattern, the substrate pattern of the peripheral part of the chip is not produced, and only the corresponding pattern protrusion 112 under the epitaxial light-emitting layer 200 in the chip process is produced. For example, the substrate pattern is made by mask etching. In this embodiment, compared to the first embodiment, the requirements for the precision of the equipment for making the isolation groove pattern are higher, especially at this stage, the flat edge of the wafer is usually aligned, and the substrate 100 area without protrusions is reserved. It is relatively difficult to completely match the area where the epitaxial light-emitting layer 200 is removed from the edge of the subsequent chip process. A method that can be adopted is to appropriately expand the area of the substrate without pattern protrusions to reduce the difficulty of alignment. In this embodiment, a full-patterned substrate 100 can also be used. The epitaxial chip process is first fabricated on the substrate 100. A part of the epitaxial light-emitting layer 200 is removed in the isolation trench fabrication process to expose the peripheral substrate, and then a mask etching technique is used. The pattern of the peripheral substrate is removed, and then an insulating protective layer 400 is covered on the epitaxial light-emitting layer 200 and the flat surface of the peripheral substrate. The undulation of the insulating protective layer 400 is significantly reduced. The process needs to precisely control the etching amount to take into account the pattern removal And device protection.

Referring to FIG. 6, the light-emitting diode according to the third embodiment of the present invention uses a process of reducing the size of the protrusions and expanding the distribution density of the protrusions on the substrate. Compared with the second embodiment of the present invention, the manufacturing process of this embodiment is The operability is relatively high. One of the methods for making the substrate is to change the mask pattern and adjust the etching time when making the pattern substrate to produce a convex pattern of a predetermined size and a suitable density. The mature technology of the bottom industry will not be repeated here. In the chip structure of this embodiment, the height of the protrusions 111 in the area covered by the first semiconductor layer of the substrate 100 is 1 to 2 microns. It can also be said that the height of the protrusions of the entire substrate 100 is 1 to 2 microns, and The substrate 100 is covered by the insulating protective layer 400. The insulating protective layer 400 has high and low undulations. The peak height h of the undulations is 0 to 0.5 microns. The distance between the protrusions 112 in the area covered by the epitaxial light-emitting layer 400 and the The distance between the protrusions 111 in the area covered by the insulating protection layer is not less than 2 microns. By enlarging the distance between the protrusion patterns of the substrate, the insulating protective layer 400 covering the protrusions has a longer distance transition, reducing the slope of the insulating protective layer 400, and making the insulating protective layer 400 cover the substrate 100 more smoothly. Thereby reducing steepness and stress concentration. The advantage of this embodiment is that it can have a certain height of the substrate pattern height, which can take into account the quality of epitaxial growth and reduce the leakage phenomenon. The substrate pattern of the necessary height can reduce the defects of the epitaxial light-emitting layer 400 growing on the substrate 100, which is beneficial to Improve the internal quantum effect.

Referring to FIG. 7, according to the fourth embodiment of the present invention, the protrusions 112 in the area covered by the first semiconductor layer of the substrate 100 are densely distributed, and the protrusions in the area covered by the first semiconductor layer of the substrate 100 are densely distributed. The pitch of 112 is not greater than 3 microns, and the bumps 112 in the area covered by the insulating protective layer 400 are sparsely distributed, and the pitches of the bumps 111 in the area covered by the insulating protective layer 400 are not less than 2 microns. The insulating protection layer 400 is taken as an example. The distance between the protrusions 112 in the area covered by the first semiconductor layer of the substrate 100 is 2 microns, and the distance between the protrusions 112 in the area covered by the insulating protection layer 400 is 8 microns. The density of protrusions 112 in the area covered by the insulating protective layer 400 of the substrate 100 is 1/10 to 1/2 of the density of the protrusions 112 in the area covered by the first semiconductor layer of the substrate 100, where the density refers to the protrusions per unit area. The number of distributions.

The main advantage of this embodiment is to adapt to different epitaxial growth processes. A growth substrate 100 with a conventional protrusion height can be used, for example, the protrusion height is 2 to 2.5 microns, while taking into account the quality of epitaxial growth, the insulating protective layer 400 covers the substrate On the bumps 111, due to the large distance between the bumps 111, the insulating protection layer 400 can still ensure the integrity and provide good insulation protection.

Referring to FIG. 8, further, a growth substrate 100 with a low protrusion height may be used for crystal growth and further chip production process, for example, the protrusion height is 1 to 2 microns, and then the removed part is insulated and protected when the chip isolation groove is made The layer 400 covers the bumps 111 in the area and reduces the distribution density of the bumps 111 in the area. The removal time of the pattern on the chip side will be less than the bump elimination time in the first embodiment.

Further, the height of the protrusion 112 in the area covered by the first semiconductor layer of the substrate 100 may be 2 to 2.5 microns, and the height of the protrusion 111 in the area covered by the insulating protection layer 400 may be 1 to 2 microns, and the height of the protrusion 112 may be 1 to 2 μm. The protrusion 112 of the coverage area is designed to be sparse and short.

Referring to FIG. 9, according to the fifth embodiment of the present invention, the light-emitting diode according to the fifth embodiment, in this embodiment, adopts a method of changing the shape of the top of the substrate protrusion 110, and uses a smooth or round surface to form a buffer area, especially for the insulated The convex design of the substrate covered by the protective layer 400 is, for example, a hemispherical or platform-shaped convex shape. In this embodiment, the hemispherical protrusion 110 is taken as an example. The insulating protection layer covers the surface of the hemispherical protrusion 110. For example, the height of the protrusion 110 is 2 to 2.5 microns, and at least part of the substrate is covered by the insulating protection layer 400. The ratio of the thickness of the insulating protective layer 400 covering the protrusions of the substrate is greater than 0.5, while taking into account the quality of epitaxial growth, the insulating protective layer 400 covers the substrate protrusions 110. Since the surface of the protrusions 110 is smooth, the insulating protective layer 400 can still ensure integrity It provides good insulation protection.

10 and 11, according to the sixth embodiment of the light emitting diode of the present invention, one of the manufacturing methods of the fifth embodiment is provided in this embodiment, and the substrate protrusion 110 includes a first portion 110' and a first portion 110' Two parts 110", the first part 110' is closer to the substrate 100, the second part 110" is located on the first part 110', the second part 110" is a sacrificial part, the second part 110" can be moved more easily than the first part 110' In addition, in the epitaxial/chip process, the semiconductor epitaxial light-emitting layer 200 is first fabricated on the substrate 100. The chip structure is fabricated as in the process flow of embodiment 1, and the second part 110" located in the isolation trench is removed after the substrate 100 is exposed. Wherein, the shape of the first part 110' can be hemisphere, platform, cone, triangular cone, hexagonal cone, cone-like, triangular cone or hexagonal cone, and the convex substrate formed by the combination of the first part 110' and the second part 110" The starting shape can be a hemisphere, a platform, a cone, a triangular cone, a hexagonal cone, a similar cone, a triangular pyramid or a hexagonal cone. After removing the second portion 110", on the one hand, the height of the substrate protrusion can be reduced, and on the other hand, while taking into account the quality of epitaxial growth, the substrate pattern suitable for covering the insulating protective layer 400 can be secondarily designed. In some embodiments, As shown in Figure 11, the second part 110" is wrapped around the outside of the first part 110', and the figure of the first part 110' is retained by removing the second part 110" located in the isolation groove. In this embodiment, the first part 110' can be Same as the substrate 100, for example, sapphire is used, and the second part 110" is made of silicon dioxide that is easy to be etched and removed or aluminum nitride. Aluminum nitride is more difficult to remove than silicon dioxide, but it is suitable as a semiconductor The long crystal plane of gallium nitride has smaller lattice matching problems.

Furthermore, compared with sapphire or aluminum nitride, silicon dioxide and gallium nitride have poor lattice matching, but they are easy to remove. In order to balance the process difficulty and the quality of crystal growth, the substrate protrusion can include three parts, the first part 110' is sapphire, the second part 110" is silicon dioxide, the third part 110"' is aluminum nitride, the second part 110" is a sacrificial layer, the third part 110"' is a growth layer, and the second part 110 "Located between the first part 110' and the third part 110"'. That is to say, the third part 110"' can be roughly expanded to be more suitable as a crystal growth interface than the second part 110", and the second part 110" is easier to remove than the first part 110' and/or the third part 110"'. When the chip is made, it is easier to remove the second part 110” by selective removal, and at the same time remove the third part 110” on the second part 110”, in the exposed area of the substrate The first part 110 ′ is reserved for covering the insulating protective layer 400.

12, according to the seventh embodiment of the present invention, in order to prevent the cracking of the insulating film layer 400 in the PSS pattern stress concentration area in the exposed area of the substrate of the core particle, we removed the exposed layer after the epitaxial light-emitting layer 200 was fabricated. After the substrate is raised 110, the isolation groove is filled with a high-temperature resistant flexible insulating layer. In this embodiment, the material of the insulating protective layer is modified. Specifically, the material of the flexible insulating protective layer 400 is used at least partially, and the insulating glue material is used to cover the substrate protrusion 110. The ductility of the glue material can overcome the protrusion pattern caused Stress concentration problem. Taking into account some of the characteristics of the flexible insulating protection layer itself, it may not be suitable as the only material for the insulating protection layer of the light emitting diode. Further, the insulating protection layer 400 of the light emitting diode includes a first insulating layer 410 and a second insulating layer 420. The insulating layer 410 is made of silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate, or any combination thereof. The second insulating layer 420 is located on the bump 110. The material used is epoxy resin or photoresist. Preferably, an insulating material with good thermosetting property is used to avoid failure of the insulating protection layer during subsequent chip or packaging processes. 420 can also be one or a combination of thermosetting polyimide, Parylene N/C/D/HT, polybenzoxazole (PBO), etc. The first insulating layer 410 mainly covers the main body of the light-emitting diode on.

In some embodiments, the first insulating layer 410 is located above the second insulating layer 420 and is connected to the second insulating layer 420. It is only necessary to fill the isolation grooves with a flexible insulating material after removing the epitaxial light-emitting layer 200 and exposing the substrate. , The production process is relatively simple.

Referring to FIG. 13, in some embodiments, combining the technical solutions of Examples 1 to 3 and Example 7, we first reduce at least part of the exposed area of the substrate or the PSS pattern of the entire substrate by etching or The second insulating layer 420 is removed and then filled, so that a thinner flexible insulating material can be used to achieve the planarization process of covering the exposed area of the substrate.

In some embodiments, the methods of Example 3 and Example 4 are combined with the first insulating layer 410/second insulating layer 420 (flexible) of Example 7 to further reduce the protrusion 110 in the exposed area of the substrate. The second insulating layer 420 is filled simultaneously to reduce the stress of the flexible insulating layer between the bumps 110.

In some embodiments, the technical solutions of embodiment 5 and embodiment 7 are combined, in order to further reduce the phenomenon of stress concentration on the top of the pattern, the pattern of the substrate is reduced (or only the pattern of the exposed area of the substrate is reduced) At the same time, by optimizing the etching process, a partial arc-shaped protrusion 110 pattern is fabricated, and then the second insulating layer 420 is filled.

Several implementations are listed in Example 7, which can also be obviously combined with the features of Example 6 or multiple examples to form a new technical solution. The technical effects of each feature are similar, for example, the use of sacrificial layer technology to make better For the light emitting diode of epitaxial quality, in Embodiment 7, the insulating protective layer 400 between the exposed area of the substrate 100 and the epitaxial light emitting layer 200 has a complete structure, which can further improve the long-term reliability of the chip.

Those skilled in the art should understand that, depending on design requirements and other factors, various modifications, combinations, sub-combinations and changes can be made, as long as they are within the scope of the appended claims or their equivalents.

Claims

A flip-chip light-emitting diode includes a substrate with a series of protrusions on the surface and an epitaxial light-emitting layer on the substrate. The epitaxial light-emitting layer includes a first semiconductor layer, a second semiconductor layer and both The active layer between the first semiconductor layer is connected to the first electrode, and the second semiconductor layer is connected to the second electrode. The feature is that a part of the substrate is exposed from the first semiconductor layer, and the convex area of the substrate is exposed. The ridges are at least partially covered by the insulating protective layer, and the insulating protective layer on the protrusions in the exposed area of the substrate has high and low undulations, and the peak height of the undulations is 0 to 0.5 microns.
The flip-chip light emitting diode according to claim 1, wherein at least part of the height of the protrusions of the area covered by the insulating protective layer of the substrate is lower than the height of the protrusions of the area of the substrate covered by the first semiconductor layer.
The flip-chip light emitting diode according to claim 1, wherein the height of the protrusion of the area covered by the first semiconductor layer of the substrate is 1 to 2 microns, or 2 to 2.5 microns.
The flip-chip light emitting diode according to claim 1, wherein the protrusion height of the area covered by the insulating protective layer of the substrate is at least partly 0 to 1 micrometer, or 1 to 2.5 micrometers.
The flip-chip light emitting diode according to claim 1, wherein the ratio of the height of the protrusion of the area covered by the first semiconductor layer of the substrate to the height of the peak height of the insulating protective layer on the protrusion of the exposed area of the substrate is greater than 3.
The flip-chip light-emitting diode according to claim 1, wherein the protrusion height of the area covered by the insulating protective layer of the substrate is at least partly 1/10 to 1 of the protrusion height of the area covered by the first semiconductor layer. /2.
The flip-chip light emitting diode of claim 1, wherein the shape of the protrusion on the substrate includes a hemisphere, a platform, a cone, a triangular cone, a hexagonal cone, a cone-like, a triangular pyramid, or a hexagonal cone.
The flip-chip light emitting diode according to claim 1, wherein at least part of the top of the protrusions in the area covered by the insulating protective layer of the substrate is arc-shaped or platform-shaped.
The flip-chip light emitting diode according to claim 1, wherein the protrusion density of the area covered by the insulating protective layer of the substrate is 1/10 to 1/2 of the protrusion density of the area covered by the first semiconductor layer. .
The flip-chip light emitting diode according to claim 1, wherein the distance between the protrusions in the area covered by the insulating protective layer of the substrate is not less than 2 microns.
The flip-chip light emitting diode according to claim 1, wherein the insulating protection layer at least partially covering the protrusion of the substrate is made of a flexible insulating material.
The flip-chip light emitting diode according to claim 1, wherein the material of the insulating protection layer includes silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, Bragg reflector DBR or insulating adhesive material.
4. The flip chip light emitting diode according to claim 1, wherein the thickness of the insulating protection layer at least partially covering the protrusions of the substrate is 0.5 μm to 5 μm.
The flip-chip light emitting diode according to claim 1, wherein the ratio of the protrusion height of the area covered by the insulating protection layer at least part of the substrate to the thickness of the insulating protection layer covering the protrusion of the substrate is greater than 0.5.
The flip-chip light-emitting diode according to claim 1, wherein the chip size of the flip-chip light-emitting diode is not greater than 250 micrometers*250 micrometers.
The flip-chip light-emitting diode of claim 1, wherein the flip-chip light-emitting diode has a length from 2 microns to 100 microns or from 100 microns to 500 microns.
The flip-chip light-emitting diode of claim 1, wherein the flip-chip light-emitting diode has a width ranging from 2 microns to 100 microns or from 100 microns to 500 microns.
The flip-chip light-emitting diode of claim 1, wherein the flip-chip light-emitting diode has a height ranging from 2 microns to 100 microns or from 100 microns to 200 microns.
4. The flip chip light emitting diode of claim 1, wherein the peak height of the undulations of the insulating protection layer is greater than 0 to less than or equal to 0.5 microns.
The flip chip light emitting diode of claim 1, wherein the material of the substrate comprises sapphire, silicon, silicon carbide or gallium arsenide.
The flip-chip light-emitting diode of claim 1, wherein the material of the epitaxial light-emitting layer is gallium nitride-based.
The flip-chip light emitting diode of claim 1, wherein the first semiconductor layer includes an N-side layer and a buffer layer, wherein the buffer layer is in contact with the substrate.
The flip-chip light emitting diode according to claim 1, wherein the area covered by the insulating protective layer of the substrate is at least partially located at the edge of the light emitting diode, or the area covered by the insulating protective layer of the substrate is located on the entire periphery of the light emitting diode.
The flip-chip light emitting diode according to claim 1, wherein the protrusion of the area covered by the first semiconductor layer of the substrate comprises a first part and a second part, wherein the second part is a removable part and the substrate is insulated The protrusions in the area covered by the protective layer only include the first part.
The flip-chip light emitting diode of claim 24, wherein the convex surface of the first part is a smooth surface.
A display screen, characterized by having the flip-chip light-emitting diode according to any one of claims 1 to 25.