WO2021004433A1 - 图像显示控制方法及图像显示控制装置 - Google Patents

图像显示控制方法及图像显示控制装置 Download PDF

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Publication number
WO2021004433A1
WO2021004433A1 PCT/CN2020/100465 CN2020100465W WO2021004433A1 WO 2021004433 A1 WO2021004433 A1 WO 2021004433A1 CN 2020100465 W CN2020100465 W CN 2020100465W WO 2021004433 A1 WO2021004433 A1 WO 2021004433A1
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Prior art keywords
information
layer reading
node
detection
image display
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PCT/CN2020/100465
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English (en)
French (fr)
Inventor
李鹏
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南京芯驰半导体科技有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0745—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1407—General aspects irrespective of display type, e.g. determination of decimal point position, display with fixed or driving decimal point, suppression of non-significant zeros

Definitions

  • This application relates to the field of display technology, and in particular to an image display control method and an image display control device.
  • a display controller containing multiple layer reading channels needs to read the digital image data corresponding to each layer reading channel from the memory for final fusion processing, and then pass the timing controller (timing controller, TCON) sent to the display screen.
  • TCON timing controller
  • TCON timing controller
  • the digital logic of the system needs to detect such a drop status and perform the drop processing (auto-flush).
  • the existing stray processing is usually implemented by detecting the display image or the cache after the display abnormality occurs, and it is difficult to effectively intervene before the display abnormality caused by the stray display. In this situation, the prior art needs to rely on data pre-stored in a spare storage unit to display important parts of the image.
  • the existing technology lacks a preventive strategy against actual abnormalities.
  • the embodiments of the present application provide an image display control method and an image display control device to solve the problem that the prior art cannot prevent and pre-process the image display data lag situation.
  • an embodiment of the present application provides an image display control method.
  • the image display control method includes: for each layer reading channel of m layer reading channels included in the display controller, detecting data consumption information and data surplus information of a detection node corresponding to the layer reading channel, wherein , The detection node is located between the output end of the layer reading channel and the buffer receiving end of the timing controller; the image display mode is determined based on the data consumption information and data surplus information of the detection node corresponding to each of the m layer reading channels, Among them, the image display mode includes the lag processing mode and the normal display mode.
  • the detection layer reads the data consumption information and data surplus information of the detection node corresponding to the channel, including: determining the time control node of the timing controller; based on the time control node, using the timer to perform the detection node Timing operation to determine data consumption information; during timing operation, determine the number of pixels processed by the detection node to determine data surplus information.
  • the timer is an incrementally timed timer
  • the detection node is used to perform timing operations on the detection node to determine data consumption information, including: accumulating the number of cycles based on the digital clock cycle of the timer To determine data consumption information.
  • determining the number of pixels processed by the detection node to determine the data surplus information includes: accumulating the number of pixels processed by the detection node to determine the data surplus information.
  • determining the time control node of the timing controller includes: determining the preset display pixel of the image and the display time node corresponding to the preset display pixel, where the display time node refers to the appearance of the preset display pixel At the output logic of the timing controller; when the preset display pixel appears at the output logic of the timing controller at the display time node, the time control node is determined based on the display time node.
  • the method further includes: determining a calibration time node based on the display time node, wherein the calibration time node is located at the display time Before the node, and between the display time node includes a preset time interval.
  • determining the time control node based on the display time node includes: when the calibration time node is triggered, determining the time control node based on the calibration time node.
  • determining the image display mode based on the data consumption information and data surplus information of the detection nodes corresponding to each of the m layer reading channels includes: reading the detection nodes corresponding to each of the m layer reading channels , Determine whether the detection node corresponding to each of the m layer reading channels meets the preset dropout condition, where the preset dropout condition is determined based on data consumption information and data surplus information; when at least one detection node meets the preset dropout condition, it is determined
  • the image display mode is the lagging processing mode.
  • determining whether the detection node corresponding to each of the m layer reading channels meets the preset drop-out condition includes: determining the map for each layer reading channel in the m layer reading channels The delay information between the output terminal of the layer reading channel and the buffer receiving terminal of the timing controller; the pixel loss information is determined based on the data consumption information and data surplus information of the detection node corresponding to the layer reading channel; based on the delay information, Pixel loss information and display reserved time information determine whether the detection node corresponding to the layer read channel meets the preset falling-out condition.
  • the method further includes: determining the priority levels of the m layer reading channels based on the importance of the m layer reading channels; determining each of the m layer reading channels based on the priority levels of the m layer reading channels The corresponding display reserved time information.
  • the display reserved time information determines whether the detection node corresponding to the layer reading channel meets the preset falling-out condition.
  • T o the detection node corresponding to the layer reading channel meets the preset drop-out condition based on the delay information, the pixel loss information and the display reservation time information, including: when the inequality (T L + T) ⁇
  • T o the delay information
  • T o the pixel loss information
  • T pixel loss information
  • ⁇ T ch data consumption information
  • ⁇ T p data surplus information
  • T o reserved time information
  • the drop-out processing mode includes at least one of the following items: for p layer reading channels out of m layer reading channels, discarding all pixels in the image frame to be displayed , And display according to the last pixel or preset pixel in the image frame to be displayed, where p layer reading channels are the layer reading channels corresponding to the detection nodes that meet the preset falling-out conditions; for p images Layer reading channel, discarding all pixels in the image frame to be displayed, do not display; for n layer reading channels out of m layer reading channels, slow down the speed of reading and/or outputting pixels, among which, The n layer reading channels are the remaining layer reading channels after removing the P layer reading channels from the m layer reading channels.
  • an embodiment of the present application also provides an image display control device.
  • the image display control device includes: a detection module for detecting the data consumption information of the detection node corresponding to the layer reading channel for each of the m layer reading channels included in the display controller Data surplus information, where the detection node is located between the output end of the layer reading channel and the buffer receiving end of the timing controller; the processing module communicatively connected with the detection module is used to read the corresponding channels based on the m layers The data consumption information and data surplus information of the node are detected, and the image display mode is determined.
  • the image display mode includes the lag processing mode and the normal display mode.
  • the detection module includes a detection unit and a timer communicating with the detection unit.
  • the timer is used to determine the calibration time node of the timing controller; the detection unit is used to determine the calibration time node based on the calibration time node and use the timer to monitor the detection node.
  • the timer includes a trigger terminal, and the trigger terminal generates a start signal according to the time control node in the timing controller to trigger the timer to count.
  • the detection unit includes a detection terminal, which is connected to a detection node for recording a T ch data consumption in each timing period of the timer; each valid pixel or empty pixel is processed at the detection node When, record a data surplus of T p .
  • an embodiment of the present application also provides a computer-readable storage medium having an image display control program stored on the computer-readable storage medium, and when the image display control program is executed by a processor, it implements what is mentioned in any of the above embodiments. And the operation of the image display control method.
  • an embodiment of the present application also provides an electronic device.
  • the electronic device includes a processor and a memory for storing executable instructions of the processor.
  • the processor is used to execute the image display control mentioned in any of the above embodiments. method.
  • the image display control method provided by the embodiments of the present application achieves the purpose of predicting and pre-processing the lagging situation in the image display process, thereby ensuring real-time image display. Especially for application scenarios that have higher real-time requirements for image display information, the embodiments of the present application can provide better security guarantees for their real-time requirements.
  • FIG. 1 is a schematic diagram of an application scenario of an image display control device provided by an embodiment of the application.
  • FIG. 2 is a schematic flowchart of an image display control method provided by an embodiment of the application.
  • FIG. 3 is a schematic flowchart of the data consumption information and data surplus information of the detection node corresponding to the detection layer reading channel provided by an embodiment of the application.
  • FIG. 4 is a schematic flowchart of the data consumption information and data surplus information of the detection node corresponding to the detection layer reading channel provided by another embodiment of the application.
  • FIG. 5 is a schematic flowchart of determining a calibration time node of a timing controller according to an embodiment of the application.
  • FIG. 6 is a schematic flowchart of determining a calibration time node of a timing controller according to another embodiment of the application.
  • FIG. 7 is a schematic flow diagram of determining the image display mode based on the data consumption information and data surplus information of the detection nodes corresponding to each of the m layer reading channels according to an embodiment of the application.
  • FIG. 8 is a schematic diagram of a process for judging whether the detection node corresponding to each of the m layer reading channels meets the preset falling-out condition according to an embodiment of the application.
  • FIG. 9 is a schematic flowchart of judging whether the detection node corresponding to each of the m layer reading channels meets the preset falling-out condition according to another embodiment of the application.
  • Fig. 10 is a schematic flow chart of a lag processing mode provided by an embodiment of the application.
  • FIG. 11 is a schematic structural diagram of an image display control device provided by an embodiment of the application.
  • FIG. 12 is a schematic structural diagram of a detection module provided by an embodiment of the application.
  • FIG. 13 is a block diagram of an image display control device provided by another embodiment of the application.
  • FIG. 14 is a schematic structural diagram of an electronic device provided by an embodiment of the application.
  • connection in the embodiments of the present application may be a direct connection between components or an indirect connection between components through other components.
  • FIG. 1 is a schematic diagram of an application scenario of an image display control device provided by an embodiment of the application.
  • the application scenario of the image display control device provided by the embodiment of the present application is the application scenario of the digital display system 100.
  • the digital display system 100 provided by the embodiment of the present application includes a memory 110 storing digital image data, an image post-processing device 120 communicatively connected with the memory 110, and a timing controller 130 communicatively connected with the image post-processing device 120
  • the display device 140 is connected to the timing controller 130 in communication.
  • the image post-processing device 120 includes m layer reading channels.
  • the digital display system 100 provided in the embodiment of the present application further includes a drop processing module 150 communicatively connected between the memory 110 and the timing controller 130.
  • the image post-processing device 120 reads the digital image data corresponding to each of the m layers and read channels from the memory 110, performs fusion processing, and then sends the digital image data to the display device 140 through the timing controller 130 for display .
  • m is a positive integer greater than 1.
  • the lagging processing module 150 is used for detecting the data consumption information and data surplus information of the detection node corresponding to the layer reading channel for each of the m layer reading channels included in the image post-processing device 120,
  • the detection node is located between the output end of the layer reading channel and the buffer receiving end of the timing controller 130; the image display is determined based on the data consumption information and data surplus information of the detection node corresponding to each of the m layer reading channels Mode, wherein the image display mode includes a drop processing mode and a normal display mode.
  • FIG. 2 is a schematic flowchart of an image display control method provided by an embodiment of the application. As shown in FIG. 2, the image display control method provided by the embodiment of the present application includes the following steps.
  • Step 210 For each of the m layer reading channels included in the display controller, detect data consumption information and data surplus information of the detection node corresponding to the layer reading channel.
  • the detection node mentioned in step 210 is located between the output terminal of the layer reading channel and the buffer receiving terminal of the timing controller.
  • Step 220 Determine an image display mode based on the data consumption information and data surplus information of the detection nodes corresponding to each of the m layer reading channels.
  • the image display mode includes a drop processing mode and a normal display mode.
  • the display controller In the actual application process, firstly, for each of the m layer reading channels included in the display controller, detect the data consumption information and data surplus information of the detection node corresponding to the layer reading channel, and then The image display mode is determined based on the data consumption information and data surplus information of the detection nodes corresponding to each of the m layer reading channels.
  • the image display control method provided by the embodiment of the present application achieves the purpose of predicting and processing the lagging situation in the image display process, and further ensures the real-time performance of the image display. Especially for application scenarios that have higher real-time requirements for image display information, the embodiments of the present application can provide better security guarantees for their real-time requirements.
  • FIG. 3 is a schematic flowchart of the data consumption information and data surplus information of the detection node corresponding to the detection layer reading channel provided by an embodiment of the application.
  • the embodiment shown in FIG. 3 of this application is extended on the basis of the embodiment shown in FIG. 2 of this application. The following focuses on the differences between the embodiment shown in FIG. 3 and the embodiment shown in FIG. 2, and the similarities will not be repeated here. .
  • the step of detecting data consumption information and data surplus information of the detection node corresponding to the reading channel of the detection layer includes the following steps.
  • Step 310 Determine the time control node of the timing controller.
  • the time control node refers to a node that can generate a start signal to trigger the timing of a timer.
  • Step 320 Control the node based on the time, and use a timer to perform a timing operation on the detection node to determine data consumption information.
  • Step 330 During the timing operation, determine the number of pixels processed by the detection node to determine data surplus information.
  • the image display control method provided by the embodiment of the present application determines the time control node of the timing controller, and based on the time control node, uses a timer to perform timing operations on the detection nodes to determine data consumption information, and during the timing operation, determine detection
  • the number of pixels processed by the node is used to determine the method of data surplus information, which achieves the purpose of reading the data consumption information and data surplus information of the detection node corresponding to the detection layer reading channel.
  • FIG. 4 is a schematic flowchart of the data consumption information and data surplus information of the detection node corresponding to the detection layer reading channel provided by another embodiment of the application.
  • the embodiment shown in Fig. 4 of this application is extended. The following focuses on the differences between the embodiment shown in Fig. 4 and the embodiment shown in Fig. 3, and the similarities will not be repeated. .
  • the timer is an incremental timer. Then, based on the time control node, using a timer to perform timing operations on the detection node to determine the data consumption information step includes the following steps.
  • Step 321 Based on the time control node, based on the digital clock period of the timer, the number of cycles is accumulated to determine the data consumption information.
  • the data consumption information mentioned in step 321 refers to the accumulation of the data consumption of T ch mentioned in the following embodiments, that is, ⁇ T ch .
  • the step of determining the number of pixels processed by the detection node to determine the data surplus information includes the following steps.
  • Step 331 During the timing operation, an accumulation operation is performed on the number of pixels processed by the detection node to determine data surplus information.
  • the data surplus information mentioned in step 331 refers to the accumulation of the data surplus of T p mentioned in the following embodiments, that is, ⁇ T p .
  • the image display control method provided by the embodiments of the present application determines the time control node of the timing controller, based on the time control node, based on the digital clock cycle of the timer, and accumulates the number of cycles to determine the data consumption information, and the timing is During operation, the number of pixels processed by the detection node is accumulated to determine the way of data surplus information, which realizes the purpose of controlling the node based on time and using the timer to time the detection node to determine the data consumption information.
  • FIG. 5 is a schematic flowchart of determining a calibration time node of a timing controller according to an embodiment of the application.
  • the embodiment shown in FIG. 5 of this application is extended on the basis of the embodiment shown in FIG. 3 of this application. The following focuses on the differences between the embodiment shown in FIG. 5 and the embodiment shown in FIG. 3, and the similarities will not be repeated. .
  • the step of determining the time control node of the timing controller includes the following steps.
  • Step 510 Determine the preset display pixels of the image and the display time node corresponding to the preset display pixels.
  • the preset display pixel mentioned in step 510 refers to the display pixel P(x, y) mentioned in the following embodiments, and the display time node refers to.
  • Step 520 When the preset display pixel appears at the output logic of the timing controller at the display time node, determine the time control node based on the display time node.
  • the display time node is directly determined as the time control node.
  • the image display control method provided by the embodiment of the application determines the preset display pixels of the image and the display time node corresponding to the preset display pixels, and then when the preset display pixels appear at the output logic of the timing controller at the display time node ,
  • the method of determining the time control node based on the display time node realizes the purpose of determining the time control node of the timing controller, thereby providing a prerequisite for calibrating the start timer.
  • FIG. 6 is a schematic flowchart of determining a calibration time node of a timing controller according to another embodiment of the application.
  • the embodiment shown in FIG. 6 of this application is extended on the basis of the embodiment shown in FIG. 5 of this application. The following focuses on the differences between the embodiment shown in FIG. 6 and the embodiment shown in FIG. 5, and the similarities will not be repeated. .
  • Step 515 Determine a calibration time node based on the display time node.
  • the calibration time node is located before the display time node and includes a preset time interval with the display time node.
  • the step of determining the time control node based on the display time node includes the following steps.
  • Step 521 When the calibration time node is triggered, determine the time control node based on the calibration time node.
  • the image display control method provided by the embodiment of the application realizes the purpose of reserving more preprocessing time for the layer processing channel based on the calibration time node.
  • FIG. 7 is a schematic flow diagram of determining the image display mode based on the data consumption information and data surplus information of the detection nodes corresponding to each of the m layer reading channels according to an embodiment of the application.
  • the embodiment shown in Fig. 7 of this application is extended on the basis of the embodiment shown in Fig. 2 of this application. The following focuses on the differences between the embodiment shown in Fig. 7 and the embodiment shown in Fig. 2, and the similarities will not be repeated here. .
  • the step of determining the image display mode based on the data consumption information and data surplus information of the detection nodes corresponding to each of the m layers read channels includes the following steps .
  • Step 710 Regarding the respective detection nodes corresponding to the m layer reading channels, determine whether the respective detection nodes corresponding to the m layer reading channels meet the preset falling-out condition.
  • the preset lagging condition is determined based on data consumption information and data surplus information.
  • step 710 when the judgment result is that at least one detection node meets the preset drop condition, step 720 is executed, that is, the image display mode is changed to the drop processing mode; when the judgment result is that all the detection nodes do not meet the preset drop condition , Step 730 is executed, that is, the image display mode is maintained as the normal display mode.
  • step 720 the image display mode is changed to the lag processing mode.
  • Step 730 Keep the image display mode as the normal display mode.
  • FIG. 8 is a schematic diagram of a process for judging whether the detection node corresponding to each of the m layer reading channels meets the preset falling-out condition according to an embodiment of the application.
  • the embodiment shown in FIG. 8 of this application is extended on the basis of the embodiment shown in FIG. 7 of this application. The following focuses on the differences between the embodiment shown in FIG. 8 and the embodiment shown in FIG. 7, and the similarities are not repeated here. .
  • the step of determining whether the detection node corresponding to each of the m layer reading channels meets the preset falling-out condition includes the following steps.
  • Step 810 For each layer reading channel of the m layer reading channels, determine the delay information between the output end of the layer reading channel and the buffer receiving end of the timing controller.
  • Step 820 Determine pixel loss information based on the data consumption information and data surplus information of the detection node corresponding to the layer reading channel.
  • Step 830 Determine whether the detection node corresponding to the layer reading channel meets the preset falling-out condition based on the delay information, pixel loss information, and display reservation time information.
  • T L represents delay information
  • T ⁇ T ch- ⁇ T p
  • T pixel loss information
  • ⁇ T ch data consumption information
  • ⁇ T p data surplus information
  • T o display reserved time information
  • the image display control method provided by the embodiment of the application determines the distance between the output terminal of the layer reading channel and the buffer receiving terminal of the timing controller by referring to each of the m layer reading channels. Delay information, and then determine the pixel loss information based on the data consumption information and data surplus information of the detection node corresponding to the layer read channel, and then determine the layer read channel correspondence based on the delay information, pixel loss information and display reservation time information.
  • the method of detecting whether the node meets the preset falling-out condition achieves the purpose of judging in advance whether the detection node corresponding to each of the m layer reading channels meets the preset falling-out condition.
  • FIG. 9 is a schematic flowchart of judging whether the detection node corresponding to each of the m layer reading channels meets the preset falling-out condition according to another embodiment of the application.
  • the embodiment shown in FIG. 9 of this application is extended on the basis of the embodiment shown in FIG. 8 of this application. The following focuses on the differences between the embodiment shown in FIG. 9 and the embodiment shown in FIG. 8, and the similarities are not repeated here. .
  • the output terminal and timing control of the layer reading channel are determined before the step of buffering the delay information between the receiving ends of the device, the following steps are further included.
  • Step 805 Determine the priority levels of the m layer reading channels based on the importance of the m layer reading channels.
  • the higher the importance of the layer reading channel the higher the priority of the layer reading channel. That is, the degree of importance is proportional to the priority level.
  • Step 806 Determine display reserved time information corresponding to each of the m layer reading channels based on the priority levels of the m layer reading channels.
  • the display reservation time information corresponding to each of the m layer reading channels mentioned in step 806 may be T o1 and T o2 mentioned in the following embodiments.
  • the step of judging whether the detection node corresponding to the layer reading channel meets the preset falling-out condition based on the delay information, the pixel loss information, and the display reservation time information includes the following steps.
  • Step 831 Determine whether the detection node corresponding to the layer reading channel meets the preset falling-out condition based on the delay information, the pixel loss information, and the display reservation time information corresponding to the layer reading channel.
  • the image display control method provided by the embodiments of the present application can provide as many prevention strategies as possible for a system containing multiple layer reading channels, from ensuring the display of important image information, and suppressing the occurrence of errors in a timely manner And discard some unnecessary image information, and restore or partially restore the corresponding display failure processing and restoration mechanism when the conditions are met. It can be seen that the embodiments of the present application can significantly enhance the stability and abnormal handling and recovery capabilities of the display system, and improve the security level of the corresponding system.
  • Fig. 10 is a schematic flow chart of a lag processing mode provided by an embodiment of the application.
  • the embodiment shown in FIG. 10 of this application is extended on the basis of the embodiment shown in FIG. 2 of the present application.
  • the following focuses on the differences between the embodiment shown in FIG. 10 and the embodiment shown in FIG. 2, and the similarities are not repeated here. .
  • the drop-out processing mode includes at least one of the following steps.
  • Step 1010 for p layer reading channels among the m layer reading channels, discard all pixels in the image frame to be displayed, and display according to the last pixel or preset pixel in the image frame to be displayed .
  • the p layer reading channels are the layer reading channels corresponding to the detection nodes that meet the preset falling-out conditions.
  • the preset pixel mentioned in step 1010 is a pixel with a fixed gray value, such as a pixel with a gray value of 50.
  • Step 1020 For p layer reading channels, discard all pixels in the image frame to be displayed, and do not display.
  • an abnormality is detected at the first pixel of the 5th row. Then, all the data starting from the 1st pixel of the 5th row will no longer be waiting or on the screen. Is displayed on the top, but the image of 1 to 4 lines will be displayed (corresponding to step 1020). Or, starting from the first pixel in the fifth row, each position displays the 320th pixel in the fourth row or the preset pixel. At this time, rows 1 to 4 are normal, and rows 5 to 240 are a solid color block (corresponding to the step 1010).
  • steps 1010 and 1020 when the inequality condition (T L + T) ⁇ T o is satisfied again within one frame, the normal display of the p layer reading channels is restored Mode.
  • Step 1030 For the n layer reading channels among the m layer reading channels, the speed of reading and/or outputting pixels is slowed down.
  • n layer reading channels are the layer reading channels remaining after removing the layer reading channels corresponding to the detection nodes that meet the preset falling-out condition from the m layer reading channels.
  • the image display control method provided by the embodiment of the present application not only effectively prevents the display controller from being locked, but also uses n layer reading channels among the m layer reading channels to slow down reading and/or The way of outputting the speed of the pixels achieves the purpose of giving priority to ensuring the display of important layers.
  • FIG. 11 is a schematic structural diagram of an image display control device provided by an embodiment of the application.
  • the image display control device 1100 provided by the embodiment of the present application includes a detection module 1110 and a processing module 1120 communicatively connected with the detection module 1110.
  • the detection module 1110 is used for detecting data consumption information and data surplus information of the detection node corresponding to the layer reading channel for each layer reading channel of the m layer reading channels included in the display controller. Among them, the detection node is located between the output terminal of the layer reading channel and the buffer receiving terminal of the timing controller.
  • the processing module 1120 is configured to read the data consumption information and data surplus information of the detection nodes corresponding to the respective channels based on the m layers, and determine the image display mode. Among them, the image display mode includes the lag processing mode and the normal display mode.
  • FIG. 12 is a schematic structural diagram of a detection module provided by an embodiment of the application.
  • the embodiment shown in FIG. 12 of this application is extended on the basis of the embodiment shown in FIG. 11 of this application. The following focuses on the differences between the embodiment shown in FIG. 12 and the embodiment shown in FIG. 11, and the similarities will not be repeated. .
  • the detection module 1110 includes a detection unit 1112 and a timer 1111 that is communicatively connected with the detection unit 1112. Among them, the timer 1111 is used to determine the calibration time node of the timing controller.
  • the detection unit 1112 is configured to perform a timing operation on the detection node based on the calibration time node using a timer 1111 to determine data consumption information, and during the timing operation, determine the number of pixels processed by the detection node to determine data surplus information.
  • FIG. 13 is a block diagram of an image display control device provided by another embodiment of the application. As shown in FIG. 13, the image display control device provided by the embodiment of the present application is connected between the display layer reading channel and the TCON.
  • the display layer reading channel includes N channels, which are used to read from the memory. The pixels of this channel are used by the image display control device for fusion and buffering for display.
  • the display layer reading channel mentioned in the embodiment of the present application is the layer reading channel mentioned in the above embodiment, that is, the display layer reading channel and the layer reading channel have the same meaning.
  • the image display control device includes:
  • the timer includes a trigger terminal, which triggers the timer to time according to the start signal generated by the time control node in the TCON;
  • the detection unit includes a detection terminal, which is connected to a detection node, and is used to record a T ch data consumption in each timing period; each time a valid pixel or an empty pixel is processed by the detection node, a data surplus of T p is recorded;
  • the detection node can be set anywhere between the output end of the display layer reading channel in FIG. 13 and the buffer receiving end of TCON;
  • the lagging processing unit may include a plurality of reading channels for N display layers, and is used for judging whether the reserved time T o for display pixels is satisfied according to the aforementioned data consumption and data surplus (that is, the aforementioned embodiment provides And display the reserved time information), for example, judge whether (T L +T)-T o is satisfied according to the aforementioned data consumption and data surplus, and execute the image lagging processing step when it is not satisfied.
  • T L is the delay from the display layer reading channel to the TCON in the image display control process;
  • T ⁇ T ch- ⁇ T p , the data consumption of the one T ch is: detecting the location of the node The period of the digital clock, the data surplus of the one T p is: the period of the digital clock of the TCON.
  • the above-mentioned device can further be designed with a slow-down request network for situations where it is necessary to control the speed of reading and/or outputting pixels of each display layer reading channel.
  • the device can abstract the processing status of pixels in the device as a supply and demand model through the detection of the above-mentioned detection unit, and use the conditions shaped by the model to detect when the lagging of image data in multiple display layer channels occurs, and perform Falling behind (auto-flush).
  • the specific control method is as follows.
  • the start signal is generated according to the time control node in TCON.
  • the specified display pixel P (x, y) must appear in the output logic of TCON to trigger the timer to count;
  • the detection unit consumes T ch for recording data in each timing period; records the data surplus T p when the detection node processes effective pixels or empty pixels; among them,
  • the detection node of the detection unit can be set between the output end of the display layer reading channel and the buffer receiving end of the TCON, and is used to detect the following processing steps for any valid pixel or empty pixel at the node to trigger a Accumulated record of data surplus T p : any display layer read channel processed one effective pixel or empty pixel, and the surplus is counted as T p ; or, any display layer read channel in the image display control device processed n For effective pixels or empty pixels, the surplus is counted as n*T p ;
  • the lagging processing unit judges whether the reserved time T o for the display pixel is satisfied based on the above data consumption and data surplus, so as to detect the important layer channel data early before a specified time interval from TCON needs to output pixels Hungry, when it is not satisfied, execute the image lagging processing step, send slow-down requests for the reading of the less important layer channels, and restore the partial and all discarded less important layers, Make the display controller not lock up in this situation; otherwise, continue to record and judge data consumption and data surplus.
  • the drop detection of the layer channel is transformed into such a problem: the instantaneous quantity at any moment of the data processing recorded by the node to be detected should meet the requirements of the channel.
  • the amount of data here considering that the display of pixels by the system is transported in a pipeline manner, therefore, the amount of pixels is converted into time in the pipeline, including data consumption T ch and data surplus T p for calculation.
  • each display layer reading channel i corresponds to a different priority and degree of importance, different required reserved time Toi should be set for each.
  • the detection terminal is respectively set at the output terminal of each display layer reading channel i to detect whether the display layer reading channel i outputs a valid pixel or an empty pixel.
  • any display layer reading channel i judge whether it satisfies (T Li +T i ) according to the data consumption ⁇ T chi of the display layer reading channel i and the data surplus ⁇ T pi of the display layer reading channel i ⁇ T oi .
  • the display layer reading channel i when it is not satisfied, if the display layer reading channel i has the drop processing mode turned on, the display layer reading channel i is subjected to a drop processing operation. For example, discard all pixels in the image frame to be displayed, and display according to the last pixel in the image frame; or discard all pixels in the image frame to be displayed without displaying; or, follow any of the above methods, and The pixels from the previous reading channel are discarded until the timer is triggered again to start timing.
  • the other display layer reading channels j, j ⁇ i are executed Slow down request. For example: reading channel j for display layers other than the display layer reading channel i, j ⁇ i, to slow down the speed of reading and/or outputting pixels.
  • the lag processing module corresponding to the display layer reading channel i will not work.
  • the timer in the above process is selected as incremental timing.
  • the judging method for data consumption ⁇ T chi and data surplus ⁇ T pi only needs to be adjusted to subtraction accordingly.
  • the falling-out processing of the above device is performed in the following manner.
  • Step 1 For the specified display device and specified display requirements in a specific application, the TCON output timing is relatively fixed, determined by certain standard timing parameters, including back/front porch, hsize in the line and the frame , Vsize and other parameters, which means that at the specified time point, the specified display pixel P(x, y) must appear in the output logic of TCON.
  • certain standard timing parameters including back/front porch, hsize in the line and the frame , Vsize and other parameters, which means that at the specified time point, the specified display pixel P(x, y) must appear in the output logic of TCON.
  • the desired display pixel P(0,0) specified by TCON can be assigned to the time point (T 00 , the first A valid display pixel point) a time point T 00pre before a predictable time interval is used as a time control node, and a start signal is obtained according to whether the time control node is triggered, and the start signal is sent to each display layer Channel and drop processing module.
  • Step 2 The detection unit receives the start signal and starts a timer with real meaning (the initial value is 0).
  • the timer contains a fixed number of decimal places.
  • set the clock cycle of the processing channel as T ch The clock period of the output clock domain where TCON is located is T p .
  • Step 3 As time passes, the lagging processing module will use the timer to perform such statistical records.
  • timer After the timer is started, it increments time in the clock domain of the logic module where it is located, adding a T ch time per clock cycle.
  • Step 4 If the drop is not detected, the system works normally. If the drop is detected, the module can make the following decisions according to the configuration (choose one of them in use).
  • the drop After the drop is detected, it enters the discarding image mode.
  • the display pixels are given according to either of the two methods mentioned above, and the image data from the previous channel is discarded one by one, but when the timer value When the aforementioned conditions are satisfied again, the valid image pixels are processed again, and the image discarding mode returns to the normal mode.
  • the image data that is "fused and post-processed” is added to the "image fusion module" afterwards, before being sent to the display device for display by TCON , Is stored in the data buffer pool, and if there is no such buffer pool, the layer channel, the data processing logic in the "image fusion and post-processing" module will be in the position when it does not reach the TCON display position because there is nowhere to receive In the paused state, the real number timer is handled here as a pause without deduction calculation processing. Therefore, the size of the buffer pool determines the minimum lower limit value T down of the timer value. Between the theoretical upper limit T o and the lower limit T down of the timer, we can set a stepped threshold according to the importance of the falling detection value of each channel. For example, in the case of two channels.
  • Channel 1 (T L1 + T 1 ) ⁇ T o1 (T 1 is the value of the real timer of channel 1, and T o1 is the drop detection threshold of the new channel 1).
  • Channel 2 (T L2 + T 2 ) ⁇ T o2 (T 2 is the value of the real timer of channel 2, and T o2 is the drop detection threshold of the new channel 2).
  • the channel that meets the aforementioned deceleration detection conditions can send deceleration requests to the channels of other layers according to the predetermined network configuration.
  • the embodiment of the present application can provide as many preventive strategies as possible for the system containing multiple display layer reading channels when the demand for safe display is high, from ensuring the display of important image information to When an error is detected, some unnecessary image information is suppressed and discarded in a timely manner, and when the conditions are met, the corresponding display fault handling and recovery mechanism can be restored or partially restored. Obviously, it can strengthen the stability of the display system and improve the security of the corresponding system level.
  • FIG. 14 is a schematic structural diagram of an electronic device provided by an embodiment of the application. .
  • the electronic device 1400 includes one or more processors 1401 and a memory 1402.
  • the processor 1401 may be a central processing unit (CPU) or another form of processing unit with data processing capability and/or instruction execution capability, and may control other components in the electronic device 1400 to perform desired functions.
  • CPU central processing unit
  • the processor 1401 may control other components in the electronic device 1400 to perform desired functions.
  • the memory 1402 may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory.
  • the volatile memory may include random access memory (RAM) and/or cache memory (cache), for example.
  • the non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc.
  • One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 1401 may run the program instructions to implement the image display control methods and/or the image display control methods of the various embodiments of the application described above. Other desired functions.
  • Various contents such as data consumption information can also be stored in the computer-readable storage medium.
  • the electronic device 1400 may further include: an input device 1403 and an output device 1404, and these components are interconnected by a bus system and/or other forms of connection mechanisms (not shown).
  • the input device 1403 may include, for example, a keyboard, a mouse, and so on.
  • the output device 1404 can output various information to the outside, including the determined image display mode information.
  • the output device 1404 may include, for example, a display, a communication network, and a remote output device connected thereto.
  • the electronic device 1400 may also include any other appropriate components according to specific application conditions.
  • the embodiments of the present application may also be computer program products, which include computer program instructions, which when run by a processor cause the processor to execute the “exemplary method” described above in this specification
  • the steps in the image display control method according to various embodiments of the application are described in the section.
  • the computer program product can be used to write program codes for performing the operations of the embodiments of the present application in any combination of one or more programming languages
  • the programming languages include object-oriented programming languages, such as Java, C++, etc.
  • object-oriented programming languages such as Java, C++, etc.
  • conventional procedural programming languages such as "C" language or similar programming languages.
  • the program code can be executed entirely on the user's computing device, partly on the user's device, executed as an independent software package, partly on the user's computing device and partly executed on the remote computing device, or entirely on the remote computing device or server Executed on.
  • embodiments of the present application may also be a computer-readable storage medium, on which computer program instructions are stored.
  • the processor executes the "exemplary method" part of this specification. The steps in the image display control method according to various embodiments of the present application are described in.
  • the computer-readable storage medium may adopt any combination of one or more readable media.
  • the readable medium may be a readable signal medium or a readable storage medium.
  • the readable storage medium may include, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the above, for example. More specific examples (non-exhaustive list) of readable storage media include: electrical connections with one or more wires, portable disks, hard disks, random access memory (RAM), read only memory (ROM), erasable Type programmable read only memory (EPROM or flash memory), optical fiber, portable compact disk read only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above.
  • each component or each step can be decomposed and/or recombined.
  • decompositions and/or recombinations shall be regarded as equivalent solutions of this application.

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Abstract

一种图像显示控制方法及装置，该图像显示控制方法包括：针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息；基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式。本申请实施例实现了预测并预先处理图像显示过程中的掉队情况的目的，进而保障了图像显示的实时性。

Description

图像显示控制方法及图像显示控制装置 技术领域
本申请涉及显示技术领域，具体涉及一种图像显示控制方法及图像显示控制装置。
发明背景
在数字显示系统中，一个包含有多个图层读取通道的显示控制器需要从内存读取对应各图层读取通道的数字图像数据做最后的融合处理，再经时序控制器(timingcontroller,TCON)送去显示屏显示。这个过程中，由于系统占用量和内存峰值带宽等种种难以预计的情况，很可能在某些时刻或时间段发生某一或多个图层读取通道的图像数据的读取跟不上显示屏数据显示的速率的情况。这种状况，本文将其称之为数据的掉队。
为使显示控制器在发生数据掉队的错误后不会锁死，并能够一定程度正确的恢复并保证重要部分图像信息的显示，系统的数字逻辑需要对此类掉队状况进行检测，并做掉队处理(auto-flush)。
现有的掉队处理，通常在出现显示异常之后，通过对显示图像或缓存的检测而实现，而难以在掉队所造成的显示异常之前进行有效干预。这种状况下，现有技术对图像中重要部分的显示需要依赖于备用的存储单元所预存的数据。现有技术缺乏对现实异常的预防策略。
发明内容
有鉴于此，本申请实施例提供一种图像显示控制方法及图像显示控制装置，以解决现有技术不能对图像显示的数据掉队情况进行预防与预先处理的问题。
第一方面，本申请一实施例提供一种图像显示控制方法。该图像显示控制方法包括：针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，其中，检测节点位于图层读取通道的输出端与时序控制器的缓冲接收端之间；基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式，其中，图像显示模式包括掉队处理模式和正常显示模式。
在本申请一实施例中，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，包括：确定时序控制器的时间控制节点；基于时间控制节点，利用定时器对检测节点进行计时操作，以确定数据消耗信息；在计时操作期间，确定检测节点处理的像素数量，以确定数据盈余信息。
在本申请一实施例中，定时器为增量计时的定时器，利用定时器对检测节点进行计时操作，以确定数据消耗信息，包括：基于定时器的数字时钟周期，对周期数量进行累加操作，以确定数据消耗信息。其中，确定检测节点处理的像素数量，以确定数据盈余信息，包括：对检测节点处理的像素的数量进行累加操作，以确定数据盈余信息。
在本申请一实施例中，确定时序控制器的时间控制节点，包括：确定图像的预设显示像素以及预设显示像素对应的显示时间节点，其中，显示时间节点指的是预设显示像素出现在时序控制器的输出逻辑处；当预设显示像素在显示时间节点出现在时序控制器的输出逻辑处时，基于显示时间节点确定时间控制节点。
在本申请一实施例中，在确定图像的预设显示像素以及预设显示像素对应的显示时间 节点之后，该方法进一步包括：基于显示时间节点确定校准时间节点，其中，校准时间节点位于显示时间节点之前，并且与显示时间节点之间包括预设时间间隔。其中，当预设显示像素在显示时间节点出现在时序控制器的输出逻辑处时，基于显示时间节点确定时间控制节点，包括：当校准时间节点被触发时，基于校准时间节点确定时间控制节点。
在本申请一实施例中，基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式，包括：针对m个图层读取通道各自对应的检测节点，判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件，其中，预设掉队条件基于数据消耗信息和数据盈余信息确定；当至少一个检测节点符合预设掉队条件时，确定图像显示模式为掉队处理模式。
在本申请一实施例中，判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件，包括：针对m个图层读取通道中的每个图层读取通道，确定图层读取通道的输出端与时序控制器的缓冲接收端之间的延时信息；基于图层读取通道对应的检测节点的数据消耗信息与数据盈余信息确定像素亏损信息；基于延时信息、像素亏损信息和显示预留时间信息判断图层读取通道对应的检测节点是否符合预设掉队条件。
在本申请一实施例中，在针对m个图层读取通道中的每个图层读取通道，确定图层读取通道的输出端与时序控制器的缓冲接收端之间的延时信息之前，该方法进一步包括：基于m个图层读取通道的重要程度确定m个图层读取通道的优先等级；基于m个图层读取通道的优先等级确定m个图层读取通道各自对应的显示预留时间信息。其中，基于延时信息、像素亏损信息和显示预留时间信息判断图层读取通道对应的检测节点是否符合预设掉队条件，包括：基于延时信息、像素亏损信息和图层读取通道对应的显示预留时间信息判断图层读取通道对应的检测节点是否符合预设掉队条件。
在本申请一实施例中，基于延时信息、像素亏损信息和显示预留时间信息判断图层读取通道对应的检测节点是否符合预设掉队条件，包括：当不等式(T L+T)＜T o不成立时，判断图层读取通道对应的检测节点符合预设掉队条件，其中，T L表示所述延时信息，T＝∑T ch-∑T p，T表示像素亏损信息，∑T ch表示数据消耗信息，∑T p表示数据盈余信息，T o表示显示预留时间信息。
在本申请一实施例中，掉队处理模式，包括一下各项中的至少一项：针对m个图层读取通道中的p个图层读取通道，丢弃即将显示的图像帧中的全部像素，并按照即将显示的图像帧中的最后一个像素或预设像素进行显示，其中，p个图层读取通道为符合预设掉队条件的检测节点对应的图层读取通道；针对p个图层读取通道，丢弃即将显示的图像帧中的全部像素，不显示；针对m个图层读取通道中的n个图层读取通道，减缓读取和/或输出像素的速度，其中，n个图层读取通道为m个图层读取通道中除去P个图层读取通道之后剩余的图层读取通道。
第二方面，本申请实施例还提供一种图像显示控制装置。该图像显示控制装置包括：检测模块，用于针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，其中，检测节点位于图层读取通道的输出端与时序控制器的缓冲接收端之间；与检测模块通信连接的处理模块，用于基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式，其中，图像显示模式包括掉队处理模式和正常显示模式。
在本申请一实施例中，检测模块包括检测单元和与检测单元通信连接的定时器，定时器用于确定时序控制器的校准时间节点；检测单元用于基于校准时间节点，利用定时器对检测节点进行计时操作，以确定数据消耗信息，并在计时操作期间，确定检测节点处理的像素数量，以确定数据盈余信息。
在本申请一实施例中，定时器包括触发端，触发端根据时序控制器中的时间控制节点产生启动信号触发定时器计时。
在本申请一实施例中，检测单元包括检测端，检测端连接检测节点，用于在定时器的每个计时周期，记录一个T ch的数据消耗；在检测节点每处理一个有效像素或空像素时，记录一个T p的数据盈余。
第三方面，本申请实施例还提供一种计算机可读存储介质，该计算机可读存储介质上存储有图像显示控制程序，该图像显示控制程序被处理器执行时实现上述任一实施例所提及的图像显示控制方法的操作。
第四方面，本申请实施例还提供一种电子设备，该电子设备包括处理器和用于存储处理器可执行指令的存储器，该处理器用于执行上述任一实施例所提及的图像显示控制方法。
本申请实施例提供的图像显示控制方法，实现了预测并预先处理图像显示过程中的掉队情况的目的，进而保障了图像显示的实时性。尤其针对对图像显示信息有较高实时性要求的应用场景，本申请实施例能够为其实时性要求提供更好地安全保障。
附图简要说明
图1所示为本申请一实施例提供的图像显示控制装置的应用场景示意图。
图2所示为本申请一实施例提供的图像显示控制方法的流程示意图。
图3所示为本申请一实施例提供的检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息的流程示意图。
图4所示为本申请另一实施例提供的检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息的流程示意图。
图5所示为本申请一实施例提供的确定时序控制器的校准时间节点的流程示意图。
图6所示为本申请另一实施例提供的确定时序控制器的校准时间节点的流程示意图。
图7所示为本申请一实施例提供的基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式的流程示意图。
图8所示为本申请一实施例提供的判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件的流程示意图。
图9所示为本申请另一实施例提供的判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件的流程示意图。
图10所示为本申请一实施例提供的掉队处理模式的流程示意图。
图11所示为本申请一实施例提供的图像显示控制装置的结构示意图。
图12所示为本申请一实施例提供的检测模块的结构示意图。
图13所示为本申请另一实施例提供的图像显示控制装置的框图。
图14所示为本申请一实施例提供的电子设备的结构示意图。
实施本发明的方式
为使本申请实施例的目的和技术方案更加清楚，下面将结合本申请实施例的附图，对本申请实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本申请的一部分实施例，而不是全部的实施例。基于所描述的本申请的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本申请保护的范围。
本技术领域技术人员可以理解，除非另外定义，这里使用的所有术语(包括技术术语和科学术语)具有与本申请所属领域中的普通技术人员的一般理解相同的意义。还应该理解的是，诸如通用字典中定义的那些术语应该被理解为具有与现有技术的上下文中的意义一致的意义，并且除非像这里一样定义，不会用理想化或过于正式的含义来解释。
本申请实施例中所述的“和/或”的含义指的是各自单独存在或两者同时存在的情况均包括在内。
本申请实施例中所述的“连接”的含义可以是部件之间的直接连接也可以是部件间通过其它部件的间接连接。
图1所示为本申请一实施例提供的图像显示控制装置的应用场景示意图。如图1所示，本申请实施例提供的图像显示控制装置的应用场景为数字显示系统100的应用场景。具体地，本申请实施例提供的数字显示系统100包括存储有数字图像数据的内存器110、与内存器110通信连接的图像后处理装置120、与图像后处理装置120通信连接的时序控制器130和与时序控制器130通信连接的显示装置140。其中，图像后处理装置120包括m个图层读取通道。此外，本申请实施例提供的数字显示系统100还包括通信连接在内存器110和时序控制器130之间的掉队处理模块150。
在实际应用过程中，图像后处理装置120从内存器110中读取m个图层读取通道各自对应的数字图像数据，并进行融合处理，再经时序控制器130送去显示装置140进行显示。其中，m为大于1的正整数。掉队处理模块150用于针对图像后处理装置120包括的m个图层读取通道中的每一图层读取通道，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，其中，检测节点位于图层读取通道的输出端与时序控制器130的缓冲接收端之间；基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式，其中，所述图像显示模式包括掉队处理模式和正常显示模式。
图2所示为本申请一实施例提供的图像显示控制方法的流程示意图。如图2所示，本申请实施例提供的图像显示控制方法包括如下步骤。
步骤210，针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息。
步骤210中提及的检测节点位于图层读取通道的输出端与时序控制器的缓冲接收端之间。
步骤220，基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式。
示例性地，图像显示模式包括掉队处理模式和正常显示模式。
在实际应用过程中，首先针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，然后基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式。
本申请实施例提供的图像显示控制方法，实现了预测并处理图像显示过程中的掉队情况的目的，进而保障了图像显示的实时性。尤其针对对图像显示信息有较高实时性要求的应用场景，本申请实施例能够为其实时性要求提供更好地安全保障。
图3所示为本申请一实施例提供的检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息的流程示意图。在本申请图2所示实施例的基础上延伸出本申请图3所示实施例，下面着重叙述图3所示实施例与图2所示实施例的不同之处，相同之处不再赘述。
如图3所示，在本申请实施例提供的图像显示控制方法中，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息步骤，包括如下步骤。
步骤310，确定时序控制器的时间控制节点。
示例性地，时间控制节点指的是能够产生启动信号以触发定时器计时的节点。
步骤320，基于时间控制节点，利用定时器对检测节点进行计时操作，以确定数据消耗信息。
步骤330，在计时操作期间，确定检测节点处理的像素数量，以确定数据盈余信息。
本申请实施例提供的图像显示控制方法，通过确定时序控制器的时间控制节点，基于时间控制节点，利用定时器对检测节点进行计时操作，以确定数据消耗信息，并在计时操作期间，确定检测节点处理的像素数量，以确定数据盈余信息的方式，实现了检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息的目的。
图4所示为本申请另一实施例提供的检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息的流程示意图。在本申请图3所示实施例的基础上延伸出本申请图4所示实施例，下面着重叙述图4所示实施例与图3所示实施例的不同之处，相同之处不再赘述。
如图4所示，在本申请实施例提供的图像显示控制方法中，定时器为增量计时的定时器。那么，基于时间控制节点，利用定时器对检测节点进行计时操作，以确定数据消耗信息步骤，包括如下步骤。
步骤321，基于时间控制节点，基于定时器的数字时钟周期，对周期数量进行累加操作，以确定数据消耗信息。
示例性地，步骤321中提及的数据消耗信息指的是下述实施例中提及的T ch的数据消耗的累加，即∑T ch。
并且，在本申请实施例中，在计时操作期间，确定检测节点处理的像素数量，以确定数据盈余信息步骤，包括如下步骤。
步骤331，在计时操作期间，对检测节点处理的像素的数量进行累加操作，以确定数据盈余信息。
示例性地，步骤331中提及的数据盈余信息指的是下述实施例中提及的T p的数据盈余的累加，即∑T p。
本申请实施例提供的图像显示控制方法，通过确定时序控制器的时间控制节点，基于时间控制节点，基于定时器的数字时钟周期，对周期数量进行累加操作，以确定数据消耗信息，并在计时操作期间，对检测节点处理的像素的数量进行累加操作，以确定数据盈余信息的方式，实现了基于时间控制节点，利用定时器对检测节点进行计时操作，以确定数据消耗信息的目的。
图5所示为本申请一实施例提供的确定时序控制器的校准时间节点的流程示意图。在本申请图3所示实施例的基础上延伸出本申请图5所示实施例，下面着重叙述图5所示实施例与图3所示实施例的不同之处，相同之处不再赘述。
如图5所示，在本申请实施例提供的图像显示控制方法中，确定时序控制器的时间控制节点步骤，包括如下步骤。
步骤510，确定图像的预设显示像素以及预设显示像素对应的显示时间节点。
示例性地，步骤510中提及的预设显示像素指的是下述实施例中提及的显示像素P(x，y)，显示时间节点指的是。
步骤520，当预设显示像素在显示时间节点出现在时序控制器的输出逻辑处时，基于显示时间节点确定时间控制节点。
在本申请一实施例中，直接将显示时间节点确定为时间控制节点。
本申请实施例提供的图像显示控制方法，通过确定图像的预设显示像素以及预设显示像素对应的显示时间节点，继而当预设显示像素在显示时间节点出现在时序控制器的输出 逻辑处时，基于显示时间节点确定时间控制节点的方式，实现了确定时序控制器的时间控制节点的目的，进而为校准启动定时器提供了前提条件。
图6所示为本申请另一实施例提供的确定时序控制器的校准时间节点的流程示意图。在本申请图5所示实施例的基础上延伸出本申请图6所示实施例，下面着重叙述图6所示实施例与图5所示实施例的不同之处，相同之处不再赘述。
如图6所示，在本申请实施例提供的图像显示控制方法中，在确定图像的预设显示像素以及预设显示像素对应的显示时间节点步骤之后，进一步包括如下步骤。
步骤515，基于显示时间节点确定校准时间节点。
示例性地，校准时间节点位于显示时间节点之前，并且与显示时间节点之间包括预设时间间隔。
并且，在本申请实施例中，当预设显示像素在显示时间节点出现在时序控制器的输出逻辑处时，基于显示时间节点确定时间控制节点步骤，包括如下步骤。
步骤521，当校准时间节点被触发时，基于校准时间节点确定时间控制节点。
在实际应用过程中，确定图像的预设显示像素以及预设显示像素对应的显示时间节点，然后基于显示时间节点确定校准时间节点，继而当校准时间节点被触发时，基于校准时间节点确定时间控制节点。
本申请实施例提供的图像显示控制方法，基于校准时间节点实现了为图层处理通道预留更多的预处理时间的目的。
图7所示为本申请一实施例提供的基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式的流程示意图。在本申请图2所示实施例的基础上延伸出本申请图7所示实施例，下面着重叙述图7所示实施例与图2所示实施例的不同之处，相同之处不再赘述。
如图7所示，在本申请实施例提供的图像显示控制方法中，基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式步骤，包括如下步骤。
步骤710，针对m个图层读取通道各自对应的检测节点，判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件。
示例性地，预设掉队条件基于数据消耗信息和数据盈余信息确定。
在步骤710中，当判断结果为至少一个检测节点符合预设掉队条件时，执行步骤720，即，更改图像显示模式为掉队处理模式；当判断结果为所有检测节点均未符合预设掉队条件时，执行步骤730，即，保持图像显示模式为正常显示模式。
步骤720，更改图像显示模式为掉队处理模式。
步骤730，保持图像显示模式为正常显示模式。
图8所示为本申请一实施例提供的判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件的流程示意图。在本申请图7所示实施例的基础上延伸出本申请图8所示实施例，下面着重叙述图8所示实施例与图7所示实施例的不同之处，相同之处不再赘述。
如图8所示，在本申请实施例提供的图像显示控制方法中，判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件步骤，包括如下步骤。
步骤810，针对m个图层读取通道中的每个图层读取通道，确定图层读取通道的输出端与时序控制器的缓冲接收端之间的延时信息。
步骤820，基于图层读取通道对应的检测节点的数据消耗信息与数据盈余信息确定像素亏损信息。
步骤830，基于延时信息、像素亏损信息和显示预留时间信息判断图层读取通道对应 的检测节点是否符合预设掉队条件。
在本申请一实施例中，当不等式(T L+T)＜T o不成立(即不等式(T L+T)＜T o不满足)时，判断图层读取通道对应的检测节点符合预设掉队条件。其中，T L表示延时信息，T＝∑T ch-∑T p，T表示像素亏损信息，∑T ch表示数据消耗信息，∑T p表示数据盈余信息，T o表示显示预留时间信息。
本申请实施例提供的图像显示控制方法，通过针对m个图层读取通道中的每个图层读取通道，确定图层读取通道的输出端与时序控制器的缓冲接收端之间的延时信息，然后基于图层读取通道对应的检测节点的数据消耗信息与数据盈余信息确定像素亏损信息，继而基于延时信息、像素亏损信息和显示预留时间信息判断图层读取通道对应的检测节点是否符合预设掉队条件的方式，实现了预先判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件的目的。
图9所示为本申请另一实施例提供的判断m个图层读取通道各自对应的检测节点是否符合预设掉队条件的流程示意图。在本申请图8所示实施例的基础上延伸出本申请图9所示实施例，下面着重叙述图9所示实施例与图8所示实施例的不同之处，相同之处不再赘述。
如图9所示，在本申请实施例提供的图像显示控制方法中，在针对m个图层读取通道中的每个图层读取通道，确定图层读取通道的输出端与时序控制器的缓冲接收端之间的延时信息步骤之前，进一步包括如下步骤。
步骤805，基于m个图层读取通道的重要程度确定m个图层读取通道的优先等级。
优选地，图层读取通道的重要程度越高，该图层读取通道的优先等级越高。即，重要程度与优先等级成正比。
步骤806，基于m个图层读取通道的优先等级确定m个图层读取通道各自对应的显示预留时间信息。
应当理解，步骤806中提及的m个图层读取通道各自对应的显示预留时间信息可以是下述实施例中提及的T o1和T o2。
并且，在本申请实施例中，基于延时信息、像素亏损信息和显示预留时间信息判断图层读取通道对应的检测节点是否符合预设掉队条件步骤，包括如下步骤。
步骤831，基于延时信息、像素亏损信息和图层读取通道对应的显示预留时间信息判断图层读取通道对应的检测节点是否符合预设掉队条件。
本申请实施例提供的图像显示控制方法，能够对包含有多个图层读取通道的系统提供一个尽可能多的预防策略，从保证重要图像信息的显示，并在检测到错误发生时适时抑制及丢弃一些不必要的图像信息，以及在条件满足的时候恢复或部分恢复相应的显示的故障处理及恢复机制。由此可见，本申请实施例可以显著加强显示系统的稳定性和异常处理恢复能力，提高相应系统的安全级别。
图10所示为本申请一实施例提供的掉队处理模式的流程示意图。在本申请图2所示实施例的基础上延伸出本申请图10所示实施例，下面着重叙述图10所示实施例与图2所示实施例的不同之处，相同之处不再赘述。
如图10所示，在本申请实施例提供的图像显示控制方法中，掉队处理模式包括以下各步骤中的至少一步骤。
步骤1010，针对m个图层读取通道中的p个图层读取通道，丢弃即将显示的图像帧中的全部像素，并按照即将显示的图像帧中的最后一个像素或预设像素进行显示。
p个图层读取通道为符合预设掉队条件的检测节点对应的图层读取通道。
示例性地，步骤1010中提及的预设像素为固定灰度值的像素，比如灰度值为50的像 素。
步骤1020，针对p个图层读取通道，丢弃即将显示的图像帧中的全部像素，不显示。
举例说明，分辨率为320x240的一个图层，到了第5行第1个像素开始，检测到异常，那么，可以从第5行第1个像素开始的所有数据，都不再等待，也不在屏幕上显示，但会显示1至4行的图像(对应步骤1020)。又或者，从第5行第1个像素开始每个位置都显示第4行第320个像素或者预设像素，此时1至4行是正常的，5至240行是一个纯色块(对应步骤1010)。
在本申请一实施例中，在步骤1010和步骤1020中，待不等式条件(T L+T)＜T o在一帧内重新被满足时，则恢复该p个图层读取通道的正常显示模式即可。
步骤1030，针对m个图层读取通道中的n个图层读取通道，减缓读取和/或输出像素的速度。
应当理解，n个图层读取通道为m个图层读取通道中除去符合预设掉队条件的检测节点对应的图层读取通道之后剩余的图层读取通道。
本申请实施例提供的图像显示控制方法，不仅有效防止了显示控制器被锁死的情况，而且借助针对m个图层读取通道中的n个图层读取通道，减缓读取和/或输出像素的速度的方式，实现了优先保证重要图层的显示的目的。
图11所示为本申请一实施例提供的图像显示控制装置的结构示意图。如图11所示，本申请实施例提供的图像显示控制装置1100包括检测模块1110和与检测模块1110通信连接的处理模块1120。
检测模块1110，用于针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测图层读取通道对应的检测节点的数据消耗信息和数据盈余信息。其中，检测节点位于图层读取通道的输出端与时序控制器的缓冲接收端之间。处理模块1120，用于基于m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式。其中，图像显示模式包括掉队处理模式和正常显示模式。
图12所示为本申请一实施例提供的检测模块的结构示意图。在本申请图11所示实施例的基础上延伸出本申请图12所示实施例，下面着重叙述图12所示实施例与图11所示实施例的不同之处，相同之处不再赘述。
如图12所示，在本申请实施例提供的图像显示控制装置中，检测模块1110包括检测单元1112和与检测单元1112通信连接的定时器1111。其中，定时器1111用于确定时序控制器的校准时间节点。检测单元1112用于基于校准时间节点，利用定时器1111对检测节点进行计时操作，以确定数据消耗信息，并在计时操作期间，确定检测节点处理的像素数量，以确定数据盈余信息。
应当理解，图11和图12提供的图像显示控制装置中的检测模块1110和处理模块1120，以及检测模块1110中包括的定时器1111和检测单元1112的操作和功能可以参考上述图2至图10提供的图像显示控制方法，为了避免重复，在此不再赘述。
图13所示为本申请另一实施例提供的图像显示控制装置的框图。如图13所示，本申请实施例提供的图像显示控制装置连接在显示图层读取通道与TCON之间，其中的显示图层读取通道包括有N个，分别用于从内存中读取该通道的像素以供图像显示控制装置进行融合、缓冲用于显示。
应当理解，本申请实施例提及的显示图层读取通道即为上述实施例提及的图层读取通道，即，显示图层读取通道和图层读取通道的含义相同。
所述的图像显示控制装置，其包括：
定时器，包括触发端，所述触发端根据TCON中的时间控制节点产生启动信号触发定 时器计时；
检测单元，包括检测端，检测端连接检测节点，用于在每个计时周期，记录一个T ch的数据消耗；在检测节点每处理一个有效像素或空像素时，记录一个T p的数据盈余；其中，检测节点能够设置在图13中的显示图层读取通道的输出端与TCON的缓冲接收端之间任意位置；
掉队处理单元，可包括分别针对N个显示图层读取通道的多个，用于根据上述的数据消耗与数据盈余判断是否满足显示像素所需预留的时间T o(即为上述实施例提及的显示预留时间信息)，例如，根据上述的数据消耗与数据盈余判断是否满足(T L+T)-T o，在不满足时执行图像掉队处理步骤。其中，T L为图像显示控制过程中由显示图层读取通道至所述TCON的延时；T＝∑T ch-∑T p，所述一个T ch的数据消耗为：检测节点所处位置的数字时钟的周期，所述一个T p的数据盈余为：所述TCON的数字时钟周期。
上述装置，还可进一步针对需要控制各显示图层读取通道读取和/或输出像素的速度的情况，设计有slow-down请求网络。
该装置通过上述的检测单元的检测，能够将装置中像素的处理状况抽象为一个供求模型，通过该模型塑造的条件检测多个显示图层通道内的图像数据的掉队情况何时发生，并做掉队处理(auto-flush)。其具体控制方法如下。
首先，根据TCON中的时间控制节点产生启动信号，具体根据指定的时间点，指定的显示像素P(x，y)必须出现在TCON的输出逻辑处，触发定时器计时；
检测单元，在每个计时周期，记录数据消耗T ch；在检测节点处理有效像素或空像素时记录数据盈余T p；其中，
所述检测单元的检测节点可设置在显示图层读取通道的输出端与TCON的缓冲接收端之间，用于检测该节点处对任一有效像素或空像素的以下处理步骤以触发对一个数据盈余T p的累加记录：任意一个显示图层读取通道处理了一个有效像素或空像素，盈余计为T p；或，图像显示控制装置中的任意显示图层读取通道处理了n个有效像素或空像素，盈余计为n*T p；
掉队处理单元，根据上述的数据消耗与数据盈余判断是否满足显示像素所需预留的时间T o，以，在距离TCON需要输出像素的一个指定的时间间隔前提早检测重要的图层通道的数据饥饿(hungry)，在不满足时执行图像掉队处理步骤，对较不重要的图层通道的读取发送减速请求(slow-down request)以及部分丢弃和全部丢弃较不重要的图层的恢复，使显示控制器在此情况不会锁死；否则继续记录并判断数据消耗与数据盈余。
上述过程中，通过增加定时器、检测单元、掉队处理单元，将图层通道的掉队检测转化为这样的问题：待检测节点所记录到的数据处理的任意时刻的瞬时量都应该满足该通道所应该供应的数据量。只要“亏损”发生，就可以认为检测到数据的掉队。这里的数据量，考虑到系统对像素的显示是通过流水线方式输送的，因而，将像素量转化为流水线中的时间，包括数据消耗T ch和数据盈余T p进行计算。
具体实现中，考虑到各个显示图层读取通道i对应有不同的优先等级和重要程度，因此应当为其分别设置不同的所需预留的时间T oi。这种应用方式下，所述的检测端分别设置在每一个显示图层读取通道i的输出端，检测该显示图层读取通道i是否输出一个有效像素或空像素。
对于任意显示图层读取通道i，根据该显示图层读取通道i的数据消耗∑T chi与该显示图层读取通道i的数据盈余∑T pi判断是否满足(T Li+T i)＜T oi。
示例性地，在不满足时，如果该显示图层读取通道i打开了掉队处理模式，则对该显示图层读取通道i进行掉队处理操作。比如，丢弃即将显示的图像帧中的全部像素，按照 该图像帧中的最后一个像素进行显示；或者，丢弃即将显示的图像帧中的全部像素，不显示；或者，按照上述任一方式，并丢弃前级读取通道过来的像素，直至定时器被重新触发开始计时。
示例性地，在不满足时，如果该显示图层读取通道i没有打开掉队处理模式，而是打开了slow-down减速请求模式，则对其他显示图层读取通道j，j≠i执行减速请求。例如：对显示图层读取通道i以外的其他显示图层读取通道j，j≠i，减缓其读取和/或输出像素的速度。
在本申请一实施例中，如果显示图层读取通道i既没有打开掉队处理模式，又没有打开减速请求，那么，显示图层读取通道i对应的掉队处理模块是不工作的。
上述过程中的定时器选择为增量计时，在递减的计时方式下，对数据消耗∑T chi与数据盈余∑T pi的判断方式仅需相应调整为减法即可。
在具体应用中，上述装置的掉队处理按照如下的方式进行。
步骤1，对于具体应用中所指定的显示设备、指定的显示要求来说，其TCON输出时序是相对固定的，由一定的标准时序参数来确定，包含行内以及帧内的back/front porch，hsize，vsize等参数，即也意味着在指定的时间点，指定的显示像素P(x，y)一定必须出现在TCON的输出逻辑处。相应地，对于任意一个图像处理通道(参见系统框图)，为了给足处理通道的预处理时间，可从TCON指定的期望的显示像素P(0,0)所处的时间点(T 00，第一个有效显示像素点)的一个可以预计的时间间隔之前的时间点T 00pre作为时间控制节点，根据该时间控制节点是否被触发而获取一个启动信号，并将该启动信号发送给各个显示图层通道及掉队处理模块。
步骤2，检测单元接收到该启动信号，启动一个具有实数意义的定时器(初始值为0)，该定时器包含固定位数的小数位，根据系统参数，设处理通道的时钟周期为T ch，TCON所处的输出时钟域的时钟周期为T p。
步骤3，随着时间的流逝，掉队处理模块将通过该定时器进行这样的统计记录。
(1)该定时器在被启动后在所处逻辑模块的时钟域增量计时，每个时钟周期增加一个T ch时间。
(2)同时如果其逻辑模块所处节点的一个或多个有效像素，以及一个或多个空像素(这个概念在本文特指的是，在TCON的指定坐标处没有需要实际显示的像素，包含blank期间)被处理，则定时器扣除时间(处理的“像素”的数目*T p)。
(3)设从该图像显示通道至TCON的流水线延迟时间为T L，定时器任意时间的计数值为T，则有(T L+T)＜T o。
(4)如违背(3)中的条件，则认为发生“亏损”，检测到掉队。
步骤4，如果没检测到掉队，系统正常工作，如果检测到掉队，该模块根据配置可以进行以下几种决策(使用中任选其一)。
(1)检测到掉队后，立即全部丢弃当前图像帧，之后残余图像显示该图像帧的最后一个像素。
(2)检测到掉队后，立即全部丢弃当前图像帧，之后残余图像不显示。
(3)检测到掉队后，进入丢弃图像模式，在该模式下按照前述两种任一种方式来给出显示像素点，并把前级通道过来的图像数据逐个丢弃，但当定时器的值重新满足了前文所述的条件时，重新处理这个有效的图像像素点，并从丢弃图像模式返回到正常模式。
可选的，还可如图13中，在本系统架构中，由于在“图像融合模块”后续添置数据缓冲池，被“融合及后处理”的图像数据，在被TCON送去显示设备显示之前，是存储在数据缓冲池里，而如果没有该缓冲池，则图层通道，“图像融合及后处理”模块中的数据 处理的逻辑在没到达TCON显示的位置时会因为无处接收而处于暂停状态，实数定时器在这里的处理方式也以暂停不做扣除计算处理。因而缓冲池的大小，决定了定时器的值的最小的下限值T down。在定时器的理论上限T o和下限T down之间，我们可以对各个通道的掉队检测值按重要性设定一个阶梯型的阈值。例如，对于两个通道的情况。
通道1：(T L1+T 1)＜T o1(T 1为通道1的实数定时器的值，T o1为新的通道1的掉队检测阈值)。
通道2：(T L2+T 2)＜T o2(T 2为通道2的实数定时器的值，T o2为新的通道2的掉队检测阈值)。
其中，T down＜T o1<T o2＜T o，且0＜T o1<T o2，达到上述减速检测条件的通道可以按照预定的网络的配置向其他图层的通道发送减速请求。
由此，本申请实施例能够在安全显示需求较高的场合，对该包含有多个显示图层读取通道的系统提供一个尽可能多的预防策略，从保证重要图像信息的显示，到在检测到错误发生时适时抑制及丢弃一些不必要的图像信息，及在条件满足的时候恢复或部分恢复相应的显示的故障处理及恢复机制，显然可以加强显示系统的稳定性，提高相应系统的安全级别。
下面，参考图14来描述根据本申请实施例的电子设备。图14所示为本申请一实施例提供的电子设备的结构示意图。。
如图14所示，电子设备1400包括一个或多个处理器1401和存储器1402。
处理器1401可以是中央处理单元(CPU)或者具有数据处理能力和/或指令执行能力的其他形式的处理单元，并且可以控制电子设备1400中的其他组件以执行期望的功能。
存储器1402可以包括一个或多个计算机程序产品，所述计算机程序产品可以包括各种形式的计算机可读存储介质，例如易失性存储器和/或非易失性存储器。所述易失性存储器例如可以包括随机存取存储器(RAM)和/或高速缓冲存储器(cache)等。所述非易失性存储器例如可以包括只读存储器(ROM)、硬盘、闪存等。在所述计算机可读存储介质上可以存储一个或多个计算机程序指令，处理器1401可以运行所述程序指令，以实现上文所述的本申请的各个实施例的图像显示控制方法以及/或者其他期望的功能。在所述计算机可读存储介质中还可以存储诸如数据消耗信息等各种内容。
在一个示例中，电子设备1400还可以包括：输入装置1403和输出装置1404，这些组件通过总线系统和/或其他形式的连接机构(未示出)互连。
该输入装置1403可以包括例如键盘、鼠标等等。
该输出装置1404可以向外部输出各种信息，包括确定出的图像显示模式信息等。该输出装置1404可以包括例如显示器、通信网络及其所连接的远程输出设备等等。
当然，为了简化，图14中仅示出了该电子设备1400中与本申请有关的组件中的一些，省略了诸如总线、输入/输出接口等等的组件。除此之外，根据具体应用情况，电子设备1400还可以包括任何其他适当的组件。
除了上述方法和设备以外，本申请的实施例还可以是计算机程序产品，其包括计算机程序指令，所述计算机程序指令在被处理器运行时使得所述处理器执行本说明书上述“示例性方法”部分中描述的根据本申请各种实施例的图像显示控制方法中的步骤。
所述计算机程序产品可以以一种或多种程序设计语言的任意组合来编写用于执行本申请实施例操作的程序代码，所述程序设计语言包括面向对象的程序设计语言，诸如Java、C++等，还包括常规的过程式程序设计语言，诸如“C”语言或类似的程序设计语言。程序代码可以完全地在用户计算设备上执行、部分地在用户设备上执行、作为一个独立的软件包执行、部分在用户计算设备上部分在远程计算设备上执行、或者完全在远程计算设备或 服务器上执行。
此外，本申请的实施例还可以是计算机可读存储介质，其上存储有计算机程序指令，所述计算机程序指令在被处理器运行时使得所述处理器执行本说明书上述“示例性方法”部分中描述的根据本申请各种实施例的图像显示控制方法中的步骤。
所述计算机可读存储介质可以采用一个或多个可读介质的任意组合。可读介质可以是可读信号介质或者可读存储介质。可读存储介质例如可以包括但不限于电、磁、光、电磁、红外线、或半导体的系统、装置或器件，或者任意以上的组合。可读存储介质的更具体的例子(非穷举的列表)包括：具有一个或多个导线的电连接、便携式盘、硬盘、随机存取存储器(RAM)、只读存储器(ROM)、可擦式可编程只读存储器(EPROM或闪存)、光纤、便携式紧凑盘只读存储器(CD-ROM)、光存储器件、磁存储器件、或者上述的任意合适的组合。
以上结合具体实施例描述了本申请的基本原理，但是，需要指出的是，在本申请中提及的优点、优势、效果等仅是示例而非限制，不能认为这些优点、优势、效果等是本申请的各个实施例必须具备的。另外，上述公开的具体细节仅是为了示例的作用和便于理解的作用，而非限制，上述细节并不限制本申请为必须采用上述具体的细节来实现。
本申请中涉及的器件、装置、设备、系统的方框图仅作为例示性的例子并且不意图要求或暗示必须按照方框图示出的方式进行连接、布置、配置。如本领域技术人员将认识到的，可以按任意方式连接、布置、配置这些器件、装置、设备、系统。诸如“包括”、“包含”、“具有”等等的词语是开放性词汇，指“包括但不限于”，且可与其互换使用。这里所使用的词汇“或”和“和”指词汇“和/或”，且可与其互换使用，除非上下文明确指示不是如此。这里所使用的词汇“诸如”指词组“诸如但不限于”，且可与其互换使用。
还需要指出的是，在本申请的装置、设备和方法中，各部件或各步骤是可以分解和/或重新组合的。这些分解和/或重新组合应视为本申请的等效方案。
提供所公开的方面的以上描述以使本领域的任何技术人员能够做出或者使用本申请。对这些方面的各种修改对于本领域技术人员而言是非常显而易见的，并且在此定义的一般原理可以应用于其他方面而不脱离本申请的范围。因此，本申请不意图被限制到在此示出的方面，而是按照与在此申请的原理和新颖的特征一致的最宽范围。
以上仅为本申请的实施方式，其描述较为具体和详细，但并不能因此而理解为对本申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些均属于本申请的保护范围。

Claims (16)

  1. 一种图像显示控制方法，其中，包括：
    针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测所述图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，其中，所述检测节点位于所述图层读取通道的输出端与时序控制器的缓冲接收端之间；
    基于所述m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式，其中，所述图像显示模式包括掉队处理模式和正常显示模式。
  2. 如权利要求1所述的图像显示控制方法，其中，所述检测所述图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，包括：
    确定所述时序控制器的时间控制节点；
    基于所述时间控制节点，利用定时器对所述检测节点进行计时操作，以确定所述数据消耗信息；
    在所述计时操作期间，确定所述检测节点处理的像素数量，以确定所述数据盈余信息。
  3. 如权利要求2所述的图像显示控制方法，其中，所述定时器为增量计时的定时器，所述利用定时器对所述检测节点进行计时操作，以确定所述数据消耗信息，包括：
    基于所述定时器的数字时钟周期，对周期数量进行累加操作，以确定所述数据消耗信息；
    其中，所述确定所述检测节点处理的像素数量，以确定所述数据盈余信息，包括：
    对所述检测节点处理的像素的数量进行累加操作，以确定所述数据盈余信息。
  4. 如权利要求2或3所述的图像显示控制方法，其中，所述确定所述时序控制器的时间控制节点，包括：
    确定图像的预设显示像素以及所述预设显示像素对应的显示时间节点，其中，所述显示时间节点指的是所述预设显示像素出现在所述时序控制器的输出逻辑处；
    当所述预设显示像素在所述显示时间节点出现在所述时序控制器的输出逻辑处时，基于所述显示时间节点确定所述时间控制节点。
  5. 如权利要求4所述的图像显示控制方法，其中，在所述确定图像的预设显示像素以及所述预设显示像素对应的显示时间节点之后，进一步包括：
    基于所述显示时间节点确定校准时间节点，其中，所述校准时间节点位于所述显示时间节点之前，并且与所述显示时间节点之间包括预设时间间隔；
    其中，所述当所述预设显示像素在所述显示时间节点出现在所述时序控制器的输出逻辑处时，基于所述显示时间节点确定所述时间控制节点，包括：
    当所述校准时间节点被触发时，基于所述校准时间节点确定所述时间控制节点。
  6. 如权利要求1至5任一项所述的图像显示控制方法，其中，所述基于所述m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式，包括：
    针对所述m个图层读取通道各自对应的检测节点，判断所述m个图层读取通道各自对应的检测节点是否符合预设掉队条件，其中，所述预设掉队条件基于所述数据消耗信息和所述数据盈余信息确定；
    当至少一个检测节点符合预设掉队条件时，确定所述图像显示模式为所述掉队处理模式。
  7. 如权利要求6所述的图像显示控制方法，其中，所述判断所述m个图层读取通道 各自对应的检测节点是否符合预设掉队条件，包括：
    针对所述m个图层读取通道中的每个图层读取通道，确定所述图层读取通道的输出端与所述时序控制器的缓冲接收端之间的延时信息；
    基于所述图层读取通道对应的检测节点的所述数据消耗信息与所述数据盈余信息确定像素亏损信息；
    基于所述延时信息、所述像素亏损信息和显示预留时间信息判断所述图层读取通道对应的检测节点是否符合预设掉队条件。
  8. 如权利要求7所述的图像显示控制方法，其中，在所述针对所述m个图层读取通道中的每个图层读取通道，确定所述图层读取通道的输出端与所述时序控制器的缓冲接收端之间的延时信息之前，进一步包括：
    基于所述m个图层读取通道的重要程度确定所述m个图层读取通道的优先等级；
    基于所述m个图层读取通道的优先等级确定所述m个图层读取通道各自对应的显示预留时间信息；
    其中，所述基于所述延时信息、所述像素亏损信息和显示预留时间信息判断所述图层读取通道对应的检测节点是否符合预设掉队条件，包括：
    基于所述延时信息、所述像素亏损信息和所述图层读取通道对应的显示预留时间信息判断所述图层读取通道对应的检测节点是否符合预设掉队条件。
  9. 如权利要求7或8所述的图像显示控制方法，其中，所述基于所述延时信息、所述像素亏损信息和显示预留时间信息判断所述图层读取通道对应的检测节点是否符合预设掉队条件，包括：
    当不等式(T L+T)＜T o不成立时，判断所述图层读取通道对应的检测节点符合预设掉队条件，其中，T L表示所述延时信息，T＝∑T ch-∑T p，T表示所述像素亏损信息，∑T ch表示所述数据消耗信息，∑T p表示所述数据盈余信息，T o表示所述显示预留时间信息。
  10. 如权利要求1至9任一所述的图像显示控制方法，其中，所述掉队处理模式，包括一下各项中的至少一项：
    针对所述m个图层读取通道中的p个图层读取通道，丢弃即将显示的图像帧中的全部像素，并按照所述即将显示的图像帧中的最后一个像素或预设像素进行显示，其中，所述p个图层读取通道为符合预设掉队条件的检测节点对应的图层读取通道；
    针对所述p个图层读取通道，丢弃即将显示的图像帧中的全部像素，不显示；
    针对所述m个图层读取通道中的n个图层读取通道，减缓读取和/或输出像素的速度，其中，所述n个图层读取通道为所述m个图层读取通道中除去所述P个图层读取通道之后剩余的图层读取通道。
  11. 一种图像显示控制装置，其中，包括：
    检测模块，用于针对显示控制器包括的m个图层读取通道中的每一图层读取通道，检测所述图层读取通道对应的检测节点的数据消耗信息和数据盈余信息，其中，所述检测节点位于所述图层读取通道的输出端与时序控制器的缓冲接收端之间；
    与所述检测模块通信连接的处理模块，用于基于所述m个图层读取通道各自对应的检测节点的数据消耗信息和数据盈余信息，确定图像显示模式，其中，所述图像显示模式包括掉队处理模式和正常显示模式。
  12. 如权利要求11所述的图像显示控制装置，其中，所述检测模块包括检测单元和与所述检测单元通信连接的定时器，所述定时器用于确定所述时序控制器的校准时间节点；所述检测单元用于基于所述校准时间节点，利用定时器对所述检测节点进行计时操作，以确定所述数据消耗信息，并在所述计时操作期间，确定所述检测节点处理的像素数量， 以确定所述数据盈余信息。
  13. 如权利要求12所述的图像显示控制装置，其中，所述定时器包括触发端，所述触发端根据所述时序控制器中的时间控制节点产生启动信号触发定时器计时。
  14. 如权利要求12或13所述的图像显示控制装置，其中，所述检测单元包括检测端，所述检测端连接所述检测节点，用于在所述定时器的每个计时周期，记录一个T ch的数据消耗；在所述检测节点每处理一个有效像素或空像素时，记录一个T p的数据盈余。
  15. 一种计算机可读存储介质，其中，所述计算机可读存储介质上存储有图像显示控制程序，所述图像显示控制程序被处理器执行时实现如权利要求1至10中任一项所述的图像显示控制方法的操作。
  16. 一种电子设备，其中，所述电子设备包括：
    处理器；
    用于存储所述处理器可执行指令的存储器；
    所述处理器，用于执行上述权利要求1至10任一项所述的图像显示控制方法。
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