WO2021003872A1 - Circuit d'attaque de pixel et panneau d'affichage - Google Patents

Circuit d'attaque de pixel et panneau d'affichage Download PDF

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Publication number
WO2021003872A1
WO2021003872A1 PCT/CN2019/111208 CN2019111208W WO2021003872A1 WO 2021003872 A1 WO2021003872 A1 WO 2021003872A1 CN 2019111208 W CN2019111208 W CN 2019111208W WO 2021003872 A1 WO2021003872 A1 WO 2021003872A1
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WO
WIPO (PCT)
Prior art keywords
transistor
control signal
electrically connected
node
module
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Application number
PCT/CN2019/111208
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English (en)
Chinese (zh)
Inventor
张锋
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武汉华星光电半导体显示技术有限公司
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Publication of WO2021003872A1 publication Critical patent/WO2021003872A1/fr

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Definitions

  • This application relates to the field of display technology, specifically a pixel drive circuit and a display panel.
  • transistors in the pixel driving circuit are low-temperature polysilicon thin film transistors or oxide thin film transistors.
  • the pixel driving circuit is compensated.
  • the existing pixel compensation circuit has a shortcoming.
  • the driving current is related to the power signal, and the voltage drop of the power signal will affect the driving current, resulting in unstable light emission of the light-emitting device, and thus affecting the image quality.
  • the main technical problem addressed by this application is how to compensate the threshold voltage change of the driving transistor, improve the uniformity of light emission of the light-emitting device, reduce the influence of the voltage drop of the power signal on the driving current, and improve the light-emitting stability of the light-emitting device, And then improve the picture quality.
  • the present application provides a pixel driving circuit, including: a first reset module, a second reset module, a compensation module, and a light emitting module;
  • the first reset module accesses a first control signal, and the first reset module is configured to reset the compensation module under the control of the first control signal;
  • the second reset module is connected to a second control signal, and the second reset module is configured to transmit the first power signal to the compensation module under the control of the second control signal to reset the compensation module;
  • the compensation module is connected to the first control signal and the third control signal, and the compensation module is configured to write a data signal and perform threshold voltage compensation under the control of the first control signal;
  • the light emitting module is connected to a fourth control signal, and the light emitting module is configured to emit light under the control of the fourth control signal.
  • the first reset module includes: a first transistor; the gate of the first transistor is electrically connected to the first control signal, the source of the first transistor is electrically connected to ground, and the The drain of the first transistor is electrically connected to the first node;
  • the second reset module includes: a second transistor; the gate of the second transistor is electrically connected to the second control signal, the source of the second transistor is electrically connected to the first power signal, the The drain of the second transistor is electrically connected to the second node.
  • the compensation module includes: a storage capacitor, a third transistor, a fourth transistor, and a fifth transistor;
  • a first end of the storage capacitor is electrically connected to the first node, and a second end of the storage capacitor is electrically connected to the second node;
  • the gate of the third transistor is electrically connected to the third control signal, the source of the third transistor is electrically connected to a third node, and the drain of the third transistor is electrically connected to the third node.
  • the gate of the fourth transistor is electrically connected to the third node, the drain of the fourth transistor is electrically connected to the light emitting module, and the source of the fourth transistor is electrically connected to the first node.
  • the gate of the fifth transistor is electrically connected to the first control signal, the source of the fifth transistor is electrically connected to the data signal, and the drain of the fifth transistor is electrically connected to the The third node.
  • the light-emitting module includes: a sixth transistor and a light-emitting device
  • the gate of the sixth transistor is electrically connected to a fourth control signal, the source of the sixth transistor is electrically connected to the drain of the fourth transistor, and the drain of the sixth transistor is electrically connected to The light emitting device;
  • the anode of the light emitting device is electrically connected to the drain of the sixth transistor, and the cathode of the light emitting device is electrically connected to the second power signal.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all P-type transistors.
  • the driving timing of the pixel driving circuit includes:
  • the threshold voltage of the fourth transistor is captured and stored in the storage capacitor
  • the pixel driving circuit In the light-emitting stage, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the light-emitting display of the light-emitting device.
  • the first control signal in the reset phase, is at a low potential, the second control signal is at a low potential, the third control signal is at a high potential, and the fourth control The signal is a high potential, the ground terminal provides a ground signal, the ground signal resets the first node through the first transistor, and the first power signal is transmitted to the second node and stored in the On the storage capacitor;
  • the first control signal is at a low potential
  • the second control signal is at a high potential
  • the third control signal is at a high potential
  • the fourth control signal is at a low potential
  • the data signal The fifth transistor is transmitted to the first node and the third node, the potential of the first end of the storage capacitor is raised from the potential of the ground signal to the potential of the data signal, and the storage capacitor According to the coupling effect of the storage capacitor, the potential of the second terminal jumps to a corresponding potential, and the fourth transistor is turned on until the potential of the second node is equal to the gate of the fourth transistor and the fourth transistor.
  • the first control signal is at a high potential
  • the second control signal is at a low potential
  • the third control signal is at a low potential
  • the fourth control signal is at a low potential
  • the first The power signal is transmitted to the anode of the light emitting device, and the light emitting device emits light.
  • the first control signal, the second control signal, the third control signal, and the fourth control signal are all provided by an external timing device.
  • the present application provides a pixel driving circuit, including: a first reset module, a second reset module, a compensation module, and a light emitting module;
  • the first reset module accesses a first control signal, and the first reset module is configured to reset the compensation module under the control of the first control signal;
  • the second reset module is connected to a second control signal, and the second reset module is configured to transmit the first power signal to the compensation module under the control of the second control signal to reset the compensation module;
  • the compensation module is connected to the first control signal and the third control signal, and the compensation module is configured to write a data signal and perform threshold voltage compensation under the control of the first control signal;
  • the light emitting module is connected to a fourth control signal, and the light emitting module is configured to emit light under the control of the fourth control signal.
  • the first reset module includes: a first transistor
  • the gate of the first transistor is electrically connected to the first control signal, the source of the first transistor is electrically connected to a ground terminal, and the drain of the first transistor is electrically connected to a first node.
  • the second reset module includes: a second transistor
  • the gate of the second transistor is electrically connected to the second control signal, the source of the second transistor is electrically connected to the first power signal, and the drain of the second transistor is electrically connected to the second control signal. node.
  • the compensation module includes: a storage capacitor, a third transistor, a fourth transistor, and a fifth transistor;
  • a first end of the storage capacitor is electrically connected to the first node, and a second end of the storage capacitor is electrically connected to the second node;
  • the gate of the third transistor is electrically connected to the third control signal, the source of the third transistor is electrically connected to a third node, and the drain of the third transistor is electrically connected to the third node.
  • the gate of the fourth transistor is electrically connected to the third node, the drain of the fourth transistor is electrically connected to the light emitting module, and the source of the fourth transistor is electrically connected to the first node.
  • the gate of the fifth transistor is electrically connected to the first control signal, the source of the fifth transistor is electrically connected to the data signal, and the drain of the fifth transistor is electrically connected to the The third node.
  • the light-emitting module includes: a sixth transistor and a light-emitting device
  • the gate of the sixth transistor is electrically connected to a fourth control signal, the source of the sixth transistor is electrically connected to the drain of the fourth transistor, and the drain of the sixth transistor is electrically connected to The light emitting device;
  • the anode of the light emitting device is electrically connected to the drain of the sixth transistor, and the cathode of the light emitting device is electrically connected to the second power signal.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all P-type transistors.
  • the driving timing of the pixel driving circuit includes:
  • the threshold voltage of the fourth transistor is captured and stored in the storage capacitor
  • the pixel driving circuit In the light-emitting stage, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the light-emitting display of the light-emitting device.
  • the first control signal in the reset phase, is at a low potential, the second control signal is at a low potential, the third control signal is at a high potential, and the fourth control The signal is a high potential, the ground terminal provides a ground signal, the ground signal resets the first node through the first transistor, and the first power signal is transmitted to the second node and stored in the On the storage capacitor;
  • the first control signal is at a low potential
  • the second control signal is at a high potential
  • the third control signal is at a high potential
  • the fourth control signal is at a low potential
  • the data signal The fifth transistor is transmitted to the first node and the third node, the potential of the first end of the storage capacitor is raised from the potential of the ground signal to the potential of the data signal, and the storage capacitor According to the coupling effect of the storage capacitor, the potential of the second terminal jumps to a corresponding potential, and the fourth transistor is turned on until the potential of the second node is equal to the gate of the fourth transistor and the fourth transistor.
  • the first control signal is at a high potential
  • the second control signal is at a low potential
  • the third control signal is at a low potential
  • the fourth control signal is at a low potential
  • the first The power signal is transmitted to the anode of the light emitting device, and the light emitting device emits light.
  • the first control signal, the second control signal, the third control signal, and the fourth control signal are all provided by an external timing device.
  • the present application provides a display panel including a pixel driving circuit
  • the pixel driving circuit includes: a first reset module, a second reset module, a compensation module, and a light emitting module;
  • the first reset module accesses a first control signal, and the first reset module is configured to reset the compensation module under the control of the first control signal;
  • the second reset module is connected to a second control signal, and the second reset module is configured to transmit the first power signal to the compensation module under the control of the second control signal to reset the compensation module;
  • the compensation module is connected to the first control signal and the third control signal, and the compensation module is configured to write a data signal and perform threshold voltage compensation under the control of the first control signal;
  • the light emitting module is connected to a fourth control signal, and the light emitting module is configured to emit light under the control of the fourth control signal.
  • the pixel driving circuit of the 6T1C structure effectively compensates the threshold voltage of the driving transistor in each pixel, and the driving current of the light-emitting device is not affected by the first power signal, thus improving the light-emitting device Stability of light emission, thereby improving image quality.
  • FIG. 1 is a schematic circuit diagram of a pixel driving circuit provided by an embodiment of the application
  • FIG. 3 is a schematic flowchart of the compensation method of the pixel driving circuit provided by this application.
  • the transistors used in all the embodiments of this application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistor used here are symmetrical, the source and drain can be interchanged of. In the embodiments of the present application, in order to distinguish the two poles of the transistor except the gate, one of the poles is called the source and the other is called the drain. According to the form in the figure, it is stipulated that the middle end of the switching transistor is the gate, the signal input end is the source, and the output end is the drain.
  • the transistors used in the embodiments of the present application may include P-type transistors and/or N-type transistors. The P-type transistor is turned on when the gate is at a low level, and turned off when the gate is at a high level. The gate is turned on when the gate is high, and it is turned off when the gate is low.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by the present invention.
  • the pixel driving circuit includes: a first reset module 101, a second reset module 102, a compensation module 103, and a light emitting module 104.
  • the first reset module 101, the second reset module 102, and the light emitting module 104 are all connected to The compensation module 103.
  • the first reset module 101 is connected to the first control signal X, and the first reset module 101 is used to reset the compensation module 103 under the control of the first control signal X.
  • the second reset module 102 is connected to the second control signal Y, and the second reset module 102 is used to transmit the first power signal H to the compensation module 103 under the control of the second control signal Y to reset the compensation module 103.
  • the compensation module 103 is connected to the first control signal X and the third control signal A, and the compensation module 103 is used to write the data signal Z under the control of the first control signal X and perform threshold voltage compensation.
  • the light emitting module 104 is connected to the fourth control signal Q, and the light emitting module 104 is configured to emit light a under the control of the fourth control signal Q.
  • FIG. 2 is a schematic circuit diagram of the pixel driving circuit provided by the present invention.
  • the first reset module 101 includes: a first transistor T1.
  • the gate of the first transistor T1 is electrically connected to the first control signal X, the source of the first transistor T1 is electrically connected to the ground terminal, and the drain of the first transistor T1 is electrically connected to the first node a.
  • the second reset module 102 includes: a second transistor.
  • the gate of the second transistor 102 is electrically connected to the second control signal Y, the source of the second transistor 102 is electrically connected to the first power signal H, and the drain of the second transistor T2 is electrically connected to the second node b.
  • the compensation module 103 includes a storage capacitor C, a third transistor T3, a fourth transistor T4, and a fifth transistor T5.
  • the first end of the storage capacitor C is electrically connected to the first node a, and the second end of the storage capacitor C is electrically connected to the second node b.
  • the gate of the third transistor T3 is electrically connected to the third control signal A, the source of the third transistor T3 is electrically connected to the third node c, and the drain of the third transistor T3 is electrically connected to the first node a.
  • the gate of the fourth transistor T4 is electrically connected to the third node c, the drain of the fourth transistor T4 is electrically connected to the light emitting module 104, and the source of the fourth transistor T4 is electrically connected to the second node b.
  • the fourth transistor T4 is a driving transistor.
  • the gate of the fifth transistor T5 is electrically connected to the first control signal X, the source of the fifth transistor T5 is electrically connected to the data signal Z, and the drain of the fifth transistor T5 is electrically connected to the third node c.
  • the light emitting module 104 includes: a sixth transistor T6 and a light emitting device D.
  • the gate of the sixth transistor T6 is electrically connected to the fourth control signal Q
  • the source of the sixth transistor T6 is electrically connected to the drain of the fourth transistor T4
  • the drain of the sixth transistor T6 is electrically connected to the light emitting device D .
  • the anode of the light emitting device D is electrically connected to the drain of the sixth transistor T6, and the cathode of the light emitting device D is electrically connected to the second power signal L.
  • the first transistor T1 is used to reset the first terminal of the storage capacitor C
  • the second transistor T2 is used to reset the second terminal of the storage capacitor C
  • the third transistor T3 is used to reset the gate of the fourth transistor T4.
  • the third transistor T3 is used to reset the gate of the driving transistor
  • the fourth transistor T4 is used to generate a driving current and transfer the driving current to the sixth transistor T6, and the sixth transistor T6 is used to transfer the The driving current of the four-transistor T4 is transmitted to the light-emitting device D, so that the light-emitting device D emits light.
  • the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all P-type transistors.
  • the transistors in the pixel driving circuit provided by the embodiments of the present application are the same type of transistors, so as to avoid the influence of the difference between different types of transistors on the pixel driving circuit.
  • FIG. 3 is a timing diagram of driving signals of the pixel driving circuit provided by the present invention.
  • the driving timing of the pixel driving circuit includes:
  • the first node a and the second node b are reset.
  • the threshold voltage of the fourth transistor T4 is captured and stored in the storage capacitor C.
  • the pixel driving circuit In the light-emitting stage t3, the pixel driving circuit generates a driving current and supplies it to the light-emitting device D for driving the light-emitting device D to emit light.
  • the first control signal X, the second control signal Y, the third control signal A, and the fourth control signal Q are all provided by an external timing device.
  • the first control signal X is at a low potential
  • the second control signal Y is at a low potential
  • the third control signal A is at a high potential
  • the fourth control signal Q is at a high potential
  • the first transistor T1 is turned on.
  • the second transistor T2 is turned on
  • the fifth transistor T5 is turned on
  • the ground terminal R provides a ground signal Vr
  • the ground signal Vr resets the first node a through the first transistor T1
  • the first power signal H is transmitted to the first node a through the second transistor T2
  • the second node b is stored on the storage capacitor C. At this time, the potential of the second node b is the potential Vh of the first power signal H.
  • the first control signal X is at a low potential
  • the second control signal Y is at a high potential
  • the third control signal A is at a high potential
  • the fourth control signal Q is at a low potential
  • the second transistor T2 is turned on
  • the third The transistor T3 is turned on
  • the sixth transistor T6 is turned on
  • the data signal Z is transmitted to the first node a and the third node c through the fifth transistor T5
  • the potential of the first end of the storage capacitor C is raised from the potential of the ground signal Vr to the data
  • the potential Vz of the signal Z and the potential of the second end of the storage capacitor C jump to the corresponding potential according to the coupling effect of the storage capacitor C.
  • the fourth transistor T4 is turned on until the potential of the second node b is equal to the gate of the fourth transistor T4.
  • the voltage difference between the sources of the four transistors T4 is turned off, that is, the potential of the source of the fourth transistor T4 is equal to Vz+
  • the first control signal X is at a high potential
  • the second control signal Y is at a low potential
  • the third control signal A is at a low potential
  • the fourth control signal Q is at a low potential
  • the second transistor T2 is turned on
  • the third The transistor T3 is turned on
  • the fourth transistor T4 is turned on
  • the sixth transistor T6 is turned on.
  • the potential of the first node a is Vh-Vz-
  • the potential is Vh-Vz-
  • the first power signal H is transmitted to the second node b through the second transistor T2
  • the source potential of the fourth transistor T4 is the potential Vh of the first power signal H.
  • the driving current Id corresponding to the gate-source voltage of the fourth transistor T4 is supplied to the light emitting device D, causing the light emitting device D to emit light, and the driving current Id generated by the fourth transistor T4 is expressed by the following equation:
  • ]2 k•V z 2 .
  • Id represents the current flowing through the light emitting device D
  • Vgs represents the gate-source voltage of the fourth transistor T4
  • Vth represents the threshold voltage of the fourth transistor T4
  • Vz represents the potential of the data signal Z
  • k represents a constant.
  • the pixel drive circuit of the 6T1C structure effectively compensates the threshold voltage of the drive transistor in each pixel, and the drive current of the light-emitting device is not affected by the first power signal, so , Improve the stability of the light-emitting device, and then improve the image quality.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

L'invention concerne un circuit d'attaque de pixel et un panneau d'affichage. Un circuit d'attaque de pixel d'une structure 6 T1C est utilisé pour compenser efficacement une tension de seuil d'un transistor d'attaque dans chaque pixel, de telle sorte qu'un courant d'attaque d'un dispositif électroluminescent n'est pas affecté par un premier signal de source d'alimentation, améliorant ainsi la stabilité d'émission de lumière du dispositif électroluminescent, et améliorant en outre la qualité d'image.
PCT/CN2019/111208 2019-07-09 2019-10-15 Circuit d'attaque de pixel et panneau d'affichage WO2021003872A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910613155.5A CN110277049A (zh) 2019-07-09 2019-07-09 像素驱动电路以及显示面板
CN201910613155.5 2019-07-09

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WO2021003872A1 true WO2021003872A1 (fr) 2021-01-14

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CN110277049A (zh) * 2019-07-09 2019-09-24 武汉华星光电半导体显示技术有限公司 像素驱动电路以及显示面板

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