WO2020248570A1 - 数字信号转换模拟信号的带载电路及电源结构 - Google Patents

数字信号转换模拟信号的带载电路及电源结构 Download PDF

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WO2020248570A1
WO2020248570A1 PCT/CN2019/127166 CN2019127166W WO2020248570A1 WO 2020248570 A1 WO2020248570 A1 WO 2020248570A1 CN 2019127166 W CN2019127166 W CN 2019127166W WO 2020248570 A1 WO2020248570 A1 WO 2020248570A1
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Prior art keywords
circuit
filter capacitor
resistor
switch
terminal
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PCT/CN2019/127166
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English (en)
French (fr)
Inventor
金胜昔
刘玉婷
李绍健
曾森
张秋俊
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珠海格力电器股份有限公司
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Publication of WO2020248570A1 publication Critical patent/WO2020248570A1/zh

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/124Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245Details of sampling arrangements or methods
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/18Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
    • H03M1/181Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values
    • H03M1/182Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values the feedback signal controlling the reference levels of the analogue/digital converter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters

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  • This application relates to the field of power supply technology, and in particular to a load circuit and power supply structure for converting digital signals to analog signals.
  • the on-load circuit for converting digital signals to analog signals mainly uses two transistors to turn on and off in turn, charging the primary capacitor when it is turned on, and charging the secondary capacitor when it is turned off, so as to generate negative voltage.
  • the existing technical solution of the loaded circuit can realize the generation of negative voltage, the voltage loading capacity is insufficient, and the circuit implementation needs to use two electrolytic capacitors.
  • the electrolytic capacitor is relatively large in size, resulting in an excessively large circuit.
  • At least some of the embodiments of the present application propose a load circuit and power supply structure for digital signal conversion analog signal, to solve the problem of insufficient voltage load capacity generated by the existing digital signal conversion analog signal load circuit and excessive circuit volume. problem.
  • One of the embodiments of the present application provides a load circuit for converting digital signals to analog signals, including a DC power supply, a switching signal generating circuit, a switching circuit, a storage circuit, a freewheeling circuit, and a filter capacitor.
  • the control terminal of the switching circuit Connected to the output terminal of the switch signal generating circuit, the input terminal of the switch circuit is connected to the DC power supply, and the output terminal of the switch circuit is connected to one end of the energy storage circuit and one end of the freewheeling circuit, respectively,
  • the other end of the tank circuit is connected to the positive electrode of the filter capacitor, the negative electrode of the filter capacitor is connected to the other end of the freewheeling circuit, and the negative electrode and the positive electrode of the filter capacitor are used as output terminals of the load circuit;
  • the switching signal generation circuit is used to generate a switching signal, and control the switching circuit to be turned on or off based on the switching signal.
  • the switching circuit When the switching circuit is turned on, the input voltage of the DC power supply is the energy storage The circuit stores energy, and when the switch circuit is turned off, the output signal of the tank circuit returns to the tank circuit after passing through the filter capacitor and the freewheeling circuit.
  • the freewheeling circuit is implemented by a diode, the cathode of the diode is connected to the output terminal of the switch circuit, and the anode of the diode is connected to the cathode of the filter capacitor.
  • the switch circuit includes a first resistor and a switch tube
  • the control terminal of the switch tube is connected to the output terminal of the switching signal generating circuit through the first resistor, the input terminal of the switch tube is connected to the DC power supply, and the output terminal of the switch tube is connected to the One end of the tank circuit is connected to the cathode of the diode.
  • the switch tube is a triode or a MOS tube.
  • the switch circuit further includes a second resistor
  • the second resistor is connected between the control terminal and the input terminal of the switch tube.
  • the energy storage circuit is implemented by an energy storage inductor, one end of the energy storage inductor is connected to the output end of the switching circuit, and the other end of the energy storage inductor is connected to the The positive terminal of the filter capacitor is connected.
  • the on-load circuit for converting digital signals to analog signals further includes a feedback voltage sampling circuit:
  • the feedback voltage sampling circuit is used to sample the output voltage of the load circuit, and feed back the sampling voltage to the switching signal generating circuit, so that the switching signal generating circuit can output the output voltage according to the sampling voltage.
  • the switch signal is adjusted.
  • the positive electrode of the filter capacitor is connected to the ground, and the negative electrode of the filter capacitor serves as the negative voltage output terminal of the load circuit;
  • the feedback voltage sampling circuit includes a third resistor, a fourth resistor, and a sampling output terminal for connecting to a switching signal generating circuit;
  • One end of the third resistor is connected to the DC power supply, the other end of the third resistor is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the negative voltage output of the load circuit
  • the sampling output terminal is connected between the third resistor and the fourth resistor.
  • the positive electrode of the filter capacitor is the high potential end of the load circuit, and the negative electrode of the filter capacitor is the low potential end of the load circuit;
  • the feedback voltage sampling circuit includes a third resistor, a fourth resistor, and a sampling output terminal for connecting to a switching signal generating circuit;
  • the third resistor and the fourth resistor are connected in series with the filter capacitor in parallel, and the sampling output terminal is connected between the third resistor and the fourth resistor.
  • the power supply structure includes the load circuit for converting a digital signal to an analog signal as described above.
  • Another embodiment of the present application further provides a household electrical appliance, which includes the power supply structure described above.
  • the load circuit and power supply structure for digital signal conversion analog signal provided by another embodiment of the present application can convert a stable voltage analog signal through a digital signal, and realize stable driving of a load. Moreover, the number of electrolytic capacitors used in the loaded circuit provided by the present application is reduced, thereby reducing the circuit volume.
  • FIG. 1 is a structural block diagram of a load circuit for converting digital signals to analog signals according to the first embodiment of the application;
  • FIG. 2 is a structural block diagram of another on-load circuit for converting digital signals to analog signals according to the first embodiment of the application;
  • FIG. 3 is a circuit schematic diagram of a load circuit for converting digital signals to analog signals according to the first embodiment of the application;
  • FIG. 4 is a structural block diagram of another on-load circuit for converting digital signals to analog signals according to the second embodiment of the application;
  • FIG. 5 is a structural block diagram of another on-load circuit for converting digital signals to analog signals according to the second embodiment of the application;
  • FIG. 6 is a circuit schematic diagram of another on-board circuit for converting digital signals to analog signals provided by the second embodiment of the application.
  • the embodiment of the application provides a load circuit for converting a digital signal to an analog signal, including a DC power supply, a switching signal generating circuit, a switching circuit, a storage circuit, a freewheeling circuit, and a filter capacitor.
  • the output end of the switch signal generating circuit is connected, the input end of the switch circuit is connected to the DC power supply, the output end of the switch circuit is connected to one end of the energy storage circuit and one end of the freewheeling circuit, respectively, and
  • the other end of the tank circuit is connected to the positive electrode of the filter capacitor, the negative electrode of the filter capacitor is connected to the other end of the freewheeling circuit, and the negative electrode and the positive electrode of the filter capacitor are used as output terminals of the load circuit.
  • Manner 1 The positive electrode of the filter capacitor is connected to the ground, and the negative electrode of the filter capacitor is used as the negative voltage output terminal of the load circuit;
  • Manner 2 The positive electrode of the filter capacitor is the high potential end of the load circuit, and the negative electrode of the filter capacitor is the low potential end of the load circuit.
  • FIG. 1 is a structural block diagram of a load circuit for converting digital signals to analog signals according to an embodiment of the application.
  • the on-load circuit for converting digital signals to analog signals provided by the embodiment of the present application includes a DC power supply 10, a switching signal generating circuit 20, a switching circuit 30, a tank circuit 40, a freewheeling circuit 50, and a filter capacitor 60
  • the control terminal of the switch circuit 30 is connected to the output terminal of the switch signal generating circuit 20, the input terminal of the switch circuit 30 is connected to the DC power supply 10, and the output terminal of the switch circuit 30 is connected to the storage
  • One end of the energy circuit 40 and one end of the freewheeling circuit 50 are respectively connected, the other end of the storage circuit 40 is connected to the positive electrode of the filter capacitor 60, and the connection point, the positive electrode of the filter capacitor, is connected to the ground
  • the negative electrode of the filter capacitor 60 is connected to the other end of the freewheeling circuit 50, and the negative electrode of the filter capacitor serves as the negative voltage output terminal -VEE of the load
  • the switch signal generating circuit 20 is used to generate a switch signal, and control the switch circuit 30 to be turned on or off based on the switch signal.
  • the switch circuit 30 When the switch circuit 30 is turned on, the DC power supply 10
  • the input voltage is the energy storage of the tank circuit 40.
  • the switch circuit 30 When the switch circuit 30 is turned off, the output signal of the tank circuit 40 passes through the filter capacitor 60 and the freewheeling circuit 50 and then returns to the tank.
  • the power circuit forms a stable negative voltage across the two poles of the filter capacitor 60.
  • the load circuit for converting a digital signal to an analog signal provided in the embodiment of the present application can convert a stable voltage analog signal through a digital signal, so as to achieve stable driving of a load. Moreover, the number of electrolytic capacitors used in the loaded circuit provided by the present application is reduced, and only one electrolytic capacitor is used as a filter capacitor in the entire circuit, thereby reducing the circuit volume.
  • the on-board circuit for converting digital signals to analog signals further includes a feedback voltage sampling circuit 70 on the basis of the embodiment shown in FIG. 1.
  • the feedback voltage sampling circuit 70 divides the negative voltage output by the load circuit and VCC, and is used to sample the output voltage of the load circuit and feed back the sampled voltage to the switching signal generating circuit 20 , So that the switching signal generating circuit 20 adjusts the output switching signal according to the sampling voltage.
  • the energy storage circuit 40 is used for re-discharge, and the generated voltage is sampled and fed back to the switching signal generating circuit 20, so that when the output voltage analog signal is loaded, the switching signal generating circuit can be fed back to control the output The parameters of the switching signal are adjusted to stabilize the output voltage.
  • FIG. 3 is a circuit schematic diagram of a load circuit for converting digital signals to analog signals according to an embodiment of the application.
  • the filter capacitor 60 is realized by an electrolytic capacitor C1
  • the power supply of the DC power supply 10 and the switching signal generating circuit 20 are realized by the power supply VCC.
  • the energy storage circuit is implemented by an energy storage inductor L1
  • the freewheeling circuit 50 is implemented by a diode D1
  • the cathode of the diode D1 is connected to the output terminal of the switch circuit 30, and the anode of the diode D1 is connected to the filter capacitor C1's negative connection.
  • the switch circuit 30 includes a first resistor R1 and a switch tube Q1; the control terminal of the switch tube Q1 is connected to the output terminal of the switch signal generating circuit 20 through the first resistor R1, and the switch tube Q1
  • the input terminal is connected to the DC power supply VCC, and the output terminal of the switch tube Q1 is respectively connected to one end of the energy storage inductor L1 and the cathode of the diode D1.
  • the switching tube Q1 is implemented by a triode, wherein the base electrode of the triode is connected to the output end of the switching signal generating circuit 20, the transmitter stage of the triode is the input end, which is connected to the DC power supply VCC, and the collector of the triode It is the output terminal, which is connected to one end of the energy storage inductor L1 and the cathode of the diode D1.
  • the switch tube in this embodiment can be implemented by a triode or a MOS tube (ie, a metal oxide semiconductor field effect transistor). Further, the type of the switch tube can be selected according to the circuit design requirements, such as NPN or PNP type.
  • the switch circuit 30 further includes a second resistor R2, which is connected between the control terminal (ie the base of the triode) and the input end (ie the transmitter of the triode) of the switch Q1.
  • one end of the energy storage inductor L1 is connected to the output end of the switching tube Q1 (ie, the collector of the triode), and the other end of the energy storage inductor L1 is connected to the positive electrode of the filter capacitor C1.
  • the transistor Q1 When the switching signal generated by the switching signal generating circuit 20 is at a low level, the transistor Q1 is turned on, and VCC passes through the transistor and passes through the energy storage inductor L1 to the ground, and stores energy for the inductor L1.
  • the transistor Q1 When the switch signal generated by the switch signal generating circuit 20 is at a high level, the transistor Q1 is turned off. The energy in the energy storage inductor L1 begins to release, and the current cannot change suddenly and continues to flow in the original direction. The flow direction is counterclockwise: from the energy storage inductor L1 to the electrolytic capacitor C1 and then flows back to the energy storage inductor L1 after passing through the diode D1.
  • the circuit can convert the digital signal into a negative voltage analog signal.
  • the negative voltage generated by the load circuit is a stable DC voltage, so it is regarded as the conversion of the digital signal of the front end, because the output value corresponding to different switching signals is different, so that the digital signal to the analog signal is realized Conversion.
  • the feedback voltage sampling circuit 70 includes a third resistor R3, a fourth resistor R4, and a sampling output terminal AD-Check for connecting to the switch signal generating circuit 20; one end of the third resistor R3 is connected to The DC power supply VCC is connected, the other end of the third resistor R3 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the negative voltage output terminal -VEE of the load circuit
  • the sampling output terminal AD-Check is connected between the third resistor R3 and the fourth resistor R4 to feed back the sampling voltage to the switching signal generating circuit 20.
  • this application uses a feedback voltage sampling circuit to divide the negative voltage and VCC, and feed the divided voltage back to the switching signal generating circuit, so that the switching signal generating circuit can use the feedback voltage value Adjust the output of the switch signal.
  • FIG. 4 is a structural block diagram of another on-board circuit for converting digital signals to analog signals according to an embodiment of the application.
  • the on-load circuit for converting digital signals to analog signals provided by the embodiments of the present application includes a DC power supply 10, a switching signal generating circuit 20, a switching circuit 30, a tank circuit 40, a freewheeling circuit 50, and a filter capacitor 60
  • the control terminal of the switch circuit 30 is connected to the output terminal of the switch signal generating circuit 20, the input terminal of the switch circuit 30 is connected to the DC power supply 10, and the output terminal of the switch circuit 30 is connected to one end of the energy storage circuit 40,
  • One end of the freewheeling circuit 50 is respectively connected, and the other end of the energy storage circuit 40 is connected to the positive electrode of the filter capacitor 60.
  • the positive electrode of the filter capacitor 60 serves as the high potential terminal VDD of the load circuit.
  • the other end of the freewheeling circuit 50 is connected, and the negative electrode of the filter capacitor 60 is the low potential end of the load circuit.
  • the switching signal generating circuit 20 is used to generate a switching signal, and control the switching circuit 30 to be turned on or off based on the switching signal.
  • the switching circuit 30 When the switching circuit 30 is turned on, the input voltage of the DC power supply 10 is The energy storage circuit 40 stores energy.
  • the switch circuit 30 When the switch circuit 30 is turned off, the output signal of the energy storage circuit 40 passes through the filter capacitor 60 and the freewheeling circuit 50 and then returns to the energy storage circuit 40 , And then a stable voltage is formed on both sides of the filter capacitor 60.
  • the load circuit for converting a digital signal to an analog signal provided in the embodiment of the present application can convert a stable voltage analog signal through a digital signal, so as to achieve stable driving of a load. Moreover, the number of electrolytic capacitors used in the loaded circuit provided by the present application is reduced, and only one electrolytic capacitor is used as a filter capacitor in the entire circuit, thereby reducing the circuit volume.
  • FIG. 5 is a structural block diagram of another on-board circuit for converting digital signals to analog signals according to an embodiment of the application.
  • the on-board circuit for converting digital signals to analog signals further includes a feedback voltage sampling circuit 70 on the basis of the embodiment shown in FIG.
  • the feedback voltage sampling circuit 70 is connected in parallel with the filter capacitor 60 for sampling the output voltage of the load circuit, and feeding back the sampled voltage to the switching signal generating circuit 20 for the switching signal generation
  • the circuit 20 adjusts the output switching signal according to the sampling voltage.
  • the energy storage circuit 40 is used for re-discharge, and the generated voltage is sampled and fed back to the switching signal generation circuit 20, so that when the output voltage analog signal is loaded, the feedback can be used to control the output of the switching signal generation circuit.
  • the switching signal is adjusted to stabilize the output voltage.
  • FIG. 6 is a circuit schematic diagram of another on-board circuit for converting digital signals to analog signals according to an embodiment of the application.
  • the filter capacitor 60 is implemented by an electrolytic capacitor C1
  • the power supply of the DC power supply 10 and the switching signal generating circuit 20 is implemented by the power supply VCC.
  • the energy storage circuit is implemented by an energy storage inductor L1
  • the freewheeling circuit 50 is implemented by a diode D1
  • the cathode of the diode D1 is connected to the output terminal of the switch circuit 30, and the anode of the diode D1 is connected to the filter capacitor C1. Negative connection.
  • the switch circuit 30 includes a first resistor R1 and a switch tube Q1.
  • the control terminal of the switch tube Q1 is connected to the output terminal of the switch signal generating circuit 20 through the first resistor R1.
  • the input terminal is connected to the DC power supply VCC, and the output terminal of the switch tube Q1 is respectively connected to one end of the energy storage inductor L1 and the cathode of the diode D1.
  • the switching tube Q1 is implemented by a triode, wherein the base electrode of the triode is connected to the output end of the switching signal generating circuit 20, the transmitter stage of the triode is the input end, which is connected to the DC power supply VCC, and the collector of the triode It is the output terminal, which is connected to one end of the energy storage inductor L1 and the cathode of the diode D1.
  • the switch tube in this embodiment can be implemented by a triode or a MOS tube (ie, a metal oxide semiconductor field effect transistor). Further, the type of the switch tube can be selected according to the circuit design requirements, such as NPN or PNP type.
  • the switch circuit 30 further includes a second resistor R2, which is connected between the control terminal (ie the base of the triode) and the input end (ie the transmitter of the triode) of the switch Q1.
  • one end of the energy storage inductor L1 is connected to the output end of the switching tube Q1 (ie, the collector of the triode), and the other end of the energy storage inductor L1 is connected to the positive electrode of the filter capacitor C1.
  • the transistor Q1 When the switching signal generated by the switching signal generating circuit 20 is at a low level, the transistor Q1 is turned on, and VCC passes through the transistor and passes through the energy storage inductor L1 to the electrolytic capacitor C1 and then to the ground to store energy for the energy storage inductor L1.
  • the transistor Q1 When the switch signal generated by the switch signal generating circuit 20 is at a high level, the transistor Q1 is turned off. The energy in the energy storage inductor L1 begins to be released, and the current cannot change suddenly, and continues to flow in the original direction. The flow direction is clockwise: from the energy storage inductor L1 to the electrolytic capacitor C1 and then flows back to the energy storage inductor L1 after passing through the diode D1.
  • the voltage across the electrolytic capacitor C1 is a positive voltage, that is, the circuit can convert a digital signal into a positive voltage analog signal.
  • the positive voltage generated by the load circuit is a stable DC voltage, so it is regarded as the conversion of the digital signal of the front end, because the output value corresponding to different switching signals is different, so that the digital signal versus the analog signal is realized Conversion.
  • the feedback voltage sampling circuit 70 includes a third resistor R3, a fourth resistor R4, and a sampling output terminal AD-Check for connecting to the switch signal generating circuit 20.
  • the third resistor R3 and the fourth resistor R4 are connected in series. After being connected in parallel with the filter capacitor C1, the sampling output terminal AD-Check is connected between the third resistor R3 and the fourth resistor R4 to feed back the sampling voltage to the switching signal generating circuit 20.
  • the present application divides the generated voltage through the third resistor R3 and the fourth resistor R4, and feeds the divided voltage back to the switching signal generating circuit for the switching signal generating circuit according to the feedback
  • the voltage value is used to adjust the switching signal.
  • the switching signal generation circuit in the embodiment of the present application is used to generate high-frequency switching signals. It can be a PWM signal generation circuit, a triangle wave generation circuit, or a chip I/O port directly flipped and generated. This is not specifically limited.
  • an embodiment of the present application also provides a power supply structure.
  • the power supply structure includes the load circuit for converting digital signals to analog signals as described in any of the above embodiments.
  • an embodiment of the present application also provides a household electrical appliance, which includes the power supply structure described in any of the foregoing embodiments.
  • the load circuit and power supply structure for converting digital signals to analog signals provided by the embodiments of the present application can convert stable voltage analog signals through digital signals, and realize stable driving of loads. Moreover, the number of electrolytic capacitors used in the loaded circuit provided by the present application is reduced, thereby reducing the circuit volume.
  • the output voltage of the present application is not limited by the input voltage of the DC power supply, and can output a voltage signal greater than the input voltage.
  • the switch signal generated by the switch signal generating circuit is used to control the on or off of the switch circuit, when the switch circuit is on
  • the input voltage of the DC power supply is used to store energy for the energy storage circuit
  • the switch circuit is turned off, the output signal of the energy storage circuit returns to the energy storage circuit after passing through the filter capacitor and the freewheeling circuit, so that a stable digital signal can be converted into Voltage analog signal to achieve stable driving load.

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Abstract

一种数字信号转换模拟信号的带载电路及电源结构,该带载电路中开关电路(30)的控制端与开关信号产生电路(20)的输出端相连,开关电路(30)的输入端与直流电源(10)连接,开关电路(30)的输出端与储能电路(40)的一端、续流电路(50)的一端分别连接,储能电路(40)的另一端与滤波电容(60)的正极相连,滤波电容(60)的负极和续流电路(50)的另一端连接,滤波电容(60)的负极和正极作为带载电路的输出端;开关信号产生电路(20)产生的开关信号用于控制开关电路(30)的导通或关断,当开关电路(30)导通时,直流电源(10)的输入电压为储能电路(40)进行储能,当开关电路(30)关断时,储能电路(40)的输出信号通过滤波电容(60)和续流电路(50)后返回储能电路(40)。

Description

数字信号转换模拟信号的带载电路及电源结构
本申请要求于2019年06月12日提交至中国国家知识产权局、申请号为201910504421.0、发明名称为“数字信号转换模拟信号的带载电路及电源结构”的专利申请的优先权。
技术领域
本申请涉及电源技术领域,尤其涉及一种数字信号转换模拟信号的带载电路及电源结构。
背景技术
目前,数字信号转换模拟信号的带载电路主要是利用两个三极管轮流开通与关断,当开通时给初级电容充电,关断时初级电容给次级电容充电,进而实现负压的产生。
在实现本发明过程中,发明人发现现有的实现方式至少具有以下缺陷:
现有带载电路的技术方案,虽然能够实现负压的产生,但是该电压带载能力不足,而且电路实现需要用到两个电解电容,电解电容的体积相对很大,导致电路体积过大。
发明内容
本申请至少部分实施例提出了一种数字信号转换模拟信号的带载电路及电源结构,以解决现有数字信号转换模拟信号的带载电路所产生的电压带载能力不足,电路体积过大的问题。
本申请其中一实施例提供了一种数字信号转换模拟信号的带载电路,包括直流电源、开关信号产生电路、开关电路、储能电路、续流电路和滤波电容,所述开关电路的控制端与所述开关信号产生电路的输出端相连,所述开关电路的输入端与所述直流电源连接,所述开关电路的输出端与所述储能电路的一端、续流电路的一端分别连接,所述储能电路的另一端与所述滤波电容的正极相连, 所述滤波电容的负极和所述续流电路的另一端连接,所述滤波电容的负极和正极作为带载电路的输出端;
所述开关信号产生电路用于产生开关信号,基于所述开关信号控制所述开关电路的导通或关断,当所述开关电路导通时,所述直流电源的输入电压为所述储能电路进行储能,当所述开关电路关断时,所述储能电路的输出信号通过所述滤波电容和所述续流电路后返回所述储能电路。
在本公开的一个可选实施例中,所述续流电路采用二极管实现,所述二极管的负极与所述开关电路的输出端连接,所述二极管的正极与所述滤波电容的负极连接。
在本公开的一个可选实施例中,所述开关电路包括第一电阻和开关管;
所述开关管的控制端通过所述第一电阻与所述开关信号产生电路的输出端连接,所述开关管的输入端与所述直流电源连接,所述开关管的输出端分别与所述储能电路的一端、所述二极管的负极连接。
在本公开的一个可选实施例中,所述开关管为三极管或mos管。
在本公开的一个可选实施例中,所述开关电路还包括第二电阻;
所述第二电阻连接在所述开关管的控制端与输入端之间。
在本公开的一个可选实施例中,所述储能电路采用储能电感实现,所述储能电感的一端与所述开关电路的输出端连接,所述储能电感的另一端与所述滤波电容的正极相连。
在本公开的一个可选实施例中,所述数字信号转换模拟信号的带载电路还包括反馈电压采样电路:
所述反馈电压采样电路,用于对所述带载电路的输出电压进行采样,并将采样电压反馈到所述开关信号产生电路,以供所述开关信号产生电路根据所述采样电压对输出的开关信号进行调整。
在本公开的一个可选实施例中,所述滤波电容的正极与地线连接,所述滤波电容的负极作为带载电路的负压输出端;
所述反馈电压采样电路包括第三电阻、第四电阻和用于连接开关信号产生电路的采样输出端;
所述第三电阻的一端与所述直流电源连接,所述第三电阻的另一端与所述第四电阻的一端连接,所述第四电阻的另一端与所述带载电路的负压输出端连接,所述采样输出端连接在所述第三电阻和第四电阻之间。
在本公开的一个可选实施例中,所述滤波电容的正极为带载电路的高电位端,所述滤波电容的负极为带载电路的低电位端;
所述反馈电压采样电路包括第三电阻、第四电阻和用于连接开关信号产生电路的采样输出端;
所述第三电阻和第四电阻串接后与所述滤波电容并联,所述采样输出端连接在所述第三电阻和第四电阻之间。
本申请另一实施例还提供了一种电源结构,所述电源结构包括如上所述的数字信号转换模拟信号的带载电路。
本申请另一实施例还提供了一种家电设备,所述家电设备包括如上所述的电源结构。
本申请另一实施例提供的数字信号转换模拟信号的带载电路及电源结构,能够通过数字信号转换出稳定的电压模拟信号,实现稳定带动负载。而且,本申请提供的带载电路中减少了电解电容的使用数量,进而减小电路体积。
上述说明仅是本申请技术方案的概述,为了能够更清楚了解本申请的技术手段,而可依照说明书的内容予以实施,并且为了让本申请的上述和其它目的、特征和优点能够更明显易懂,以下特举本申请的具体实施方式。
附图说明
通过阅读下文优选实施方式的详细描述,各种其他的优点和益处对于本领域普通技术人员将变得清楚明了。附图仅用于示出优选实施方式的目的,而并不认为是对本申请的限制。而且在整个附图中,用相同的参考符号表示相同的部件。在附图中:
图1为本申请第一实施例提供的一种数字信号转换模拟信号的带载电路的结构框图;
图2为本申请第一实施例提供的另一种数字信号转换模拟信号的带载电路 的结构框图;
图3为本申请第一实施例提供的一种数字信号转换模拟信号的带载电路的电路原理图;
图4为本申请第二实施例提供的另一种数字信号转换模拟信号的带载电路的结构框图;
图5为本申请第二实施例提供的另一种数字信号转换模拟信号的带载电路的结构框图;
图6为本申请第二实施例提供的另一种数字信号转换模拟信号的带载电路的电路原理图。
具体实施方式
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例,然而应当理解,可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反,提供这些实施例是为了能够更透彻地理解本公开,并且能够将本公开的范围完整的传达给本领域的技术人员。
本技术领域技术人员可以理解,除非另外定义,这里使用的所有术语(包括技术术语和科学术语),具有与本申请所属领域中的普通技术人员的一般理解相同的意义。还应该理解的是,诸如通用字典中定义的那些术语,应该被理解为具有与现有技术的上下文中的意义一致的意义,并且除非被特定定义,否则不会用理想化或过于正式的含义来解释。
本申请实施例提供了一种数字信号转换模拟信号的带载电路,包括直流电源、开关信号产生电路、开关电路、储能电路、续流电路和滤波电容,所述开关电路的控制端与所述开关信号产生电路的输出端相连,所述开关电路的输入端与所述直流电源连接,所述开关电路的输出端与所述储能电路的一端、续流电路的一端分别连接,所述储能电路的另一端与所述滤波电容的正极相连,所述滤波电容的负极和所述续流电路的另一端连接,所述滤波电容的负极和正极作为带载电路的输出端。
下面分别对带载电路中滤波电容的两种连接方式进行解释说明:
方式一:所述滤波电容的正极与地线连接,所述滤波电容的负极作为带载电路的负压输出端;
方式二:所述滤波电容的正极为带载电路的高电位端,所述滤波电容的负极为带载电路的低电位端。
图1为本申请实施例提供的一种数字信号转换模拟信号的带载电路的结构框图。如图1所示,本申请实施例提供的数字信号转换模拟信号的带载电路,包括直流电源10、开关信号产生电路20、开关电路30、储能电路40、续流电路50和滤波电容60,所述开关电路30的控制端与所述开关信号产生电路20的输出端相连,所述开关电路30的输入端与所述直流电源10连接,所述开关电路30的输出端与所述储能电路40的一端、续流电路50的一端分别连接,所述储能电路40的另一端与所述滤波电容60的正极相连,并将该连接点即所述滤波电容的正极与地线连接,所述滤波电容60的负极和所述续流电路50的另一端连接,所述滤波电容的负极作为带载电路的负压输出端-VEE。其中,所述开关信号产生电路20用于产生开关信号,并基于所述开关信号控制所述开关电路30的导通或关断,当所述开关电路30导通时,所述直流电源10的输入电压为所述储能电路40进行储能,当所述开关电路30关断时,所述储能电路40的输出信号通过所述滤波电容60和所述续流电路50后返回所述储能电路,进而在滤波电容60的两极形成稳定的负电压。
本申请实施例提供的数字信号转换模拟信号的带载电路,能够通过数字信号转换出稳定的电压模拟信号,实现稳定带动负载。而且,本申请提供的带载电路中减少了电解电容的使用数量,整个电路中仅使用1个电解电容作为滤波电容,进而减小电路体积。
图2为本申请实施例提供的另一种数字信号转换模拟信号的带载电路的结构框图。如图2所示,所述数字信号转换模拟信号的带载电路在如图1所示实施例的基础上还包括反馈电压采样电路70:
所述反馈电压采样电路70,将带载电路输出的负压与VCC进行分压处理,用于对所述带载电路的输出电压进行采样,并将采样电压反馈到所述开关信号产生电路20,以供所述开关信号产生电路20根据所述采样电压对输出的开关 信号进行调整。
本申请实施例,利用储能电路40进行重放电,并将产生的电压进行采样后反馈至开关信号产生电路20,使得输出的电压模拟信号带负载时能够通过反馈来控制开关信号产生电路对输出的开关信号的参数进行调整,以稳定输出电压。
图3为本申请实施例提供的一种数字信号转换模拟信号的带载电路的电路原理图。如图3所示,本申请实施例提供的数字信号转换模拟信号的带载电路中,所述滤波电容60采用电解电容C1实现,直流电源10和开关信号产生电路20的供电均采用电源VCC实现,所述储能电路采用储能电感L1实现,续流电路50采用二极管D1实现,所述二极管D1的负极与所述开关电路30的输出端连接,所述二极管D1的正极与所述滤波电容C1的负极连接。
本实施例中,开关电路30包括第一电阻R1和开关管Q1;开关管Q1的控制端通过所述第一电阻R1与所述开关信号产生电路20的输出端连接,所述开关管Q1的输入端与所述直流电源VCC连接,所述开关管Q1的输出端分别与储能电感L1的一端、二极管D1的负极连接。本实施例中,开关管Q1采用三极管实现,其中,三极管的基极为控制端,与开关信号产生电路20的输出端连接,三极管的发射级为输入端,与直流电源VCC连接,三极管的集电极为输出端,与储能电感L1的一端、二极管D1的负极连接。
需要说明的是,本实施例中的开关管可以采用三极管或mos管(即金属氧化物半导体场效应晶体管)实现。进一步地,可根据电路设计需求选取开关管的类型,例如NPN或PNP型。
进一步地,所述开关电路30还包括第二电阻R2,第二电阻R2连接在所述开关管Q1的控制端(即三极管的基极)与输入端(即三极管的发射级)之间。
本实施例中,储能电感L1的一端与开关管Q1的输出端(即三极管的集电极)连接,所述储能电感L1的另一端与所述滤波电容C1的正极相连。
本申请实施例提供的数字信号转换模拟信号的带载电路的实现原理如下:
开关信号产生电路20产生的开关信号为低电平时,三极管Q1打开,VCC通过三极管后经过储能电感L1到地,给电感L1储能。
开关信号产生电路20产生的开关信号为高电平时,三极管Q1关断。储能电感L1中的能量开始释放,电流不能突变,沿着原来的方向继续流动,流动方向是逆时针:从储能电感L1到电解电容C1再经过二极管D1后流回储能电感L1。
由于电流是从电解电容C1接信号地的一端(正极),流向电解电容C1的另一端(负极),所以电解电容C1接地端的电压会高于另一端。因此参考信号地,电解电容C1另一端为负压,即电路可以将数字信号转换成负压模拟信号。该带载电路产生的负压是一个稳定的直流电压,所以视为是前端的数字信号的转换,因为不同的开关信号对应的输出值是不一样的,这样就实现了数字信号对模拟信号的转换。
本实施例中,反馈电压采样电路70包括第三电阻R3、第四电阻R4和用于连接开关信号产生电路20的采样输出端AD-校验(AD-Check);第三电阻R3的一端与所述直流电源VCC连接,所述第三电阻R3的另一端与所述第四电阻R4的一端连接,所述第四电阻R4的另一端与所述带载电路的负压输出端-VEE连接,所述采样输出端AD-Check连接在所述第三电阻R3和第四电阻R4之间,以将采样电压反馈到所述开关信号产生电路20。
为了稳定转化后的负压,本申请通过反馈电压采样电路,将负压与VCC进行分压处理,将分得的电压反馈至开关信号产生电路,以供开关信号产生电路根据反馈的电压值来调整开关信号的输出。
图4为本申请实施例提供的另一种数字信号转换模拟信号的带载电路的结构框图。如图4所示,本申请实施例提供的数字信号转换模拟信号的带载电路,包括直流电源10、开关信号产生电路20、开关电路30、储能电路40、续流电路50和滤波电容60,开关电路30的控制端与所述开关信号产生电路20的输出端相连,开关电路30的输入端与所述直流电源10连接,开关电路30的输出端与所述储能电路40的一端、续流电路50的一端分别连接,储能电路40的另一端与滤波电容60的正极相连,所述滤波电容60的正极作为带载电路的高电位端VDD,所述滤波电容60的负极和所述续流电路50的另一端连接,所述滤波电容60的负极为带载电路的低电位端。
其中,开关信号产生电路20用于产生开关信号,基于所述开关信号控制所述开关电路30的导通或关断,当所述开关电路30导通时,所述直流电源10的输入电压为所述储能电路40进行储能,当所述开关电路30关断时,所述储能电路40的输出信号通过所述滤波电容60和所述续流电路50后返回所述储能电路40,进而在滤波电容60的两侧形成稳定的电压。
本申请实施例提供的数字信号转换模拟信号的带载电路,能够通过数字信号转换出稳定的电压模拟信号,实现稳定带动负载。而且,本申请提供的带载电路中减少了电解电容的使用数量,整个电路中仅使用1个电解电容作为滤波电容,进而减小电路体积。
图5为本申请实施例提供的另一种数字信号转换模拟信号的带载电路的结构框图。如图5所示,所述数字信号转换模拟信号的带载电路在如图4所示实施例的基础上还包括反馈电压采样电路70。
其中,反馈电压采样电路70与所述滤波电容60并联,用于对所述带载电路的输出电压进行采样,并将采样电压反馈到所述开关信号产生电路20,以供所述开关信号产生电路20根据所述采样电压对输出的开关信号进行调整。本实施例,利用储能电路40进行重放电,并将产生的电压进行采样后反馈至开关信号产生电路20,使得输出的电压模拟信号带负载时能够通过反馈来控制开关信号产生电路对输出的开关信号进行调整,以稳定输出电压。
图6为本申请实施例提供的另一种数字信号转换模拟信号的带载电路的电路原理图。如图6所示,本申请实施例提供的数字信号转换模拟信号的带载电路中,滤波电容60采用电解电容C1实现,直流电源10和开关信号产生电路20的供电均采用电源VCC实现,所述储能电路采用储能电感L1实现,续流电路50采用二极管D1实现,所述二极管D1的负极与所述开关电路30的输出端连接,所述二极管D1的正极与所述滤波电容C1的负极连接。
本实施例中,开关电路30包括第一电阻R1和开关管Q1,开关管Q1的控制端通过所述第一电阻R1与所述开关信号产生电路20的输出端连接,所述开关管Q1的输入端与所述直流电源VCC连接,所述开关管Q1的输出端分别与储能电感L1的一端、二极管D1的负极连接。本实施例中,开关管Q1采用三极 管实现,其中,三极管的基极为控制端,与开关信号产生电路20的输出端连接,三极管的发射级为输入端,与直流电源VCC连接,三极管的集电极为输出端,与储能电感L1的一端、二极管D1的负极连接。
需要说明的是,本实施例中的开关管可以采用三极管或mos管(即金属氧化物半导体场效应晶体管)实现。进一步地,可根据电路设计需求选取开关管的类型,例如NPN或PNP型。
进一步地,所述开关电路30还包括第二电阻R2,第二电阻R2连接在所述开关管Q1的控制端(即三极管的基极)与输入端(即三极管的发射级)之间。
本实施例中,储能电感L1的一端与开关管Q1的输出端(即三极管的集电极)连接,储能电感L1的另一端与所述滤波电容C1的正极相连。
本申请实施例提供的数字信号转换模拟信号的带载电路的实现原理如下:
开关信号产生电路20产生的开关信号为低电平时,三极管Q1打开,VCC通过三极管后经过储能电感L1到电解电容C1然后到地,给储能电感L1储能。
开关信号产生电路20产生的开关信号为高电平时,三极管Q1关断。储能电感L1中的能量开始释放,电流不能突变,沿着原来的方向继续流动,流动方向是顺时针:从储能电感L1到电解电容C1再经过二极管D1后流回储能电感L1。
由于电流是从电解电容C1正极流向电容的负极,且电解电容C1负极与接地,因此电解电容C1两端的电压为正压,即电路可以将数字信号转换成正压模拟信号。该带载电路产生的正压是一个稳定的直流电压,所以视为是前端的数字信号的转换,因为不同的开关信号对应的输出值是不一样的,这样就实现了数字信号对模拟信号的转换。
本申请实施例中,反馈电压采样电路70包括第三电阻R3、第四电阻R4和用于连接开关信号产生电路20的采样输出端AD-Check,所述第三电阻R3和第四电阻R4串接后与所述滤波电容C1并联,所述采样输出端AD-Check连接在所述第三电阻R3和第四电阻R4之间,以将采样电压反馈到所述开关信号产生电路20。
为了稳定转化后的电压,本申请通过第三电阻R3和第四电阻R4,将产生 的电压进行分压处理,将分得的电压反馈至开关信号产生电路,以供开关信号产生电路根据反馈的电压值来调整开关信号。
需要说明的是,本申请实施例中的开关信号产生电路,用于产生高频开关信号,可以为PWM信号产生电路、三角波产生电路,或是采用芯片I/O口直接翻转生成,本申请对此不做具体限定。
此外,本申请实施例还提供了一种电源结构,所述电源结构包括如上任一实施例所述的数字信号转换模拟信号的带载电路。
此外,本申请实施例还提供了一种家电设备,所述家电设备包括如上任一实施例所述的电源结构。
本申请实施例提供的数字信号转换模拟信号的带载电路及电源结构,能够通过数字信号转换出稳定的电压模拟信号,实现稳定带动负载。而且,本申请提供的带载电路中减少了电解电容的使用数量,进而减小电路体积。
进一步地,相对于现有采用两个电解电容实现的带载电路,本申请的输出电压不受直流电源输入电压的限制,可以输出大于输入电压的电压信号。
本申请的说明书中,说明了大量具体细节。然而,能够理解,本申请的实施例可以在没有这些具体细节的情况下实践。在一些实例中,并未详细示出公知的方法、结构和技术,以便不模糊对本说明书的理解。
此外,本领域的技术人员能够理解,尽管在此所述的一些实施例包括其它实施例中所包括的某些特征而不是其它特征,但是不同实施例的特征的组合意味着处于本申请的范围之内并且形成不同的实施例。例如,在下面的权利要求书中,所要求保护的实施例的任意之一都可以以任意的组合方式来使用。
最后应说明的是:以上各实施例仅用以说明本申请的技术方案,而非对其限制;尽管参照前述各实施例对本申请进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本申请各实施例技术方案的范围,其均应涵盖在本申请的权利要求和说明书的范围当中。
工业实用性
如上所述,本申请至少部分实施例提供的数字信号转换模拟信号的带载电路及电源结构,通开关信号产生电路产生的开关信号来控制开关电路的导通或关断,当开关电路导通时,直流电源的输入电压为储能电路进行储能,当开关电路关断时,储能电路的输出信号通过滤波电容和续流电路后返回储能电路,从而能够通过数字信号转换出稳定的电压模拟信号,实现稳定带动负载。

Claims (14)

  1. 一种数字信号转换模拟信号的带载电路,包括直流电源、开关信号产生电路、开关电路、储能电路、续流电路和滤波电容,所述开关电路的控制端与所述开关信号产生电路的输出端相连,所述开关电路的输入端与所述直流电源连接,所述开关电路的输出端与所述储能电路的一端、续流电路的一端分别连接,所述储能电路的另一端与所述滤波电容的正极相连,所述滤波电容的负极和所述续流电路的另一端连接,所述滤波电容的负极和正极作为带载电路的输出端;
    所述开关信号产生电路用于产生开关信号,基于所述开关信号控制所述开关电路的导通或关断,当所述开关电路导通时,所述直流电源的输入电压为所述储能电路进行储能,当所述开关电路关断时,所述储能电路的输出信号通过所述滤波电容和所述续流电路后返回所述储能电路。
  2. 如权利要求1所述的数字信号转换模拟信号的带载电路,其中,所述续流电路采用二极管实现,所述二极管的负极与所述开关电路的输出端连接,所述二极管的正极与所述滤波电容的负极连接。
  3. 如权利要求2所述的数字信号转换模拟信号的带载电路,其中,所述开关电路包括第一电阻和开关管;
    所述开关管的控制端通过所述第一电阻与所述开关信号产生电路的输出端连接,所述开关管的输入端与所述直流电源连接,所述开关管的输出端分别与所述储能电路的一端、所述二极管的负极连接。
  4. 如权利要求3所述的数字信号转换模拟信号的带载电路,其中,所述开关管为三极管或mos管。
  5. 如权利要求3所述的数字信号转换模拟信号的带载电路,其中,所述开关电路还包括第二电阻;
    所述第二电阻连接在所述开关管的控制端与输入端之间。
  6. 如权利要求1所述的数字信号转换模拟信号的带载电路,其中,所述储能电路采用储能电感实现,所述储能电感的一端与所述开关电路的输出端连接,所述储能电感的另一端与所述滤波电容的正极相连。
  7. 如权利要求1-6任一项所述的数字信号转换模拟信号的带载电路,其中,所述数字信号转换模拟信号的带载电路还包括反馈电压采样电路;
    所述反馈电压采样电路,用于对所述带载电路的输出电压进行采样,并将采样电压反馈到所述开关信号产生电路,以供所述开关信号产生电路根据所述采样电压对输出的开关信号进行调整。
  8. 如权利要求7所述的数字信号转换模拟信号的带载电路,其中,所述滤波电容的正极与地线连接,所述滤波电容的负极作为带载电路的负压输出端;
    所述反馈电压采样电路包括第三电阻、第四电阻和用于连接开关信号产生电路的采样输出端;
    所述第三电阻的一端与所述直流电源连接,所述第三电阻的另一端与所述第四电阻的一端连接,所述第四电阻的另一端与所述带载电路的负压输出端连接,所述采样输出端连接在所述第三电阻和第四电阻之间。
  9. 如权利要求7所述的数字信号转换模拟信号的带载电路,其中,所述滤波电容的正极为带载电路的高电位端,所述滤波电容的负极为带载电路的低电位端;
    所述反馈电压采样电路包括第三电阻、第四电阻和用于连接开关信号产生电路的采样输出端;
    所述第三电阻和第四电阻串接后与所述滤波电容并联,所述采样输出端连接在所述第三电阻和第四电阻之间。
  10. 如权利要求1所述的数字信号转换模拟信号的带载电路,其中,在所述储能电路的输出信号通过所述滤波电容和所述续流电路后返回所述储能电路后,在所述滤波电容的两极形成稳定的负电压。
  11. 如权利要求7所述的数字信号转换模拟信号的带载电路,其中,所述反馈电压采样电路用于将所述带载电路输出的负压与所述直流电源进行分压处理,以对所述带载电路的输出电压进行采样。
  12. 一种电源结构,包括如权利要求1-11任一项所述的数字信号转换模拟信号的带载电路。
  13. 一种家电设备,包括如权利要求12所述的电源结构。
  14. 一种数字信号转换模拟信号的带载电路,包括:
    直流电源、PWM信号源、开关电路、储能电路、续流电路和滤波电容;其中
    所述开关电路的控制端与所述PWM信号源相连,所述开关电路的输入端与所述直流电源连接,所述开关电路的输出端与所述储能电路的第一端、续流电路的第一端分别连接,所述储能电路的第一端与所述滤波电容的正极相连,所述滤波电容的负极和所述续流电路的第二端连接,所述滤波电容的负极和正极作为带载电路的输出端;
    所述PWM信号源用于产生开关信号,基于所述开关信号控制所述开关电路的导通或关断,当所述开关电路导通时,所述直流电源的输入电压为所述储能电路进行储能,当所述开关电路关断时,所述储能电路的输出信号通过所述滤波电容和所述续流电路后返回所述储能电路。
PCT/CN2019/127166 2019-06-12 2019-12-20 数字信号转换模拟信号的带载电路及电源结构 WO2020248570A1 (zh)

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