WO2020155288A1 - 升降压电路及控制方法 - Google Patents

升降压电路及控制方法 Download PDF

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Publication number
WO2020155288A1
WO2020155288A1 PCT/CN2019/077012 CN2019077012W WO2020155288A1 WO 2020155288 A1 WO2020155288 A1 WO 2020155288A1 CN 2019077012 W CN2019077012 W CN 2019077012W WO 2020155288 A1 WO2020155288 A1 WO 2020155288A1
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Prior art keywords
switch
tar
buck
capacitor
boost circuit
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PCT/CN2019/077012
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English (en)
French (fr)
Inventor
李孟璋
王永进
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展讯通信(上海)有限公司
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Priority to US17/426,598 priority Critical patent/US11799376B2/en
Priority to EP19912311.8A priority patent/EP3920396A4/en
Publication of WO2020155288A1 publication Critical patent/WO2020155288A1/zh

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1582Buck-boost converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0025Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0095Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/1566Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation

Definitions

  • the present disclosure relates to the field of direct current conversion, in particular to a buck-boost circuit and a control method thereof.
  • a buck-boost circuit can effectively reduce system power consumption by adjusting the output voltage.
  • a circuit that can achieve fast buck-boost is needed to ensure smooth communication and help reduce system power consumption.
  • the existing buck-boost buck-boost structure takes too long to realize the buck-boost conversion time, resulting in a relatively long voltage stabilization time when adjusting the output voltage, especially when switching from the buck mode to the boost mode, the intermediate switching process is long , Resulting in the voltage stabilization time being too long to meet the requirements of system communication, resulting in reduced signal sensitivity during system application and communication failure.
  • the present disclosure proposes a buck-boost circuit and a control method thereof, which can quickly and stably realize the voltage regulation process.
  • a buck-boost circuit including a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a first inductor, a first capacitor, and a second capacitor;
  • the first terminal of the first switch is connected to the positive pole of the input power source
  • the first terminal of the second switch is connected to the positive pole of the output power source
  • the first terminal of the third switch is connected to the first terminal of the first inductor.
  • the terminal is connected to the second terminal of the first switch
  • the second terminal of the third switch is connected to the negative electrode of the input power source
  • the first terminal of the fourth switch is connected to the second terminal of the first inductor.
  • Connected to the second end of the second switch the second end of the fourth switch is connected to the negative electrode of the output power supply
  • the second capacitor is connected in parallel between the positive electrode and the negative electrode of the output power supply;
  • the fifth switch is connected between the positive pole of the input power source and the positive pole of the output power source, the first terminal of the first capacitor is connected to the positive pole of the output power source, and the second terminal is connected to the positive pole of the output power source through the switch. Connect the positive and negative terminals of the input power supply.
  • the second terminal of the first capacitor is connected to the positive electrode and the negative electrode of the input power source through the first switch and the third switch, respectively.
  • the buck-boost circuit further includes a sixth switch, and the sixth switch is connected between the positive pole of the output power source at the second end of the fifth switch.
  • the buck-boost circuit further includes a seventh switch and an eighth switch;
  • the second end of the first capacitor is connected to the positive electrode and the negative electrode of the input power source through the seventh switch and the eighth switch, respectively.
  • the buck-boost circuit further includes a ninth switch, and the ninth switch is connected between the positive electrode of the output power source and the second end of the fifth switch.
  • a method for controlling a buck-boost circuit for controlling the above-mentioned buck-boost circuit including:
  • the first operating mode includes: the first switch and the fourth switch work simultaneously, the second switch and the third switch work simultaneously, and the first switch and the second switch complement each other. through.
  • the switch By using the switch connected between the input power supply and the output power supply and the capacitor connected to the output power supply for fast charging in the initial stage of the step-up process, and using the connection between the positive and negative poles of the output power supply in the initial stage of the step-down process
  • the switch discharges, so that the difference between the output voltage and the target voltage phase can be quickly reduced to a certain range in the initial stage of boosting or bucking, which can reduce the voltage stabilization time of the buck-boost circuit when adjusting the output voltage. Realize the pressure regulation process quickly and stably.
  • Fig. 1 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • FIG. 2 shows an output voltage diagram and a switch state diagram of the step-up process of the buck-boost circuit in FIG. 1.
  • FIG. 3 shows an output voltage diagram and a switch state diagram of the step-down process of the buck-boost circuit in FIG. 1.
  • Fig. 4 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • FIG. 5 shows an output voltage diagram and a switch state diagram of the step-up process of the buck-boost circuit in FIG. 4.
  • Fig. 6 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • FIG. 7 shows an output voltage diagram and a switch state diagram of the boost process of the buck-boost circuit in FIG. 6.
  • FIG. 8 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • FIG. 9 shows an output voltage diagram and a switch state diagram of the boosting process of the buck-boost circuit in FIG. 8.
  • Fig. 1 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • the buck-boost circuit includes a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a fifth switch S5, a first inductor L, a first capacitor Cf, and a second capacitor.
  • C O the buck-boost circuit
  • the first switch S1, the second switch S2, the third switch S3, the fourth switch S4 and the first inductor L form a four-switch Buck-Boost circuit.
  • the first end of the first switch S1 is connected to the positive electrode of the input power supply V BAT
  • the first end of the second switch S2 is connected to the positive electrode of the output power supply V out .
  • the voltage value of the input power supply may be an externally provided power supply voltage value
  • the voltage value of the output power supply V out is the actual output voltage value of the buck-boost circuit.
  • the first end of the third switch S3 and the first end of the first inductor L are connected to the second end of the first switch S1, and the second end of the third switch S3 is connected to the negative electrode of the input power supply V BAT (for example, grounded).
  • the first end of the four switch S4 is connected to the second end of the first inductor L and the second end of the second switch S2, the second end of the fourth switch S4 is connected to the negative electrode of the output power supply V out (for example, grounded), and the second The capacitor C O is connected in parallel between the anode and the cathode of the output power source V out .
  • the fifth switch is connected between the positive pole of the input power source V BAT and the positive pole of the output power source V out , the first terminal of the first capacitor Cf is connected to the positive pole of the output power source V out , and the second terminal passes through the first switch S1 and the third switch respectively.
  • the switch S3 is connected to the positive and negative poles of the input power supply V BAT .
  • the actual output voltage V out of the buck-boost circuit can be obtained according to the output voltage V
  • the relationship between out and the target voltage V tar , and the relationship between the target voltage V tar and the input voltage V BAT control the working state of the switch, so as to achieve a fast and stable step-up and step-down process.
  • the initial state of each switch is in the off state by default, and switches not mentioned in the control mode are in the off state by default.
  • FIG. 2 shows the output voltage diagram and the switch state diagram of the step-down process of the buck-boost circuit in this embodiment.
  • V out ⁇ V tar - ⁇ V, and V tar ⁇ V BAT as shown in the first half of the output voltage curve in Figure 2, the actual output voltage of the circuit is smaller than the target voltage, and it needs to go through a boost process to reach the target voltage. That is, the output voltage is in a boost state.
  • ⁇ V is the set voltage difference defined according to the demand, such as 100mV, 200mV...
  • the fifth switch S5 is first closed to quickly charge the second capacitor C O connected to the buck-boost output terminal.
  • the output voltage rises rapidly.
  • the fifth switch S5 is turned off to stop fast charging, and the circuit returns to a four-switch Buck-Boost circuit.
  • the first working mode that is, the normal working mode of the four-switch Buck-Boost circuit
  • the output voltage is gradually adjusted to the target voltage V tar and a stable output V tar is maintained.
  • the first working mode includes: the first switch S1 and the fourth switch S4 work at the same time, the second switch S2 and the third switch S3 work at the same time, and the first switch S1 and the second switch S2 are turned on complementary, that is, the third switch S3 is also complementarily turned on with the fourth switch S4.
  • the circuit is essentially a boost circuit, and the actual output voltage needs to go through a boost process to reach the target voltage, that is, the output voltage is in a boost. ⁇ State.
  • First close the fifth switch S5 and the third switch S3.
  • the fifth switch S5 and the third switch S3 are opened, and the first switch S1 is closed at the same time.
  • the first capacitor Cf is used to continue to connect the second capacitor C O for fast charging.
  • the first switch S1 is turned off, and the first working mode is entered.
  • FIG. 3 shows the output voltage diagram and the switch state diagram of the step-down process of the buck-boost circuit in this embodiment.
  • V out > V tar + ⁇ V as shown in the output voltage curve in Figure 3, the actual output voltage is higher than the target voltage, and the target voltage needs to be reduced through a step-down process, that is, the output voltage is in a step-down state.
  • the second switch S2 and the fourth switch S4 between the positive and negative poles of the power supply discharge the second capacitor C O connected between the positive and negative poles of the output voltage, and the difference between the actual output voltage and the target voltage reaches the set voltage difference When ⁇ V, it enters the normal working mode of the four-switch Buck-Boost circuit, which can reduce the voltage stabilization time of the buck-boost circuit when adjusting the output voltage, and realize the voltage regulation process quickly and stably.
  • the second capacitor C O connected in parallel between the positive electrode and the negative electrode of the output power supply V out is used to filter the output voltage.
  • switches provided in the embodiments of the present disclosure may be semiconductor transistors, such as bipolar transistors, field effect transistors, or any other types of switches.
  • the control method of the buck-boost circuit can be executed by the control module.
  • the control module can be implemented in the buck-boost circuit or independent of the buck-boost circuit. It can execute the steps in the embodiments of the present disclosure according to a predetermined program or external instructions. Control method, control the switch.
  • Fig. 4 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • the buck-boost circuit compared with the buck-boost circuit in FIG. 1 further adds a sixth switch S6.
  • the sixth switch S6 is connected between the second end of the fifth switch S5 and the positive pole of the output power source.
  • circuit control method is as follows:
  • V tar - ⁇ V ⁇ V out ⁇ V tar that is, when the output voltage has a small difference from the target voltage, or when the target voltage is stably output, the sixth switch S6 is in a normally closed state (that is, a continuously open state), so The voltage change at both ends of Cf will not affect the output voltage;
  • V out > V tar that is, when the output voltage is in a step-down state
  • the sixth switch S6 is in a normally open state.
  • the sixth switch S6 is in the normally open state during the step-down process of this embodiment, it is the same as the step-down process control method of the buck-boost circuit in FIG. 1, so the output voltage diagram and switch state diagram of the step-down process are omitted 5 shows the output voltage diagram and switch state diagram of the step-up process of the buck-boost circuit, as shown in the figure, the control method of the first switch S1, the third switch S3 and the fifth switch S5 is the same as that of FIG.
  • the buck-boost circuit is the same.
  • Fig. 6 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • the buck-boost circuit compared with the buck-boost circuit in FIG. 1 adds a seventh switch S7 and an eighth switch S8, and the second end of the first capacitor Cf passes through the seventh switch S7 respectively.
  • the eighth switch S8 is connected to the positive and negative poles of the input power supply.
  • FIG. 7 shows the output voltage diagram and the switch state diagram of the boost process of the buck-boost circuit.
  • the fast charging process is completed by adding the fifth switch S5, the seventh switch S7, and the eighth switch S8, instead of using the switches in the four-switch Buck-Boost circuit.
  • FIG. 8 shows a structural diagram of a buck-boost circuit according to an embodiment of the present disclosure.
  • the buck-boost circuit compared with the buck-boost circuit in FIG. 6 also adds a ninth switch S9.
  • the ninth switch S9 is connected between the positive pole of the output power source and the second end of the fifth switch S5.
  • circuit control method is as follows:
  • the ninth switch S9 is in the normally open state during the step-down process of this embodiment, which is the same as the step-down process control method in FIG. 6, the output voltage diagram and switch state diagram of the step-down process are omitted, as shown in FIG. 9
  • the output voltage diagram and switch state diagram of the boost process of the buck-boost circuit are shown.
  • the control method of the fifth switch S5 and the seventh switch S7 is the same as that of the buck-boost circuit of FIG. 6.

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Abstract

一种升降压电路及其控制方法,在该升降压电路中,第一开关(S1)的第一端与输入电源V BAT的正极连接,第二开关(S2)的第一端与输出电源(V OUT)的正极连接,第三开关(S3)的第一端和第一电感(L)的第一端与第一开关的第二端连接,第四开关(S4)的第一端与第一电感的第二端和第二开关的第二端连接,第五开关(S5)连接在输入输出电源之间,第一电容(Cf)的第一端与输出电源的正极连接,第二端分别通过开关与输入电源的正负极连接。通过在升压过程的初始阶段利用连接在输入输出电源之间的开关以及与输出电源连接的电容进行快速充电,以及在降压过程的初始阶段利用连接在输出电源的正负极之间的开关进行放电,能够减少升降压电路在调节输出电压时电压的稳定时间,快速稳定地实现调压过程。

Description

升降压电路及控制方法 技术领域
本公开涉及直流电变换领域,尤其涉及一种升降压电路及其控制方法。
背景技术
升降压电路(buck-boost)能够通过调节输出电压的高低有效降低系统功耗。随着5G通信时代的到来,需要能实现快速升降压的电路来保障通信顺畅并协助降低系统功耗。
现有的升降压buck-boost结构在实现升降压的转换时间太长,导致在调节输出电压时电压的稳定时间比较长,尤其是从降压模式转换到升压模式,中间切换过程长,导致电压的稳定时间太长达不到系统通信要求,造成系统应用时信号敏感度降低,导致通信失败。
因此,如何能够减少升降压电路在调节电压时电压的稳定时间、快速实现调压过程成了当下亟待解决的一大问题。
发明内容
有鉴于此,本公开提出了一种升降压电路及其控制方法,能够快速稳定地实现调压过程。
根据本公开的一方面,提供了一种升降压电路,包括第一开关、第二开关、第三开关、第四开关、第五开关、第一电感、第一电容和第二电容;
所述第一开关的第一端与输入电源的正极连接,所述第二开关的第一端与输出电源的正极连接,所述第三开关的第一端和所述第一电感的第一端与所述第一开关的第二端连接,所述第三开关的第二端与所述输入电源的负极连接,所述第四开关的第一端与所述第一电感的第二端和所述第二开关的第二端连接,所述第四开关的第二端与所述输出电源的负极连接,所述第二电容并联在所述输出电源的正极和负极之间;
所述第五开关连接在所述输入电源的正极和所述输出电源的正极之间,所述第一电容的第一端与所述输出电源的正极连接,第二端分别通过开关与所述输入电源的正极和负极连接。
在一种可能的实现方式中,所述第一电容的第二端分别通过所述第一开关和所述第三开关与所述输入电源的正极和负极连接。
在一种可能的实现方式中,所述升降压电路还包括第六开关,所述第六开关连接在所述第五开关的第二端的所述输出电源的正极之间。
在一种可能的实现方式中,所述升降压电路还包括第七开关和第八开关;
所述第一电容的第二端分别通过所述第七开关和所述第八开关与所述输入电源的正极和负极连接。
在一种可能的实现方式中,所述升降压电路还包括第九开关,所述第九开关连接在所述输出电源的正极和所述第五开关的第二端之间。
根据本公开的另一方面,提供了一种升降压电路的控制方法,用于控制以上所述的升降压电路,包括:
获取所述升降压电路的输出电压V out,根据输出电压V out与目标电压V tar的关系,以及目标电压V tar与输入电压V BAT之间的关系对开关进行控制:
当V out<V tar-△V,且V tar≤V BAT时,闭合所述第五开关以对与所述升降压电路的输出端连接的第二电容进行充电,在输出电压升高至V out=V tar-△V时断开所述第五开关,进入第一工作模式,其中△V为设定电压差;
当V out<V tar-△V,且V tar>V BAT时,闭合所述第五开关以及连接在所述第一电容的第二端和所述输入电源的负极之间的开关以对所述第二电容进行充电,在输出电压升高至V out=V BAT时断开所述第五开关以及连接在所述第一电容的第二端和所述输入电源的负极之间的开关,同时闭合连接在所述第一电容的第二端和所述输入电源的正极之间的开关以通过所述第一电容对所述第二电容进行充电,并在输出电压升高至V out=V tar-△V时断开连接在所述第一电容的第二端和所述输入电源的正极之间的开关,进入所述第一工作模式;
当V out>V tar+△V时,闭合所述第二开关、所述第四开关,在输出电压下降至V out=V tar+△V时断开所述第二开关、第四开关,进入所述第一工作模式;
当V tar-△V≤V out≤V tar+△V时,进入所述第一工作模式;
所述第一工作模式包括:所述第一开关和所述第四开关同时工作,所述第二开关和所述第三开关同时工作,并且所述第一开关和所述第二开关互补导通。
在一种可能的实现方式中,当V out<V tart-△V,且V tar>V BAT时,闭合所述第五开关以及第三开关以对所述第二电容进行充电,在输出电压升高至V out=V BAT时断开第五开关以及第三开关,同时闭合第一开关以通过所述第一电容对所述第二电容进行充电,并在输出电压升高至V out=V tar-△V时断开第一开关,进入所述第一工作模式。
在一种可能的实现方式中,当V out<V tar-△V时,闭合所述第六开关,当V out=V tar-△V时,断开第六开关;
当V tar-△V≤V out≤V tar时,使所述第六开关处于常闭状态,
当V out>V tar时,使所述第六开关处于常开状态。
在一种可能的实现方式中,当V out<V tar-△V,且V tar>V BAT时,闭合所述第五开关以及第八开关以对所述第二电容进行充电,在V out=V BAT时断开第五开关以及第八开关,同时闭合第七开关以通过所述第一电容对所述第二电容进行充电,并在V out=V tar-△V时断开第七开关,进入所述第一工作模式。
在一种可能的实现方式中,当V out<V tar-△V时,闭合所述第九开关,当V out=V tar-△V时,断开所述第九开关;
当V tar-△V≤V out≤V tar时,使所述第六九开关处于常闭状态,
当V out>V tar时,使所述第九开关处于常开状态。
通过在升压过程的初始阶段利用连接在输入电源和输出电源之间的开关以及与输出电源连接的电容进行快速充电,以及在降压过程的初始阶段利用连接在输出电源的正负极之间的开关进行放电,使得在升压或降压初始阶 段能够快速将输出电压与目标电压相之间的差异缩小到一定范围之内,能够减少升降压电路在调节输出电压时电压的稳定时间,快速稳定地实现调压过程。
根据下面参考附图对示例性实施例的详细说明,本公开的其它特征及方面将变得清楚。
附图说明
包含在说明书中并且构成说明书的一部分的附图与说明书一起示出了本公开的示例性实施例、特征和方面,并且用于解释本公开的原理。
图1示出根据本公开一实施方式的升降压电路的结构图。
图2示出图1中的升降压电路升压过程的输出电压图及开关状态图。
图3示出图1中的升降压电路降压过程的输出电压图及开关状态图。
图4示出根据本公开一实施方式的升降压电路的结构图。
图5示出图4中的升降压电路升压过程的输出电压图及开关状态图。
图6示出根据本公开一实施方式的升降压电路的结构图。
图7示出图6中的升降压电路升压过程的输出电压图及开关状态图。
图8示出根据本公开一实施方式的升降压电路的结构图。
图9示出图8中的升降压电路升压过程的输出电压图及开关状态图。
具体实施方式
以下将参考附图详细说明本公开的各种示例性实施例、特征和方面。附图中相同的附图标记表示功能相同或相似的元件。尽管在附图中示出了实施例的各种方面,但是除非特别指出,不必按比例绘制附图。
在这里专用的词“示例性”意为“用作例子、实施例或说明性”。这里作为“示例性”所说明的任何实施例不必解释为优于或好于其它实施例。
另外,为了更好的说明本公开,在下文的具体实施方式中给出了众多的具体细节。本领域技术人员应当理解,没有某些具体细节,本公开同样可以 实施。在一些实例中,对于本领域技术人员熟知的方法、手段、元件和电路未作详细描述,以便于凸显本公开的主旨。
图1示出根据本公开一实施方式的升降压电路的结构图。如图1所示,该升降压电路包括第一开关S1、第二开关S2、第三开关S3、第四开关S4、第五开关S5、第一电感L、第一电容Cf和第二电容C O
第一开关S1、第二开关S2、第三开关S3、第四开关S4和第一电感L构成了四开关Buck-Boost电路。其中,第一开关S1的第一端与输入电源V BAT的正极连接,所述第二开关S2的第一端与输出电源V out的正极连接。输入电源的电压值可以是外部提供的电源电压值,输出电源V out的电压值即升降压电路实际输出电压值。第三开关S3的第一端和第一电感L的第一端与第一开关S1的第二端连接,第三开关S3的第二端与输入电源V BAT的负极连接(例如接地),第四开关S4的第一端与第一电感L的第二端和第二开关S2的第二端连接,第四开关S4的第二端与输出电源V out的负极连接(例如接地),第二电容C O并联在所述输出电源V out的正极和负极之间。
第五开关连接在输入电源V BAT的正极和输出电源V out的正极之间,第一电容Cf的第一端与输出电源V out的正极连接,第二端分别通过第一开关S1和第三开关S3与输入电源V BAT的正极和负极连接。
在实际输出的电压与目标电压相差较大,输出电压逐渐升高或降低以达到目标电压的升压或降压过程中,可以通过获取升降压电路实际的输出电压V out,根据输出电压V out与目标电压V tar的关系,以及目标电压V tar与输入电压V BAT之间的关系对开关的工作状态进行控制,实现快速稳定的升压和降压过程。其中,各个开关的初始状态默认为断开状态,在控制方式中未提及的开关默认处于断开状态。
图2示出本实施例中的升降压电路降压过程的输出电压图及开关状态图。当V out<V tar-△V,且V tar≤V BAT时,如图2中输出电压曲线的前半段所示,该电路实际输出电压比目标电压小,需要经过升压过程达到目标电压,也即输出电压处于升压状态。△V为设定电压差根据需求定义,例如100mV、 200mV……。
在初始阶段,电源电压V BAT高于输出电压,首先闭合第五开关S5以对与该升降压的输出端连接的第二电容C O快速充电。输出电压快速升高,当输出达到与目标电压还差△V时,也即V out=V tar-△V时,断开第五开关S5停止快速充电,电路恢复为四开关Buck-Boost电路,进入第一工作模式,也即四开关Buck-Boost电路的正常工作模式,输出电压逐渐调整为目标电压V tar并保持稳定输出V tar
该第一工作模式包括:第一开关S1和第四开关S4同时工作,第二开关S2和第三开关S3同时工作,并且第一开关S1和第二开关S2互补导通,也即第三开关S3也与第四开关S4互补导通。
当V tar>V BAT时,如图2中输出电压曲线的后半段所示,该电路实质上为升压电路,并且实际输出电压需要经过升压过程达到目标电压,也即输出电压处于升压状态。首先闭合第五开关S5和第三开关S3,将输出电压冲到V BAT时断开第五开关S5和第三开关S3,同时闭合第一开关S1,利用第一电容Cf继续对第二电容C O进行快速充电。当输出电压达到与目标电压还差△V时,断开第一开关S1,进入第一工作模式。
图3示出本实施例中的升降压电路降压过程的输出电压图及开关状态图。当V out>V tar+△V时,如图3中输出电压曲线所示,实际输出的电压高于目标电压,需要经过降压过程达到目标电压,也即输出电压处于降压状态。
首先闭合第二开关S2、第四开关S4以对第二电容C O进行放电,当电压降低到距离目标电压还差△V时,即V out=V tar+△V时,断开第二开关S2、第四开关S4,进入第一工作模式。
通过在升压过程的初始阶段利用与连接在输入电源和输出电源之间的第五开关S5以及与输出电源连接的第一电容Cf进行快速充电,以及在降压过程的初始阶段利用连接在输出电源的正负极之间的第二开关S2和第四开关S4对连接在输出电压正负极之间的第二电容C O进行放电,在实际的输出电压与目标电压相差达到设定电压差△V时再进入四开关Buck-Boost电路的正常 工作模式,能够减少升降压电路在调节输出电压时电压的稳定时间,快速稳定地实现调压过程。
在输出电源V out的正极和负极之间并联的第二电容C O用于对输出电压进行滤波。
需要说明的是,本公开实施例提供的各个开关可以为半导体晶体管,如双极型晶体管、场效应晶体管,或其他任意类型的开关。
升降压电路的控制方法可通过控制模块执行,控制模块可以在升降压电路中实现,也可以独立于升降压电路,可以根据预定的程序或外部指令,执行本公开各实施例中的控制方法,对开关进行控制。
图4示出根据本公开一实施方式的升降压电路的结构图。如图4所示,该升降压电路与图1中的升降压电路相比还增加了第六开关S6。第六开关S6连接在第五开关S5的第二端与输出电源的正极之间。
当第六开关S6处于常开状态(即持续导通的状态)时,升降压电路的工作状态与图1中的方案完全一致。
在本实施例中,电路的控制方法如下:
当V out<V tar-△V时,也即输出电压处于升压状态时,闭合第六开关S6,当输出电压升高到距离目标电压还差△V时,断开第六开关S6;
当V tar-△V≤V out≤V tar,也即输出电压与目标电压相差较小,或者稳定输出目标电压时,使第六开关S6处于常闭状态(即持续断开的状态),这样Cf两端电压变化不会影响到输出电压;
当V out>V tar时,也即输出电压处于降压状态时,使第六开关S6处于常开状态。
由于本实施例的降压过程中第六开关S6处于常开状态,与图1中的升降压电路的降压过程控制方法是相同的,因此省略降压过程的输出电压图及开关状态图,在图5示出了该升降压电路升压过程的输出电压图及开关状态图,如图所示,第一开关S1、第三开关S3和第五开关S5的控制方法与图1的升降压电路相同。
图6示出根据本公开一实施方式的升降压电路的结构图。如图6所示,该升降压电路与图1中的升降压电路相比,增加了第七开关S7和第八开关S8,并且第一电容Cf的第二端分别通过第七开关S7和第八开关S8与输入电源的正极和负极连接。
由于本实施例的降压过程中第七开关S7和第八开关S8处于常关状态,因此与图1中的升降压电路的降压过程控制方法是相同的,区别在于升压过程是通过控制第五开关S5、第七开关S7和第八开关S8完成的。图7示出该升降压电路升压过程的输出电压图及开关状态图。
在升压过程中,当V tar≤V BAT时,首先闭合第五开关S5以对与输出端连接的第二电容C O进行快速充电。输出电压快速升高,当输出达到与目标电压还差△V时,也即V out=V tar-△V时,断开第五开关S5停止快速充电,进入第一工作模式。该过程与图1是相同的。
当V tar>V BAT时,首先闭合第五开关S5和第八开关S8,将输出电压冲到V BAT时断开第五开关S5和第八开关S8,同时闭合第七开关S7,利用第一电容Cf继续对与输出端连接的第二电容C O进行快速充电。当输出电压达到与目标电压还差△V时,断开第七开关S7,进入第一工作模式。
在本实施例中,快速充电过程是通过增加的第五开关S5、第七开关S7和第八开关S8完成的,而没有利用四开关Buck-Boost电路中的开关。
图8示出根据本公开一实施方式的升降压电路的结构图。如图8所示,该升降压电路与图6中的升降压电路相比还增加了第九开关S9。第九开关S9连接在输出电源的正极与第五开关S5的第二端之间。
当第九开关S9处于常开状态时,升降压电路的也即工作状态与图6中的方案完全一致。
在本实施例中,电路的控制方法如下:
当V out<V tar-△V时,也即输出电压处于升压状态时,闭合第九开关S9,当输出电压升高到距离目标电压还差△V时,断开第九开关S9;
当V tar-△V≤V out≤V tar,也即输出电压与目标电压相差较小,或者 稳定输出目标电压时,使第九开关S9处于常闭状态,这样Cf两端电压变化不会影响到输出电压;
当V out>V tar时,也即输出电压处于降压状态时,使第九开关S9处于常开状态。
由于本实施例的降压过程中第九开关S9处于常开状态,与图6中的降压过程控制方法是相同的,因此省略降压过程的输出电压图及开关状态图,在图9示出了该升降压电路升压过程的输出电压图及开关状态图。如图所示,在升压过程中,第五开关S5、第七开关S7的控制方法与图6的升降压电路相同。
以上已经描述了本公开的各实施例,上述说明是示例性的,并非穷尽性的,并且也不限于所披露的各实施例。在不偏离所说明的各实施例的范围和精神的情况下,对于本技术领域的普通技术人员来说许多修改和变更都是显而易见的。本文中所用术语的选择,旨在最好地解释各实施例的原理、实际应用或对市场中的技术的技术改进,或者使本技术领域的其它普通技术人员能理解本文披露的各实施例。

Claims (10)

  1. 一种升降压电路,其特征在于,包括第一开关、第二开关、第三开关、第四开关、第五开关、第一电感、第一电容和第二电容;
    所述第一开关的第一端与输入电源的正极连接,所述第二开关的第一端与输出电源的正极连接,所述第三开关的第一端和所述第一电感的第一端与所述第一开关的第二端连接,所述第三开关的第二端与所述输入电源的负极连接,所述第四开关的第一端与所述第一电感的第二端和所述第二开关的第二端连接,所述第四开关的第二端与所述输出电源的负极连接,所述第二电容并联在所述输出电源的正极和负极之间;
    所述第五开关连接在所述输入电源的正极和所述输出电源的正极之间,所述第一电容的第一端与所述输出电源的正极连接,第二端分别通过开关与所述输入电源的正极和负极连接。
  2. 根据权利要求1所述的升降压电路,其特征在于,所述第一电容的第二端分别通过所述第一开关和所述第三开关与所述输入电源的正极和负极连接。
  3. 根据权利要求2所述的升降压电路,其特征在于,所述升降压电路还包括第六开关,所述第六开关连接在所述第五开关的第二端的所述输出电源的正极之间。
  4. 根据权利要求1所述的升降压电路,其特征在于,所述升降压电路还包括第七开关和第八开关;
    所述第一电容的第二端分别通过所述第七开关和所述第八开关与所述输入电源的正极和负极连接。
  5. 根据权利要求4所述的升降压电路,其特征在于,所述升降压电路还包括第九开关,所述第九开关连接在所述输出电源的正极和所述第五开关的 第二端之间。
  6. 一种升降压电路的控制方法,用于控制如权利要求1-5中的一项所述的升降压电路,其特征在于,包括:
    获取所述升降压电路的输出电压V out,根据输出电压V out与目标电压V tar的关系,以及目标电压V tar与输入电压V BAT之间的关系对开关进行控制:
    当V out<V tar-△V,且V tar≤V BAT时,闭合所述第五开关以对与所述升降压电路的输出端连接的第二电容进行充电,在输出电压升高至V out=V tar-△V时断开所述第五开关,进入第一工作模式,其中△V为设定电压差;
    当V out<V tar-△V,且V tar>V BAT时,闭合所述第五开关以及连接在所述第一电容的第二端和所述输入电源的负极之间的开关以对所述第二电容进行充电,在输出电压升高至V out=V BAT时断开所述第五开关以及连接在所述第一电容的第二端和所述输入电源的负极之间的开关,同时闭合连接在所述第一电容的第二端和所述输入电源的正极之间的开关以通过所述第一电容对所述第二电容进行充电,并在输出电压升高至V out=V tar-△V时断开连接在所述第一电容的第二端和所述输入电源的正极之间的开关,进入所述第一工作模式;
    当V out>V tar+△V时,闭合所述第二开关、所述第四开关,在输出电压下降至V out=V tar+△V时断开所述第二开关、第四开关,进入所述第一工作模式;
    当V tar-△V≤V out≤V tar+△V时,进入所述第一工作模式;
    所述第一工作模式包括:所述第一开关和所述第四开关同时工作,所述第二开关和所述第三开关同时工作,并且所述第一开关和所述第二开关互补导通。
  7. 根据权利要求6所述的升降压电路的控制方法,其特征在于,当V out<V tart-△V,且V tar>V BAT时,闭合所述第五开关以及第三开关以对所述第 二电容进行充电,在输出电压升高至V out=V BAT时断开第五开关以及第三开关,同时闭合第一开关以通过所述第一电容对所述第二电容进行充电,并在输出电压升高至V out=V tar-△V时断开第一开关,进入所述第一工作模式。
  8. 根据权利要求7所述的升降压电路的控制方法,其特征在于,
    当V out<V tar-△V时,闭合所述第六开关,当V out=V tar-△V时,断开第六开关;
    当V tar-△V≤V out≤V tar时,使所述第六开关处于常闭状态,
    当V out>V tar时,使所述第六开关处于常开状态。
  9. 根据权利要求6所述的升降压电路的控制方法,其特征在于,当V out<V tar-△V,且V tar>V BAT时,闭合所述第五开关以及第八开关以对所述第二电容进行充电,在V out=V BAT时断开第五开关以及第八开关,同时闭合第七开关以通过所述第一电容对所述第二电容进行充电,并在V out=V tar-△V时断开第七开关,进入所述第一工作模式。
  10. 根据权利要求9所述的升降压电路的控制方法,其特征在于,
    当V out<V tar-△V时,闭合所述第九开关,当V out=V tar-△V时,断开所述第九开关;
    当V tar-△V≤V out≤V tar时,使所述第六九开关处于常闭状态,
    当V out>V tar时,使所述第九开关处于常开状态。
PCT/CN2019/077012 2019-01-28 2019-03-05 升降压电路及控制方法 WO2020155288A1 (zh)

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