WO2020238349A1 - 群时延波动校准方法、存储介质及电子装置 - Google Patents

群时延波动校准方法、存储介质及电子装置 Download PDF

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WO2020238349A1
WO2020238349A1 PCT/CN2020/080174 CN2020080174W WO2020238349A1 WO 2020238349 A1 WO2020238349 A1 WO 2020238349A1 CN 2020080174 W CN2020080174 W CN 2020080174W WO 2020238349 A1 WO2020238349 A1 WO 2020238349A1
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signal
calibrated
module
bandwidth
group delay
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PCT/CN2020/080174
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French (fr)
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林洁
王国强
肖伟
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中兴通讯股份有限公司
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/004—Synchronisation arrangements compensating for timing error of reception due to propagation delay
    • H04W56/005—Synchronisation arrangements compensating for timing error of reception due to propagation delay compensating for timing error by adjustment in the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/004—Synchronisation arrangements compensating for timing error of reception due to propagation delay
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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  • the present invention relates to the field of communications, and in particular to a group delay fluctuation calibration method, storage medium and electronic device.
  • the group delay fluctuation index in the hardware link is mainly caused by the group delay fluctuation of the filter, ideal out-of-band attenuation and small in-band group delay in filter design have always been the difficulties of filter design , The wider the filter bandwidth, the higher the requirement for out-of-band suppression, and the in-band group delay fluctuation index will inevitably deteriorate.
  • the traditional method to improve the filter group delay fluctuation is to add a delay equalizer to the hardware to equalize.
  • the delay equalizer is a hardware design, its parameter design is fixed, and it can only passively reduce the group delay fluctuation relatively, but cannot fundamentally solve the problem of excessive group delay fluctuation in the band.
  • the embodiment of the present invention provides a population delay fluctuation calibration method, storage medium, and electronic device to at least to some extent solve the problem of excessive in-band group delay fluctuation in related technologies.
  • a population delay fluctuation calibration method which includes: receiving a radio frequency signal with a source signal sequence within a bandwidth to be calibrated, and generating a baseband signal based on the radio frequency signal; and comparing the baseband signal with the Perform sliding correlation calculation on the source signal sequence to obtain the delay value of the current frequency point of the radio frequency signal in the module to be calibrated; within the bandwidth to be calibrated, change the frequency point of the radio frequency signal with a predetermined frequency step, and repeat
  • the above steps sequentially obtain the delay values of the different frequency points of the bandwidth to be calibrated, and generate a group delay fluctuation calibration file based on the delay value; according to the corresponding group delay fluctuation calibration file to the bandwidth to be calibrated
  • the frequency point performs the phase compensation of the group delay fluctuation.
  • a population delay fluctuation calibration device including: a signal receiving module for receiving a radio frequency signal of a source signal sequence within a bandwidth to be calibrated, and generating a baseband signal based on the radio frequency signal; The signal processing module is used to calculate the sliding correlation between the baseband signal and the source signal sequence to obtain the time delay value of the current frequency point of the radio frequency signal; a calibration file generation module is used to set the bandwidth to be calibrated In the case of changing the frequency of the radio frequency signal with a predetermined frequency step, and repeating the above operations through the signal receiving module and the signal processing module to sequentially obtain the delay values of the different frequency points of the bandwidth to be calibrated, based on The delay value generates a group delay fluctuation calibration file; a phase compensation module is configured to perform phase compensation of group delay fluctuations on the corresponding frequency points of the bandwidth to be calibrated according to the group delay fluctuation calibration file.
  • a storage medium in which a computer program is stored, wherein the computer program is configured to execute the steps in the foregoing method embodiment when running.
  • an electronic device including a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the above method embodiments Steps in.
  • FIG. 1 is a flowchart of a method for calibrating group delay fluctuation according to an embodiment of the present invention
  • FIG. 2 is a structural block diagram of a group delay fluctuation calibration device according to an embodiment of the present invention.
  • FIG. 3 is a structural block diagram of a group delay fluctuation calibration system according to an embodiment of the present invention.
  • FIG. 4 is a flowchart of group delay fluctuation calibration according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a group delay fluctuation compensation structure of a transmitting system according to an embodiment of the present invention.
  • Fig. 6 is a schematic diagram of a group delay fluctuation compensation structure of a receiving system according to an embodiment of the present invention.
  • FIG. 7 is a flowchart of compensation for group delay fluctuations of a transmitting system according to an embodiment of the present invention.
  • Fig. 8 is a flowchart of compensation for group delay fluctuations of a receiving system according to an embodiment of the present invention.
  • this embodiment proposes a population delay fluctuation calibration method, which can use the software method to perform group delay fluctuation calibration on the hardware link without changing the existing hardware link design, and use the calibration data to The hardware group delay fluctuation performs corresponding software phase compensation, thereby eliminating the influence of the hardware group delay fluctuation on the signal transmission quality.
  • the method does not increase the design cost and hardware cost, and can be flexibly applied to any bandwidth and any type of signal transmission link design.
  • the process of this embodiment includes the following steps:
  • Step S102 receiving a radio frequency signal whose source signal sequence is within the bandwidth to be calibrated, and generating a baseband signal based on the radio frequency signal;
  • Step S104 Perform sliding correlation calculation on the baseband signal and the source signal sequence to obtain the delay value of the current frequency point of the radio frequency signal in the module to be calibrated;
  • Step S106 within the bandwidth to be calibrated, the frequency of the radio frequency signal is changed with a predetermined frequency step, and the above steps S102 and S104 are repeated to sequentially obtain the delay values of different frequency points of the bandwidth to be calibrated, and based on the The delay value generates a group delay fluctuation calibration file;
  • Step S108 Perform phase compensation of the group delay fluctuation on the corresponding frequency point of the bandwidth to be calibrated according to the group delay fluctuation calibration file.
  • the signal generating module and the signal receiving module are connected using a synchronization cable to perform Trigger synchronization and clock synchronization to ensure that the signal sequence generating module, DAC and ADC, and signal acquisition module are synchronized.
  • a known source signal sequence can be used to generate the corresponding digital signal through the signal sequence generation module of the signal generator, and convert it into an analog signal through the DAC digital-to-analog change, through the RF link in the signal generation module
  • the step S102 the signal generating module output signal f i RF input signal receiving module, signal analog to digital conversion and radio frequency links varied by entering the ADC, converted into a digital signal enters signal acquisition module for signal acquisition.
  • step S104 of the foregoing embodiment data processing is performed on the collected signal, and NCO frequency conversion filtering is performed on the data first, so that the signal becomes a baseband signal.
  • NCO frequency conversion filtering is performed on the data first, so that the signal becomes a baseband signal.
  • the group delay fluctuation calibration file can be imported to perform group delay fluctuation calibration and compensation for the signal transmitting system or the signal receiving system.
  • the group delay of the existing hardware can be obtained through this method without changing the original hardware design and guaranteeing the original better band interpolation loss and larger out-of-band suppression. Fluctuating calibration data, using the calibration data for phase compensation, thereby improving signal transmission quality.
  • the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, of course, it can also be implemented by hardware, but in many cases the former is Better implementation.
  • the technical solution of the present invention essentially or the part that contributes to the existing technology can be embodied in the form of a software product, and the computer software product is stored in a storage medium (such as ROM/RAM, magnetic disk, The optical disc) includes several instructions to enable a terminal device (which can be a mobile phone, a base station, a computer, a server, or a network device, etc.) to execute the method described in each embodiment of the present invention.
  • a population delay fluctuation calibration device is also provided, and the device is used to implement the above-mentioned embodiments and some implementation manners, and what has been described will not be repeated.
  • the term “module” or “unit” can be a combination of software and/or hardware that implements a predetermined function.
  • the devices described in the following embodiments are implemented by software in some embodiments, implementation by hardware or a combination of software and hardware is also possible and conceived.
  • the device includes a signal receiving module 100, a signal processing module 200, a calibration file generating module 300, and a phase compensation module 400.
  • the signal receiving module 100 is configured to receive a radio frequency signal whose source signal sequence is within the bandwidth to be calibrated, and generate a baseband signal based on the radio frequency signal;
  • the signal processing module 200 is configured to perform sliding correlation calculation between the baseband signal and the source signal sequence to obtain the time delay value of the current frequency point of the radio frequency signal;
  • the calibration file generating module 300 is used to change the frequency point of the radio frequency signal with a predetermined frequency step within the bandwidth to be calibrated, and repeat the above operations through the signal receiving module and the signal processing module to sequentially obtain the bandwidth to be calibrated In the case of delay values of different frequency points, generating a group delay fluctuation calibration file based on the delay value;
  • the phase compensation module 400 is configured to perform phase compensation of group delay fluctuations on the corresponding frequency points of the bandwidth to be calibrated according to the group delay fluctuation calibration file.
  • each of the above modules can be implemented by software or hardware.
  • it can be implemented in the following manner, but not limited to this: the above modules are all located in the same processor; or, the above modules are combined in any combination The forms are located in different processors.
  • FIG. 3 is a schematic diagram of the group delay fluctuation calibration system provided by this embodiment.
  • the system is different from the foregoing group delay fluctuation calibration device in terms of module division.
  • the system mainly includes a signal generating module, a signal receiving module and a signal processing module. It can be seen from FIG. 3 that, compared with the traditional method of adding a delay equalizer to the group delay fluctuation, this embodiment does not require additional hardware design for the calibrated radio frequency link.
  • Fig. 4 is a schematic diagram of the group delay fluctuation calibration process in this implementation. As shown in Figure 4, the specific steps are as follows:
  • Step S401 Use a signal generation module with ideal group delay fluctuations or known RF link group delay fluctuation parameters, and use a synchronization cable to connect the signal generation module and the signal receiving module (see Figure 3) to perform Trigger synchronization and clock synchronization. Ensure that the signal sequence generation module, DAC and ADC, and signal acquisition module are synchronized.
  • the sampling clock rate cannot be too low, because 1/f s determines the minimum resolution of the delay measurement. If the resolution is too low, accurate group delay fluctuation parameters cannot be obtained, and the purpose of group delay fluctuation calibration cannot be achieved.
  • Step S404 outputting the radio frequency signal f i.
  • Step S405 the signal generating module output signal f i RF input signal receiving module, signal analog to digital conversion and radio frequency links varied by entering the ADC, converted into a digital signal enters signal acquisition module for signal acquisition, data acquisition is approximately equal to (Link delay *f s ). If the delay value cannot be estimated, collect as much data as possible.
  • the signal receiving module and the signal generating module use the same sampling clock with a sampling rate of f s . If the rate is different, the data needs to be interpolated or decimated to ensure the correctness of the subsequent sliding correlation calculation.
  • Step S409 Take the delay value of one of the frequency points as the standard, subtract the known group delay fluctuation of the signal generation module, and obtain the relative delay values of other frequency points to the frequency point, and then f start ⁇ can be obtained.
  • Step S410 Store the delay value of each frequency point in a corresponding group delay fluctuation calibration file, the file containing radio frequency points and corresponding group delay fluctuation information.
  • the transmitting system or the receiving system can perform group delay fluctuation and phase compensation.
  • FIGS 5 and 6 are schematic diagrams of the group delay fluctuation compensation system of the transmitting system and the receiving system, respectively. As shown in Figures 5 and 6, in this embodiment, it is only necessary to add the use of group delay fluctuation calibration data for phase compensation in the signal processing part of the signal generating module and the signal receiving module according to the different systems where the calibrated radio frequency link is located. It can eliminate the influence of in-band group delay fluctuation on signal quality in hardware design.
  • Figures 7 and 8 are schematic diagrams of the group delay fluctuation compensation process of the transmitting system and the receiving system, respectively. Perform group delay fluctuation calibration on the equipment during the production process of the system equipment, and store the obtained calibration data as a calibration file, and call the group delay fluctuation calibration data in the calibration file during the normal working data processing process to carry out the corresponding frequency points
  • the phase compensation can ensure to eliminate the influence of the link hardware group delay fluctuation on the signal transmission quality.
  • the group delay fluctuation compensation process of the transmission system will be described in detail below through embodiments. As shown in Figure 7, it includes the following steps:
  • Step S701 When the signal transmitting module is working normally, the signal generating module receives the baseband signal;
  • Step S702 Import the group delay fluctuation calibration file to perform group delay fluctuation phase compensation on the signal sequence of the baseband signal at the corresponding frequency point to compensate for the influence of the group delay fluctuation of the radio frequency link;
  • Step S703 Perform DAC digital-to-analog conversion on the signal
  • Step S704 After the signal undergoes operations such as frequency conversion, amplification and filtering, the EVM index of the radio frequency signal sent by the signal transmitting module will be improved.
  • Step S801 When the signal receiving module is working normally, the signal receiving module receives the broadband signal and converts and collects it into a corresponding digital signal;
  • Step S802 frequency conversion of the normally received and collected signal into a baseband signal with a center frequency of zero frequency
  • Step S803 Perform Fast Fourier Transform (FFT) calculation on the baseband signal
  • Step S804 Import the group delay fluctuation calibration file, and apply the group delay fluctuation calibration data of the corresponding frequency point to perform the phase compensation of the group delay fluctuation for each frequency point;
  • Step S805 Perform calculations such as demodulation and decoding on the compensated signal.
  • the embodiment of the present invention also provides a storage medium in which a computer program is stored, wherein the computer program is configured to execute the steps in the foregoing method embodiment when running.
  • the foregoing storage medium may include, but is not limited to: U disk, Read-Only Memory (Read-Only Memory, ROM for short), Random Access Memory (RAM for short), mobile hard disk, magnetic disk Various media that can store computer programs such as discs or optical discs.
  • An embodiment of the present invention also provides an electronic device including a memory and a processor, the memory is stored with a computer program, and the processor is configured to run the computer program to execute the steps in the above method embodiment.
  • a software method is used to obtain group delay fluctuation calibration data, and the calibration data is used to perform corresponding software phase compensation for hardware group delay fluctuations, so that the existing hardware link design can be unchanged. Under the premise of improving the signal transmission quality.
  • modules or steps of the present invention can be implemented by a general computing device. They can be concentrated on a single computing device or distributed in a network composed of multiple computing devices. Above, in some embodiments, they can be implemented by program codes executable by a computing device, so that they can be stored in a storage device for execution by the computing device, and in some cases, they can be different from this
  • the steps shown or described are executed in the order in which they are shown, or they are respectively fabricated into individual integrated circuit modules, or multiple modules or steps of them are fabricated into a single integrated circuit module for implementation. In this way, the present invention is not limited to any specific combination of hardware and software.

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Abstract

本发明提供了一种群延时校准方法、存储介质及电子装置，该方法包括：接收源信号序列在待校准带宽内的射频信号，并基于所述射频信号生成基带信号；将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点在待校准模块中的时延值；在待校准带宽内，以预定频率步长改变所述射频信号的频点，重复上述步骤依次得到所述待校准带宽的不同频点的时延值，并基于所述时延值生成群时延波动校准文件；根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿。

Description

群时延波动校准方法、存储介质及电子装置
相关申请的交叉引用
本申请基于申请号为201910448231.1、申请日为2019年05月27日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本发明涉及通信领域，具体而言，涉及一种群时延波动校准方法、存储介质及电子装置。
背景技术
随着通信技术的发展，通信制式的升级，4G/5G信号带宽也会越来越宽。而信号带宽越宽，硬件设计上带内群时延波动指标也会相对较差。群时延反映相位随频率变化的快慢。在信号传输过程中，如果群时延波动较大，会使信号发生畸变。如果是通信设备中存在该问题，则发射信号质量会变差，接收信号解调误码率增加、灵敏度变差；如果是仪器仪表中存在该问题，则信号发生器产生信号会不达标、信号分析仪测量会解调信号不准确。
由于硬件链路中影响群时延波动指标主要是由于滤波器的群时延波动造成的，滤波器设计中理想的带外衰减和较小的带内群时延，一直是滤波器设计的难点，滤波器带宽越宽，带外抑制要求越高，则带内群时延波动指标必然会恶化。目前传统的改善滤波器群时延波动的方法是在硬件上增加时延均衡器来均衡。但是由于时延均衡器属于硬件设计，其参数设计是固定的，只能被动地相对减小群时延波动，而不能从根本上解决带内群时延波动过大的问题。而且增加时延均衡器的设计，会增大整个设计链路的插损指标，恶化带外抑制指标，从而改变整个硬件链路设计，增加链路设计体积和成本。此外，该方法只能改善滤波器的群时延波动指标，在群时延波动精度要求较高的情况下并不能对链路整体群时延波动从根本上加以改善。
发明内容
本发明实施例提供了一种群时延波动校准方法、存储介质及电子装置，以至少在一定程度上解决相关技术中带内群时延波动过大的问题。
根据本发明的一个实施例，提供了一种群时延波动校准方法，包括：接收源信号序列在待校准带宽内的射频信号，并基于所述射频信号生成基带信号；将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点在待校准模块中的时延值； 在待校准带宽内，以预定频率步长改变所述射频信号的频点，重复上述步骤依次得到所述待校准带宽的不同频点的时延值，并基于所述时延值生成群时延波动校准文件；根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿。
根据本发明的另一个实施例，提供了一种群时延波动校准装置，包括：信号接收模块，用于接收源信号序列在待校准带宽内的射频信号，并基于所述射频信号生成基带信号；信号处理模块，用于将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点的时延值；校准文件生成模块，用于在所述待校准带宽内，以预定频率步长改变所述射频信号的频点，并通过所述信号接收模块和信号处理模块重复上述操作依次得到所述待校准带宽的不同频点的时延值的情况下，基于所述时延值生成群时延波动校准文件；相位补偿模块，用于根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿。
根据本发明的又一个实施例，还提供了一种存储介质，所述存储介质中存储有计算机程序，其中，所述计算机程序被设置为运行时执行上述方法实施例中的步骤。
根据本发明的又一个实施例，还提供了一种电子装置，包括存储器和处理器，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行上述方法实施例中的步骤。
附图说明
此处所说明的附图用来提供对本发明的进一步理解，构成本申请的一部分，本发明的示意性实施例及其说明用于解释本发明，并不构成对本发明的不当限定。在附图中：
图1是根据本发明实施例的群时延波动校准方法的流程图；
图2是根据本发明实施例的群时延波动校准装置的结构框图；
图3是根据本发明实施例的群时延波动校准系统的结构框图；
图4是根据本发明实施例的群时延波动校准流程图；
图5是根据本发明实施例发射系统群时延波动补偿结构示意图；
图6是根据本发明实施例接收系统群时延波动补偿结构示意图；
图7是根据本发明实施例发射系统群时延波动补偿流程图；
图8是根据本发明实施例接收系统群时延波动补偿流程图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本发明。需要说明的是，在不冲突的情况 下，本申请中的实施例及实施例中的特征可以相互组合。
现有的传统改善宽带带内群时延波动的方法，需要改变原有的硬件设计，增加时延均衡器，并对因增加时延均衡器造成的插损和带外抑制等指标恶化进行进一步的弥补设计。这一方法由于参数固定，只能减小但并不能真正完全解决带内群时延波动过大的影响，而且时延均衡器可适应的带宽也是有限的，对应4G/5G信号覆盖5MHz～400MHz的带宽需求需要有不同的设计，不具备灵活适用性。
为此，本实施例提出了一种群时延波动校准方法，可以在不改变现有的硬件链路设计的前提下，使用软件方法对硬件链路进行群时延波动校准，利用该校准数据对硬件群时延波动进行相应的软件相位补偿，从而消除硬件群时延波动对信号传输质量的影响。该方法不增加设计成本和硬件成本，且可以灵活适用于任意带宽、任意类型的信号传输链路设计。
如图1所示，本实施例的流程包括如下步骤：
步骤S102，接收源信号序列在待校准带宽内的射频信号，并基于所述射频信号生成基带信号；
步骤S104，将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点在待校准模块中的时延值；
步骤S106，在待校准带宽内，以预定频率步长改变所述射频信号的频点，重复上述步骤S102和S104，依次得到所述待校准带宽的不同频点的时延值，并基于所述时延值生成群时延波动校准文件；
步骤S108，根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿。
在上述实施例中，在步骤S102之前，将信号发生模块和信号接收模块使用同步线缆连接，进行Trigger同步和时钟同步，确保信号序列发生模块、DAC和ADC、信号采集模块是同步的。
在上述实施例中，可采用一个已知源信号序列，通过信号发生器的信号序列发生模块产生相应的数字信号，并经过DAC数模变化转换成模拟信号，通过信号发生模块中的射频链路变频为待校准带宽起始频点的射频信号输出，即f i＝f start(i＝0)。
在上述实施例的步骤S102中，将信号发生模块输出的f i射频信号输入信号接收模块，信号通过射频链路变频并进入ADC进行模数变化，转换为数字信号进入信号采集模块进行信号采集。
在上述实施例的步骤S104中，对采集到的信号进行数据处理，首先对数据进行NCO变频滤波处理，使信号变为基带信号。将基带信号y和源信号x序列进行滑动相关性计算，计算公式为：
Figure PCTCN2020080174-appb-000001
其中Cov(x,y)为x与y的协方差，Var[x]为x的方差，Var[y]为y的方差。取相关性最大时对应的时延值为f i在这一射频链路上的时延值。
上述实施例的步骤S106中，令i＝i+1，f i＝f start+i*Δf，其中Δf为频率校准步进，当f i<＝f stop时，则重复步骤S102至S104，依次得出不同频点的时延值，并取其中一个频点(例如中心频道)的时延值作为标准，得出其他频点对该频点的时延相对值，即可得出f start～f stop频率带宽内的群时延波动。
在上述实施例的步骤S108中，可以通过导入群时延波动校准文件，对信号发射系统或信号接收系统进行群时延波动校准并补偿。
在本发明的上述实施例中，可在不改变原有硬件设计、保障原有较好的带内插损和较大的带外抑制的情况下，通过该方法获得现有硬件的群时延波动校准数据，利用该校准数据进行相位补偿，从而改善信号传输质量。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中，包括若干指令用以使得一台终端设备(可以是手机、基站、计算机，服务器，或者网络设备等)执行本发明各个实施例所述的方法。
在本实施例中还提供了一种群时延波动校准装置，该装置用于实现上述实施例及某些实施方式，已经进行过说明的不再赘述。如以下所使用的，术语“模块”或“单元”可以实现预定功能的软件和/或硬件的组合。尽管以下实施例所描述的装置在某些实施例中以软件来实现，但是硬件，或者软件和硬件的组合的实现也是可能并被构想的。
图2是根据本发明实施例的群时延波动校准装置的结构框图，如图2所示，该装置包括信号接收模块100、信号处理模块200、校准文件生成模块300和相位补偿模块400。
其中，信号接收模块100用于接收源信号序列在待校准带宽内的射频信号，并基于所 述射频信号生成基带信号；
信号处理模块200用于将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点的时延值；
校准文件生成模块300用于在所述待校准带宽内，以预定频率步长改变所述射频信号的频点，并通过所述信号接收模块和信号处理模块重复上述操作依次得到所述待校准带宽的不同频点的时延值的情况下，基于所述时延值生成群时延波动校准文件；
相位补偿模块400用于根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿。
需要说明的是，上述各个模块是可以通过软件或硬件来实现的，对于后者，可以通过以下方式实现，但不限于此：上述模块均位于同一处理器中；或者，上述各个模块以任意组合的形式分别位于不同的处理器中。
下面通过实施例对具体应用中的技术方案实施步骤进行详细的说明。
图3是本实施例所提供的群时延波动校准系统示意图，该系统在模块划分上与前文的群时延波动校准装置有所不同。该系统主要包括信号发生模块、信号接收模块和信号处理模块。从图3中可以看出，对比传统的群时延波动增加时延均衡器的方法，本实施例对被校准射频链路是没有额外的硬件设计要求的。
图4是本实施的群时延波动校准流程示意图。如图4所示，具体步骤如下：
步骤S401：使用群时延波动理想或者已知射频链路群时延波动参数的信号发生模块，使用同步线缆连接信号发生模块和信号接收模块(参见图3)，进行Trigger同步和时钟同步，确保信号序列发生模块、DAC和ADC、信号采集模块是同步的。
步骤S402：采用一个已知源信号序列(如5MHz BW的WCDMA信号)，通过信号发生器的信号序列发生模块产生相应的数字信号，并经过DAC数模变化转换成模拟信号，其中选择采样时钟为f s＝307.2MHz。采样时钟速率不能太低，因为1/f s决定了时延测量的最小分辨率，分辨率过低无法获取准确的群时延波动参数，无法达到群时延波动校准的目的。
步骤S403：通过信号发生模块中的射频链路上变频为待校准带宽起始频点的射频信号，即f i＝f start(i＝0)。
步骤S404：将射频信号f i输出。
步骤S405：将信号发生模块输出的f i射频信号输入信号接收模块，信号通过射频链路 变频并进入ADC进行模数变化，转换为数字信号进入信号采集模块进行信号采集，采集的数据量大约等于(链路时延*f s)。如果无法预估延时值，则尽可能多地采集数据。信号接收模块和信号发生模块采用相同的采样速率为f s的采样时钟，如果速率不一样，则需要对数据进行内插或抽取处理，以确保后续滑动相关性计算正确性。
步骤S406：对采集到的信号进行数据处理，首先对数据进行NCO变频滤波处理，使信号变为零频的基带信号。将基带信号和源信号序列进行滑动相关性计算，即对采集到基带信号分别延时j*(1/f s)(j∈(0,N-1)，N＝采集到的数据总量)，取相关性最大时对应的时延值j*(1/f s)为在这一射频链路上的时延值。
步骤S407：令i＝i+1，f i＝f start+i*Δf，,Δf为频率校准步进)。
步骤S408：当f i<＝f stop时，则重复步骤S404至步骤S406，依次得出不同频点的时延值。
步骤S409：取其中一个频点的时延值作为标准，减去信号发生模块已知的群时延波动，得出其他频点对该频点的时延相对值，即可得出f start～f stop频率带宽内的群时延波动，
步骤S410：将各频点的时延值存储在相应的群时延波动校准文件中，文件包含射频频点及对应的群时延波动信息。
基于上述实施例中获得的校准文件可以对发射系统或接收系统进行群时延波动进行相位补偿。
图5和图6是分别是发射系统和接收系统的群时延波动补偿系统示意图。如图5和6所示，在本实施例中，只需要根据被校准射频链路所在不同系统分别在信号发生模块和信号接收模块的信号处理部分增加利用群时延波动校准数据进行相位补偿，即可消除硬件设计中带内群时延波动对信号质量的影响。
图7和图8分别是发射系统和接收系统的群时延波动补偿流程示意图。在系统设备生产过程中对设备进行群时延波动校准，并将所得到的校准数据存储为校准文件，在正常工作的数据处理过程中调用校准文件中的群时延波动校准数据进行相应频点的相位补偿，就可以确保消除链路硬件群时延波动对信号传输质量的影响。
下面将通过实施例对发射系统的群时延波动补偿流程进行详细的描述。如图7所示，包括如下步骤：
步骤S701：信号发射模块正常工作时，信号发生模块接收基带信号；
步骤S702：导入群时延波动校准文件对基带信号的信号序列进行相应频点进行群时延波动相位补偿，以弥补射频链路群时延波动的影响；
步骤S703：对信号进行DAC数模转换；
步骤S704：信号经过变频、放大和滤波等操作，信号发射模块发出射频信号的EVM指标将得到改善。
下面将通过实施例对接收系统的群时延波动补偿流程进行详细的描述。如图8所示，包括如下步骤：
步骤S801：信号接收模块正常工作时，信号接收模块接收宽带信号并转换采集为相应数字信号；
步骤S802：将正常接收采集到的信号变频为中心频点为零频的基带信号；
步骤S803：对基带信号进行快速傅里叶变换(FFT变换)计算；
步骤S804：导入群时延波动校准文件，应用对应频点的群时延波动校准数据对各频点进行群时延波动的相位补偿；
步骤S805：对补偿后的信号进行解调解码等计算。
需说明的是，本实施例提供的群时延波动校准及补偿的方案可应用于包括移动通信设备以及仪器仪表领域在内的所有射频链路，具体系统方案实现方式及参数设定都可以进行相应变化，上述实施例提供的方法应用仅是举例说明，并不表示可以使用的全部实现方式。
本发明的实施例还提供了一种存储介质，该存储介质中存储有计算机程序，其中，该计算机程序被设置为运行时执行上述方法实施例中的步骤。
在本实施例中，上述存储介质可以包括但不限于：U盘、只读存储器(Read-Only Memory，简称为ROM)、随机存取存储器(Random Access Memory，简称为RAM)、移动硬盘、磁碟或者光盘等各种可以存储计算机程序的介质。
本发明的实施例还提供了一种电子装置，包括存储器和处理器，该存储器中存储有计算机程序，该处理器被设置为运行计算机程序以执行上述方法实施例中的步骤。
在本发明的上述实施例中，使用软件方法获得群时延波动校准数据，并利用该校准数据对硬件群时延波动进行相应的软件相位补偿，从而可以在不改变现有的硬件链路设计的前提下，改善信号传输质量。
显然，本领域的技术人员应该明白，上述的本发明的各模块或各步骤可以用通用的计 算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，在某些实施例中，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样，本发明不限制于任何特定的硬件和软件结合。
以上所述仅为本发明的若干实施例而已，并不用于限制本发明，对于本领域的技术人员来说，本发明可以有各种更改和变化。凡在本发明的原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (16)

  1. 一种群时延波动校准方法，其中，包括：
    接收源信号序列在待校准带宽内的射频信号，并基于所述射频信号生成基带信号；
    将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点在待校准模块中的时延值；
    在待校准带宽内，以预定频率步长改变所述射频信号的频点，重复上述步骤依次得到所述待校准带宽的不同频点的时延值，并基于所述时延值生成群时延波动校准文件；
    根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿。
  2. 根据权利要求1所述的方法，其中，接收源信号序列在待校准带宽内的射频信号之前，还包括：
    基于所述源信号序列，通过信号发生器的信号序列发生模块产生相应的数字信号，并经过DAC数模变化转换成模拟信号，通过信号发生模块中的射频链路变频为在待校准带宽内的射频信号输出。
  3. 根据权利要求2所述的方法，其中，接收源信号序列在待校准带宽内的射频信号，并基于所述射频信号生成基带信号，包括：
    将信号发生模块输出的射频信号输入信号接收模块，通过射频链路变频并进入ADC进行模数变化，转换为数字信号进入信号采集模块进行信号采集；
    对采集到的信号进行数据处理，对数据进行NCO变频滤波处理，使信号变为基带信号。
  4. 根据权利要求3所述的方法，其中，将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点的时延值，包括：
    将基带信号y和源信号x序列按照如下公式进行滑动相关性计算：
    Figure PCTCN2020080174-appb-100001
    其中Cov(x,y)为x与y的协方差，Var[x]为x的方差，Var[y]为y的方差；
    取相关性最大时对应的时延值为射频信号在所述待校准模块链路上的当前频点的时延值。
  5. 根据权利要求4所述的方法，其中，在所述待校准带宽内，以预定频率步长改变所 述射频信号的频点，重复上述步骤依次得到所述待校准带宽内的不同频点的时延值，基于所述时延值生成群时延波动校准文件，包括：
    令i＝i+1，f i＝f start+i*Δf，其中Δf为频率校准步进，当f i<＝f stop时，则重复上述接收和计算步骤，依次得出不同频点的时延值；
    取所述多个不同频点中的一个频点的时延值作为标准，得出其他频点与该频点的时延相对值，并储存在所述群时延波动校准文件中。
  6. 根据权利要求1所述的方法，其中，根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿，包括：
    当所述待校准模块为信号发射模块为时，对发射基带信号的待校准带宽内的各频点进行群时延波动的相位补偿；或
    当所述待校准模块为信号接收模块为时，将接收采集到的信号处理得到基带信号后，对基带信号的待校准带宽内的各频点进行群时延波动的相位补偿。
  7. 根据权利要求1至6中任一项所述的方法，其中，在接收源信号序列在待校准带宽内的射频信号之前，还包括：
    将信号发生模块和信号接收模块进行Trigger同步和时钟同步。
  8. 一种群时延波动校准装置，其中，包括：
    信号接收模块，用于接收源信号序列在待校准带宽内的射频信号，并基于所述射频信号生成基带信号；
    信号处理模块，用于将所述基带信号与所述源信号序列进行滑动相关性计算，得到所述射频信号的当前频点的时延值；
    校准文件生成模块，用于在所述待校准带宽内，以预定频率步长改变所述射频信号的频点，并通过所述信号接收模块和信号处理模块重复上述操作依次得到所述待校准带宽的不同频点的时延值的情况下，基于所述时延值生成群时延波动校准文件；
    相位补偿模块，用于根据所述群时延波动校准文件对所述待校准带宽的对应频点进行群时延波动的相位补偿。
  9. 根据权利要求8所述的装置，其中，还包括信号发生模块，其中所述信号发生模块包括：
    信号发生器，用于基于所述源信号序列产生相应的数字信号；
    DAC，用于将所述数字信号转换成模拟信号；
    第一射频链路，用于将所述模拟信号变频为待校准带宽内的射频信号输出。
  10. 根据权利要求9所述的装置，其中，信号接收模块还包括：
    第二射频链路，用于将接收到的所述射频信号进行变频；
    ADC，用于将变频的所述射频信号进行模数转换为数字信号；
    信号采集模块，用于对所述数字信号进行信号采集；
    数字处理模块，用于对采集到的信号进行数据处理；
    滤波器，用于对数据处理后的信号进行滤波，使信号变为基带信号。
  11. 根据权利要求10所述的装置，其中，所述信号处理模块还包括：
    滑动相关性计算单元，用于将基带信号y和源信号x序列按照如下公式进行滑动相关性计算：
    Figure PCTCN2020080174-appb-100002
    其中Cov(x,y)为x与y的协方差，Var[x]为x的方差，Var[y]为y的方差；
    频点时延计算单元，用于取相关性最大时对应的时延值为射频信号在待校准模块链路中的当前频点的时延值。
  12. 根据权利要求11所述的装置，其中，所述信号处理模块还包括：
    群时延波动计算单元，用于取得到的所述多个频点中的一个频点的时延值作为标准，得出其他频点与该频点的时延相对值，并储存在所述群时延波动校准文件中。
  13. 根据权利要求8所述的装置，其中，相位补偿模块还包括：
    第一相位补偿单元，用于当信号发射模块为待校准模块时，对对应待校准带宽的各频点的基带信号进行群时延波动的相位补偿；或
    第二相位补偿单元，用于当信号接收模块为待校准模块时，在接收采集到的信号变频为基带信号后，对对应待校准带宽的各频点的基带信号进行群时延波动的相位补偿。
  14. 根据权利要求8至13任一项所述的装置，其中，还包括：
    同步电缆，用于将信号发生模块和信号接收模块连接，以进行Trigger同步和时钟同步。
  15. 一种存储介质，其中，所述存储介质中存储有计算机程序，其中，所述计算机程序被设置为运行时执行所述权利要求1至7任一项中所述的方法。
  16. 一种电子装置，包括存储器和处理器，其中，所述存储器中存储有计算机程序，所述处理器被设置为运行所述计算机程序以执行所述权利要求1至7任一项中所述的方法。
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