WO2020224088A1 - 阵列基板及其制作方法 - Google Patents

阵列基板及其制作方法 Download PDF

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Publication number
WO2020224088A1
WO2020224088A1 PCT/CN2019/101615 CN2019101615W WO2020224088A1 WO 2020224088 A1 WO2020224088 A1 WO 2020224088A1 CN 2019101615 W CN2019101615 W CN 2019101615W WO 2020224088 A1 WO2020224088 A1 WO 2020224088A1
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Prior art keywords
layer
flat
flat layer
disposed
light
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English (en)
French (fr)
Inventor
王雷
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/622,062 priority Critical patent/US20210359046A1/en
Priority to JP2020517531A priority patent/JP7029525B2/ja
Publication of WO2020224088A1 publication Critical patent/WO2020224088A1/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/818—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/856—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/878—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80518—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the present disclosure relates to the field of display technology, in particular to an array substrate and a manufacturing method thereof.
  • OLEDs Organic light emitting diodes
  • the array substrate structure traditionally applied to organic light emitting diodes is composed of a flat layer, an anode, a pixel defining layer, and a passivation layer.
  • the flat layer is made of transparent material, the transparent material makes the flat layer strong in light transmission.
  • the light-emitting layer emits light, not only the light-emitting layer will emit light upward, but also light will be emitted along both sides of the light-emitting layer.
  • the flat layer cannot effectively block the lateral light emission of the light-emitting layer.
  • the light output efficiency is less than 20%.
  • the power supply In order to obtain a higher brightness, the power supply must be increased, so the power consumption increases and the battery life of the product is reduced.
  • the flat layer and the pixel defining layer in the traditional organic light-emitting diode array substrate are made of transparent materials, they cannot effectively block the lateral light emission of the light-emitting layer, which greatly reduces the overall light output of the display panel and causes signal interference to internal optical fingerprints. Reduce the signal-to-noise ratio, and also increase power consumption.
  • an array substrate including: a base substrate; a first flat layer disposed on a part of the base substrate; a second flat layer disposed on the other part of the base substrate On a base substrate, and a partition groove is formed between the first flat layer and the second flat layer to expose the base substrate; a first electrode layer is disposed on the first flat layer; A reflective layer disposed on the second flat layer and shielding the side surface of the second flat layer; and a pixel defining layer disposed on the partition groove and covering part of the first flat layer and part On the second flat layer, wherein the reflective layer extends from the second flat layer to the array substrate and forms a gap with the first flat layer.
  • it further includes a thin film transistor layer, the thin film transistor layer is disposed on the base substrate, and the first flat layer is correspondingly disposed above the thin film transistor layer.
  • the reflective layer is disposed on the second flat layer, covers a side wall of the partition groove and extends to the base substrate, so that the second flat layer is disposed on Between the reflective layer and the base substrate.
  • the material of the reflective layer is the same as the material of the first electrode layer.
  • it further includes a light-emitting layer and a second electrode layer, the light-emitting layer is disposed on the first electrode layer and the reflective layer, and the second electrode layer is disposed on the light-emitting layer. Layer up.
  • the thickness of the second flat layer is greater than the thickness of the first flat layer.
  • the present disclosure further provides an array substrate, including: a base substrate; a first flat layer disposed on a part of the base substrate; a second flat layer disposed on the other part of the base substrate; On the base substrate, and a partition groove is formed between the first flat layer and the second flat layer to expose the base substrate; a first electrode layer is disposed on the first flat layer A reflective layer, disposed on the second flat layer and shielding the side surface of the second flat layer; and a pixel defining layer, disposed on the partition groove and covering part of the first flat layer and Part of the second flat layer.
  • it further includes a thin film transistor layer, the thin film transistor layer is disposed on the base substrate, and the first flat layer is correspondingly disposed above the thin film transistor layer.
  • the reflective layer is disposed on the second flat layer, covers a side wall of the partition groove and extends to the base substrate, so that the second flat layer is disposed on Between the reflective layer and the base substrate.
  • the material of the reflective layer is the same as the material of the first electrode layer.
  • it further includes a light-emitting layer and a second electrode layer, the light-emitting layer is disposed on the first electrode layer and the reflective layer, and the second electrode layer is disposed on the light-emitting layer. Layer up.
  • the thickness of the second flat layer is greater than the thickness of the first flat layer.
  • the present disclosure further provides a method for manufacturing an array substrate, which includes the following steps: providing a base substrate; forming a first flat layer on a part of the base substrate using a first mask; The second mask forms a second flat layer on another part of the base substrate, and a partition groove is formed between the first flat layer and the second flat layer to expose the base substrate; Using a third mask to form a first electrode layer on the first flat layer, and form a reflective layer on the second flat layer, the reflective layer shielding the side of the second flat layer; and A fourth mask is used to form a pixel definition layer on the partition groove and cover part of the first flat layer and part of the second flat layer to form a pair of pixel definition layers separated from each other.
  • the method further includes forming a thin film transistor layer, the thin film transistor layer is disposed on the base substrate, and the first flat layer is correspondingly disposed above the thin film transistor layer.
  • the reflective layer is disposed on the second flat layer, covers a side wall of the partition groove and extends to the base substrate, so that the second flat layer is disposed on Between the reflective layer and the base substrate.
  • the material of the reflective layer is the same as the material of the first electrode layer.
  • the beneficial effects of the present disclosure are as follows.
  • the present disclosure provides an array substrate and a manufacturing method thereof.
  • a second flat layer is provided and a reflective layer is provided on the edge of the second flat layer.
  • the reflective layer mainly provides reflection, reflecting the lateral light from the light-emitting layer to the light-emitting direction of the display panel, so as to avoid the light-emitting layer.
  • the laterally emitted light is emitted into the display panel through the absorption and refraction loss of other film layers, causing the luminous efficiency of the light-emitting layer to decrease, thereby achieving the effect of increasing the light output.
  • the reflection effect of the reflective layer further achieves the effect of preventing light leakage at the edge of the light-emitting layer.
  • the present disclosure additionally uses the second mask to prepare a second flat layer, and forms a reflective layer on the edge of the second flat layer.
  • the reflection effect reflects the lateral light emission of the light-emitting layer to the light-emitting direction of the display panel, and effectively avoids light leakage from the lateral light-emitting layer of the light-emitting layer, so that it can increase the light output and prevent the light-emitting layer without changing the materials of the flat layer and the pixel definition layer.
  • the effect of edge light leakage is compared with the traditional array substrate manufacturing process.
  • FIG. 1 is a schematic diagram of the structure of the disclosed array substrate.
  • 2A-2D are schematic diagrams of the manufacturing method of the disclosed array substrate.
  • FIG. 3 is a schematic diagram of the steps of the manufacturing method of the disclosed array substrate.
  • FIG. 1 is a schematic diagram of the structure of the array substrate of the disclosure.
  • 2A-2D are schematic diagrams of the manufacturing method of the disclosed array substrate.
  • the present disclosure provides an array substrate including: a base substrate 10, a first flat layer 11, a second flat layer 12, a first electrode layer 13, a reflective layer 14, and a pixel definition layer 15.
  • the first flat layer 11 is disposed on a part of the base substrate 10.
  • the second flat layer 12 is disposed on another part of the base substrate 10, and a partition groove 20 is formed between the first flat layer 11 and the second flat layer 12 to expose the substrate The substrate 10.
  • the first electrode layer 13 is disposed on the first flat layer 11.
  • the reflective layer 14 is disposed on the second flat layer 12 and shields the side surface of the second flat layer 12.
  • the pixel definition layer 15 is disposed on the partition groove 20 and covers part of the first flat layer 11 and part of the second flat layer 12.
  • a thin film transistor layer 30 and an organic light emitting diode are sequentially stacked on a base substrate 10.
  • the thin film transistor layer 30 is correspondingly provided under the first flat layer 11 of the base substrate 10.
  • the substrate 10 is provided with a pixel drive circuit (not shown), and the organic light emitting diode includes a first flat layer 11, a second flat layer 12, a first electrode layer 13, and a reflective layer 14 stacked in sequence along a direction away from the substrate 10.
  • the light emitted from the light-emitting layer 40 sequentially passes through the film layer and the base substrate 10 and then exits from the light-emitting surface of the base substrate 10.
  • the base substrate 10 may be a substrate made of common transparent materials such as glass, quartz, sapphire, and resin.
  • the first electrode layer 13 and the second electrode layer 16 in the array substrate 10 are respectively an anode and a cathode, and their specific settings are determined according to the design requirements of the array substrate; or the first electrode layer 13 is a cathode, and the corresponding second electrode layer 13 is a cathode.
  • the electrode layer 16 is an anode.
  • All or part of the light emitted by the light-emitting layer 40 is emitted through the base substrate 10, and the lateral light emitted by the light-emitting layer 40 is reflected to the light-emitting direction of the display panel (not shown) through the reflective layer 14, thereby preventing the light from spreading. After the absorption and refraction loss of other layers.
  • the isolation groove 20 is disposed between the first flat layer 11 and the second flat layer 12 for the reflective layer 14 to partially cover it.
  • the array substrate includes a plurality of pixel units (not shown) arranged in an array.
  • the pixel units include the above-mentioned organic light-emitting diodes and a pixel definition layer 15 arranged around the organic light-emitting diodes.
  • the reflective layer 14 is basically arranged on the second flat layer 12 Extend into the partition groove 20 to partially cover the partition groove 20, that is, the reflective layer 14 extends to cover a side wall 21 in the partition groove 20, and further extends to cover the array substrate 10, A gap is formed between the reflective layer 14 extending on the array substrate 10 and the first flat layer 11, that is, the reflective layer 14 extending on the array substrate 10 does not contact the first flat layer 11. It should be noted that the reflective layer 14 covers one side wall 21 of the partition groove 20 and does not cover the other side wall 22 of the partition groove 20.
  • the reflective layer 14 can be made of light-shielding materials, such as light-shielding metals. Furthermore, the reflective layer 14 is an extension of the first electrode layer 13, and the material of the reflective layer 14 is the same as that of the first electrode layer. The material of 13 is the same.
  • the reflective layer 14 directly reflects the lateral light emitted from the light-emitting layer to the light-emitting direction of the display panel, reducing the reflection of light on the contact surface between other metal film layers in the display panel and the base substrate 10, and also reducing the light
  • the refraction on the contact surface between the other film layers and the base substrate 10 allows more light to be emitted and avoids light leakage at the edge of the light-emitting layer 40, which improves the display effect of the display device.
  • the array substrate provided in this embodiment reduces the refraction and reflection inside the substrate to form stray light.
  • the reflective layer is provided to further concentrate and reflect the emitted light to the light-emitting surface, thereby improving the display The light output efficiency of the panel.
  • FIG. 3 is a schematic diagram of the steps of the manufacturing method of the disclosed array substrate.
  • the manufacturing method includes:
  • Step S01 providing a base substrate
  • Step S02 using a first mask to form a first flat layer on a part of the base substrate, wherein steps S01-S02 correspond to FIG. 2A;
  • Step S03 using a second mask to form a second flat layer on another part of the base substrate, and a partition groove is formed between the first flat layer and the second flat layer to expose all The base substrate, where step S03 corresponds to FIG. 2B;
  • Step S04 using a third mask to form a first electrode layer on the first flat layer, and form a reflective layer on the second flat layer, the reflective layer shielding the second flat layer On the side, step S03 corresponds to FIG. 2C;
  • Step S05 using a fourth mask to form a pixel definition layer on the partition groove and covering part of the first flat layer and part of the second flat layer to form a pair of pixel definitions separated from each other Layer, where step S03 corresponds to FIG. 2D.
  • step S01 it further includes a step of forming a thin film transistor layer on a base substrate, wherein the thin film transistor layer is correspondingly disposed under the first flat layer 11, and the base substrate is provided with a pixel driving circuit (not shown in the figure).
  • the base substrate may be a glass substrate, a sapphire substrate, a silicon substrate, or the like.
  • step S02 a photoresist is formed (for example, by coating) on the base substrate, and exposed, developed, and etched through a first mask (for example, a halftone mask or a gray tone mask) After that, the remaining photoresist is removed to form a first flat layer.
  • a first mask for example, a halftone mask or a gray tone mask
  • step S03 an additional second mask is added, and a patterned second flat layer is formed first, and the patterned second flat layer is patterned through a photolithography process. As described in the previous step, The second flat layer is formed after the excess part is etched away.
  • a third mask is used to first form a patterned first electrode layer and a patterned reflective layer, and the patterned first electrode layer is patterned through a photolithography process to perform patterning on the first flat A first electrode layer is formed on the layer, and a third mask is used to pattern the patterned reflective layer through a photolithography process to form a reflective layer on the second flat layer.
  • a fourth mask is used to form a patterned pixel definition layer, and the patterned pixel definition layer is patterned through a photolithography process, and the patterned pixel definition layer is placed on the partition groove and covers part of the first A pair of pixel definition layers separated from each other are formed on the flat layer and part of the second flat layer.
  • step S05 it further includes the step of forming an organic light-emitting diode (not shown) on a base substrate, wherein the organic light-emitting diode includes a first flat layer and a second flat layer that are sequentially stacked in a direction away from the substrate.
  • a first electrode layer, a reflective layer, a pixel definition layer, a light-emitting layer and a second electrode layer the light-emitting layer is arranged on the first electrode layer and the reflective layer, and the second electrode layer is arranged on the On the light-emitting layer, the first electrode layer is located above the thin film transistor layer of the base substrate. The light emitted from the light-emitting layer sequentially passes through the film layer and the base substrate and then exits from the light-emitting surface of the base substrate.
  • All or part of the light emitted by the light-emitting layer is emitted through the base substrate, and the lateral light emitted from the light-emitting layer is reflected to the light-emitting direction of the display panel through the reflective layer, thereby avoiding the absorption and refraction loss of the light passing through other film layers when propagating .
  • the isolation grooves are provided on the first flat layer 11 and the second flat layer 12 for the reflective layer to cover them.
  • the array substrate includes a plurality of pixel units arranged in an array.
  • the pixel units include the above-mentioned organic light emitting diodes and a pixel defining layer arranged around the organic light emitting diodes.
  • the partition grooves are used to separate the pixel units from The connection of the pixel definition layer between adjacent pixel units, that is, at least one isolation groove is provided between adjacent pixel units, and the reflective layer is basically disposed on the second flat layer and extends into the isolation groove to partially cover
  • the partition groove, that is, the reflective layer extends to cover a side wall in the partition groove, and further extends to cover the array substrate, extend to the reflective layer on the array substrate and the first flat
  • a gap is formed between the layers 11, that is, the reflective layer extending to the array substrate does not contact the first flat layer.
  • the reflective layer can be made of a light-shielding material, such as light-shielding metal.
  • the reflective layer is an extension of the first electrode layer, and the material of the reflective layer is the same as that of the first electrode layer.
  • the reflective layer directly reflects the lateral light emitted from the light-emitting layer to the light-emitting direction of the display panel, reducing the reflection of light on the contact surface between other metal film layers in the display panel and the base substrate, and reducing the light on other films. Refraction occurs on the contact surface between the layer and the base substrate, so that more light can be emitted and light leakage at the edge of the light-emitting layer is avoided, and the display effect of the display device is improved.
  • the manufacturing method of the array substrate adds the step of forming the second flat layer by the second mask, so that the subsequently formed reflective layer can be disposed on the side of the second flat layer (ie, the partition groove).
  • the side wall which can reduce the refraction and reflection inside the substrate to form stray light.
  • the reflective layer is set to further concentrate and reflect the emitted light to the light-emitting surface, without changing the materials of the flat layer and the pixel definition layer. Increase the light output and prevent light leakage at the edge of the light-emitting layer.
  • the present disclosure has the following beneficial effects:
  • the present disclosure provides an array substrate and a manufacturing method thereof.
  • a second flat layer is provided and a reflective layer is provided on the edge of the second flat layer.
  • the reflective layer mainly provides reflection, reflecting the lateral light from the light-emitting layer to the light-emitting direction of the display panel, so as to avoid the light-emitting layer.
  • the laterally emitted light is emitted into the display panel through the absorption and refraction loss of other film layers, causing the luminous efficiency of the light-emitting layer to decrease, thereby achieving the effect of increasing the light output.
  • the reflection effect of the reflective layer further achieves the effect of preventing light leakage at the edge of the light-emitting layer.
  • the present disclosure additionally uses the second mask to prepare a second flat layer, and forms a reflective layer on the edge of the second flat layer.
  • the reflection effect reflects the lateral light emission of the light-emitting layer to the light-emitting direction of the display panel, and effectively avoids light leakage from the lateral light-emitting layer of the light-emitting layer, so that it can increase the light output and prevent the light-emitting layer without changing the materials of the flat layer and the pixel definition layer.
  • the effect of edge light leakage is compared with the traditional array substrate manufacturing process.

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Abstract

一种阵列基板，包括：一衬底基板；一第一平坦层，设置于所述衬底基板上；一第二平坦层，设置于所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板；一第一电极层，设置于所述第一平坦层上；一反射层，设置于所述第二平坦层上并遮蔽所述第二平坦层的侧面；以及一像素定义层，设置于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上。通过设置反射层提高出光量并且防止边缘漏光。还提供一种阵列基板的制作方法。

Description

阵列基板及其制作方法 技术领域
本揭示涉及显示技术领域，尤其涉及一种阵列基板及其制作方法。
 背景技术
有机发光二极管(Organic Light Emitting Diode，简称为OLED)，因具有高亮度、全视角、响应速度快以及可柔性显示等优点，已在显示领域得到广泛应用。
传统应用于有机发光二极管的阵列基板结构由平坦层、阳极、像素界定层以及钝化层所构成。一方面由于平坦层为透明材料构成，透明材料使平坦层的透光性强。当发光层出光时，不仅发光层会向上出光，而且还会沿着发光层两侧出光，平坦层对于发光层的侧向出光无法有效的阻挡。发光层出射的光线，特别是侧向出光，无法被平坦层有效的阻挡，从而侧向出光在显示面板面内经过金属层的反射以及其他膜层的折射转变为一种杂散光，对于指纹识别等生物识别技术来说降低了产品的信噪比，使得识别能力降低。
另一方面，由于发光层本身的出光沿着各个方向行进，经过像素界定层等膜层的吸收和折射损失，因此出光效率低于20%。为了得到较高的使用亮度必须使得电源功率提高，因此耗电量增大，降低了产品的电池的使用寿命。
 技术问题
由于传统的有机发光二极管的阵列基板中平坦层和像素界定层均为透明材料，无法有效阻挡发光层的侧向出光，大大降低了显示面板的整体出光量，并且对于内部光学指纹产生信号干扰，降低了信噪比，并也增加了耗电量。
 技术解决方案
为了解决上述问题，本揭示提供一种阵列基板，包括：一衬底基板；一第一平坦层，设置于一部分的所述衬底基板上；一第二平坦层，设置于另一部分的所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板；一第一电极层，设置于所述第一平坦层上；一反射层，设置于所述第二平坦层上并遮蔽所述第二平坦层的侧面；以及一像素定义层，设置于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上，其中所述反射层自所述第二平坦层延伸至所述阵列基板上并与所述第一平坦层之间形成一间隙。
根据本揭示的一实施例，更包括一薄膜晶体管层，所述薄膜晶体管层设置于所述衬底基板上，并且所述第一平坦层对应设置于所述薄膜晶体管层上方。
根据本揭示的一实施例，所述反射层设置于所述第二平坦层上并覆盖所述隔断槽的一侧壁且延伸至所述衬底基板上，从而所述第二平坦层设置于所述反射层与所述衬底基板之间。
根据本揭示的一实施例，所述反射层的材质与所述第一电极层的材质相同。
根据本揭示的一实施例，更包括一发光层与一第二电极层，所述发光层设置于所述第一电极层与所述反射层上，所述第二电极层设置于所述发光层上。
根据本揭示的一实施例，所述第二平坦层的厚度大于所述第一平坦层的厚度。
为了解决上述问题，本揭示另提供一种阵列基板，包括：一衬底基板；一第一平坦层，设置于一部分的所述衬底基板上；一第二平坦层，设置于另一部分的所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板；一第一电极层，设置于所述第一平坦层上；一反射层，设置于所述第二平坦层上并遮蔽所述第二平坦层的侧面；以及一像素定义层，设置于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上。
根据本揭示的一实施例，更包括一薄膜晶体管层，所述薄膜晶体管层设置于所述衬底基板上，并且所述第一平坦层对应设置于所述薄膜晶体管层上方。
根据本揭示的一实施例，所述反射层设置于所述第二平坦层上并覆盖所述隔断槽的一侧壁且延伸至所述衬底基板上，从而所述第二平坦层设置于所述反射层与所述衬底基板之间。
根据本揭示的一实施例，所述反射层的材质与所述第一电极层的材质相同。
根据本揭示的一实施例，更包括一发光层与一第二电极层，所述发光层设置于所述第一电极层与所述反射层上，所述第二电极层设置于所述发光层上。
根据本揭示的一实施例，所述第二平坦层的厚度大于所述第一平坦层的厚度。
为了解决上述问题，本揭示另提供一种阵列基板制作方法，包括以下步骤：提供一衬底基板；利用一第一掩膜形成一第一平坦层于一部分的所述衬底基板上；利用一第二掩膜形成一第二平坦层于另一部分的所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板；利用一第三掩膜形成一第一电极层于所述第一平坦层上，并形成一反射层于所述第二平坦层上，所述反射层遮蔽所述第二平坦层的侧面；以及利用一第四掩膜形成像素定义层于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上，以形成一对彼此相隔的像素定义层。
根据本揭示的一实施例，所述方法更包括形成一薄膜晶体管层，所述薄膜晶体管层设置于所述衬底基板上，并且所述第一平坦层对应设置于所述薄膜晶体管层上方。
根据本揭示的一实施例，所述反射层设置于所述第二平坦层上并覆盖所述隔断槽的一侧壁且延伸至所述衬底基板上，从而所述第二平坦层设置于所述反射层与所述衬底基板之间。
根据本揭示的一实施例，所述反射层的材质与所述第一电极层的材质相同。
 有益效果
本揭示的有益效果如下。本揭示提供一种阵列基板及其制作方法。在阵列基板的结构上，设置第二平坦层并在第二平坦层边缘设置反射层，反射层主要提供反射作用，将发光层的侧向出光反射到显示面板的出光方向，从而避免发光层的侧向出光发射到显示面板内部经过其他膜层的吸收和折射损失，造成发光层的发光效率降低，进而达到增加出光量的效果。并且反射层的反射作用进一步达到防止发光层边缘漏光的效果。另外在阵列基板的制作方法上，相较于传统的阵列基板制作工序，本揭示另外使用所述第二掩膜制备第二平坦层，并在第二平坦层边缘形成反射层，反射层提供的反射作用将发光层的侧向出光反射到显示面板的出光方向，并有效避免发光层的侧向出光产生漏光，从而不用更换平坦层和像素定义层的材料就可以达到增加出光量和防止发光层边缘漏光的效果。
 附图说明
图1为本揭示阵列基板的结构示意图。
图2A-2D为本揭示阵列基板制作方法流程示意图。
图3为本揭示阵列基板制作方法步骤示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本揭示可用以实施的特定实施例。
请参阅图1至图2A-2D，图1为本揭示阵列基板的结构示意图。图2A-2D为本揭示阵列基板制作方法流程示意图。本揭示提供一种阵列基板，包括：一衬底基板10、一第一平坦层11、一第二平坦层12、一第一电极层13、一反射层14以及一像素定义层15。所述第一平坦层11设置于一部分的所述衬底基板10上。所述第二平坦层12设置于另一部分的所述衬底基板10上，并且所述第一平坦层11与所述第二平坦层12之间形成有隔断槽20以暴露出所述衬底基板10。所述第一电极层13设置于所述第一平坦层11上。所述反射层14设置于所述第二平坦层12上并遮蔽所述第二平坦层12的侧面。所述像素定义层15设置于所述隔断槽20上并覆盖在部分的所述第一平坦层11与部分的所述第二平坦层12上。
所述阵列基板在衬底基板10上依次层叠设置薄膜晶体管层30及有机发光二极管(未图式)，其中，薄膜晶体管层30对应设置于衬底基板10的第一平坦层11下，衬底基板10设置有像素驱动电路(未图式)，所述有机发光二极管包括沿远离衬底10方向依次层叠设置的第一平坦层11、第二平坦层12、第一电极层13、反射层14、像素定义层15、发光层40及第二电极层16，所述发光层40设置于所述第一电极层13与所述反射层14上，所述第二电极层16设置于所述发光层40上，第一电极层13位于衬底基板10的所述薄膜晶体管层30的上方，所述发光层40及第二电极层16延伸至衬底基板10对应所述第二平坦层12的所述另一部分。所述发光层40射出的光线依次经过上述膜层及衬底基板10后从衬底基板10的出光面射出。
其中的衬底基板10可以为玻璃、石英、蓝宝石、树脂等常见的透明材料制作的基板。此外，阵列基板10中的第一电极层13及第二电极层16分别为阳极和阴极，其具体的设置根据阵列基板的设计要求而定；或者第一电极层13为阴极，相应的第二电极层16为阳极。发光层40发出的全部或部分光线经衬底基板10射出，通过所述反射层14将发光层40的侧向出光反射到显示面板(未图式)的出光方向，从而避免了光线在传播时经过其他膜层的吸收和折射损失。
在一实施例中，所述隔断槽20设置于所述第一平坦层11与所述第二平坦层12之间，用以供所述反射层14部分覆盖于其中。更详细地说，阵列基板包括多个呈阵列状排布的像素单元(未图式)，像素单元包括上述的有机发光二极管以及环设在有机发光二极管四周的像素定义层15，隔断槽20用于隔断本像素单元与相邻像素单元之间像素定义层15的连接，即相邻像素单元之间至少设有一个隔断槽20，反射层14基本上设置于所述第二平坦层12上，延伸至该隔断槽20内，以部分覆盖所述隔断槽20，即反射层14延伸覆盖于所述隔断槽20内的一侧壁21，并且进一步地延伸至覆盖于所述阵列基板10上，延伸至所述阵列基板10上的反射层14与所述第一平坦层11之间形成一间隙，即延伸至所述阵列基板10上的反射层14不接触所述第一平坦层11。须注意的是，所述反射层14覆盖隔断槽20的一侧壁21且未覆盖隔断槽20的另一侧壁22。此外，反射层14可以选用遮光材料制备，比如遮光金属，更进一步地，所述反射层14为所述第一电极层13的延伸部，所述反射层14的材质与所述第一电极层13的材质相同。如此，反射层14直接将发光层的侧向出光反射到显示面板的出光方向，减少了光线在显示面板中其他金属膜层与衬底基板10之间接触面上的反射，也减少了光线在其他膜层与衬底基板10之间接触面上发生的折射，从而使得更多的光线能够射出并避免了发光层40边缘漏光，提高了显示装置的显示效果。
通过上述描述可以看出，本实施例提供的阵列基板减少了基板内部发生折射与反射而形成杂散光的情况，同时，设置反射层更进一步将发光的出光集中反射到出光面，从而提高了显示面板的出光效率。
请参阅图2A-2D至图3，图3为本揭示阵列基板制作方法步骤示意图。所述制作方法包括：
步骤S01，提供一衬底基板；
步骤S02，利用一第一掩膜形成一第一平坦层于一部分的所述衬底基板上，其中步骤S01-S02对应参照于图2A；
步骤S03，利用一第二掩膜形成一第二平坦层于另一部分的所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板，其中步骤S03对应参照于图2B；
步骤S04，利用一第三掩膜形成一第一电极层于所述第一平坦层上，并形成一反射层于所述第二平坦层上，所述反射层遮蔽所述第二平坦层的侧面，其中步骤S03对应参照于图2C；以及
步骤S05，利用一第四掩膜形成像素定义层于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上，以形成一对彼此相隔的像素定义层，其中步骤S03对应参照于图2D。
在步骤S01中，更包括在衬底基板上形成薄膜晶体管层的步骤，其中，所述薄膜晶体管层对应设置于第一平坦层11下，所述衬底基板设置有像素驱动电路(未图式)，所述衬底基板可以为玻璃基板、蓝宝石基板、硅基板等。
在步骤S02中，在所述衬底基板上形成(例如采用涂覆的方式)光刻胶，通过第一掩膜(例如半色调掩膜板或灰色调掩膜板)进行曝光、显影以及蚀刻后，去除剩余光刻胶，形成第一平坦层。
在步骤S03中，增加了额外的第二掩膜，并先形成图案化的第二平坦层，通过光刻制程对图案化的第二平坦层进行图形化处理，如前一步骤所述，将多余部分蚀刻掉之后即形成第二平坦层。
在步骤S04中，利用第三掩膜先形成图案化的第一电极层以及图案化的反射层，并通过光刻制程对图案化的第一电极层进行图形化处理，于所述第一平坦层上形成第一电极层，并且利用第三掩膜并通过光刻制程对图案化的反射层进行图形化处理，于所述第二平坦层上形成反射层。
在步骤S05中，利用第四掩膜形成图案化的像素定义层，并通过光刻制程对图案化的像素定义层进行图形化处理，于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上形成一对彼此相隔的像素定义层。
在步骤S05中，更包括在衬底基板上形成有机发光二极管(未图式)的步骤，其中，所述有机发光二极管包括沿远离衬底方向依次层叠设置的第一平坦层、第二平坦层、第一电极层、反射层、像素定义层、发光层及第二电极层，所述发光层设置于所述第一电极层与所述反射层上，所述第二电极层设置于所述发光层上，第一电极层位于衬底基板的所述薄膜晶体管层的上方。所述发光层射出的光线依次经过上述膜层及衬底基板后从所述衬底基板的出光面射出。
发光层发出的全部或部分光线经衬底基板射出，通过所述反射层将发光层的侧向出光反射到显示面板的出光方向，从而避免了光线在传播时经过其他膜层的吸收和折射损失。
在一实施例中，所述隔断槽设置于所述第一平坦层11与所述第二平坦层12，用以供所述反射层覆盖于其中。更详细地说，阵列基板，包括多个呈阵列状排布的像素单元，像素单元包括上述的有机发光二极管以及环设在有机发光二极管四周的像素定义层，隔断槽用于隔断本像素单元与相邻像素单元之间像素定义层的连接，即相邻像素单元之间至少设有一个隔断槽，反射层基本上设置于所述第二平坦层上，延伸至该隔断槽内，以部分覆盖所述隔断槽，即反射层延伸覆盖于所述隔断槽内的一侧壁，并且进一步地延伸至覆盖于所述阵列基板上，延伸至所述阵列基板上的反射层与所述第一平坦层11之间形成一间隙，即延伸至所述阵列基板上的反射层不接触所述第一平坦层。此外，反射层可以选用遮光材料制备，比如遮光金属，更进一步地，所述反射层为所述第一电极层的延伸部，所述反射层的材质与所述第一电极层的材质相同。如此，反射层直接将发光层的侧向出光反射到显示面板的出光方向，减少了光线在显示面板中其他金属膜层与衬底基板之间接触面上的反射，也减少了光线在其他膜层与衬底基板之间接触面上发生的折射，从而使得更多的光线能够射出并避免了发光层边缘漏光，提高了显示装置的显示效果。
通过上述描述可以看出，本实施例提供的阵列基板制造方法，增加了第二掩膜形成第二平坦层的步骤，使的后续形成的反射层可以设置在第二平坦层侧面(即隔断槽侧壁)，如此可减少基板内部发生折射与反射而形成杂散光的情况，同时，设置反射层更进一步将发光的出光集中反射到出光面，不用更换平坦层和像素定义层的材料就可以达到增加出光量和防止发光层边缘漏光的效果。
本揭示具有如下的有益效果：本揭示提供一种阵列基板及其制作方法。在阵列基板的结构上，设置第二平坦层并在第二平坦层边缘设置反射层，反射层主要提供反射作用，将发光层的侧向出光反射到显示面板的出光方向，从而避免发光层的侧向出光发射到显示面板内部经过其他膜层的吸收和折射损失，造成发光层的发光效率降低，进而达到增加出光量的效果。并且反射层的反射作用进一步达到防止发光层边缘漏光的效果。另外在阵列基板的制作方法上，相较于传统的阵列基板制作工序，本揭示另外使用所述第二掩膜制备第二平坦层，并在第二平坦层边缘形成反射层，反射层提供的反射作用将发光层的侧向出光反射到显示面板的出光方向，并有效避免发光层的侧向出光产生漏光，从而不用更换平坦层和像素定义层的材料就可以达到增加出光量和防止发光层边缘漏光的效果。
综上所述，虽然本揭示已以优选实施例揭露如上，但上述优选实施例并非用以限制本揭示，本领域的普通技术人员，在不脱离本揭示的精神和范围内，均可作各种更动与润饰，因此本揭示的保护范围以权利要求界定的范围为准。

Claims (16)

  1. 一种阵列基板，包括：
    一衬底基板；
    一第一平坦层，设置于所述衬底基板上；
    一第二平坦层，设置于所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板；
    一第一电极层，设置于所述第一平坦层上；
    一反射层，设置于所述第二平坦层上并遮蔽所述第二平坦层的侧面；以及
    一像素定义层，设置于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上；
    其中所述反射层自所述第二平坦层延伸至所述阵列基板上并与所述第一平坦层之间形成一间隙。
  2. 根据权利要求1所述的阵列基板，其中还包括一薄膜晶体管层，所述薄膜晶体管层设置于所述衬底基板上，并且所述第一平坦层对应设置于所述薄膜晶体管层上
  3. 根据权利要求1所述的阵列基板，其中所述反射层设置于所述第二平坦层上并覆盖所述隔断槽的一侧壁且延伸至所述衬底基板上，从而所述第二平坦层设置于所述反射层与所述衬底基板之间。
  4. 根据权利要求1所述的阵列基板，其中所述反射层的材质与所述第一电极层的材质相同。
  5. 根据权利要求1所述的阵列基板，其中更包括一发光层与一第二电极层，所述发光层设置于所述第一电极层与所述反射层上，所述第二电极层设置于所述发光层上。
  6. 根据权利要求1所述的阵列基板，其中所述第二平坦层的厚度大于所述第一平坦层的厚度。
  7. 一种阵列基板，包括：
    一衬底基板；
    一第一平坦层，设置于所述衬底基板上；
    一第二平坦层，设置于所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板；
    一第一电极层，设置于所述第一平坦层上；
    一反射层，设置于所述第二平坦层上并遮蔽所述第二平坦层的侧面；以及
    一像素定义层，设置于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上。
  8. 根据权利要求7所述的阵列基板，其中还包括一薄膜晶体管层，所述薄膜晶体管层设置于所述衬底基板上，并且所述第一平坦层对应设置于所述薄膜晶体管层上
  9. 根据权利要求7所述的阵列基板，其中所述反射层设置于所述第二平坦层上并覆盖所述隔断槽的一侧壁且延伸至所述衬底基板上，从而所述第二平坦层设置于所述反射层与所述衬底基板之间。
  10. 根据权利要求7所述的阵列基板，其中所述反射层的材质与所述第一电极层的材质相同。
  11. 根据权利要求7所述的阵列基板，其中更包括一发光层与一第二电极层，所述发光层设置于所述第一电极层与所述反射层上，所述第二电极层设置于所述发光层上。
  12. 根据权利要求7所述的阵列基板，其中所述第二平坦层的厚度大于所述第一平坦层的厚度。
  13. 一种阵列基板的制作方法，包括以下步骤：
    提供一衬底基板；
    利用一第一掩膜形成一第一平坦层于对应于所述衬底基板上；
    利用一第二掩膜形成一第二平坦层于对应于所述衬底基板上，并且所述第一平坦层与所述第二平坦层之间形成有隔断槽以暴露出所述衬底基板；
    利用一第三掩膜形成一第一电极层于所述第一平坦层上，并形成一反射层于所述第二平坦层上，所述反射层遮蔽所述第二平坦层的侧面；以及
    利用一第四掩膜形成像素定义层于所述隔断槽上并覆盖在部分的所述第一平坦层与部分的所述第二平坦层上，以形成一对彼此相隔的像素定义层。
  14. 根据权利要求13所述的阵列基板的制作方法，其中所述方法更包括形成一薄膜晶体管层，所述薄膜晶体管层设置于所述衬底基板上，并且所述第一平坦层对应设置于所述薄膜晶体管层上。
  15. 根据权利要求13所述的阵列基板的制作方法，其中所述反射层设置于所述第二平坦层上并覆盖所述隔断槽的一侧壁且延伸至所述衬底基板上，从而所述第二平坦层设置于所述反射层与所述衬底基板之间。
  16. 根据权利要求13所述的阵列基板的制作方法，其中所述反射层的材质与所述第一电极层的材质相同。
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