WO2020215595A1 - 金属配线膜及其制作方法、薄膜晶体管 - Google Patents

金属配线膜及其制作方法、薄膜晶体管 Download PDF

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WO2020215595A1
WO2020215595A1 PCT/CN2019/106132 CN2019106132W WO2020215595A1 WO 2020215595 A1 WO2020215595 A1 WO 2020215595A1 CN 2019106132 W CN2019106132 W CN 2019106132W WO 2020215595 A1 WO2020215595 A1 WO 2020215595A1
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Prior art keywords
film layer
film
nickel
mass percentage
alloy
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French (fr)
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木村徹
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/631,203 priority Critical patent/US11430815B2/en
Publication of WO2020215595A1 publication Critical patent/WO2020215595A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Definitions

  • This application relates to the field of electronic display, and in particular to a metal wiring film, a manufacturing method thereof, and a thin film transistor.
  • the wiring structure in an existing display panel usually includes an Indium Tin Oxide (ITO) film and a metal wiring film located above the ITO film.
  • the metal wiring film usually includes a molybdenum-niobium alloy film (Mo-Nb) on both sides and an aluminum-niobium alloy (Al-Nd) located between the molybdenum alloy films.
  • the present application provides a metal wiring film, a manufacturing method thereof, and a thin film transistor, so as to eliminate the potential difference in the metal wiring film and avoid electrolytic corrosion of the metal wiring film.
  • a metal wiring film which includes:
  • the first film layer, a material forming the first film layer is a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%;
  • the second film layer, the second film layer is located above the first film layer, the material forming the second film layer is an aluminum neodymium alloy, and the mass percentage of neodymium in the aluminum neodymium alloy is between 1% and 5 %between;
  • the third film layer, the third film layer is located above the second film layer, and the material forming the third film layer is the same as the material forming the first film layer.
  • the nickel-copper alloy further includes metallic titanium, and the mass percentage of titanium in the nickel-copper alloy is between 1% and 10%.
  • the mass percentage of nickel in the nickel-copper alloy is 30%, the mass percentage of copper is 60%, and the mass percentage of titanium is 10%.
  • the mass percentage of neodymium in the aluminum neodymium alloy is 1%.
  • the thickness of the first film layer and the third film layer are the same, and the thickness of the second film layer is greater than or equal to two of the sum of the thicknesses of the first film layer and the third film layer. Times.
  • the thickness of the first film layer and the third film layer is between 20-60 nm, and the thickness of the second film layer is between 200-250 nm.
  • the present application also provides a thin film transistor, the thin film transistor includes a metal wiring film, and the metal wiring film includes:
  • the first film layer, a material forming the first film layer is a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%;
  • the second film layer, the second film layer is located above the first film layer, the material forming the second film layer is an aluminum neodymium alloy, and the mass percentage of neodymium in the aluminum neodymium alloy is between 1% and 5 %between;
  • the third film layer, the third film layer is located above the second film layer, and the material forming the third film layer is the same as the material forming the first film layer.
  • the nickel-copper alloy further includes metallic titanium, and the mass percentage of titanium in the nickel-copper alloy is between 1% and 10%.
  • the mass percentage of nickel in the nickel-copper alloy is 30%, the mass percentage of copper is 60%, and the mass percentage of titanium is 10%.
  • the mass percentage of neodymium in the aluminum neodymium alloy is 1%.
  • the thickness of the first film layer and the third film layer are the same, and the thickness of the second film layer is greater than or equal to two of the sum of the thicknesses of the first film layer and the third film layer. Times.
  • the thickness of the first film layer and the third film layer is between 20-60 nm, and the thickness of the second film layer is between 200-250 nm.
  • the present application also provides a method for manufacturing a metal wiring film in a thin film transistor.
  • the method includes the following steps:
  • the substrate comprising an active area and an insulating layer covering the active area
  • the material of the first film layer is a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%;
  • the material of the second film layer is an aluminum neodymium alloy, and the mass percentage of neodymium in the aluminum neodymium alloy is between 1% and 5%;
  • a third film layer is formed above the second film layer, and the material of the third film layer is the same as the material of the first film layer.
  • the present application also provides a method for forming the first film layer and the third film layer as follows:
  • the pressure of the vacuum chamber is less than or equal to 4 ⁇ 10 -5 Pa;
  • a nickel-copper alloy thin film with a thickness of 20-60 nm is formed by a direct current sputtering method.
  • the present application also provides a method for forming the second film layer as follows:
  • the pressure of the vacuum chamber is less than or equal to 4 ⁇ 10 -5 Pa;
  • An aluminum neodymium alloy is used as a target, and an aluminum neodymium alloy film with a thickness of 200-250 nm is formed by a direct current sputtering method.
  • This application uses a nickel-copper alloy to replace the molybdenum-niobium alloy in the prior art to form the first film layer and the third film layer in the metal wiring film, and uses an aluminum neodymium alloy to replace the aluminum-niobium alloy in the prior art to form the second film layer And by setting the thickness of the film layer, the thickness of the second film layer is greater than or equal to twice the sum of the thickness of the first film layer and the third film layer, thereby effectively eliminating the potential difference between each film layer, Avoid electrolytic corrosion of the metal wiring film.
  • FIG. 1 is a schematic structural diagram of a metal wiring film in a specific embodiment of the application
  • FIG. 2 is a flowchart of a method for manufacturing a metal wiring film in a specific embodiment of the application.
  • the wiring structure in the existing display panel usually includes tin-doped indium oxide film (Indium Tin Oxide, ITO) and a metal wiring film located above the ITO film.
  • the metal wiring film usually includes a molybdenum-niobium alloy film (Mo-Nb) on both sides and an aluminum-niobium alloy (Al-Nd) located between the molybdenum alloy films.
  • the present application provides a metal wiring film, a manufacturing method thereof, and a thin film transistor, so as to eliminate the potential difference in the metal wiring film and prevent the metal wiring film from being electrolytically corroded.
  • the metal wiring film is on the ITO film 20, and the ITO film 20 is on the substrate 10.
  • the metal wiring film includes: a first film layer 30, a second film layer 40, and a third film layer 50.
  • the material forming the first film layer 30 is a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%.
  • Metal copper and metal nickel can be infinitely dissolved to form a continuous solid solution. Therefore, regardless of the ratio of metallic copper to metallic nickel, the nickel-copper alloy is always a single-phase alloy.
  • adding metallic nickel to metallic copper can significantly increase the strength, corrosion resistance, hardness, electrical resistance and thermoelectricity of metallic copper, and reduce the temperature coefficient of resistivity. Therefore, in order to enhance the conductivity of the metal wiring film, preferably, the mass percentage of nickel in the nickel-copper alloy is 40% or 50%.
  • Titanium metal has low density, high mechanical strength, corrosion resistance, and strong ductility. Therefore, adding titanium metal to nickel-copper alloys can effectively inhibit the generation of hot cracks and pores.
  • the nickel-copper alloy in order to make the metal wiring film have better ductility, also contains metallic titanium, and the mass percentage of titanium in the nickel-copper alloy is between 1% and 10%. Between, such as 5% or 8%.
  • the mass percentage of nickel in the nickel-copper alloy is 30%, the mass percentage of copper is 60%, and the mass percentage of titanium is 10%.
  • metal manganese can also be used instead of metal titanium to achieve similar effects.
  • the second film layer 40 is located above the first film layer 30, and the material of the second film layer 40 is aluminum neodymium alloy.
  • the aluminum neodymium alloy has better corrosion resistance and can prevent the metal aluminum in the second film layer 40 from being electrolytically corroded due to the potential difference between the film layers.
  • the mass percentage of neodymium in the aluminum neodymium alloy is between 1% and 5%, such as 1%, 1.5%, or 2.5%.
  • the third film layer 50 is located above the second film layer 40, and the material for forming the third film layer 50 is the same as the material for forming the first film layer 30. That is, the material and thickness of the third film layer 50 are the same as those of the first film layer 30, so as to avoid the potential difference between the first film layer 30 and the third film layer 50 due to the resistance difference of the film layers.
  • the metal distribution film is corroded by electrolysis. Therefore, in this embodiment, the material forming the first film layer 30 is also a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%. In order to enhance the conductivity of the metal wiring film, preferably, the mass percentage of nickel in the nickel-copper alloy is 40% or 50%.
  • the thickness of the first film layer 30 and the third film layer 50 is between 20-60 nm.
  • the thickness of the first film layer 30 and the third film layer 50 is 50 nm.
  • the thickness of the second film layer 40 is greater than or equal to twice the thickness of the first film layer 30 and the third film layer 50, that is, the thickness of the second film layer 40 is between 200-250 nm. In this embodiment, the thickness of the second film layer 40 is 240 nm.
  • the present application also provides a thin film transistor.
  • the thin film transistor includes a substrate 10, an ITO thin film 20 on the substrate 10 and a metal wiring film on the ITO thin film 20.
  • the metal wiring film includes a first film layer 30, a second film layer 40, and a third film layer 50 that are stacked, and the materials and structures of each film layer are as described above and will not be repeated here.
  • this application also provides a method for manufacturing a metal wiring film in a thin film transistor.
  • the method includes the following steps:
  • a third film layer 50 located above the second film layer 40 is formed.
  • the substrate 10 includes an active area and an insulating layer covering the active area.
  • the active region includes a channel region and source and drain regions located on both sides of the channel region.
  • the active region further includes a gate stack located above the channel region, and the gate stack includes a gate dielectric layer and a gate metal layer located above the gate dielectric layer.
  • the gate stack and the source and drain regions are covered by an interlayer dielectric layer.
  • the interlayer dielectric layer has through holes exposing the source and drain regions.
  • a transparent conductive film 20 is formed on the substrate 10. Wherein, at least part of the transparent conductive film is electrically connected to the source and drain regions through a plurality of through holes 20.
  • a first film layer 30 covering the transparent conductive film 20 is formed.
  • the material of the first film layer 30 is a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%. .
  • the material forming the first film layer 30 is a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%.
  • Metal copper and metal nickel can be infinitely dissolved to form a continuous solid solution. Therefore, regardless of the ratio of metallic copper to metallic nickel, the nickel-copper alloy is always a single-phase alloy.
  • adding metallic nickel to metallic copper can significantly increase the strength, corrosion resistance, hardness, electrical resistance and thermoelectricity of metallic copper, and reduce the temperature coefficient of resistivity. Therefore, in order to enhance the conductivity of the metal wiring film, preferably, the mass percentage of nickel in the nickel-copper alloy is 40% or 50%.
  • Titanium metal has low density, high mechanical strength, corrosion resistance, and strong ductility. Therefore, adding titanium metal to nickel-copper alloys can effectively inhibit the generation of hot cracks and pores.
  • the nickel-copper alloy in order to make the metal wiring film have better ductility, also contains metallic titanium, and the mass percentage of titanium in the nickel-copper alloy is between 1% and 10%. Between, such as 5% or 8%.
  • the mass percentage of nickel in the nickel-copper alloy is 30%, the mass percentage of copper is 60%, and the mass percentage of titanium is 10%.
  • metal manganese can also be used instead of metal titanium to achieve similar effects.
  • the method for forming the first film layer 30 includes: providing a vacuum chamber, and the pressure of the vacuum chamber is less than or equal to 4 ⁇ 10 -5 Pa. After that, argon is poured into the vacuum chamber so that the pressure in the vacuum chamber is between 0.2-1 Pa. Finally, using a nickel-copper alloy as a target, a nickel-copper alloy thin film with a thickness of 20-60 nm is formed by DC sputtering. In this embodiment, the thickness of the first film layer 30 is between 20 and 60 nm. Preferably, the thickness of the first film layer 30 is 50 nm.
  • a second film layer 40 located above the first film layer 30 is formed.
  • the material of the second film layer 40 is an aluminum neodymium alloy, and the mass percentage of neodymium in the aluminum neodymium alloy is between 1% and 5%. between.
  • the aluminum neodymium alloy has better corrosion resistance and can prevent the metal aluminum in the second film layer 40 from being electrolytically corroded due to the potential difference between the film layers.
  • the mass percentage of neodymium in the aluminum neodymium alloy is between 1% and 5%, such as 1%, 1.5%, or 2.5%.
  • the method for forming the second film layer 40 is: providing a vacuum chamber, and the pressure of the vacuum chamber is less than or equal to 4 ⁇ 10 -5 Pa. After that, argon is poured into the vacuum chamber so that the pressure in the vacuum chamber is between 0.2-1 Pa. Finally, an aluminum neodymium alloy is used as a target material, and an aluminum neodymium alloy thin film with a thickness of 200-250 nm is formed by a direct current sputtering method. In this embodiment, the thickness of the second film layer 40 is between 200 nm and 260 nm. Preferably, the thickness of the second film layer 40 is 240 nm.
  • the material and thickness of the third film layer 50 are the same as those of the first film layer, so as to avoid the formation of a potential between the first film layer 30 and the third film layer 50 due to the resistance difference of the film layers. Poor, to prevent the metal distribution film from being corroded by electrolysis. Therefore, in this embodiment, the material forming the first film layer 30 is also a nickel-copper alloy, and the mass percentage of nickel in the nickel-copper alloy is between 30% and 70%. In order to enhance the conductivity of the metal wiring film, preferably, the mass percentage of nickel in the nickel-copper alloy is 40% or 50%. Preferably, the mass percentage of nickel in the nickel-copper alloy is 30%, the mass percentage of copper is 60%, and the mass percentage of titanium is 10%. In other embodiments, metal manganese can also be used instead of metal titanium to achieve similar effects.
  • the method of forming the third film layer 50 is the same as the method of forming the first film layer 30, and will not be repeated here.
  • This application uses a nickel-copper alloy to replace the molybdenum-niobium alloy in the prior art to form the first film layer and the third film layer in the metal wiring film, and uses an aluminum neodymium alloy to replace the aluminum-niobium alloy in the prior art to form the second film layer And by setting the thickness of the film layer, the thickness of the second film layer is greater than or equal to twice the sum of the thickness of the first film layer and the third film layer, thereby effectively eliminating the potential difference between each film layer, Avoid electrolytic corrosion of the metal wiring film.

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)

Abstract

一种金属配线膜及其制作方法、薄膜晶体管，其中所述金属配线膜包括：第一膜层（30），形成所述第一膜层（30）的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30％～70％之间；第二膜层（40），形成所述第二膜层（40）的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1％～5％之间；第三膜层（50），形成所述第三膜层（50）的材料与形成所述第一膜层（30）的材料相同。

Description

金属配线膜及其制作方法、薄膜晶体管 技术领域
本申请涉及电子显示领域，尤其涉及一种金属配线膜及其制作方法、薄膜晶体管。
 背景技术
为了实现透明显示，现有技术中的常用做法是采用透明导电膜形成显示屏的薄膜晶体管中的走线。现有的显示面板中的走线结构通常包括掺锡氧化铟薄膜（Indium Tin Oxide, ITO）以及位于所述ITO膜上方的金属配线膜。所述金属配线膜通常包括两侧钼铌合金膜（Mo-Nb）和位于所述钼合金膜之间的铝铌合金（Al-Nd）。
 技术问题
由于钼铌合金和铝铌合金的单位阻抗相差较大，因此铝铌合金与位于其两侧的铝铌合金之间存在电位差。这一电位差的存在，导致铝合金膜被电解腐蚀，从而破坏保护膜的完整性，同时增大金属配线膜的电阻，影响显示面板的质量。
 技术解决方案
本申请提供了一种金属配线膜及其制作方法、薄膜晶体管，以消除金属配线膜中的电位差，避免金属配线膜被电解腐蚀。
具体的，本申请提供了一种金属配线膜，其包括：
第一膜层，形成所述第一膜层的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间；
第二膜层，所述第二膜层位于所述第一膜层上方，形成所述第二膜层的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1%～5%之间；
第三膜层，所述第三膜层位于所述第二膜层上方，形成所述第三膜层的材料与形成所述第一膜层的材料相同。
根据本申请的其中一个方面，所述镍铜合金中还包含金属钛，钛在所述镍铜合金中的质量百分比介于1%～10%之间。
根据本申请的其中一个方面，所述镍铜合金中镍的质量百分比为30%，铜的质量百分比为60%，钛的质量百分比为10%。
根据本申请的其中一个方面，所述铝钕合金中钕的质量百分比为1%。
根据本申请的其中一个方面，所述第一膜层和第三膜层的厚度相同，所述第二膜层的厚度大于等于所述第一膜层和第三膜层的厚度的和的两倍。
根据本申请的其中一个方面，所述第一膜层和第三膜层的厚度介于20～60nm之间，所述第二膜层的厚度介于200～250nm之间。
相应的，本申请还提供了一种薄膜晶体管，所述薄膜晶体管包括金属配线膜，所述金属配线膜包括：
第一膜层，形成所述第一膜层的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间；
第二膜层，所述第二膜层位于所述第一膜层上方，形成所述第二膜层的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1%～5%之间；
第三膜层，所述第三膜层位于所述第二膜层上方，形成所述第三膜层的材料与形成所述第一膜层的材料相同。
根据本申请的其中一个方面，所述镍铜合金中还包含金属钛，钛在所述镍铜合金中的质量百分比介于1%～10%之间。
根据本申请的其中一个方面，所述镍铜合金中镍的质量百分比为30%，铜的质量百分比为60%，钛的质量百分比为10%。
根据本申请的其中一个方面，所述铝钕合金中钕的质量百分比为1%。
根据本申请的其中一个方面，所述第一膜层和第三膜层的厚度相同，所述第二膜层的厚度大于等于所述第一膜层和第三膜层的厚度的和的两倍。
根据本申请的其中一个方面，所述第一膜层和第三膜层的厚度介于20～60nm之间，所述第二膜层的厚度介于200～250nm之间。
相应的，本申请还提供了一种薄膜晶体管中的金属配线膜的制作方法，该方法包括以下步骤：
提供基板，所述基板包含有源区和覆盖所述有源区的绝缘层；
在所述绝缘层上形成透明导电膜；
形成覆盖所述透明导电膜的第一膜层，所述第一膜层的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间；
形成位于所述第一膜层上方的第二膜层，所述第二膜层的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1%～5%之间；
形成位于所述第二膜层上方的第三膜层，所述第三膜层的材料与所述第一膜层的材料相同。
相应的，本申请还提供了形成所述第一膜层和第三膜层的方法为：
提供真空腔，所述真空腔的压强小于等于4×10 -5Pa；
在所述真空腔中倒入氩气，使所述真空腔中的压强介于0.2~1Pa之间；
使用镍铜合金作为靶材，通过直流溅射的方法形成厚度介于20～60nm之间的镍铜合金薄膜。
相应的，本申请还提供了形成所述第二膜层的方法为：
提供真空腔，所述真空腔的压强小于等于4×10 -5Pa；
在所述真空腔中倒入氩气，使所述真空腔中的压强介于0.2~1Pa之间；
使用铝钕合金作为靶材，通过直流溅射的方法形成厚度介于200～250nm之间的铝钕合金薄膜。
 有益效果
本申请采用镍铜合金代替现有技术中的钼铌合金形成金属配线膜中的第一膜层和第三膜层，采用铝钕合金代替现有技术中的铝铌合金形成第二膜层，并且通过设置膜层厚度，使第二膜层的厚度大于等于所述第一膜层和第三膜层的厚度的和的两倍，从而有效的消除了各个膜层之间的电位差，避免金属配线膜被电解腐蚀。
 附图说明
图1为本申请的一个具体实施例中的金属配线膜的结构示意图；
图2为本申请的一个具体实施例中的金属配线膜的制作方法的流程图。
本申请的实施例方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
首先对现有技术进行简要说明。现有的显示面板中的走线结构通常包括掺锡氧化铟薄膜（Indium Tin Oxide, ITO）以及位于所述ITO膜上方的金属配线膜。所述金属配线膜通常包括两侧钼铌合金膜（Mo-Nb）和位于所述钼合金膜之间的铝铌合金（Al-Nd）。
由于钼铌合金和铝铌合金的单位阻抗相差较大，因此铝铌合金与位于其两侧的铝铌合金之间存在电位差。这一电位差的存在，导致铝合金膜被电解腐蚀，从而破坏保护膜的完整性，同时增大金属配线膜的电阻，影响显示面板的质量。
为了解决上述问题，本申请提供了一种金属配线膜及其制作方法、薄膜晶体管，以消除金属配线膜中的电位差，避免金属配线膜被电解腐蚀。
参见图1，所述金属配线膜位于ITO薄膜20上，所述ITO薄膜20位于基板10上。具体的，所述金属配线膜包括：第一膜层30、第二膜层40和第三膜层50。
在本实施例中，形成所述第一膜层30的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间。金属铜和金属镍可无限固溶，形成连续固溶体。因此，不论金属铜和金属镍的比例多少，镍铜合金中恒为单相合金。同时，在金属铜中加入金属镍能显著提高金属铜的强度、耐蚀性、硬度、电阻和热电性，并降低电阻率的温度系数。因此，为了增强金属配线膜的导电性，优选的，所述镍铜合金中镍的质量百分比为40%或50%。
金属钛密度小、机械强度大，同时耐腐蚀，且具有极强的延展性，因此，在镍铜合金中加入金属钛能够有效的抑制热裂纹和气孔的产生。在本实施例中，为了使所述金属配线膜具有更好的延展性，所述镍铜合金中还包含金属钛，钛在所述镍铜合金中的质量百分比介于1%～10%之间，例如5%或8%。优选的，所述镍铜合金中镍的质量百分比为30%，铜的质量百分比为60%，钛的质量百分比为10%。在其他实施例中，也可以采用金属锰代替金属钛获得相似的效果。
所述第二膜层40位于所述第一膜层30上方，形成所述第二膜层40的材料为铝钕合金。相比于铝铌合金，所述铝钕合金具有更好的耐腐蚀性，能避免第二膜层40中的金属铝由于膜层间的电位差被电解腐蚀。优选的，铝钕合金中钕的质量百分比介于1%～5%之间，例如1%、1.5%或2.5%。
在本实施例中，所述第三膜层50位于所述第二膜层40上方，且形成所述第三膜层50的材料与形成所述第一膜层30的材料相同。即，所述第三膜层50的材料和厚度均与第一膜层30相同，从而能够避免由于膜层的电阻差异而在第一膜层30和第三膜层50间形成电位差，避免所述金属配电膜被电解腐蚀。因此，在本实施例中，形成所述第一膜层30的材料也是镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间。为了增强金属配线膜的导电性，优选的，所述镍铜合金中镍的质量百分比为40%或50%。
在本实施例中，所述第一膜层30和第三膜层50的厚度介于20～60nm之间，优选的，所述第一膜层30和第三膜层50的厚度为50nm。所述第二膜层40的厚度大于等于所述第一膜层30和第三膜层50的厚度的两倍，即所述第二膜层40的厚度介于200～250nm之间。在本实施例中，所述第二膜层40的厚度为240nm。
相应的，本申请还提供了一种薄膜晶体管，参见图1，所述薄膜晶体管包括基板10、位于基板10上的ITO薄膜20和位于所述ITO薄膜20上的金属配线膜。所述金属配线膜包括层叠设置的第一膜层30、第二膜层40和第三膜层50，各个膜层的材料和结构如前所述，在此不再赘述。
相应的，本申请还提供了一种薄膜晶体管中的金属配线膜的制作方法。参见图2，该方法包括以下步骤：
提供基板10；
在所述基板10上形成透明导电膜20；
形成覆盖所述透明导电膜的第一膜层30；
形成位于所述第一膜层30上方的第二膜层40；
形成位于所述第二膜层40上方的第三膜层50。
下面将对上述步骤进行详细说明。
在本实施例中，所述基板10包含有源区和覆盖所述有源区的绝缘层。所述有源区包括沟道区和位于所述沟道区两侧的源漏区。此外，所述有源区还包括位于所述沟道区上方的栅极叠层，所述栅极叠层包括栅极介质层和位于所述栅极介质层上方的栅极金属层。所述栅极叠层和所述源漏区被层间介质层覆盖。所述层间介质层上具有暴露出所述源漏区的通孔。
之后，在所述基板10上形成透明导电膜20。其中，至少部分所述透明导电膜通20过多数通孔与所述源漏区电连接。
之后，形成覆盖所述透明导电膜20的第一膜层30，所述第一膜层30的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间。
在本实施例中，形成所述第一膜层30的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间。金属铜和金属镍可无限固溶，形成连续固溶体。因此，不论金属铜和金属镍的比例多少，镍铜合金中恒为单相合金。同时，在金属铜中加入金属镍能显著提高金属铜的强度、耐蚀性、硬度、电阻和热电性，并降低电阻率的温度系数。因此，为了增强金属配线膜的导电性，优选的，所述镍铜合金中镍的质量百分比为40%或50%。
金属钛密度小、机械强度大，同时耐腐蚀，且具有极强的延展性，因此，在镍铜合金中加入金属钛能够有效的抑制热裂纹和气孔的产生。在本实施例中，为了使所述金属配线膜具有更好的延展性，所述镍铜合金中还包含金属钛，钛在所述镍铜合金中的质量百分比介于1%～10%之间，例如5%或8%。优选的，所述镍铜合金中镍的质量百分比为30%，铜的质量百分比为60%，钛的质量百分比为10%。在其他实施例中，也可以采用金属锰代替金属钛获得相似的效果。
具体的，形成所述第一膜层30的方法包括：提供真空腔，所述真空腔的压强小于等于4×10 -5Pa。之后，在所述真空腔中倒入氩气，使所述真空腔中的压强介于0.2~1Pa之间。最后，使用镍铜合金作为靶材，通过直流溅射的方法形成厚度介于20～60nm之间的镍铜合金薄膜。在本实施例中，所述第一膜层30的厚度介于20～60nm之间，优选的，所述第一膜层30的厚度为50nm。
之后，形成位于所述第一膜层30上方的第二膜层40，所述第二膜层40的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1%～5%之间。相比于铝铌合金，所述铝钕合金具有更好的耐腐蚀性，能避免第二膜层40中的金属铝由于膜层间的电位差被电解腐蚀。优选的，铝钕合金中钕的质量百分比介于1%～5%之间，例如1%、1.5%或2.5%。
在本实施例中，形成所述第二膜层40的方法为：提供真空腔，所述真空腔的压强小于等于4×10 -5Pa。之后，在所述真空腔中倒入氩气，使所述真空腔中的压强介于0.2~1Pa之间。最后，使用铝钕合金作为靶材，通过直流溅射的方法形成厚度介于200～250nm之间的铝钕合金薄膜。在本实施例中，所述第二膜层40的厚度介于200～260nm之间，优选的，所述第二膜层40的厚度为240nm。
在本实施例中，所述第三膜层50的材料和厚度均与第一膜层相同，从而能够避免由于膜层的电阻差异而在第一膜层30和第三膜层50间形成电位差，避免所述金属配电膜被电解腐蚀。因此，在本实施例中，形成所述第一膜层30的材料也是镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间。为了增强金属配线膜的导电性，优选的，所述镍铜合金中镍的质量百分比为40%或50%。优选的，所述镍铜合金中镍的质量百分比为30%，铜的质量百分比为60%，钛的质量百分比为10%。在其他实施例中，也可以采用金属锰代替金属钛获得相似的效果。
形成所述第三膜层50的方法与形成所述第一膜层30的方法相同，在此不再赘述。
本申请采用镍铜合金代替现有技术中的钼铌合金形成金属配线膜中的第一膜层和第三膜层，采用铝钕合金代替现有技术中的铝铌合金形成第二膜层，并且通过设置膜层厚度，使第二膜层的厚度大于等于所述第一膜层和第三膜层的厚度的和的两倍，从而有效的消除了各个膜层之间的电位差，避免金属配线膜被电解腐蚀。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (15)

  1. 一种金属配线膜，其中，所述金属配线膜包括：
    第一膜层，形成所述第一膜层的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间；
    第二膜层，所述第二膜层位于所述第一膜层上方，形成所述第二膜层的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1%～5%之间；
    第三膜层，所述第三膜层位于所述第二膜层上方，形成所述第三膜层的材料与形成所述第一膜层的材料相同。
  2. 根据权利要求1所述的金属配线膜，其中，所述镍铜合金中还包含金属钛，钛在所述镍铜合金中的质量百分比介于1%～10%之间。
  3. 根据权利要求2所述的金属配线膜，其中，所述镍铜合金中镍的质量百分比为30%，铜的质量百分比为60%，钛的质量百分比为10%。
  4. 根据权利要求1所述的金属配线膜，其中，所述铝钕合金中钕的质量百分比为1%。
  5. 根据权利要求1所述的金属配线膜，其中，所述第一膜层和第三膜层的厚度相同，所述第二膜层的厚度大于等于所述第一膜层和第三膜层的厚度的和的两倍。
  6. 根据权利要求5所述的金属配线膜，其中，所述第一膜层和第三膜层的厚度介于20～60nm之间，所述第二膜层的厚度介于200～250nm之间。
  7. 一种薄膜晶体管，其中，所述薄膜晶体管包括金属配线膜，所述金属配线膜包括：
    第一膜层，形成所述第一膜层的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间；
    第二膜层，所述第二膜层位于所述第一膜层上方，形成所述第二膜层的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1%～5%之间；
    第三膜层，所述第三膜层位于所述第二膜层上方，形成所述第三膜层的材料与形成所述第一膜层的材料相同。
  8. 根据权利要求7所述的薄膜晶体管，其中，所述镍铜合金中还包含金属钛，钛在所述镍铜合金中的质量百分比介于1%～10%之间。
  9. 根据权利要求8所述的薄膜晶体管，其中，所述镍铜合金中镍的质量百分比为30%，铜的质量百分比为60%，钛的质量百分比为10%。
  10. 根据权利要求7所述的薄膜晶体管，其中，所述铝钕合金中钕的质量百分比为1%。
  11. 根据权利要求7所述的薄膜晶体管，其中，所述第一膜层和第三膜层的厚度相同，所述第二膜层的厚度大于等于所述第一膜层和第三膜层的厚度的和的两倍。
  12. 根据权利要求11所述的薄膜晶体管，其中，所述第一膜层和第三膜层的厚度介于20～60nm之间，所述第二膜层的厚度介于200～250nm之间。
  13. 一种薄膜晶体管中的金属配线膜的制作方法，其中，该方法包括以下步骤：
    提供基板，所述基板包含有源区和覆盖所述有源区的绝缘层；
    在所述绝缘层上形成透明导电膜；
    形成覆盖所述透明导电膜的第一膜层，所述第一膜层的材料为镍铜合金，所述镍铜合金中镍的质量百分比介于30%～70%之间；
    形成位于所述第一膜层上方的第二膜层，所述第二膜层的材料为铝钕合金，所述铝钕合金中钕的质量百分比介于1%～5%之间；
    形成位于所述第二膜层上方的第三膜层，所述第三膜层的材料与所述第一膜层的材料相同。
  14. 根据权利要求13所述的金属配线膜的制作方法，其中，形成所述第一膜层和第三膜层的方法为：
    提供真空腔，所述真空腔的压强小于等于4×10 -5Pa；
    在所述真空腔中倒入氩气，使所述真空腔中的压强介于0.2~1Pa之间；
    使用镍铜合金作为靶材，通过直流溅射的方法形成厚度介于20～60nm之间的镍铜合金薄膜。
  15. 根据权利要求13所述的金属配线膜的制作方法，其中，形成所述第二膜层的方法为：
    提供真空腔，所述真空腔的压强小于等于4×10 -5Pa；
    在所述真空腔中倒入氩气，使所述真空腔中的压强介于0.2~1Pa之间；
    使用铝钕合金作为靶材，通过直流溅射的方法形成厚度介于200～250nm之间的铝钕合金薄膜。
PCT/CN2019/106132 2019-04-22 2019-09-17 金属配线膜及其制作方法、薄膜晶体管 Ceased WO2020215595A1 (zh)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120133271A1 (en) * 2009-08-26 2012-05-31 Sharp Kabushiki Kaisha El device and manufacturing method of the device
CN103855214A (zh) * 2012-12-05 2014-06-11 元太科技工业股份有限公司 半导体元件及其制作方法
CN205406523U (zh) * 2016-03-23 2016-07-27 信利半导体有限公司 一种oled的引线电极及oled显示器
CN107204320A (zh) * 2017-05-25 2017-09-26 京东方科技集团股份有限公司 金属导线、薄膜晶体管及制作方法、阵列基板和显示装置
CN110085602A (zh) * 2019-04-22 2019-08-02 武汉华星光电半导体显示技术有限公司 金属配线膜及其制作方法、薄膜晶体管

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012160381A (ja) * 2011-02-01 2012-08-23 Sanyo Shinku Kogyo Kk 金属膜
KR101844953B1 (ko) * 2011-03-02 2018-04-04 삼성디스플레이 주식회사 박막 트랜지스터 표시판 및 그 제조 방법
CN102925753B (zh) * 2012-10-30 2014-10-15 沈阳难熔金属研究所 一种具有高强度高耐腐蚀性的镍铜合金及其制造方法
KR20150075908A (ko) * 2013-12-26 2015-07-06 삼성전기주식회사 터치 센서 및 그 제조방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120133271A1 (en) * 2009-08-26 2012-05-31 Sharp Kabushiki Kaisha El device and manufacturing method of the device
CN103855214A (zh) * 2012-12-05 2014-06-11 元太科技工业股份有限公司 半导体元件及其制作方法
CN205406523U (zh) * 2016-03-23 2016-07-27 信利半导体有限公司 一种oled的引线电极及oled显示器
CN107204320A (zh) * 2017-05-25 2017-09-26 京东方科技集团股份有限公司 金属导线、薄膜晶体管及制作方法、阵列基板和显示装置
CN110085602A (zh) * 2019-04-22 2019-08-02 武汉华星光电半导体显示技术有限公司 金属配线膜及其制作方法、薄膜晶体管

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