WO2020199726A1 - 一种波长锁定方法以及装置 - Google Patents

一种波长锁定方法以及装置 Download PDF

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Publication number
WO2020199726A1
WO2020199726A1 PCT/CN2020/072666 CN2020072666W WO2020199726A1 WO 2020199726 A1 WO2020199726 A1 WO 2020199726A1 CN 2020072666 W CN2020072666 W CN 2020072666W WO 2020199726 A1 WO2020199726 A1 WO 2020199726A1
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WIPO (PCT)
Prior art keywords
intermediate variable
locking device
power value
wavelength locking
coordinate transformation
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PCT/CN2020/072666
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English (en)
French (fr)
Inventor
张诗劼
冀瑞强
米光灿
张欣
周素杰
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华为技术有限公司
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Publication of WO2020199726A1 publication Critical patent/WO2020199726A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/28—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals
    • G02B6/293—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
    • G02B6/29331—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means operating by evanescent wave coupling
    • G02B6/29335—Evanescent coupling to a resonator cavity, i.e. between a waveguide mode and a resonant mode of the cavity
    • G02B6/29338—Loop resonators
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/28—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals
    • G02B6/293—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/28—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals
    • G02B6/293—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
    • G02B6/29346—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means operating by wave or beam interference
    • G02B6/29361—Interference filters, e.g. multilayer coatings, thin film filters, dichroic splitters or mirrors based on multilayers, WDM filters
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/28—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals
    • G02B6/293—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
    • G02B6/29346—Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means operating by wave or beam interference
    • G02B6/29361—Interference filters, e.g. multilayer coatings, thin film filters, dichroic splitters or mirrors based on multilayers, WDM filters
    • G02B6/29362—Serial cascade of filters or filtering operations, e.g. for a large number of channels

Definitions

  • This application relates to the field of communications, and in particular to a wavelength locking method and device.
  • an optical filter In order to select the optical wavelength, the essential need is an optical filter.
  • An optical filter can be composed of cascaded micro-rings, or can be composed of cascaded MZI and other structures. By designing and differentiating the physical size and characteristics of the cascaded device, the vernier effect of the FSR can be used to expand the tuning range of the filter, that is, the filter wavelength range.
  • the cascaded micro-ring filter consists of N micro-rings in series, and has four ports, namely In, Thru, Add, and Drop.
  • the filter spectrum of each microring is different, and the filter spectrum of each microring can be moved left and right by heating the microring by a metal layer heater (heater) designed on the microring.
  • the incident light wavelength interval is very small, the drop wavelength point must be accurate to the range of 1nm, and in order to make its performance superior, in the face of changes in the external environment, the corresponding drop wavelength must be kept fixed.
  • the cascaded micro-loop filter can be continuously feedback control through the feedback system as shown in Fig. 1 to stabilize the resonant peak of the cascaded micro-loop filter in a dynamically balanced state.
  • the initial value of ⁇ avg and ⁇ diff is zero.
  • a small step length variable is added to the value of ⁇ avg or ⁇ diff to change the voltage on the two rings at a time, and then the off-chip photodetector (Photodiode, PD) Reading value, compare whether PD value increased or decreased compared with the last time, and then judge and feedback to continue to increase or decrease the value of ⁇ avg or ⁇ diff to achieve the purpose of changing the phase of the two micro-rings, so as to achieve the two rings The effect of voltage linkage.
  • the filter mostly adopts a high-order micro-loop filter with a vernier effect or a cascaded MZI filter.
  • High-order micro-ring filters or cascaded MZI filters with vernier effect are more sensitive to wavelength, and the resonance peaks of each ring are caused by the drastic changes of the external environment temperature, wavelength jump, jitter, drift and other interference.
  • the error caused by the wavelength misalignment will increase exponentially. Therefore, simply adopting the method of converting the voltage on the ring to the phase difference between the two rings and the phase difference between the two rings will no longer be suitable for the lock control of high-order micro-rings.
  • the embodiments of the present application provide a wavelength locking method and device, which are used to improve the accuracy of wavelength locking of high-order microrings.
  • an embodiment of the present application provides a wavelength locking method, which is applied to a cascade filter including N rings, where N is an integer greater than or equal to 2.
  • the wavelength locking method specifically includes: the wavelength locking device establishes A look-up table for indicating the corresponding relationship between the filter wavelength of the cascade filter and the voltage value combination of the cascade filter; then the incident optical signal is acquired at the wavelength locking device, and the target filtering wavelength of the cascade filter is determined
  • the wavelength locking device loads the initial voltage value combination for the cascade filter; the wavelength locking device determines the intermediate variable combination according to the coordinate transformation matrix and the initial voltage value combination, wherein the coordinate transformation matrix is an N*N matrix;
  • the wavelength locking device adjusts at least one intermediate variable in the intermediate variable combination to perform iterative feedback adjustment according to the first preset step length, and records the adjusted power value of the cascaded filter; When the value is the largest, the wavelength locking device outputs the target filter from the incident light signal.
  • the cascade filter can be composed of N microrings, or N Mach-Zehnder Interferometer (MZI) or other possible filter components. Specifically, it is not here. Make a limit.
  • MZI Mach-Zehnder Interferometer
  • the wavelength locking device uses a coordinate transformation matrix to generate intermediate variables, and performs iterative feedback in parallel, so that the wavelength locking accuracy is higher, the response to external environmental influences is more rapid, and the judgment of a good locking state becomes more accurate and accurate. excellent.
  • the wavelength locking device can generate intermediate variable combinations in the following manner:
  • the wavelength locking device selects the first coordinate transformation matrix according to a preset condition based on a matrix condition number, wherein the matrix condition number is within a preset range, and the first coordinate transformation matrix is an N*N matrix; finally the wavelength locking device A matrix equation is used to generate the intermediate variable combination according to the first coordinate transformation matrix and the initial voltage value combination.
  • PP 1 A* ⁇ 1 +A* ⁇ 2 +A* ⁇ 3 +A* ⁇ 4 ;
  • PP 3 A* ⁇ 1 +A* ⁇ 2 +A* ⁇ 3 +A* ⁇ 4 ;
  • PP 4 A* ⁇ 1 +A* ⁇ 2 +A* ⁇ 3 +A* ⁇ 4 ;
  • the microring corresponds to a corresponding phase shift around the ring.
  • the voltage value on the microring needs to be adjusted accordingly, which is equivalent to The phase shift of the loop around the loop is adjusted accordingly.
  • the ⁇ 1 , ⁇ 2 , ⁇ 3 , and ⁇ 4 are the jitter phase shift values corresponding to the microloops in the cascade filter.
  • the minimum value of ⁇ i is also fixed, and in order to satisfy the validity of the (AD/DA) conversion circuit, the minimum value of ⁇ i is not It can be smaller than the noise value of the circuit system of the entire cascade filter. Furthermore, the value of ⁇ i also limits the value of the preset step size or the selection of the coordinate matrix. That is, the value of the preset step size or the selection of the coordinate transformation matrix needs to make the minimum value of ⁇ i greater than or equal to the noise value of the circuit system of the cascade filter.
  • the wavelength locking device may select the first coordinate transformation matrix according to the following preset conditions, where the preset conditions include at least one of them: each element in the first coordinate transformation matrix is symmetric based on zero points; the first The absolute value of each element in the coordinate transformation matrix is smaller than the preset value; each element in the first coordinate transformation matrix is relatively single.
  • each element of the first coordinate transformation matrix may be (0, -1, 1).
  • the specific process of the wavelength locking device selecting the target intermediate variable from the intermediate variable combination for iterative feedback may be as follows:
  • the wavelength locking device After receiving the incident optical signal, the wavelength locking device records the first power value of the cascade filter, that is, the first power value is the initial power value; then the wavelength locking device selects the first power value from the intermediate variable combination The intermediate variable is used as the target intermediate variable; then the wavelength locking device adjusts the first intermediate variable to the second intermediate variable according to the first preset step length, the first coordinate transformation matrix and the first adjustment method, and records this Is the second power value of the cascaded filter, where the first adjustment mode is used to indicate the increase or decrease sign of the first intermediate variable; then the wavelength locking device determines the value of the power according to the first power value and the second power value.
  • the second adjustment method of the second intermediate variable is used to indicate the increase or decrease sign of the second intermediate variable; finally, the wavelength locking device uses the second intermediate variable according to the first preset step and the first A coordinate transformation matrix and the second adjustment method are adjusted to a third intermediate variable, and the third power value of the cascaded filter at this time is recorded; then the wavelength locking device sequentially performs iterative feedback until the power value of the cascaded filter Stable and at the maximum (it can also be said that when the waveform diagram of the cascade filter is stable and symmetrical).
  • the target intermediate variable may include at least one intermediate variable in the intermediate variable combination, that is, the wavelength locking device may adjust one intermediate variable, or select two or more intermediate variables. The specific situation is not here.
  • the combination of intermediate variables includes 4 intermediate variables, namely PP1, PP2, PP3, and PP4.
  • the wavelength locking device After the wavelength locking device receives the incident light signal, it records the initial power value X of the cascade filter; then the wavelength locking device selects PP1 and PP2 from the intermediate variable combination as the target intermediate variable; then the wavelength locks The device increases PP1 by the first preset step length to obtain the updated PP1, and then records the power value of the cascade filter as Y; the wavelength locking device increases PP2 by the first preset step length to obtain the updated PP2 , At this time, record the power value of the cascaded filter as Z; then the wavelength locking device compares the X with the Y to obtain the updated PP1 adjustment mode; the wavelength locking device performs the Y with the Z Compare, obtain the adjustment mode of the updated PP2; finally, the wavelength locking device adjusts the updated PP1 again according to the adjustment mode of the updated PP2
  • the wavelength locking device determines the second preset according to the first power value and the second power value. Set the step length; then the wavelength locking device adjusts the second intermediate variable to the fourth intermediate variable according to the second preset step length, the first coordinate transformation matrix and the second adjustment method, and records the corresponding fourth intermediate variable The fourth power value of the cascaded filter.
  • the wavelength locking device can determine the second preset step size according to the first power value and the second power value in the following manner: the wavelength locking device presets a preset threshold of the power change rate; and then the wavelength locking device The power change rate is calculated according to the first power value and the second power value.
  • the wavelength locking device determines that the power of the cascade filter is converging to a steady state.
  • the wavelength locking device determines that the second preset step size is greater than the first preset step size; if the power change rate is less than the preset threshold, the wavelength locking device determines that the power of the cascade filter has reached a stable equilibrium state At this time, the wavelength locking device determines that the second preset step length is smaller than the first preset step length.
  • the wavelength locking device can automatically reduce the step length in a stable equilibrium state, and will automatically increase the step length in exchange for a stable balance when the external environment temperature changes or a large wavelength change affects the non-equilibrium state, so as to achieve this level
  • the power convergence speed and accuracy of the combined filter are further improved.
  • the wavelength locking device determines the second coordinate according to the first power value and the second power value Transformation matrix; and then the wavelength locking device adjusts the second intermediate variable to the fifth intermediate variable according to the first preset step length, the second coordinate transformation matrix and the second adjustment method, and records the corresponding fifth intermediate variable The fifth power value of the cascade filter.
  • the wavelength locking device may determine the second coordinate transformation matrix according to the first power value and the second power value in the following manner: the wavelength locking device presets a preset threshold of the power change rate; and then the wavelength locking device according to The first power value and the second power value calculate the power change rate.
  • the wavelength locking device determines that the power of the cascade filter is converging to a steady state.
  • the locking device determines that the matrix condition number of the second coordinate transformation matrix is greater than the matrix condition number of the first coordinate transformation matrix; if the power change rate is less than the preset threshold, the wavelength locking device determines that the power of the cascade filter has been In a stable equilibrium state, the wavelength locking device determines that the matrix condition number of the second coordinate transformation matrix is smaller than the matrix condition number of the first coordinate transformation matrix. In this way, the wavelength locking device can automatically reduce the matrix condition number of the coordinate transformation matrix in a stable equilibrium state, and automatically increase the matrix condition number of the coordinate transformation matrix under the influence of external environmental temperature changes or large wavelength changes. In exchange for a stable balance, the power convergence speed and accuracy of the cascaded filter can be further improved.
  • the specific manner in which the wavelength locking device determines the second adjustment manner of the second intermediate variable according to the first power value and the second power value may be as follows: if the second power value is less than The first power value, the wavelength locking device determines that the second adjustment mode of the second intermediate variable has the opposite sign of the increase or decrease of the first adjustment mode; if the second power value is greater than the first adjustment mode A power value, the wavelength locking device determines that the second adjustment mode of the second intermediate variable has the same increase or decrease sign as the first adjustment mode.
  • the operation of increasing the step length in this direction can make the power value larger, that is, the resonance peak of the lower wave spectrum line is Move near the wavelength of the target filter, then you should continue to increase the step length in this direction for this intermediate variable; if you find that the power value obtained after changing an intermediate variable is less than the initial power value, then prove that the step length is increased in this direction On the contrary, the power becomes smaller, that is, the resonance peak of the lower spectral line is shifting the wavelength of the target filter, then the sign of step increase should be replaced at this time, and this step should be performed in the next cycle corresponding to this intermediate variable. Negative growth of long size. In this way, the power convergence speed of the cascaded filter can be accelerated.
  • embodiments of the present application provide a wavelength locking device, which has the function of realizing the behavior of the wavelength locking device in the first aspect.
  • the function can be realized by hardware, or by hardware executing corresponding software.
  • the hardware or software includes one or more modules corresponding to the above-mentioned functions.
  • the device includes a unit or module for executing each step of the first aspect above.
  • the device includes: an acquisition module for acquiring an incident light signal; a processing module for loading an initial voltage value combination for the cascade filter according to a lookup table and the wavelength of the target filter, the lookup table is used to indicate the filter wavelength and The mapping relationship of the voltage values of the cascade filter, the cascade filter includes N loops, the initial voltage value combination includes N initial voltage values, and the target filter is the output of the cascade filter Optical signal, where N is an integer greater than or equal to 2; an intermediate variable combination is generated according to the combination of the first coordinate transformation matrix and the initial voltage value, and the first coordinate transformation matrix is an N*N-order matrix; Selecting a target intermediate variable in the variable combination to perform iterative feedback with a first preset step length and the first coordinate transformation matrix, and recording the power value of the cascade filter;
  • the output module is used to filter out the target filter from the incident light signal when the power value is the maximum.
  • it also includes a storage module for storing program instructions and data necessary for the wavelength locking device.
  • the device includes: a processor, a transceiver, and a memory, the processor is configured to support the wavelength locking device to perform corresponding functions in the method provided in the first aspect; the memory is configured In order to be coupled with the processor, it is used to store the necessary program instructions and data of the wavelength locking device.
  • the chip when the device is a chip in a wavelength locking device, the chip includes: a processing module and a transceiver module.
  • the processing module may be a processor, for example, and the processor is used for looking up table and target
  • the filtered wavelength is a combination of the initial voltage value loaded by the cascade filter.
  • the look-up table is used to indicate the mapping relationship between the filter wavelength and the voltage value of the cascade filter.
  • the cascade filter includes N loops.
  • the initial voltage value combination includes N initial voltage values, the target filter is the output optical signal of the cascade filter, and the N is an integer greater than or equal to 2; according to the first coordinate transformation matrix and the initial voltage value Combining to generate an intermediate variable combination, the first coordinate transformation matrix is an N*N-order matrix; selecting a target intermediate variable from the intermediate variable combination to perform iterative feedback with a first preset step size and the first coordinate transformation matrix, And record the power value of the cascaded filter; the transceiver module may be an input/output interface, pin or circuit on the chip, for example, to receive the incident light signal or transmit the target filter filtered by the processor to In other chips or modules coupled with this chip.
  • the processing module can execute computer-executable instructions stored in the storage unit to support the wavelength locking device to perform the corresponding functions in the above-mentioned first aspect method.
  • the storage unit may be a storage unit in the chip, such as a register, a cache, etc.
  • the storage unit may also be a storage unit located outside the chip, such as a read-only memory (read-only memory, Referred to as ROM) or other types of static storage devices that can store static information and instructions, random access memory (RAM for short), etc.
  • ROM read-only memory
  • RAM random access memory
  • the device includes: a processor, a baseband circuit, a radio frequency circuit, and an antenna.
  • the processor is used to control the functions of each circuit part.
  • the device further includes a memory, which stores program instructions and data necessary for the wavelength locking device.
  • the processor mentioned in any of the above can be a general-purpose central processing unit (Central Processing Unit, CPU for short), microprocessor, application-specific integrated circuit (ASIC for short), or one or A plurality of integrated circuits used to control the program execution of the method for coordinated allocation of channel resources in the above aspects.
  • CPU Central Processing Unit
  • ASIC application-specific integrated circuit
  • an embodiment of the present application provides a computer-readable storage medium, where the computer storage medium stores computer instructions, and the computer instructions are used to execute the method described in any possible implementation manner in the first aspect.
  • embodiments of the present application provide a computer program product containing instructions, which when run on a computer, cause the computer to execute the method described in any possible implementation manner in the first aspect of the foregoing aspects.
  • the present application provides a chip system including a processor for supporting the wavelength locking device to implement the functions involved in the above aspects, such as generating or processing the data and/or information involved in the above methods .
  • the chip system further includes a memory, which is used to store the necessary program instructions and data of the wavelength locking device, so as to realize the functions of any one of the above aspects.
  • the chip system can be composed of chips, or can include chips and other discrete devices.
  • Figure 1 is a schematic diagram of a cascade filter
  • Figure 2 is a schematic flow diagram of the feedback control method of the double-loop cascaded micro-loop filter
  • FIG. 3 is an application system architecture diagram of the wavelength locking method in an embodiment of the application
  • FIG. 4 is a schematic diagram of an embodiment of a wavelength locking method in an embodiment of the application.
  • FIG. 5 is a schematic flowchart of a wavelength locking method in an embodiment of this application.
  • FIG. 6 is another schematic flowchart of the wavelength locking method in an embodiment of this application.
  • FIG. 7 is a schematic diagram of an embodiment of a wavelength locking device in an embodiment of the application.
  • FIG. 8 is a schematic diagram of another embodiment of the wavelength locking device in the embodiment of the application.
  • the embodiments of the present application provide a wavelength locking method and device, which are used to improve the accuracy of wavelength locking of high-order microrings.
  • the accuracy of uploading and downloading the optical wavelength is very high.
  • the essential need is an optical filter.
  • the optical filter needs to selectively download and upload the specified optical signal to the wavelength of the optical wave.
  • An optical filter can be composed of cascaded micro-rings, or can be composed of cascaded MZI and other structures.
  • the incident light wavelength interval is very small, the drop wavelength point must be accurate to the range of 1nm, and in order to make its performance superior, in the face of changes in the external environment, the corresponding drop wavelength must be kept fixed.
  • the cascaded micro-loop filter can be continuously feedback control through the feedback system as shown in Fig. 1 to stabilize the resonant peak of the cascaded micro-loop filter in a dynamically balanced state.
  • a feedback control method of double-loop cascaded micro-loop filter is provided.
  • the initial value of ⁇ avg and ⁇ diff is zero.
  • a small step length variable is added to the value of ⁇ avg or ⁇ diff to change the voltage on the two rings at a time, and then the off-chip photodetector (Photodiode, PD) Reading value, compare whether PD value increased or decreased compared with the last time, and then judge and feedback to continue to increase or decrease the value of ⁇ avg or ⁇ diff to achieve the purpose of changing the phase of the two micro-rings, so as to achieve the two rings
  • the effect of voltage linkage is also increased.
  • the filter mostly adopts a high-order micro-loop filter with a vernier effect or a cascaded MZI filter.
  • High-order micro-ring filters or cascaded MZI filters with vernier effect are more sensitive to wavelength, and the resonance peaks of each ring are caused by the drastic changes of the external environment temperature, wavelength jump, jitter, drift and other interference. The error caused by the wavelength misalignment will increase exponentially. Therefore, simply adopting the method of converting the voltage on the ring to the phase difference between the two rings and the phase difference between the two rings will no longer be suitable for the lock control of high-order micro-rings.
  • an embodiment of the present application provides the following wavelength locking method, which is applied to a cascade filter including N loops, where N is an integer greater than or equal to 2, specifically including: the wavelength locking device Establish a look-up table indicating the corresponding relationship between the filter wavelength of the cascade filter and the voltage value combination of the cascade filter; then obtain the incident optical signal at the wavelength locking device, and determine the target filter of the cascade filter
  • the wavelength locking device loads the initial voltage value combination for the cascade filter; the wavelength locking device determines the intermediate variable combination according to the coordinate transformation matrix and the initial voltage value combination, where the coordinate transformation matrix is an N*N matrix
  • the wavelength locking device adjusts at least one intermediate variable in the intermediate variable combination to perform iterative feedback adjustment according to the first preset step length, and records the adjusted power value of the cascade filter; in the cascade filter When the power value is maximum, the wavelength locking device outputs the target filter from the incident optical signal.
  • the application architecture of the wavelength locking method can be as shown in Fig. 3.
  • the left side is the cascaded four-micro-ring filter.
  • the loop filter consists of 4 micro loops (respectively V4, V3, V2, V1) in series, and has four ports, namely In, Thru, Add, and Drop.
  • the In port receives the incident light signal, and the Drop port outputs target filtering.
  • the filter spectrum of each microring is different, and the filter spectrum of each microring can be moved left and right by heating the microring by a metal layer heater (heater) designed on the microring.
  • the Drop port is connected to a photodiode (PD), and the PD can record the power value of the cascaded four-microring filter, and feed the power value back to the wavelength locking module.
  • the wavelength locking module is composed of a coordinate transformation matrix (Transformed Coordinate Matrix, TCM), and the wavelength locking module may also include a step size adaptive module (Adaptive Step).
  • the wavelength locking device can be integrated with the cascaded filter as an integral device, that is, the cascaded filter includes a wavelength locking device to realize the wavelength locking function; the wavelength locking device can also be integrated with the cascade filter.
  • the in-line filter is an independent device, which is not specifically limited here.
  • an embodiment of the wavelength locking method in the embodiment of the present application includes:
  • the wavelength locking device receives an incident light signal.
  • the cascade filter receives the incident light signal to activate the wavelength locking device to start operation.
  • the wavelength locking device can be directly the cascaded filter, that is, the cascaded filter has the function of wavelength locking, or the wavelength locking device is an independent physical device connected to the cascaded filter , So as to control the cascade filter.
  • the wavelength locking device determines the target filtering of the cascade filter, and obtains the wavelength of the target filtering.
  • the wavelength locking device determines the target filter to be output by the cascade filter, and learns the wavelength of the target filter. That is, for example, if the cascade filter needs to filter a target wave with a wavelength ⁇ at the current moment, the wavelength locking device needs to know the wavelength.
  • the wavelength locking device loads an initial voltage value combination for the cascaded filter according to the wavelength of the target filtering and the look-up table.
  • the cascaded filter includes N loops, and the N is an integer greater than or equal to 2.
  • the wavelength locking device will establish a look-up table for the cascaded filter before operation to indicate the corresponding relationship between the filter wavelength of the cascaded filter and the voltage value combination of the cascaded filter (that is, through the look-up table, the The wavelength locking device can filter the incident light signal received by the cascade filter at a specified wavelength); then the wavelength locking device loads the cascade filter with an initial voltage value according to the filter length of the target filter and the lookup table.
  • the metal layer heater on the ring is a thermal modulator, which leads to serious crosstalk between the microrings, and the temperature of the surrounding environment is uncertain.
  • the initial voltage value cannot accurately filter the incident light signal.
  • the wavelength locking device generates an intermediate variable combination according to the first coordinate transformation matrix and the initial voltage value, and the first coordinate transformation matrix is an N*N matrix.
  • the wavelength locking device selects the first coordinate transformation matrix according to a preset condition based on the matrix condition number, wherein the matrix condition number is within a preset range; finally, the wavelength locking device combines the first coordinate transformation matrix and the initial voltage value Use the matrix equation to generate the intermediate variable combination.
  • PP 1 A* ⁇ 1 +A* ⁇ 2 +A* ⁇ 3 +A* ⁇ 4 ;
  • PP 3 A* ⁇ 1 +A* ⁇ 2 +A* ⁇ 3 +A* ⁇ 4 ;
  • PP 4 A* ⁇ 1 +A* ⁇ 2 +A* ⁇ 3 +A* ⁇ 4 ;
  • the microring corresponds to a corresponding phase shift around the ring.
  • the voltage value on the microring needs to be adjusted accordingly, which is equivalent to The phase shift of the loop around the loop is adjusted accordingly.
  • the ⁇ 1 , ⁇ 2 , ⁇ 3 , and ⁇ 4 are the jitter phase shift values corresponding to the microloops in the cascade filter.
  • the minimum value of ⁇ i is also fixed, and in order to satisfy the validity of the (AD/DA) conversion circuit, the minimum value of ⁇ i is not It can be smaller than the noise value of the circuit system of the entire cascade filter. Furthermore, the value of ⁇ i also limits the value of the preset step size or the selection of the coordinate matrix. That is, the value of the preset step size or the selection of the coordinate transformation matrix needs to make the minimum value of ⁇ i greater than or equal to the noise value of the circuit system of the cascade filter.
  • the wavelength locking device may select the first coordinate transformation matrix according to the following preset conditions, where the preset conditions include at least one of: each element in the first coordinate transformation matrix is based on zero-point symmetry; the first coordinate transformation matrix The absolute value of each element in is smaller than the preset value; each element in the first coordinate transformation matrix is relatively single. For example, each element of the first coordinate transformation matrix may be (0, -1, 1).
  • the wavelength locking device selects the target intermediate variable for iterative feedback from the intermediate variable combination, and records the adjusted power value of the cascade filter.
  • the wavelength locking device after receiving the incident light signal, the wavelength locking device records the first power value of the cascade filter, that is, the first power value is the initial power value; then the wavelength locking device changes from the intermediate variable In the combination, the first intermediate variable is selected as the target intermediate variable; then the wavelength locking device adjusts the first intermediate variable to the second intermediate according to the first preset step length, the first coordinate transformation matrix, and the first adjustment method.
  • the wavelength locking device uses the second intermediate variable according to the first preset
  • the step length, the first coordinate transformation matrix and the second adjustment method are adjusted to a third intermediate variable, and the third power value of the cascaded filter at this time is recorded; then the wavelength locking device performs iterative feedback until the cascade
  • the power value of the filter is stable and at the maximum (it can also be said that when the waveform diagram of the cascade filter is stable and symmetric).
  • the target intermediate variable may include at least one intermediate variable in the intermediate variable combination, that is, the wavelength locking device may adjust one intermediate variable, or select two or more intermediate variables.
  • the specific situation is not here. Make a limit.
  • the selection of two intermediate variables for iterative feedback as an example. Assume that the combination of intermediate variables includes 4 intermediate variables, namely PP1, PP2, PP3, and PP4.
  • the wavelength locking device After the wavelength locking device receives the incident light signal, it records the initial power value X of the cascade filter; then the wavelength locking device selects PP1 and PP2 from the intermediate variable combination as the target intermediate variable; then the wavelength locks The device increases PP1 by the first preset step length to obtain the updated PP1, and then records the power value of the cascade filter as Y; the wavelength locking device increases PP2 by the first preset step length to obtain the updated PP2 , At this time, record the power value of the cascaded filter as Z; then the wavelength locking device compares the X with the Y to obtain the updated PP1 adjustment mode; the wavelength locking device performs the Y with the Z Compare, obtain the adjustment mode of the updated PP2; finally, the wavelength locking device adjusts the updated PP1 again according to the adjustment mode of the updated PP1, and records the new power value A; the wavelength locking device again The updated PP2 is adjusted again according to the updated PP2 adjustment method, and the new power value B is recorded. That is to say,
  • the specific manner in which the wavelength locking device determines the second adjustment manner of the second intermediate variable according to the first power value and the second power value may be as follows: if the second power value is less than The first power value, the wavelength locking device determines that the second adjustment mode of the second intermediate variable has the opposite sign of the increase or decrease of the first adjustment mode; if the second power value is greater than the first adjustment mode A power value, the wavelength locking device determines that the second adjustment mode of the second intermediate variable has the same increase or decrease sign as the first adjustment mode.
  • the operation of increasing the step length in this direction can make the power value larger, that is, the resonance peak of the lower wave spectrum line is Move near the wavelength of the target filter, then you should continue to increase the step length in this direction for this intermediate variable; if you find that the power value obtained after changing an intermediate variable is less than the initial power value, then prove that the step length is increased in this direction On the contrary, the power becomes smaller, that is, the resonance peak of the lower spectral line is shifting the wavelength of the target filter, then the sign of step increase should be replaced at this time, and this step should be performed in the next cycle corresponding to this intermediate variable. Negative growth of long size. In this way, the power convergence speed of the cascaded filter can be accelerated.
  • the wavelength locking device can also perform step size adaptive adjustment during iterative feedback, that is, the wavelength locking device determines a second preset step size according to the first power value and the second power value; The wavelength locking device adjusts the second intermediate variable to the fourth intermediate variable according to the second preset step length, the first coordinate transformation matrix and the second adjustment method, and records the cascade filter corresponding to the fourth intermediate variable The fourth power value.
  • the wavelength locking device determines a second preset step size according to the first power value and the second power value
  • the wavelength locking device adjusts the second intermediate variable to the fourth intermediate variable according to the second preset step length, the first coordinate transformation matrix and the second adjustment method, and records the cascade filter corresponding to the fourth intermediate variable The fourth power value.
  • the cascaded four-microloop filter shown in FIG. 3 and adjust two intermediate variables (the two intermediate variables are PP1 and PP2) as an example for description.
  • FIG. 5 is a schematic flowchart of a wavelength locking method in an embodiment of the present application, including:
  • the wavelength locking device loads the initial voltage values for the four microrings of the cascade filter through a lookup table; then when the cascade filter receives the incident light signal, the PD connected to the drop port of the cascade filter obtains the stage
  • the initial power value of the filter is X; then the wavelength locking device sets a preset target power value. It can be understood that the target power value is greater than the optical power output by the Drop port, which can ensure the iterative feedback control process of the wavelength locking device keep going.
  • the wavelength locking device sets the first preset step length; then the wavelength locking device increases the first preset step length to the PP1, and records the power value at this time as Y; the wavelength locking device increases the PP2
  • the first preset step size, and the power value at this time is recorded as Z.
  • the wavelength locking device compares the power value Y with the power value X, and compares the power value Z with the power value Y; if the Y is greater than X, it means that increasing the step size on the PP1 can make the stage
  • the power value of the combined filter becomes larger, that is, the resonance peak of the lower spectral line moves near the wavelength of the target filter, then in the next adjustment process, the step size can be increased for the PP1; if the Y is less than X, then It shows that increasing the first step length on the PP1 can make the power value of the cascade filter smaller, that is, the resonance peak of the lower wave spectrum line is far away from the wavelength of the target filter, then in the next adjustment process, the PP1
  • the first preset step size can be subtracted; if the Z is greater than Y, it means that increasing the step size on the PP2 can make the power value of the cascaded filter larger, that is, the resonance peak of
  • the wavelength locking device can accelerate the convergence speed of the cascaded filter, thereby adjusting the step length so that the second preset step length of the next iteration is greater than the first preset Step length; if the power change rate is less than the preset threshold, it means that the cascade filter has tended to a stable equilibrium state.
  • the wavelength locking device needs to ensure the correctness of convergence, so as to adjust the step length to make the next iteration
  • the second preset step length of is smaller than the first preset step; then the wavelength locking device repeats the iterative feedback process according to the following steps, and ends the iterative process when the power value of the cascade filter is stable.
  • the wavelength locking device can also perform adaptive adjustment of the coordinate transformation matrix, that is, the wavelength locking device determines a second coordinate transformation matrix according to the first power value and the second power value; then the wavelength locking device according to the first power value A preset step size, the second coordinate transformation matrix and the second adjustment method adjust the second intermediate variable to the fifth intermediate variable, and record the fifth power value of the cascade filter corresponding to the fifth intermediate variable.
  • the wavelength locking device determines a second coordinate transformation matrix according to the first power value and the second power value
  • a preset step size, the second coordinate transformation matrix and the second adjustment method adjust the second intermediate variable to the fifth intermediate variable, and record the fifth power value of the cascade filter corresponding to the fifth intermediate variable.
  • the cascaded four-microloop filter shown in FIG. 3 and adjust two intermediate variables (the two intermediate variables are PP1 and PP2) as an example for description.
  • FIG. 6 a schematic flowchart of a wavelength locking method in an embodiment of the present application, including:
  • the wavelength locking device loads the initial voltage values for the four microrings of the cascade filter through a lookup table; then when the cascade filter receives the incident light signal, the PD connected to the drop port of the cascade filter obtains the stage
  • the initial power value of the filter is X; then the wavelength locking device sets a preset target power value. It can be understood that the target power value is greater than the optical power output by the Drop port, which can ensure the iterative feedback control process of the wavelength locking device keep going.
  • the wavelength locking device sets the first preset step length; then the wavelength locking device increases the first preset step length to the PP1, and records the power value at this time as Y; the wavelength locking device increases the PP2
  • the first preset step size, and the power value at this time is recorded as Z.
  • the wavelength locking device compares the power value Y with the power value X, and compares the power value Z with the power value Y; if the Y is greater than X, it means that increasing the step size on the PP1 can make the stage
  • the power value of the combined filter becomes larger, that is, the resonance peak of the lower spectral line moves near the wavelength of the target filter, then in the next adjustment process, the step size can be increased for the PP1; if the Y is less than X, then It shows that increasing the first step length on the PP1 can make the power value of the cascade filter smaller, that is, the resonance peak of the lower wave spectrum line is far away from the wavelength of the target filter, then in the next adjustment process, the PP1
  • the first preset step size can be subtracted; if the Z is greater than Y, it means that increasing the step size on the PP2 can make the power value of the cascaded filter larger, that is, the resonance peak of
  • the wavelength locking device can accelerate the convergence speed of the cascaded filter, thereby updating the coordinate transformation matrix so that the second matrix condition number of the second coordinate transformation matrix of the next iteration It is greater than the first matrix condition number of the first coordinate transformation matrix; if the power change rate is less than the preset threshold, it means that the cascade filter has tended to a stable equilibrium state.
  • the wavelength locking device needs to ensure the correct convergence Therefore, the coordinate transformation matrix is updated so that the second matrix condition number of the second coordinate transformation matrix of the next iteration is smaller than the first matrix condition number of the first coordinate transformation matrix; then the wavelength locking device repeats the iterative feedback process according to the following steps When the power value of the cascaded filter is stable, the iterative process ends.
  • the wavelength locking device When the power value is the maximum value, the wavelength locking device outputs the target filter from the incident optical signal.
  • the wavelength locking device determines that the waveform of the cascaded filter at the target filtering wavelength is stable and the waveform meets the requirements, then the wavelength locking device determines this iteration The feedback adjustment ends, so that the cascade filter can filter the target filter from the incident light signal.
  • the wavelength locking device uses a coordinate transformation matrix to generate intermediate variables, and performs iterative feedback in parallel, so that the wavelength locking accuracy is higher, the response to external environmental influences is more rapid, and the judgment of a good locking state becomes more accurate and excellent.
  • the wavelength locking device can automatically reduce the step length or the matrix condition number of the coordinate transformation matrix in a stable equilibrium state, and automatically increase the step length or the coordinate transformation matrix when the external environment temperature changes or the non-equilibrium state under the influence of large wavelength changes
  • the matrix condition number is obtained in exchange for a stable balance, so as to further improve the power convergence speed and accuracy of the cascade filter.
  • the wavelength locking method in the embodiment of the present application is described above, and the wavelength locking device in the embodiment of the present application is described below.
  • the wavelength locking device 700 includes: an acquisition module 701, a processing module 702, and an output module 703.
  • the device 700 may be one or more chips or other possible physical devices.
  • the device 700 may be used to perform part or all of the functions of the wavelength locking device in the foregoing method embodiment.
  • the acquisition module 701 may be used to execute step 401 in the foregoing method embodiment.
  • the acquisition module 701 acquires incident light signals;
  • the processing module 702 may be used to execute step 402 to step 405 in the foregoing method embodiment.
  • the processing module 702 loads an initial voltage value combination for the cascade filter according to a look-up table and the wavelength of the target filter.
  • the look-up table is used to indicate the mapping relationship between the filter wavelength and the voltage value of the cascade filter.
  • the cascade filter includes N loops, the initial voltage value combination includes N initial voltage values, the target filter is the output optical signal of the cascade filter, and the N is an integer greater than or equal to 2;
  • a coordinate transformation matrix and the initial voltage value are combined to generate an intermediate variable combination.
  • the first coordinate transformation matrix is an N*N-order matrix; the target intermediate variable is selected from the intermediate variable combination with the first preset step length and the Performing iterative feedback on the first coordinate transformation matrix, and recording the power value of the cascade filter;
  • the output module 703 may be used to execute step 406 in the foregoing method embodiment.
  • the output module 703 filters out the target filter from the incident light signal when the power value is maximum.
  • the wavelength locking device 700 may further include a storage module coupled to the processing module so that the processing module can execute the computer-executable instructions stored in the storage module to implement the function of the wavelength locking device in the foregoing method embodiment.
  • the storage module optionally included in the device 700 may be a storage unit in the chip, such as a register, a cache, etc., and the storage module may also be a storage unit located outside the chip, such as a read-only memory (read-only memory). Only memory (ROM for short) or other types of static storage devices that can store static information and instructions, random access memory (RAM for short), etc.
  • FIG. 8 shows a possible structural schematic diagram of a wavelength locking device 800 in the foregoing embodiment.
  • the device 800 can be configured as the aforementioned wavelength locking device.
  • the apparatus 800 may include a processor 802, a computer-readable storage medium/memory 803, a transceiver 804, an input device 805 and an output device 806, and a bus 801. Among them, the processor, transceiver, computer-readable storage medium, etc. are connected by a bus.
  • the embodiments of the present application do not limit the specific connection medium between the foregoing components.
  • the transceiver 804 obtains incident light signals
  • the processor 802 loads the initial voltage value combination for the cascade filter according to the lookup table and the wavelength of the target filter.
  • the lookup table is used to indicate the mapping relationship between the filter wavelength and the voltage value of the cascade filter.
  • the filter includes N loops, the initial voltage value combination includes N initial voltage values, the target filter is the output optical signal of the cascade filter, and the N is an integer greater than or equal to 2;
  • the coordinate transformation matrix and the initial voltage value are combined to generate an intermediate variable combination, and the first coordinate transformation matrix is an N*N-order matrix; the target intermediate variable is selected from the intermediate variable combination with the first preset step length and the The first coordinate transformation matrix performs iterative feedback, and records the power value of the cascade filter;
  • the transceiver 804 filters out the target filter from the incident optical signal when the power value is maximum.
  • the processor 802 may run an operating system to control functions between various devices and devices.
  • the transceiver 804 may include a baseband circuit and a radio frequency circuit.
  • the transceiver 804 and the processor 802 can implement the corresponding steps in any of the foregoing embodiments in FIG. 4 to FIG. 6, and details are not described here.
  • Figure 8 only shows the simplified design of the wavelength locking device.
  • the wavelength locking device can include any number of transceivers, processors, memories, etc., and all of them can implement the wavelength locking of the present application.
  • the devices are all within the protection scope of this application.
  • the processor 802 involved in the above apparatus 800 may be a general-purpose processor, such as a general-purpose central processing unit (CPU), a network processor (NP), a microprocessor, etc., or may be an application-specific integrated circuit (application-specific integrated circuit). integrated circBIt, ASIC), or one or more integrated circuits used to control the execution of the program of this application. It may also be a digital signal processor (digital signal processor, DSP), a field-programmable gate array (field-programmable gate array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, or discrete hardware components.
  • DSP digital signal processor
  • FPGA field-programmable gate array
  • the controller/processor may also be a combination of computing functions, for example, a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and so on.
  • the processor usually executes logic and arithmetic operations based on program instructions stored in the memory.
  • the aforementioned bus 801 may be a peripheral component interconnection standard (peripheral component interconnect, PCI for short) bus or an extended industry standard architecture (EISA for short) bus, etc.
  • PCI peripheral component interconnect
  • EISA extended industry standard architecture
  • the bus can be divided into address bus, data bus, control bus, etc. For ease of presentation, only one thick line is used in FIG. 8 to represent, but it does not mean that there is only one bus or one type of bus.
  • the aforementioned computer-readable storage medium/memory 803 may also store an operating system and other application programs.
  • the program may include program code, and the program code includes computer operation instructions.
  • the above-mentioned memory may be read-only memory (ROM), other types of static storage devices that can store static information and instructions, random access memory (RAM), information that can be stored, and Other types of dynamic storage devices for instructions, disk storage, etc.
  • the memory 803 may be a combination of the aforementioned storage types.
  • the foregoing computer-readable storage medium/memory may be in the processor, or external to the processor, or distributed on multiple entities including the processor or processing circuit.
  • the foregoing computer-readable storage medium/memory may be embodied in a computer program product.
  • the computer program product may include a computer-readable medium in packaging materials.
  • the embodiments of the present application also provide a general-purpose processing system, for example, commonly referred to as a chip.
  • the general-purpose processing system includes: one or more microprocessors that provide processor functions; and an external memory that provides at least a part of a storage medium , All of these are connected with other supporting circuits through an external bus architecture.
  • the processor is caused to execute some or all of the steps in the wavelength locking method in the embodiment of the wavelength locking device described in FIGS. 4 to 6 and/or used in the technology described in this application Other processes.
  • the steps of the method or algorithm described in conjunction with the disclosure of this application can be implemented in a hardware manner, or implemented in a manner in which a processor executes software instructions.
  • Software instructions can be composed of corresponding software modules, which can be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, mobile hard disk, CD-ROM or any other form of storage known in the art Medium.
  • An exemplary storage medium is coupled to the processor, so that the processor can read information from the storage medium and can write information to the storage medium.
  • the storage medium may also be an integral part of the processor.
  • the processor and the storage medium may be located in the ASIC.
  • the ASIC may be located in the wavelength locking device.
  • the processor and the storage medium may also exist as discrete components in the wavelength locking device.
  • the disclosed system, device, and method may be implemented in other ways.
  • the device embodiments described above are only illustrative.
  • the division of the units is only a logical function division, and there may be other divisions in actual implementation, for example, multiple units or components can be combined or It can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • each unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the above-mentioned integrated unit can be implemented in the form of hardware or software functional unit.
  • the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of this application essentially or the part that contributes to the existing technology or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , Including several instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the method described in each embodiment of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program code .

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Abstract

一种波长锁定方法以及装置，用于提高对高阶微环进行波长锁定的准确度。具体包括：波长锁定装置获取入射光信号；该波长锁定装置根据查找表和目标滤波的波长为级联滤波器加载初始电压值组合，该查找表用于指示滤波波长与该级联滤波器的电压值的映射关系，该级联滤波器包括至少两个环；该波长锁定装置根据第一坐标变换矩阵和该初始电压值组合生成中间变量组合，该第一坐标变换矩阵为N*N阶矩阵；该波长锁定装置从该中间变量组合中选择目标中间变量以第一预设步长和该第一坐标变换矩阵进行迭代反馈，并记录该级联滤波器的功率值；在该功率值最大时，该波长锁定装置从入射光信号中过滤出该目标滤波。

Description

一种波长锁定方法以及装置
本申请要求于2019年03月29日提交中国专利局、申请号为201910252286.5、发明名称为“一种波长锁定方法以及装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信领域，尤其涉及一种波长锁定方法以及装置。
背景技术
在现有的光通信系统中，在城域网节点中，对光波长的上载与下载的精度要求很高。而要做到对光波长的选择作用，其本质需要是一个光滤波器，当收端有一连串的光信号进来时，光滤波器需要对光波波长选择性下载和上载指定的光信号。一个光滤波器可以是由级联微环组成，也可以由级联MZI等一些结构组成。通过设计，差异化级联器件的物理尺寸和特性，就可利用FSR的游标效应扩大滤波器的调谐范围，即滤波波长范围。基于级联微环的滤波器功耗低、体积小、易大量集成等优点，能满足光通信对高带宽、低功耗和高集成度的需求，是非常有前景的组件。级联微环滤波器由N个微环串联，并有四个口，分别为In，Thru，Add，Drop。每一个微环的滤波谱线都不尽相同，通过在微环上设计的金属层加热器(heater)对微环加热，可以使每个微环的滤波谱线左右移动。当所有级联微环的滤波谱线在某一个波长λ下有最大的投射率时，就能够通过Drop口将从In口进入的一连串光信号中波长λ的光信号过滤出来。由于对于光滤波器而言，入光波长间隔很小，下波波长点必须精确到1nm范围，并且为了使其性能优越，面对外界环境得变化，所对应的下波波长要保持固定。级联微环滤波器可以通过如图1的反馈系统经过持续不断的反馈控制，将级联微环滤波器的谐振峰稳定在动态平衡的状态。
而目前仅提供了一种双环级联微环滤波器的反馈控制方法。如图2所示，针对两环级联滤波器，将两环对应的相位用中间变量两环相位和和两环相位差进行表示，其中两环相位和为φ avg＝(φ 1+φ 2)/2，两环相位差为φ diff＝(φ 1-φ 2)/2，其中φ 1为第一个微环对应的绕环相移(Round-Trip Phase Shift，RTPS)，φ 2为第二个微环对应的RTPS。φ avg和φ diff的初始值为零，在每一次迭代中对φ avg或φ diff的值增加一个小步长的变量从而一次改变两个环上电压，然后检测片外光探测器(Photodiode，PD)读数值，比较PD值较上一次是增大还是减小，然后判断、反馈去继续增加或者减小φ avg或φ diff的值达到改变两个微环上相位的目的，从而达到两环电压联动的效果。
但是随着通信系统的发展，对滤波器的自由光谱范围(Free Spectral Range，FSR)的需求也增大，因此滤波器多采用具有游标效应的高阶微环滤波器或者级联MZI滤波器。而具有游标效应的高阶微环滤波器或者级联MZI滤波器对波长的敏感性更高，由于外界环境温度的剧烈变化、波长的跳变、抖动、漂移等干扰，导致的各个环谐振峰波长对不准而引起的误差将指数升高。因此单纯采用将环上电压与两环相位和与两环相位差进行转换的方法将不再适用对于高阶微环的锁定控制。
发明内容
本申请实施例提供了一种波长锁定方法以及装置，用于提高对高阶微环进行波长锁定 的准确度。
第一方面，本申请实施例提供一种波长锁定方法，应用于包括N个环的级联滤波器，其中该N为大于或等于2的整数，该波长锁定方法具体包括：该波长锁定装置建立用于指示该级联滤波器的滤波波长和该级联滤波器的电压值组合对应关系的查找表；然后在该波长锁定装置获取入射光信号，并确定该级联滤波器的目标滤波的波长的情况下，该波长锁定装置为该级联滤波器加载初始电压值组合；该波长锁定装置根据坐标变换矩阵和该初始电压值组合确定中间变量组合，其中该坐标变换矩阵为N*N矩阵；该波长锁定装置再根据第一预设步长调整该中间变量组合中的至少一个中间变量进行迭代反馈调整，并记录调整后的该级联滤波器的功率值；在该级联滤波器的功率值最大时，该波长锁定装置从该入射光信号中输出该目标滤波。
本实施例中，该级联滤波器中可以由N个微环组成，也可以是由N个马赫泽德干涉仪(Mach-Zehnder Interferometer，MZI)组成或者其他可能滤波器件组成，具体此处不做限定。
本实施例中，该波长锁定装置利用坐标变换矩阵生成中间变量，并联动进行迭代反馈，使得该波长锁定精度更高，对于外界环境影响反应更加迅速，对锁定状态优良的判断变得更加精准和优良。
可选的，该波长锁定装置可以采用如下方式生成中间变量组合：
该波长锁定装置基于矩阵条件数按照预设条件选择该第一坐标变换矩阵，其中，该矩阵条件数位于预设范围内，且该第一坐标变换矩阵为N*N矩阵；最后该波长锁定装置根据该第一坐标变换矩阵和该初始电压值组合利用矩阵方程生成该中间变量组合。其中，该矩阵方程为PP i＝A*φ i；所述i等于所述N，所述PP i为所述中间变量，所述A为所述第一坐标变换矩阵，所述φ i为所述初始电压值与目标电压值之间的抖动电压值，所述目标电压值为所述级联滤波器稳定时加载的电压值，所述φ i的最小值大于所述级联滤波器的电路系统的噪声值。比如，若该级联滤波器包括4个微环，则该矩阵方程为PP i＝A*φ i，(i＝1,2,3,4)。即该中间变量经坐标变换矩阵之后可以如下：
PP 1＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
PP 2＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
PP 3＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
PP 4＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
在实际情况中，每一个微环加载对应的电压值之后，该微环均对应一个相应的绕环相移。而由于工艺容差，该微环根据该查找表加载的绕环相移与理想相移之间存在一定的偏差，因此需要对该微环上的电压值进行相应的调整，即相当于对微环的绕环相移进行相应的调整，本实施例中该φ 1，φ 2，φ 3，φ 4为该级联滤波器中各微环对应的抖动相移值。其中，由于对于一个固定的坐标变换矩阵和一个固定的步长来说，φ i的最小值也是固定的，而为满足(AD/DA)转换电路的有效性，该φ i的最小值是不能够小于整个级联滤波器的电路系统的噪声值。进一步来说，该φ i值也限定了预设步长的取值或者坐标矩阵的选择。即该预设步长的取值或者该坐标变换矩阵的选择需要使得该φ i的最小值大于或等于该级联滤波器的 电路系统的噪声值。
可选的，该波长锁定装置可以根据如下预设条件选择该第一坐标变换矩阵，其中该预设条件包括其中至少一项：该第一坐标变换矩阵中的各元素基于零点对称；该第一坐标变换矩阵中的各元素绝对值小于预设值；该第一坐标变换矩阵中的各元素相对单一。举例说明，该第一坐标变换矩阵的各元素可以是(0，-1，1)。
可选的，该波长锁定装置从该中间变量组合中选择目标中间变量进行迭代反馈的具体过程可以如下：
该波长锁定装置在接收到该入射光信号之后，记录该级联滤波器的第一功率值，即该第一功率值为初始功率值；然后该波长锁定装置从该中间变量组合中选择第一中间变量作为该目标中间变量；然后该波长锁定装置将该第一中间变量按照该第一预设步长、该第一坐标变换矩阵和该第一调整方式调整为第二中间变量，并记录此时该级联滤波器的第二功率值，其中该第一调整方式用于指示该第一中间变量的增减符号；然后该波长锁定装置根据该第一功率值和该第二功率值确定该第二中间变量的第二调整方式，该第二调整方式用于指示该第二中间变量的增减符号；最后该波长锁定装置将该第二中间变量根据该第一预设步长、该第一坐标变换矩阵和该第二调整方式调整为第三中间变量，并记录此时该级联滤波器的第三功率值；然后该波长锁定装置依次进行迭代反馈直至该级联滤波器的功率值稳定且处于最大处(也可以说是在该级联滤波器的波形图处于稳定且对称的情况时)。可以理解的是，该目标中间变量可以包括该中间变量组合中的至少一个中间变量，即该波长锁定装置可以调整一个中间变量，也可以选择两个或者更多的中间变量，具体情况此处不做限定。此处以选择两个中间变量进行迭代反馈举例说明，假设该中间变量组合包括4个中间变量，分别为PP1、PP2、PP3和PP4。该波长锁定装置在接收到该入射光信号之后，记录该级联滤波器的初始功率值X；然后该波长锁定装置从该中间变量组合中选择PP1和PP2作为该目标中间变量；然后该波长锁定装置将PP1增加该第一预设步长得到更新后的PP1，这时记录该级联滤波器的功率值为Y；该波长锁定装置将PP2增加该第一预设步长得到更新后的PP2，这时记录该级联滤波器的功率值为Z；然后该波长锁定装置将该X与该Y进行比较，得到该更新后的PP1的调整方式；该波长锁定装置将该Y与该Z进行比较，得到该更新后的PP2的调整方式；最后该波长锁定装置再按照该更新后的PP1的调整方式对该更新后的PP1再次进行调整，并记录新的功率值A；该波长锁定装置再按照该更新后的PP2的调整方式对该更新后的PP2再次进行调整，并记录新的功率值B。即该波长锁定装置可以依次循环进行迭代反馈更新直至该级联滤波器的功率值稳定且取值最大时，停止迭代更新。
可选的，该波长锁定装置在记录该第一功率值和该第二功率值之后，还可以实现如下技术方案：该波长锁定装置根据该第一功率值和该第二功率值确定第二预设步长；然后该波长锁定装置根据该第二预设步长、该第一坐标变换矩阵和该第二调整方式调整该第二中间变量至第四中间变量，并记录该第四中间变量对应的该级联滤波器的第四功率值。其中，该波长锁定装置根据该第一功率值和该第二功率值确定该第二预设步长可以采用如下方式：该波长锁定装置预设功率变化率的预设阈值；然后该波长锁定装置根据该第一功率 值和该第二功率值计算功率变化率，若该功率变化率大于该预设阈值，则该波长锁定装置确定该级联滤波器的功率正在往稳态收敛，此时该波长锁定装置确定该第二预设步长大于该第一预设步长；若该功率变化率小于该预设阈值，则该波长锁定装置确定该级联滤波器的功率已趋于稳定平衡态，此时该波长锁定装置确定该第二预设步长小于该第一预设步长。这样该波长锁定装置可以在稳定的平衡态自动降低步长，在外界环境温度变化或较大波长变化影响下的非平衡态时将自动增加步长以求换取稳定的平衡，从而实现对该级联滤波器的功率收敛速度和精度的进一步提升。
可选的，该波长锁定装置在记录该第一功率值和该第二功率值之后，还可以实现如下技术方案：该波长锁定装置根据该第一功率值和该第二功率值确定第二坐标变换矩阵；然后该波长锁定装置根据该第一预设步长、该第二坐标变换矩阵和该第二调整方式调整该第二中间变量至第五中间变量，并记录该第五中间变量对应的该级联滤波器的第五功率值。其中，该波长锁定装置根据该第一功率值和该第二功率值确定该第二坐标变换矩阵可以采用如下方式：该波长锁定装置预设功率变化率的预设阈值；然后该波长锁定装置根据该第一功率值和该第二功率值计算功率变化率，若该功率变化率大于该预设阈值，则该波长锁定装置确定该级联滤波器的功率正在往稳态收敛，此时该波长锁定装置确定该第二坐标变换矩阵的矩阵条件数大于该第一坐标变换矩阵的矩阵条件数；若该功率变化率小于该预设阈值，则该波长锁定装置确定该级联滤波器的功率已趋于稳定平衡态，此时该波长锁定装置确定该第二坐标变换矩阵的矩阵条件数小于该第一坐标变换矩阵的矩阵条件数。这样该波长锁定装置可以在稳定的平衡态自动降低坐标变换矩阵的矩阵条件数，在外界环境温度变化或较大波长变化影响下的非平衡态时将自动增加坐标变换矩阵的矩阵条件数以求换取稳定的平衡，从而实现对该级联滤波器的功率收敛速度和精度的进一步提升。
可选的，所述波长锁定装置根据所述第一功率值和所述第二功率值确定所述第二中间变量的第二调整方式的具体方式可以如下：若所述第二功率值小于所述第一功率值，则所述波长锁定装置确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相反；若所述第二功率值大于所述第一功率值，则所述波长锁定装置确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相同。具体来说，如果发现改变某个中间变量后得到的功率值大于初始功率值，那么证明往此方向进行步长增加的操作可以让功率值变得更大，即下波谱线的谐振峰在往目标滤波的波长附近移动，那么就应该针对这个中间变量继续往这个方向增加步长；如果发现改变某个中间变量后得到的功率值小于初始功率值，那么证明往此方向进行步长的增加的操作反而让功率变得更小，即下波谱线的谐振峰在偏移目标滤波的波长，那么此时就应该更换步长增加的符号，对应此中间变量应该在下一次循环中进行此步长大小的负增长。这样可以使得该级联滤波器的功率收敛速度加快。
第二方面，本申请实施例提供一种波长锁定装置，该装置具有实现上述第一方面中波长锁定装置行为的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。
在一个可能的实现方式中，该装置包括用于执行以上第一方面各个步骤的单元或模 块。例如，该装置包括：获取模块，用于获取入射光信号；处理模块，用于根据查找表和目标滤波的波长为级联滤波器加载初始电压值组合，所述查找表用于指示滤波波长与所述级联滤波器的电压值的映射关系，所述级联滤波器包括N个环，所述初始电压值组合包括N个初始电压值，所述目标滤波为所述级联滤波器的输出光信号，所述N为大于或等于2的整数；根据第一坐标变换矩阵和所述初始电压值组合生成中间变量组合，所述第一坐标变换矩阵为N*N阶矩阵；从所述中间变量组合中选择目标中间变量以第一预设步长和所述第一坐标变换矩阵进行迭代反馈，并记录所述级联滤波器的功率值；
输出模块，用于在所述功率值最大时，从所述入射光信号中过滤出所述目标滤波。
可选的，还包括存储模块，用于保存波长锁定装置必要的程序指令和数据。
在一种可能的实现方式中，该装置包括：处理器、收发器和存储器，所述处理器被配置为支持波长锁定装置执行上述第一方面提供的方法中相应的功能；所述存储器被配置为与处理器耦合，用于保存波长锁定装置必要的程序指令和数据。
在一种可能的实现方式中，当该装置为波长锁定装置内的芯片时，该芯片包括：处理模块和收发模块，所述处理模块例如可以是处理器，此处理器用于根据查找表和目标滤波的波长为级联滤波器加载初始电压值组合，所述查找表用于指示滤波波长与所述级联滤波器的电压值的映射关系，所述级联滤波器包括N个环，所述初始电压值组合包括N个初始电压值，所述目标滤波为所述级联滤波器的输出光信号，所述N为大于或等于2的整数；根据第一坐标变换矩阵和所述初始电压值组合生成中间变量组合，所述第一坐标变换矩阵为N*N阶矩阵；从所述中间变量组合中选择目标中间变量以第一预设步长和所述第一坐标变换矩阵进行迭代反馈，并记录所述级联滤波器的功率值；所述收发模块例如可以是该芯片上的输入/输出接口、管脚或电路等，接收该入射光信号或将处理器过滤出的目标滤波传送给与此芯片耦合的其他芯片或模块中。该处理模块可执行存储单元存储的计算机执行指令，以支持波长锁定装置执行上述第一方面方法中相应的功能。可选地，所述存储单元可以为所述芯片内的存储单元，如寄存器、缓存等，所述存储单元还可以是位于所述芯片外部的存储单元，如只读存储器(read-only memory，简称ROM)或可存储静态信息和指令的其他类型的静态存储设备，随机存取存储器(random access memory，简称RAM)等。
在一种可能的实现方式中，该装置包括：处理器，基带电路，射频电路和天线。其中处理器用于实现对各个电路部分功能的控制。可选的，该装置还包括存储器，其保存波长锁定装置必要的程序指令和数据。
其中，上述任一处提到的处理器，可以是一个通用中央处理器(Central Processing Unit，简称CPU)，微处理器，特定应用集成电路(application-specific integrated circuit，简称ASIC)，或一个或多个用于控制上述各方面信道资源协调分配的方法的程序执行的集成电路。
第三方面，本申请实施例提供一种计算机可读存储介质，所述计算机存储介质存储有计算机指令，所述计算机指令用于执行上述第一方面中任意可能的实施方式所述的方法。
第四方面，本申请实施例提供一种包含指令的计算机程序产品，当其在计算机上运行时，使得计算机执行上述各方面中第一方面中任意可以的实施方式所述的方法。
第五方面，本申请提供了一种芯片系统，该芯片系统包括处理器，用于支持波长锁定装置实现上述方面中所涉及的功能，例如生成或处理上述方法中所涉及的数据和/或信息。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存波长锁定装置必要的程序指令和数据，以实现上述各方面中任意一方面的功能。该芯片系统可以由芯片构成，也可以包含芯片和其他分立器件。
附图说明
图1为级联滤波器的一种结构示意图；
图2为双环级联微环滤波器的反馈控制方法的一个流程示意图；
图3为本申请实施例中波长锁定方法的应用系统架构图；
图4为本申请实施例中波长锁定方法的一个实施例示意图；
图5为本申请实施例中波长锁定方法的一个流程示意图；
图6为本申请实施例中波长锁定方法的另一个流程示意图；
图7为本申请实施例中波长锁定装置的一个实施例示意图；
图8为本申请实施例中波长锁定装置的另一个实施例示意图。
具体实施方式
本申请实施例提供了一种波长锁定方法以及装置，用于提高对高阶微环进行波长锁定的准确度。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的实施例能够以除了在这里图示或描述的内容以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
在现有的光通信系统中，在城域网节点中，对光波长的上载与下载的精度要求很高。而要做到对光波长的选择作用，其本质需要是一个光滤波器，当收端有一连串的光信号进来时，光滤波器需要对光波波长选择性下载和上载指定的光信号。一个光滤波器可以是由级联微环组成，也可以由级联MZI等一些结构组成。由于对于光滤波器而言，入光波长间隔很小，下波波长点必须精确到1nm范围，并且为了使其性能优越，面对外界环境得变化，所对应的下波波长要保持固定。级联微环滤波器可以通过如图1的反馈系统经过持续不断的反馈控制，将级联微环滤波器的谐振峰稳定在动态平衡的状态。而目前仅提供了一种双环级联微环滤波器的反馈控制方法。如图2所示，针对两环级联滤波器，将两环对应的相位用中间变量两环相位和和两环相位差进行表示，其中两环相位和为φ avg＝(φ 1+φ 2)/2，两环相位差为φ diff＝(φ 1-φ 2)/2，其中φ 1为第一个微环对应的绕环相移(Round-Trip Phase Shift，RTPS)，φ 2为第二个微环对应的RTPS。φ avg和φ diff的初始值为零，在每一次迭代中对φ avg或φ diff的值增加一个小步长的变量从而一次改变两个环上电压，然后检测片外光探测器(Photodiode，PD)读数值，比较PD值较上一次是增大还是减小，然后判断、反馈去继续 增加或者减小φ avg或φ diff的值达到改变两个微环上相位的目的，从而达到两环电压联动的效果。但是随着通信系统的发展，对滤波器的自由光谱范围(Free Spectral Range，FSR)的需求也增大，因此滤波器多采用具有游标效应的高阶微环滤波器或者级联MZI滤波器。而具有游标效应的高阶微环滤波器或者级联MZI滤波器对波长的敏感性更高，由于外界环境温度的剧烈变化、波长的跳变、抖动、漂移等干扰，导致的各个环谐振峰波长对不准而引起的误差将指数升高。因此单纯采用将环上电压与两环相位和与两环相位差进行转换的方法将不再适用对于高阶微环的锁定控制。
为了解决这一问题，本申请实施例提供如下波长锁定方法，该波长锁定方法应用于包括N个环的级联滤波器，其中该N为大于或等于2的整数，具体包括：该波长锁定装置建立用于指示该级联滤波器的滤波波长和该级联滤波器的电压值组合对应关系的查找表；然后在该波长锁定装置获取入射光信号，并确定该级联滤波器的目标滤波的波长的情况下，该波长锁定装置为该级联滤波器加载初始电压值组合；该波长锁定装置根据坐标变换矩阵和该初始电压值组合确定中间变量组合，其中该坐标变换矩阵为N*N矩阵；该波长锁定装置再根据第一预设步长调整该中间变量组合中的至少一个中间变量进行迭代反馈调整，并记录调整后的该级联滤波器的功率值；在该级联滤波器的功率值最大时，该波长锁定装置从该入射光信号中输出该目标滤波。
在本申请实施例中，以级联四微环滤波器为例，波长锁定方法的应用架构可以如图3所示：图3中左侧为级联四微环滤波器，该级联四微环滤波器由4个微环(分别为V4、V3、V2、V1)串联，并有四个口，分别为In，Thru，Add，Drop。其中In口接收入射光信号，Drop口输出目标滤波。从每一个微环的滤波谱线都不尽相同，通过在微环上设计的金属层加热器(heater)对微环加热，可以使每个微环的滤波谱线左右移动。其中Drop口连接光探测器(Photodiode，PD)，该PD可以记录该级联四微环滤波器的功率值，并将该功率值反馈给波长锁定模块。其中该波长锁定模块由坐标变换矩阵(Transformed Coordinate Matrix，TCM)组成，而该波长锁定模块还可以包括步长自适应模块(Adaptive Step)。
本实施例中，该波长锁定装置可以是与级联滤波器集成为一个整体器件，即该级联滤波器中包含了波长锁定装置，实现了波长锁定功能；该波长锁定装置也可以与该级联滤波器为独立的器件，具体此处不做限定。
具体请参阅图4所示，本申请实施例中波长锁定方法的一个实施例包括：
401、该波长锁定装置接收入射光信号。
该级联滤波器接收到入射光信号，以激活该波长锁定装置开始运行。
可以理解的是，该波长锁定装置可以直接就是该级联滤波器，即该级联滤波器就具备波长锁定的功能，或者该波称锁定装置为一个独立的实体装置与该级联滤波器相连，从而对该级联滤波器进行控制。
402、该波长锁定装置确定该级联滤波器的目标滤波，并获取该目标滤波的波长。
该波长锁定装置确定该级联滤波器待输出的目标滤波，并获知该目标滤波的波长。即比如，当前时刻该级联滤波器需要下波一个波长为λ的目标滤波，则该波长锁定装置需要获知该波长。
403、该波长锁定装置根据该目标滤波的波长和查找表为级联滤波器加载初始电压值组合，该级联滤波器包括N个环，所述N为大于或等于2的整数。
该波长锁定装置在运行之前会为该级联滤波器建立一个用于指示该级联滤波器的滤波波长和该级联滤波器的电压值组合对应关系的查找表(即通过该查找表，该波长锁定装置可以对该级联滤波器接收到的入射光信号进行指定波长的滤波)；然后该波长锁定装置根据该目标滤波的滤长和该查找表为该级联滤波器加载初始电压值。
可以理解的是，该级联滤波器上加载了初始电压值之后，由于环上的金属层加热器heater是热调制器，从而导致微环互相之间串扰严重，加之周围环境的温度不定，因此该初始电压值并不能精确的对该入射光信号进行精确的过滤。
404、该波长锁定装置根据第一坐标变换矩阵和该初始电压值生成中间变量组合，该第一坐标变换矩阵为N*N矩阵。
该波长锁定装置基于矩阵条件数按照预设条件选择该第一坐标变换矩阵，其中，该矩阵条件数位于预设范围内；最后该波长锁定装置根据该第一坐标变换矩阵和该初始电压值组合利用矩阵方程生成该中间变量组合。其中，该矩阵方程为PP i＝A*φ i；所述i等于所述N，所述PP i为所述中间变量，所述A为所述第一坐标变换矩阵，所述φ i为所述初始电压值与目标电压值之间的抖动电压值，所述目标电压值为所述级联滤波器稳定时加载的电压值。比如，若该级联滤波器包括4个微环，则该矩阵方程为PP i＝A*φ i，(i＝1,2,3,4)。即该中间变量经坐标变换矩阵之后可以如下：
PP 1＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
PP 2＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
PP 3＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
PP 4＝A*φ 1+A*φ 2+A*φ 3+A*φ 4；
在实际情况中，每一个微环加载对应的电压值之后，该微环均对应一个相应的绕环相移。而由于工艺容差，该微环根据该查找表加载的绕环相移与理想相移之间存在一定的偏差，因此需要对该微环上的电压值进行相应的调整，即相当于对微环的绕环相移进行相应的调整，本实施例中该φ 1，φ 2，φ 3，φ 4为该级联滤波器中各微环对应的抖动相移值。其中，由于对于一个固定的坐标变换矩阵和一个固定的步长来说，φ i的最小值也是固定的，而为满足(AD/DA)转换电路的有效性，该φ i的最小值是不能够小于整个级联滤波器的电路系统的噪声值。进一步来说，该φ i值也限定了预设步长的取值或者坐标矩阵的选择。即该预设步长的取值或者该坐标变换矩阵的选择需要使得该φ i的最小值大于或等于该级联滤波器的电路系统的噪声值。
而该波长锁定装置可以根据如下预设条件选择该第一坐标变换矩阵，其中该预设条件包括其中至少一项：该第一坐标变换矩阵中的各元素基于零点对称；该第一坐标变换矩阵中的各元素绝对值小于预设值；该第一坐标变换矩阵中的各元素相对单一。举例说明，该第一坐标变换矩阵的各元素可以是(0，-1，1)。
405、该波长锁定装置从该中间变量组合中选择目标中间变量迭代反馈，并记录调整后的该级联滤波器的功率值。
本实施例中，该波长锁定装置在接收到该入射光信号之后，记录该级联滤波器的第一功率值，即该第一功率值为初始功率值；然后该波长锁定装置从该中间变量组合中选择第一中间变量作为该目标中间变量；然后该波长锁定装置将该第一中间变量按照该第一预设步长、该第一坐标变换矩阵和该第一调整方式调整为第二中间变量，并记录此时该级联滤波器的第二功率值，其中该第一调整方式用于指示该第一中间变量的增减符号；然后该波长锁定装置根据该第一功率值和该第二功率值确定该第二中间变量的第二调整方式，该第二调整方式用于指示该第二中间变量的增减符号；最后该波长锁定装置将该第二中间变量根据该第一预设步长、该第一坐标变换矩阵和该第二调整方式调整为第三中间变量，并记录此时该级联滤波器的第三功率值；然后该波长锁定装置依次进行迭代反馈直至该级联滤波器的功率值稳定且处于最大处(也可以说是在该级联滤波器的波形图处于稳定且对称的情况时)。可以理解的是，该目标中间变量可以包括该中间变量组合中的至少一个中间变量，即该波长锁定装置可以调整一个中间变量，也可以选择两个或者更多的中间变量，具体情况此处不做限定。此处以选择两个中间变量进行迭代反馈举例说明，假设该中间变量组合包括4个中间变量，分别为PP1、PP2、PP3和PP4。该波长锁定装置在接收到该入射光信号之后，记录该级联滤波器的初始功率值X；然后该波长锁定装置从该中间变量组合中选择PP1和PP2作为该目标中间变量；然后该波长锁定装置将PP1增加该第一预设步长得到更新后的PP1，这时记录该级联滤波器的功率值为Y；该波长锁定装置将PP2增加该第一预设步长得到更新后的PP2，这时记录该级联滤波器的功率值为Z；然后该波长锁定装置将该X与该Y进行比较，得到该更新后的PP1的调整方式；该波长锁定装置将该Y与该Z进行比较，得到该更新后的PP2的调整方式；最后该波长锁定装置再按照该更新后的PP1的调整方式对该更新后的PP1再次进行调整，并记录新的功率值A；该波长锁定装置再按照该更新后的PP2的调整方式对该更新后的PP2再次进行调整，并记录新的功率值B。即该波长锁定装置可以依次循环进行迭代反馈更新直至该级联滤波器的功率值稳定且取值最大时，停止迭代更新。
可选的，所述波长锁定装置根据所述第一功率值和所述第二功率值确定所述第二中间变量的第二调整方式的具体方式可以如下：若所述第二功率值小于所述第一功率值，则所述波长锁定装置确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相反；若所述第二功率值大于所述第一功率值，则所述波长锁定装置确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相同。具体来说，如果发现改变某个中间变量后得到的功率值大于初始功率值，那么证明往此方向进行步长增加的操作可以让功率值变得更大，即下波谱线的谐振峰在往目标滤波的波长附近移动，那么就应该针对这个中间变量继续往这个方向增加步长；如果发现改变某个中间变量后得到的功率值小于初始功率值，那么证明往此方向进行步长的增加的操作反而让功率变得更小，即下波谱线的谐振峰在偏移目标滤波的波长，那么此时就应该更换步长增加的符号，对应此中间变量应该在下一次循环中进行此步长大小的负增长。这样可以使得该级联滤波器的功率收敛速度加快。
本实施例中，该波长锁定装置在进行迭代反馈时还可以进行步长自适应调整，即该波 长锁定装置根据该第一功率值和该第二功率值确定第二预设步长；然后该波长锁定装置根据该第二预设步长、该第一坐标变换矩阵和该第二调整方式调整该第二中间变量至第四中间变量，并记录该第四中间变量对应的该级联滤波器的第四功率值。以图3所示的级联四微环滤波器，并调整两个中间变量(该两个中间变量为PP1和PP2)为例进行说明。具体情况请参阅图5所示，本申请实施例中波长锁定方法的一个流程示意图，包括：
该波长锁定装置通过查找表为该级联滤波器的四个微环加载初始电压值；然后在级联滤波器接收到入射光信号时，该级联滤波器的Drop口连接的PD获取该级联滤波器的初始功率值X；然后该波长锁定装置设置预设目标功率值，可以理解的是该目标功率值要大于该Drop口输出的光功率，这样可以保证该波长锁定装置迭代反馈控制流程继续进行。该波长锁定装置设定好第一预设步长；然后该波长锁定装置对于该PP1增加该第一预设步长，并且记录此时的功率值为Y；该波长锁定装置对于该PP2增加该第一预设步长，并且记录此时的功率值为Z。在这两次步长调整之后，四个微环上的电压值发生了相应的改变。然后该波长锁定装置将该功率值Y与该功率值X进行比较，将该功率值Z与该功率值Y进行比较；若该Y大于X，则说明在该PP1上增加步长可以使得该级联滤波器的功率值变大，即下波谱线的谐振峰在往该目标滤波的波长附近移动，那么在下一次调整过程中，针对该PP1可以继续增加步长；若该Y小于X，则说明在该PP1上增加该第一步长可以使得该级联滤波器的功率值变小，即下波谱线的谐振峰远离了该目标滤波的波长，那么在下一次调整过程中，针对该PP1可以减去该第一预设步长；若该Z大于Y，则说明在该PP2上增加步长可以使得该级联滤波器的功率值变大，即下波谱线的谐振峰在往该目标滤波的波长附近移动，那么在下一次调整过程中，针对该PP2可以继续增加该第一预设步长；若该Z小于Y则说明在该PP2上增加该第一预设步长可以使得该级联滤波器的功率值变小，即下波谱线的谐振峰远离了该目标滤波的波长，那么在下一次调整过程中，针对该PP2可以减去该第一预设步长；同时该波长锁定装置根据该功率值Z和X计算此次迭代之后的功率变化率；该波长锁定装置判断该功率变化率与预设阈值之间的关系，若该功率变化率大于该预设阈值，则说明该级联滤波器正在往稳态收敛，此时该波长锁定装置可以加快该级联滤波器的收敛速度，从而调整步长，使得下一次迭代的第二预设步长大于该第一预设步长；若该功率变化率小于该预设阈值，则说明该级联滤波器已经趋于稳定平衡状态，此时该波长锁定装置需要保证收敛的正确性，从而调整步长，使得下一次迭代的第二预设步长小于该第一预设步长；然后该波长锁定装置按照如下步骤重复迭代反馈流程，在该级联滤波器的功率值稳定时，结束该迭代过程。
可选的，该波长锁定装置还可以进行坐标变换矩阵自适应调整，即该波长锁定装置根据该第一功率值和该第二功率值确定第二坐标变换矩阵；然后该波长锁定装置根据该第一预设步长、该第二坐标变换矩阵和该第二调整方式调整该第二中间变量至第五中间变量，并记录该第五中间变量对应的该级联滤波器的第五功率值。以图3所示的级联四微环滤波器，并调整两个中间变量(该两个中间变量为PP1和PP2)为例进行说明。具体情况请参阅图6所示，本申请实施例中波长锁定方法的一个流程示意图，包括：
该波长锁定装置通过查找表为该级联滤波器的四个微环加载初始电压值；然后在级联 滤波器接收到入射光信号时，该级联滤波器的Drop口连接的PD获取该级联滤波器的初始功率值X；然后该波长锁定装置设置预设目标功率值，可以理解的是该目标功率值要大于该Drop口输出的光功率，这样可以保证该波长锁定装置迭代反馈控制流程继续进行。该波长锁定装置设定好第一预设步长；然后该波长锁定装置对于该PP1增加该第一预设步长，并且记录此时的功率值为Y；该波长锁定装置对于该PP2增加该第一预设步长，并且记录此时的功率值为Z。在这两次步长调整之后，四个微环上的电压值发生了相应的改变。然后该波长锁定装置将该功率值Y与该功率值X进行比较，将该功率值Z与该功率值Y进行比较；若该Y大于X，则说明在该PP1上增加步长可以使得该级联滤波器的功率值变大，即下波谱线的谐振峰在往该目标滤波的波长附近移动，那么在下一次调整过程中，针对该PP1可以继续增加步长；若该Y小于X，则说明在该PP1上增加该第一步长可以使得该级联滤波器的功率值变小，即下波谱线的谐振峰远离了该目标滤波的波长，那么在下一次调整过程中，针对该PP1可以减去该第一预设步长；若该Z大于Y，则说明在该PP2上增加步长可以使得该级联滤波器的功率值变大，即下波谱线的谐振峰在往该目标滤波的波长附近移动，那么在下一次调整过程中，针对该PP2可以继续增加该第一预设步长；若该Z小于Y则说明在该PP2上增加该第一预设步长可以使得该级联滤波器的功率值变小，即下波谱线的谐振峰远离了该目标滤波的波长，那么在下一次调整过程中，针对该PP2可以减去该第一预设步长；同时该波长锁定装置根据该功率值Z和X计算此次迭代之后的功率变化率；该波长锁定装置判断该功率变化率与预设阈值之间的关系，若该功率变化率大于该预设阈值，则说明该级联滤波器正在往稳态收敛，此时该波长锁定装置可以加快该级联滤波器的收敛速度，从而更新坐标变换矩阵，使得下一次迭代的第二坐标变换矩阵的第二矩阵条件数大于该第一坐标变换矩阵的第一矩阵条件数；若该功率变化率小于该预设阈值，则说明该级联滤波器已经趋于稳定平衡状态，此时该波长锁定装置需要保证收敛的正确性，从而更新坐标变换矩阵，使得下一次迭代的第二坐标变换矩阵的第二矩阵条件数小于该第一坐标变换矩阵的第一矩阵条件数；然后该波长锁定装置按照如下步骤重复迭代反馈流程，在该级联滤波器的功率值稳定时，结束该迭代过程。
406、在该功率值为最大值时，该波长锁定装置从该入射光信号中输出该目标滤波。
在该级联滤波器的功率值为最大值时，该波长锁定装置确定该级联滤波器在该目标滤波的波长的波形图已稳定且波形图符合要求，则该波长锁定装置确定此次迭代反馈调整结束，以使得该级联滤波器可以从该入射光信号中过滤出该目标滤波。
该波长锁定装置利用坐标变换矩阵生成中间变量，并联动进行迭代反馈，使得该波长锁定精度更高，对于外界环境影响反应更加迅速，对锁定状态优良的判断变得更加精准和优良。同时该波长锁定装置可以在稳定的平衡态自动降低步长或坐标变换矩阵的矩阵条件数，在外界环境温度变化或较大波长变化影响下的非平衡态时将自动增加步长或坐标变换矩阵的矩阵条件数以求换取稳定的平衡，从而实现对该级联滤波器的功率收敛速度和精度的进一步提升。
上面描述了本申请实施例中波长锁定方法，下面对本申请实施例中波长锁定装置进行描述。
具体请参阅图7所示，本申请实施例中该波长锁定装置700包括：获取模块701、处理模块702和输出模块703。装置700可以是一个或多个芯片或其他可能的实体装置。装置700可以用于执行上述方法实施例中的波长锁定装置的部分或全部功能。
例如，该获取模块701，可以用于执行上述方法实施例中的步骤401。例如，该获取模块701获取入射光信号；
该处理模块702可以用于执行上述方法实施例中的步骤402到步骤405。例如，处理模块702根据查找表和目标滤波的波长为级联滤波器加载初始电压值组合，所述查找表用于指示滤波波长与所述级联滤波器的电压值的映射关系，所述级联滤波器包括N个环，所述初始电压值组合包括N个初始电压值，所述目标滤波为所述级联滤波器的输出光信号，所述N为大于或等于2的整数；根据第一坐标变换矩阵和所述初始电压值组合生成中间变量组合，所述第一坐标变换矩阵为N*N阶矩阵；从所述中间变量组合中选择目标中间变量以第一预设步长和所述第一坐标变换矩阵进行迭代反馈，并记录所述级联滤波器的功率值；
该输出模块703，可以用于执行上述方法实施例中的步骤406。例如，该输出模块703在所述功率值最大时，从所述入射光信号中过滤出所述目标滤波。
可选的，该波长锁定装置700还可以包括存储模块，此存储模块于处理模块耦合，使得处理模块可执行存储模块中存储的计算机执行指令以实现上述方法实施例中波长锁定装置的功能。在一个示例中，装置700中可选的包括的存储模块可以为芯片内的存储单元，如寄存器、缓存等，所述存储模块还可以是位于芯片外部的存储单元，如只读存储器(read-only memory，简称ROM)或可存储静态信息和指令的其他类型的静态存储设备，随机存取存储器(random access memory，简称RAM)等。
应理解，上述图7对应实施例中波长锁定装置的各模块之间所执行的流程与前述图4至图6中对应方法实施例中的波长锁定装置执行的流程类似，具体此处不再赘述。
图8示出了上述实施例中一种波长锁定装置800可能的结构示意图，该装置800可以配置成是前述波长锁定装置。该装置800可以包括：处理器802、计算机可读存储介质/存储器803、收发器804、输入设备805和输出设备806，以及总线801。其中，处理器，收发器，计算机可读存储介质等通过总线连接。本申请实施例不限定上述部件之间的具体连接介质。
一个示例中，该收发器804获取入射光信号；
该处理器802根据查找表和目标滤波的波长为级联滤波器加载初始电压值组合，所述查找表用于指示滤波波长与所述级联滤波器的电压值的映射关系，所述级联滤波器包括N个环，所述初始电压值组合包括N个初始电压值，所述目标滤波为所述级联滤波器的输出光信号，所述N为大于或等于2的整数；根据第一坐标变换矩阵和所述初始电压值组合生成中间变量组合，所述第一坐标变换矩阵为N*N阶矩阵；从所述中间变量组合中选择目标中间变量以第一预设步长和所述第一坐标变换矩阵进行迭代反馈，并记录所述级联滤波器的功率值；
该收发器804在所述功率值最大时，从所述入射光信号中过滤出所述目标滤波。
又一个示例中，处理器802可以运行操作系统，控制各个设备和器件之间的功能。收 发器804可以包括基带电路和射频电路。
该收发器804与该处理器802可以实现上述图4至图6中任一实施例中相应的步骤，具体此处不做赘述。
可以理解的是，图8仅仅示出了波长锁定装置的简化设计，在实际应用中，波长锁定装置可以包含任意数量的收发器，处理器，存储器等，而所有的可以实现本申请的波长锁定装置都在本申请的保护范围之内。
上述装置800中涉及的处理器802可以是通用处理器，例如通用中央处理器(CPU)、网络处理器(network processor，NP)、微处理器等，也可以是特定应用集成电路(application-specific integrated circBIt，ASIC)，或一个或多个用于控制本申请方案程序执行的集成电路。还可以是数字信号处理器(digital signal processor，DSP)、现场可编程门阵列(field-programmable gate array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。控制器/处理器也可以是实现计算功能的组合，例如包含一个或多个微处理器组合，DSP和微处理器的组合等等。处理器通常是基于存储器内存储的程序指令来执行逻辑和算术运算。
上述涉及的总线801可以是外设部件互连标准(peripheral component interconnect，简称PCI)总线或扩展工业标准结构(extended industry standard architecture，简称EISA)总线等。该总线可以分为地址总线、数据总线、控制总线等。为便于表示，图8中仅用一条粗线表示，但并不表示仅有一根总线或一种类型的总线。
上述涉及的计算机可读存储介质/存储器803还可以保存有操作系统和其他应用程序。具体地，程序可以包括程序代码，程序代码包括计算机操作指令。更具体的，上述存储器可以是只读存储器(read-only memory，ROM)、可存储静态信息和指令的其他类型的静态存储设备、随机存取存储器(random access memory，RAM)、可存储信息和指令的其他类型的动态存储设备、磁盘存储器等等。存储器803可以是上述存储类型的组合。并且上述计算机可读存储介质/存储器可以在处理器中，还可以在处理器的外部，或在包括处理器或处理电路的多个实体上分布。上述计算机可读存储介质/存储器可以具体体现在计算机程序产品中。举例而言，计算机程序产品可以包括封装材料中的计算机可读介质。
可以替换的，本申请实施例还提供一种通用处理系统，例如通称为芯片，该通用处理系统包括:提供处理器功能的一个或多个微处理器；以及提供存储介质的至少一部分的外部存储器，所有这些都通过外部总线体系结构与其它支持电路连接在一起。当存储器存储的指令被处理器执行时，使得处理器执行波长锁定装置在图4至图6所述实施例中的波长锁定方法中的部分或全部步骤和/或用于本申请所描述的技术的其它过程。
结合本申请公开内容所描述的方法或者算法的步骤可以硬件的方式来实现，也可以是由处理器执行软件指令的方式来实现。软件指令可以由相应的软件模块组成，软件模块可以被存放于RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、移动硬盘、CD-ROM或者本领域熟知的任何其它形式的存储介质中。一种示例性的存储介质耦合至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息。当然，存储介质也可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。另 外，该ASIC可以位于波长锁定装置中。当然，处理器和存储介质也可以作为分立组件存在于波长锁定装置中。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统，装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统，装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-Only Memory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，以上实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围。

Claims (21)

  1. 一种波长锁定方法，其特征在于，包括：
    波长锁定装置获取入射光信号；
    所述波长锁定装置根据查找表和目标滤波的波长为级联滤波器加载初始电压值组合，所述查找表用于指示滤波波长与所述级联滤波器的电压值的映射关系，所述级联滤波器包括N个环，所述N为大于或等于2的整数，所述初始电压值组合包括N个初始电压值，所述目标滤波为所述级联滤波器的输出光信号；
    所述波长锁定装置根据第一坐标变换矩阵和所述初始电压值组合生成中间变量组合，所述第一坐标变换矩阵为N*N阶矩阵；
    所述波长锁定装置从所述中间变量组合中选择目标中间变量以第一预设步长和所述第一坐标变换矩阵进行迭代反馈，并记录所述级联滤波器的功率值；
    在所述功率值最大时，所述波长锁定装置从入射光信号中过滤出所述目标滤波。
  2. 根据权利要求1所述的方法，其特征在于，所述波长锁定装置根据第一坐标变换矩阵和所述初始电压值组合生成中间变量组合包括：
    所述波长锁定装置根据预设条件选择所述第一坐标变换矩阵，所述第一坐标变换矩阵的矩阵条件数位于预设范围内；
    所述波长锁定装置根据所述第一坐标变换矩阵和所述初始电压值组合利用矩阵方程生成中间变量组合；
    所述矩阵方程为：PP i＝A*φ i；
    所述i等于所述N，所述PP i为所述中间变量，所述A为所述第一坐标变换矩阵，所述φ i为所述初始电压值与目标电压值之间的抖动电压值，所述目标电压值为所述级联滤波器稳定时加载的电压值，所述φ i的最小值大于或等于所述级联滤波器的电路系统的噪声值。
  3. 根据权利要求2所述的方法，其特征在于，所述预设条件包括其中至少一项：所述第一坐标变换矩阵中的各元素基于零点对称；所述第一坐标变换矩阵中的各元素绝对值小于预设值；所述第一坐标变换矩阵中的各元素取值相对单一。
  4. 根据权利要求1所述的方法，其特征在于，所述波长锁定装置从所述中间变量组合中选择目标中间变量以第一预设步长和所述第一坐标变换矩阵进行迭代反馈，并记录所述级联滤波器的功率值包括：
    所述波长锁定装置记录所述入射光信号入射时所述级联滤波器的第一功率值；
    所述波长锁定装置从所述中间变量组合中选择第一中间变量作为所述目标中间变量；
    所述波长锁定装置将所述第一中间变量按照所述第一预设步长、所述第一坐标变换矩阵和第一调整方式调整为第二中间变量，并记录此时所述级联滤波器的第二功率值，所述第一调整方式用于指示所述第一中间变量的增减符号；
    所述波长锁定装置根据所述第一功率值和所述第二功率值确定所述第二中间变量的第二调整方式，所述第二调整方式用于指示所述第二中间变量的增减符号；
    所述波长锁定装置将所述第二中间变量根据所述第一预设步长、所述第一坐标变换矩阵和所述第二调整方式调整为第三中间变量，并记录此时所述级联滤波器的第三功率值。
  5. 根据权利要求4所述的方法，其特征在于，所述方法还包括：
    所述波长锁定装置根据所述第一功率值和所述第二功率值确定第二预设步长；
    所述波长锁定装置将所述第二中间变量根据所述第二预设步长、所述第一坐标变换矩阵和所述第二调整方式调整为第四中间变量，并记录此时所述级联滤波器的第四功率值。
  6. 根据权利要求5所述的方法，其特征在于，所述波长锁定装置根据所述第一功率值和所述第二功率值确定第二预设步长包括：
    所述波长锁定装置根据所述第一功率值和所述第二功率值计算功率变化率；
    若所述功率变化率大于预设阈值，则所述波长锁定装置确定所述第二预设步长大于所述第一预设步长；
    若所述功率变化率小于所述预设阈值，则所述波长锁定装置确定所述第二预设步长小于所述第一预设步长。
  7. 根据权利要求4所述的方法，其特征在于，所述方法还包括：
    所述波长锁定装置根据所述第一功率值和所述第二功率值确定第二坐标变换矩阵；
    所述波长锁定装置将所述第二中间变量根据所述第一预设步长、所述第二坐标变换矩阵和所述第二调整方式调整为第五中间变量，并记录此时所述级联滤波器的第五功率值。
  8. 根据权利要求7所述的方法，其特征在于，所述波长锁定装置根据所述第一功率值和所述第二功率值确定第二坐标变换矩阵包括：
    所述波长锁定装置根据所述第一功率值和所述第二功率值计算功率变化率；
    若所述第一功率变化率大于预设阈值，则所述波长锁定装置确定所述第二坐标变换矩阵的矩阵条件数大于所述第一坐标变换矩阵的矩阵条件数；
    若所述第一功率变化率小于所述预设阈值，则所述波长锁定装置确定所述第二坐标变换矩阵的矩阵条件数小于所述第一坐标变换矩阵的矩阵条件数。
  9. 根据权利要求4至8中任一项所述的方法，其特征在于，所述波长锁定装置根据所述第一功率值和所述第二功率值确定所述第二中间变量的第二调整方式包括：
    若所述第二功率值小于所述第一功率值，则所述波长锁定装置确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相反；
    若所述第二功率值大于所述第一功率值，则所述波长锁定装置确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相同。
  10. 一种波长锁定装置，其特征在于，包括：
    获取模块，用于获取入射光信号；
    处理模块，用于根据查找表和目标滤波的波长为级联滤波器加载初始电压值组合，所述查找表用于指示滤波波长与所述级联滤波器的电压值的映射关系，所述级联滤波器包括N个环，所述初始电压值组合包括N个初始电压值，所述目标滤波为所述级联滤波器的输出光信号，所述N为大于或等于2的整数；根据第一坐标变换矩阵和所述初始电压值组合生成中间变量组合，所述第一坐标变换矩阵为N*N阶矩阵；从所述中间变量组合中选择目标中间变量以第一预设步长和所述第一坐标变换矩阵进行迭代反馈，并记录所述级联滤波器的功率值；
    输出模块，用于在所述功率值最大时，从所述入射光信号中过滤出所述目标滤波。
  11. 根据权利要求10所述的装置，其特征在于，所述处理模块，具体用于根据预设条件选择所述第一坐标变换矩阵，所述第一坐标变换矩阵的矩阵条件数位于预设范围内；
    根据所述第一坐标变换矩阵和所述初始电压值组合利用矩阵方程生成中间变量组合；
    所述矩阵方程为：PP i＝A*φ i；
    所述i等于所述N，所述PP i为所述中间变量，所述A为所述第一坐标变换矩阵，所述φ i为所述初始电压值与目标电压值之间的抖动电压值，所述目标电压值为所述级联滤波器稳定时加载的电压值，所述φ i的最小值大于或者等于所述级联滤波器的电路系统的噪声值。
  12. 根据权利要求11所述的装置，其特征在于，所述预设条件包括其中至少一项：所述第一坐标变换矩阵中的各元素基于零点对称；所述第一坐标变换矩阵中的各元素绝对值小于预设值；所述第一坐标变换矩阵中的各元素取值相对单一。
  13. 根据权利要求10所述的装置，其特征在于，所述处理模块，具体用于记录所述入射光信号入射时所述级联滤波器的第一功率值；
    从所述中间变量组合中选择第一中间变量作为所述目标中间变量；
    对所述第一中间变量按照所述第一预设步长、所述第一坐标变换矩阵和第一调整方式调整为第二中间变量，并记录此时所述级联滤波器的第二功率值，所述第一调整方式用于指示所述第一中间变量的增减符号；
    根据所述第一功率值和所述第二功率值确定所述第二中间变量的第二调整方式，所述第二调整方式用于指示所述第二中间变量的增减符号；
    将所述第二中间变量根据所述第一预设步长、所述第一坐标变换矩阵和所述第二调整方式调整为第三中间变量，并记录此时所述级联滤波器的第三功率值。
  14. 根据权利要求13所述的装置，其特征在于，所述处理模块，还用于根据所述第一功率值和所述第二功率值确定第二预设步长；
    将所述第二中间变量根据所述第二预设步长、所述第一坐标变换矩阵和所述第二调整方式调整为第四中间变量，并记录此时所述级联滤波器的第四功率值。
  15. 根据权利要求14所述的装置，其特征在于，所述处理模块，具体用于根据所述第一功率值和所述第二功率值计算功率变化率；
    若所述功率变化率大于预设阈值，则确定所述第二预设步长大于所述第一预设步长；
    若所述功率变化率小于所述预设阈值，则确定所述第二预设步长小于所述第一预设步长。
  16. 根据权利要求13所述的装置，其特征在于，所述处理模块，还用于根据所述第一功率值和所述第二功率值确定第二坐标变换矩阵；
    将所述第二中间变量根据所述第一预设步长、所述第二坐标变换矩阵和所述第二调整方式调整为第五中间变量，并记录此时所述级联滤波器的第五功率值。
  17. 根据权利要求16所述的装置，其特征在于，所述处理模块，具体用于根据所述第一功率值和所述第二功率值计算功率变化率；
    若所述功率变化率大于预设阈值，则确定所述第二坐标变换矩阵的矩阵条件数大于所 述第一坐标变换矩阵的矩阵条件数；
    若所述功率变化率小于所述预设阈值，则确定所述第二坐标变换矩阵的矩阵条件数小于所述第一坐标变换矩阵的矩阵条件数。
  18. 根据权利要求13至17中任一项所述的装置，其特征在于，所述处理模块，具体用于若所述第二功率值小于所述第一功率值，则确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相反；
    若所述第二功率值大于所述第一功率值，则确定所述第二中间变量的所述第二调整方式与所述第一调整方式的增减符号相同。
  19. 一种波长锁定装置，包括：多个处理器和存储器，其中，所述存储器中存有计算机可读程序，所述处理器通过运行所述存储器中的程序，以用于完成权利要求1至9中任一项所述的方法。
  20. 一种计算机可读存储介质，包括指令，当所述指令在计算机上运行时，所述计算机执行上述权利要求1至权利要求9所述的方法。
  21. 一种包含指令的计算机程序产品，当所述计算机程序产品在计算机上运行时，所述计算机执行上述权利要求1至权利要求9所述的方法。
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CN206531997U (zh) * 2017-03-16 2017-09-29 铜仁学院 微环谐振滤波器及光信号处理系统
CN108054632A (zh) * 2017-12-21 2018-05-18 浙江大学 具有功能复用的载流子耗尽型微环谐振器波长锁定方法

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