WO2020186821A1 - 一种外部存储器的协同访问方法及系统、协同访问架构 - Google Patents

一种外部存储器的协同访问方法及系统、协同访问架构 Download PDF

Info

Publication number
WO2020186821A1
WO2020186821A1 PCT/CN2019/122378 CN2019122378W WO2020186821A1 WO 2020186821 A1 WO2020186821 A1 WO 2020186821A1 CN 2019122378 W CN2019122378 W CN 2019122378W WO 2020186821 A1 WO2020186821 A1 WO 2020186821A1
Authority
WO
WIPO (PCT)
Prior art keywords
image
external memory
address
configuration information
compression
Prior art date
Application number
PCT/CN2019/122378
Other languages
English (en)
French (fr)
Inventor
李永亮
Original Assignee
芯原微电子(成都)有限公司
芯原微电子(上海)股份有限公司
芯原控股有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 芯原微电子(成都)有限公司, 芯原微电子(上海)股份有限公司, 芯原控股有限公司 filed Critical 芯原微电子(成都)有限公司
Priority to KR1020217031567A priority Critical patent/KR102642744B1/ko
Priority to US17/263,904 priority patent/US11693820B2/en
Priority to EP19920581.6A priority patent/EP3816925B1/en
Priority to JP2021556364A priority patent/JP2022525911A/ja
Publication of WO2020186821A1 publication Critical patent/WO2020186821A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/10File systems; File servers
    • G06F16/13File access structures, e.g. distributed indices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/60Memory management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/10File systems; File servers
    • G06F16/17Details of further file system functions
    • G06F16/174Redundancy elimination performed by the file system
    • G06F16/1744Redundancy elimination performed by the file system using compression, e.g. sparse files
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/10File systems; File servers
    • G06F16/18File system types
    • G06F16/182Distributed file systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00Image coding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/12Selection from among a plurality of transforms or standards, e.g. selection between discrete cosine transform [DCT] and sub-band transform or selection between H.263 and H.264
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146Data rate or code amount at the encoder output
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/423Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements

Definitions

  • the present invention relates to the technical field of external memory access, in particular to a method and system for collaborative access of external memory, and a collaborative access architecture.
  • the purpose of the present invention is to provide a method and system for collaborative access to external memory, and a collaborative access architecture. Based on the collaborative access architecture, image data is compressed and then stored in the external memory. The data is decompressed and then returned to the image processing device, thereby reducing the space requirement for external storage and improving the overall system performance.
  • the present invention provides a collaborative access architecture for external memory, including at least one configuration register, an image compression module, and an image decompression module; the configuration register and the image processing device read and write operations
  • the access address corresponds to one to one, and is used to store the image compression configuration information and image decompression configuration information corresponding to the access address;
  • the image compression module is connected to the image processing device, the configuration register and the external memory, and is used to store the image based on the image
  • the access address of the write operation of the processing device and the image compression configuration information compress the image data and store the obtained compressed data in the external memory;
  • the image decompression module, the image processing device, and the configuration register Connected to the external memory, and configured to decompress the compressed data based on the access address of the read operation of the image processing device and the image decompression configuration information and send the obtained decompressed data to the image processing device.
  • the image compression module includes a first address resolution controller, an image compression processor, and a first address converter;
  • the first address resolution controller is configured to obtain corresponding image compression configuration information from the configuration register according to the access address of the write operation;
  • the image compression processor is configured to compress the image data according to the image compression configuration information to obtain the compressed data
  • the first address converter is used to convert the access address into a mapped address, and write the compressed data to the mapped address of the external memory.
  • the image compression processor first uses a lossless compression algorithm for compression; when the compression rate is less than the target compression rate, then performs lossy compression.
  • the image decompression module includes a second address resolution controller, an image decompression processor, and a second address converter;
  • the second address resolution controller is configured to obtain corresponding image decompression configuration information from the configuration register according to the access address of the read operation;
  • the second address converter is used to convert the access address into a mapped address, and read the compressed data corresponding to the mapped address from the external memory;
  • the image decompression processor is configured to decompress the compressed data according to the image decompression configuration information, and send the obtained decompressed data to the image processing device.
  • the image decompression processor first determines whether the compressed data has undergone lossy compression, and then determines a decompression algorithm based on the determination result.
  • the image compression configuration information includes frame image data format, compression unit size, frame image storage space size, and target compression rate; the image decompression configuration information includes frame image data format, compression unit size, Frame image storage space size and target compression rate.
  • the present invention provides a collaborative access system for external storage, including the aforementioned collaborative access architecture for external storage, image processing equipment and external storage;
  • Both the image processing device and the external memory are connected to the collaborative access architecture of the external memory.
  • the present invention provides a collaborative access method for external memory, which includes the following steps:
  • the compressed data is decompressed and the obtained decompressed data is sent to the image processing device.
  • compressing image data and storing the obtained compressed data in an external memory includes the following steps:
  • the access address is converted into a mapped address, and the compressed data is written to the mapped address of the external memory.
  • decompressing the compressed data and sending the obtained decompressed data to the image processing device includes the following steps:
  • Decompress the compressed data according to the image decompression configuration information and send the obtained decompressed data to the image processing device.
  • the collaborative access method and system for external memory and the collaborative access architecture of the present invention have the following beneficial effects:
  • the image data is compressed based on the collaborative access architecture and then stored in the external memory, and the compressed data is decompressed and then returned to the image processing device, thereby reducing the space requirement for the external memory;
  • connection structure is simple, and it has strong applicability
  • FIG. 1 shows a schematic diagram of the structure of a system for collaborative access to an external memory of the present invention in an embodiment
  • FIG. 2 shows a flowchart of an embodiment of the method for collaborative access to an external memory of the present invention.
  • the collaborative access method and system of the external memory and the collaborative access architecture of the present invention compress image data based on the collaborative access architecture and then store it in the external memory, decompress the compressed data and then return it to the image processing device, thereby adopting the collaborative access architecture It reduces the space requirements and bandwidth requirements of external memory, improves the performance of the overall system, and is extremely practical.
  • the external memory collaborative access system of the present invention includes an external memory collaborative access architecture 2, an image processing device 1 and an external memory 3.
  • the image processing device 1 and the external memory 3 are both connected to the collaborative access architecture 2, and the collaborative access architecture 2 implements data reading and writing between the image processing device 1 and the external memory 3.
  • the external memory collaborative access architecture 2 includes at least one configuration register 21, an image compression module, and an image decompression module.
  • the configuration register 21 has a one-to-one correspondence with the access address of the read-write operation of the image processing device 1, and is used to store image compression configuration information and image decompression configuration information corresponding to the access address. Specifically, one access address corresponds to one configuration register.
  • the configuration register 21 stores image compression configuration information and image decompression configuration information of the image corresponding to the access address. When the image processing device 1 simultaneously performs read and write operations on multiple frames of images, corresponding to multiple access addresses, a corresponding number of configuration registers needs to be configured. Wherein, the configuration register 21 is pre-configured by the external processor of the system.
  • the image compression module is connected to the image processing device 1, the configuration register 21 and the external memory 3, and is used to compress image data based on the access address of the write operation of the image processing device 1 and the image compression configuration information And the obtained compressed data is stored in the external memory 3. Specifically, the image compression module compresses the image data that the graphics processing device 1 needs to write into the external memory 3 and then writes it into the external memory 3, thereby reducing the demand for space and bandwidth of the external memory 3 .
  • the image compression module includes a first address resolution controller 22, an image compression processor 23, and a first address converter 24.
  • the first address resolution controller 22 is connected to the image processing device 1 and the configuration register 21, and is configured to obtain corresponding image compression configuration information from the configuration register according to the access address of the write operation. Specifically, when the image processing unit 1 needs to perform a write operation to the external memory 3, the first address resolution controller 22 analyzes the access address of the write operation of the image processing unit 1, and resolves it according to the address As a result, the corresponding image compression configuration information is obtained in the configuration register 21.
  • the image compression configuration information includes frame image data format (such as ARGB, YUV, etc.), compression unit size, frame image storage space size and target compression rate.
  • the image compression processor 23 is connected to the first address resolution controller 22, and is configured to compress the image data according to the image compression configuration information to obtain the compressed data. Specifically, the image data that needs to be written by the image processing device 1 and the image compression configuration information are transmitted to the image compression processor 23 together, and the image compression processor 23 performs a check on the image compression configuration information according to the image compression configuration information. The image data is compressed to obtain the compressed data. Preferably, the image compression processor 23 compresses the image data in a multi-stage pipeline, and accumulates a corresponding amount of data according to the size of the configured compression unit. When enough data is obtained, pipeline compression is performed.
  • the image compression processor 23 first uses a lossless compression algorithm for compression; when the compression rate is less than the target compression rate, then performs lossy compression. Specifically, the image compression processor 23 preferentially uses a lossless compression algorithm for compression according to the data format of the image data. After the lossless compression is over, the compression ratio is calculated and compared with the target compression ratio. If the compression ratio reaches the target compression ratio, the compression operation is stopped; if the compression ratio does not reach the target compression ratio, the compressed data will continue to be processed. Loss compression, on the premise of preserving as much original data information as possible, the compression rate is increased to the target compression rate.
  • the first address converter 24 is connected to the image compression processor 23 and the external memory 3, and is used to convert the access address into a mapped address and write the compressed data into the external memory 3 At the mapped address. Specifically, after acquiring the compressed data, the first address converter 24 performs mapping conversion on the access address to obtain a mapped address, and writes the compressed data to the mapped address of the external memory 3. Wherein, the mapping address is equal to the offset address multiplied by the target compression rate plus the start address of the image frame.
  • the image decompression module is connected to the image processing device 3, the configuration register 21, and the external memory 3, and is used for storing the image processing device 1 based on the access address of the read operation of the image processing device 1 and the image decompression configuration information.
  • the compressed data is decompressed and the obtained decompressed data is sent to the image processing device 1.
  • the image decompression module decompresses the compressed data in the external memory 3 according to the read operation request of the image processing device 1 before reading, thereby reducing the space and bandwidth of the external memory 3 demand.
  • the image decompression module includes a second address resolution controller 25, an image decompression processor 27, and a second address converter 26.
  • the second address resolution controller 25 is connected to the image processing device 1 and the configuration register 21, and is configured to obtain corresponding image decompression configuration information from the configuration register 21 according to the access address of the read operation. Specifically, when the image processing unit 1 needs to perform a read operation on the external memory 3, the second address resolution controller 25 parses the access address of the read operation of the image processing unit 1, and resolves it according to the address As a result, the corresponding image decompression configuration information is obtained in the configuration register 21.
  • the image decompression configuration information includes frame image data format (such as ARGB, YUV, etc.), compression unit size, frame image storage space size and target compression rate.
  • the second address converter 26 is connected to the external memory 3 and the address resolution controller 25, and is used to convert the access address into a mapped address, and read the mapped address from the external memory 3 Corresponding compressed data. Specifically, the second address converter 26 stores the image decompression configuration information sent by the second address resolution controller 25 in its own register. At the same time, the second address converter 26 converts the access address into a mapped address according to the conversion mapping relationship between the access address and the mapped address, and requests the external memory 3 for the compressed data stored in the mapped address. Finally, the second address converter 26 transmits the acquired compressed data and image decompression configuration information to the image decompression processor 27 together.
  • the image decompression processor 27 is connected to the second address converter 26 and the image processing device 1, and is configured to decompress the compressed data according to the image decompression configuration information, and send the obtained decompressed data to The image processing device 1.
  • the image decompression processor 27 first determines whether the compressed data has undergone lossy compression, then determines the corresponding decompression algorithm based on the determination result, and then pipelines the compressed data based on the decompression algorithm Decompress and send the obtained decompressed data to the image processing device 1.
  • the method for collaborative access to external memory of the present invention is applied to the aforementioned system for collaborative access to external memory, which specifically includes the following steps:
  • Step S1 Pre-store image compression configuration information and image decompression configuration information corresponding to the access address of the read and write operations of the image processing device.
  • the external processor first configures image compression information and image decompression information in advance based on the access address of the read and write operations of the image processing device, and stores the obtained image compression configuration information and image decompression configuration information in the configuration register in advance.
  • a configuration register corresponds to an image access address.
  • Step S2 According to the access address of the write operation of the image processing device and the image compression configuration information, the image data is compressed and the obtained compressed data is stored in an external memory.
  • the image compression module obtains corresponding image compression configuration information based on the access address of the write operation of the image processing device, and compresses the image data that needs to be written into the external memory based on the image compression configuration information, and combines the obtained The compressed data is stored in external storage.
  • compressing image data and storing the obtained compressed data in an external memory includes the following steps:
  • the access address is analyzed based on the first address resolution controller, and the corresponding image compression configuration information is obtained in the configuration register according to the analysis result.
  • the image data is compressed according to the image compression configuration information to obtain the compressed data.
  • the image compression processor performs pipeline image compression according to the post-image compression configuration information to obtain compressed data.
  • the access address of the image processing device is converted to the mapped address of the external memory based on the first address converter, and then the compressed data is written into the mapped address of the external memory, thereby completing the compressed storage of the image data.
  • Step S3 Decompress the compressed data according to the access address of the read operation of the image processing device and the image decompression configuration information and send the obtained decompressed data to the image processing device.
  • the image decompression module obtains corresponding image decompression configuration information based on the access address of the read operation of the image processing device, and decompresses the compressed data written in the external memory based on the image decompression configuration information, and decompresses the obtained The data is sent to the image processing equipment.
  • decompressing the compressed data and sending the obtained decompressed data to the image processing device includes the following steps:
  • the access address is parsed based on the second address resolution controller, and the corresponding image decompression configuration information is obtained in the configuration register according to the analysis result.
  • the access address of the image processing device is converted into the mapped address of the external memory, the compressed data on the mapped address is read from the external memory, and the compressed data and image decompression configuration information are sent to the image decompression processor.
  • the collaborative access method and system for external memory and the collaborative access architecture of the present invention compress image data based on the collaborative access architecture and then store it in the external memory, decompress the compressed data and return it to the image processing device
  • the use of lower capacity external memory can meet high-performance system requirements, reducing the overall system cost, and avoiding the additional chip area caused by expanding the capacity of external memory; no need to change the original
  • the system structure, the connection structure is simple, and has strong applicability; while saving the system's demand for external memory capacity, it also reduces the system's demand for external memory bandwidth and further improves system performance. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial value.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Databases & Information Systems (AREA)
  • Data Mining & Analysis (AREA)
  • General Engineering & Computer Science (AREA)
  • Discrete Mathematics (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression Of Band Width Or Redundancy In Fax (AREA)
  • Storing Facsimile Image Data (AREA)
  • Image Processing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

本发明提供一种外部存储器的协同访问方法及系统、协同访问架构,包括预先存储图像处理设备的读写操作的访问地址对应的图像压缩配置信息和图像解压配置信息;根据图像处理设备的写操作的访问地址和所述图像压缩配置信息,将图像数据进行压缩并将得到的压缩数据存储至外部存储器;根据所述图像处理设备的读操作的访问地址和所述图像解压配置信息,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备。本发明的外部存储器的协同访问方法及系统、协同访问架构基于协同访问架构对图像数据进行压缩处理后再存储至外部存储器,对压缩数据进行解压后再返回至图像处理设备,从而降低对外部存储器的空间需求,提升了整体系统性能。

Description

一种外部存储器的协同访问方法及系统、协同访问架构 技术领域
本发明涉及外部存储器访问的技术领域,特别是涉及一种外部存储器的协同访问方法及系统、协同访问架构。
背景技术
随着芯片的集成度日益提高,芯片对外部存储器的需求也不断提高。外部存储器的容量与带宽已经成为影响系统性能的重要一环。因此,需要不断优化设计平衡各个部件对外部存储器的访问以提升整个系统的性能。同时,在高性能系统中,每个部件往往需要极大的数据吞吐量以满足自身的处理速度。故外部存储器的容量与带宽已经成为了限制系统性能的瓶颈之一。
随着人工智能算法与机器视觉的发展,现有技术中的移动设备有大量的传感器协同工作,并且需要强大的图像计算性能。这对芯片的外部存储器需求带来了很大的考验。由于在图像处理的过程中需要大量的数据吞吐,故如何利用有限的外部存储器完成复杂运算以及得到更高的图像处理速度已经成为图像计算芯片领域的一个难点与重要课题。
发明内容
鉴于以上所述现有技术的缺点,本发明的目的在于提供一种外部存储器的协同访问方法及系统、协同访问架构,基于协同访问架构对图像数据进行压缩处理后再存储至外部存储器,对压缩数据进行解压后再返回至图像处理设备,从而降低对外部存储器的空间需求,提升了整体系统性能。
为实现上述目的及其他相关目的,本发明提供一种外部存储器的协同访问架构,包括至少一个配置寄存器、图像压缩模块和图像解压模块;所述配置寄存器与所述图像处理设备的读写操作的访问地址一一对应,用于存储所述访问地址对应的图像压缩配置信息和图像解压配置信息;所述图像压缩模块与图像处理设备、所述配置寄存器和外部存储器相连,用于基于所述图像处理设备的写操作的访问地址和所述图像压缩配置信息,将图像数据进行压缩并将得到的压缩数据存储至所述外部存储器;所述图像解压模块与所述图像处理设备、所述配置寄存器和所述外部存储器相连,用于基于所述图像处理设备的读操作的访问地址和所述图像解压配置信息,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备。
于本发明一实施例中,所述图像压缩模块包括第一地址解析控制器、图像压缩处理器和 第一地址转换器;
所述第一地址解析控制器用于根据所述写操作的访问地址从所述配置寄存器中获取对应的图像压缩配置信息;
所述图像压缩处理器用于根据所述图像压缩配置信息对所述图像数据进行压缩,得到所述压缩数据;
所述第一地址转换器用于将所述访问地址转换为映射地址,并将所述压缩数据写入所述外部存储器的所述映射地址处。
于本发明一实施例中,所述图像压缩处理器首先采用无损压缩算法进行压缩;当压缩率小于目标压缩率时,再进行有损压缩。
于本发明一实施例中,所述图像解压模块包括第二地址解析控制器、图像解压处理器和第二地址转换器;
所述第二地址解析控制器用于根据所述读操作的访问地址从所述配置寄存器中获取对应的图像解压配置信息;
所述第二地址转换器用于将所述访问地址转换为映射地址,并从所述外部存储器中读取所述映射地址对应的压缩数据;
所述图像解压处理器用于根据所述图像解压配置信息对所述压缩数据进行解压,并将得到的解压数据发送至所述图像处理设备。
于本发明一实施例中,所述图像解压处理器首先判断所述压缩数据是否经过有损压缩,再基于判断结果确定解压算法。
于本发明一实施例中,所述图像压缩配置信息包括帧图像数据格式、压缩单元大小、帧图像存储空间大小和目标压缩率;所述图像解压配置信息包括帧图像数据格式、压缩单元大小、帧图像存储空间大小和目标压缩率。
本发明提供一种外部存储器的协同访问系统,包括上述的外部存储器的协同访问架构、图像处理设备和外部存储器;
所述图像处理设备和所述外部存储器均与所述外部存储器的协同访问架构相连。
本发明提供一种外部存储器的协同访问方法,包括以下步骤:
预先存储图像处理设备的读写操作的访问地址对应的图像压缩配置信息和图像解压配置信息;
根据图像处理设备的写操作的访问地址和所述图像压缩配置信息,将图像数据进行压缩并将得到的压缩数据存储至外部存储器;
根据所述图像处理设备的读操作的访问地址和所述图像解压配置信息,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备。
于本发明一实施例中,将图像数据进行压缩并将得到的压缩数据存储至外部存储器包括以下步骤:
根据所述写操作的访问地址获取对应的图像压缩配置信息;
根据所述图像压缩配置信息对所述图像数据进行压缩,得到所述压缩数据;
将所述访问地址转换为映射地址,并将所述压缩数据写入所述外部存储器的所述映射地址处。
于本发明一实施例中,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备包括以下步骤:
根据所述读操作的访问地址获取对应的图像解压配置信息;
将所述访问地址转换为映射地址,并从所述外部存储器中读取所述映射地址对应的压缩数据;
根据所述图像解压配置信息对所述压缩数据进行解压,并将得到的解压数据发送至所述图像处理设备。
如上所述,本发明的外部存储器的协同访问方法及系统、协同访问架构,具有以下有益效果:
(1)基于协同访问架构对图像数据进行压缩处理后再存储至外部存储器,对压缩数据进行解压后再返回至图像处理设备,从而降低对外部存储器的空间需求;
(2)采用较低容量的外部存储器即可满足高性能系统要求,降低了整个系统成本,避免了扩展外部存储器的容量而带来的额外芯片面积;
(3)无需改变原有的系统结构,连接结构简单,具有很强的适用性;
(4)在节省了系统对外部存储器容量需求的同时,降低了系统对外部存储器带宽的需求,进一步提升系统性能。
附图说明
图1显示为本发明的外部存储器的协同访问系统于一实施例中的结构示意图;
图2显示为本发明的外部存储器的协同访问方法于一实施例中的流程图。
元件标号说明
1                      图像处理设备
2                      外部存储器的协同访问架构
21                     配置寄存器
22                     第一地址解析控制器
23                     图像压缩处理器
24                     第一地址转换器
25                     第二地址解析控制器
26                     第二地址转换器
27                     图像解压处理器
3                      外部存储器
具体实施方式
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。
需要说明的是,本实施例中所提供的图示仅以示意方式说明本发明的基本构想,遂图式中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制,其实际实施时各组件的型态、数量及比例可为一种随意的改变,且其组件布局型态也可能更为复杂。
本发明的外部存储器的协同访问方法及系统、协同访问架构基于协同访问架构对图像数据进行压缩处理后再存储至外部存储器,对压缩数据进行解压后再返回至图像处理设备,从而通过协同访问架构降低对外部存储器的空间需求和带宽需求,提升了整体系统的性能,极具实用性。
如图1所示,于一实施例中,本发明的外部存储器的协同访问系统包括外部存储器的协同访问架构2、图像处理设备1和外部存储器3。所述图像处理设备1和所述外部存储器3均与所述协同访问架构2相连,由所述协同访问架构2实现所述图像处理设备1和所述外部存储器3之间的数据读写。
具体地,所述外部存储器的协同访问架构2包括至少一个配置寄存器21、图像压缩模块和图像解压模块。
所述配置寄存器21与所述图像处理设备1的读写操作的访问地址一一对应,用于存储所 述访问地址对应的图像压缩配置信息和图像解压配置信息。具体地,一个访问地址对应一个配置寄存器。所述配置寄存器21中存储有所述访问地址相对应的图像的图像压缩配置信息和图像解压配置信息。当所述图像处理设备1同时对多帧图像进行读写操作时,对应多个访问地址,则需配置相应数量的配置寄存器。其中,所述配置寄存器21是由系统的外部处理器进行预先配置的。
所述图像压缩模块与图像处理设备1、所述配置寄存器21和外部存储器3相连,用于基于所述图像处理设备1的写操作的访问地址和所述图像压缩配置信息,将图像数据进行压缩并将得到的压缩数据存储至所述外部存储器3。具体地,所述图像压缩模块将所述图形处理设备1需写入所述外部存储器3的图像数据压缩后写入所述外部存储器3,从而降低对所述外部存储器3的空间和带宽的需求。
于本发明一实施例中,所述图像压缩模块包括第一地址解析控制器22、图像压缩处理器23和第一地址转换器24。
所述第一地址解析控制器22与所述图像处理设备1和所述配置寄存器21相连,用于根据所述写操作的访问地址从所述配置寄存器中获取对应的图像压缩配置信息。具体地,当所述图像处理单元1需要对所述外部存储器3进行写操作时,所述第一地址解析控制器22对所述图像处理单元1的写操作的访问地址进行解析,根据地址解析结果在所述配置寄存器21中获取对应的图像压缩配置信息。优选地,所述图像压缩配置信息包括帧图像数据格式(如ARGB、YUV等)、压缩单元大小、帧图像存储空间大小和目标压缩率。
所述图像压缩处理器23与所述第一地址解析控制器22相连,用于根据所述图像压缩配置信息对所述图像数据进行压缩,得到所述压缩数据。具体地,所述图像处理设备1需要写入的图像数据和所述图像压缩配置信息一并传输至所述图像压缩处理器23,所述图像压缩处理器23根据所述图像压缩配置信息对所述图像数据进行压缩,从而得到所述压缩数据。优选地,所述图像压缩处理器23以多级流水线对所述图像数据进行压缩,并根据配置的压缩单元大小,积攒相应的数据量。当获取到足够的数据后,进行流水线压缩。于本发明一实施例中,所述图像压缩处理器23首先采用无损压缩算法进行压缩;当压缩率小于目标压缩率时,再进行有损压缩。具体地,所述图像压缩处理器23根据所述图像数据的数据格式,优先采用无损压缩算法进行压缩。无损压缩结束后,计算压缩率并与目标压缩率进行比较,若压缩率达到目标压缩率,则停止压缩操作;若压缩率达不到所述目标压缩率,则将压缩后的数据继续进行有损压缩,在尽可能保留更多原始数据信息的前提下,将压缩率提高至目标压缩率。
所述第一地址转换器24与所述图像压缩处理器23和所述外部存储器3相连,用于将所 述访问地址转换为映射地址,并将所述压缩数据写入所述外部存储器3的所述映射地址处。具体地,所述第一地址转换器24在获取所述压缩数据后,将所述访问地址进行映射转换以得到映射地址,并将所述压缩数据写入所述外部存储器3的映射地址处。其中,所述映射地址等于偏移地址乘以目标压缩率加上图像帧起始地址。
图像解压模块与所述图像处理设备3、所述配置寄存器21和所述外部存储器3相连,用于基于所述图像处理设备1的读操作的访问地址和所述图像解压配置信息,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备1。具体地,所述图像解压模块根据所述图像处理设备1的读操作请求,将所述外部存储器3中的压缩数据解压后再进行读取,从而降低对所述外部存储器3的空间和带宽的需求。
于本发明一实施例中,所述图像解压模块包括第二地址解析控制器25、图像解压处理器27和第二地址转换器26。
所述第二地址解析控制器25与所述图像处理设备1和所述配置寄存器21相连,用于根据所述读操作的访问地址从所述配置寄存器21中获取对应的图像解压配置信息。具体地,当所述图像处理单元1需要对所述外部存储器3进行读操作时,所述第二地址解析控制器25对所述图像处理单元1的读操作的访问地址进行解析,根据地址解析结果在所述配置寄存器21中获取对应的图像解压配置信息。优选地,所述图像解压配置信息包括帧图像数据格式(如ARGB、YUV等)、压缩单元大小、帧图像存储空间大小和目标压缩率。
所述第二地址转换器26与所述外部存储器3和所述地址解析控制器25相连,用于将所述访问地址转换为映射地址,并从所述外部存储器3中读取所述映射地址对应的压缩数据。具体地,所述第二地址转换器26将所述第二地址解析控制器25传送来的图像解压配置信息存储在自身的寄存器中。同时,所述第二地址转换器26根据访问地址和映射地址之间的转换映射关系,将所述访问地址转换为映射地址,并向所述外部存储器3请求所述映射地址存储的压缩数据。最后,所述第二地址转换器26将获取的压缩数据和图像解压配置信息一并传送至所述图像解压处理器27。
所述图像解压处理器27与所述第二地址转换器26和所述图像处理设备1相连,用于根据所述图像解压配置信息对所述压缩数据进行解压,并将得到的解压数据发送至所述图像处理设备1。于本发明一实施例中,所述图像解压处理器27首先判断所述压缩数据是否经过有损压缩,再基于判断结果确定对应的解压算法,然后基于所述解压算法对所述压缩数据进行流水线解压,并将获得的解压数据发送至所述图像处理设备1。
如图2所示,于一实施例中,本发明的外部存储器的协同访问方法应用于上述外部存储 器的协同访问系统中,具体包括以下步骤:
步骤S1、预先存储图像处理设备的读写操作的访问地址对应的图像压缩配置信息和图像解压配置信息。
具体地,外部处理器首先基于图像处理设备的读写操作的访问地址预先配置图像压缩信息和图像解压信息,并将得到的图像压缩配置信息和图像解压配置信息预先存储至配置寄存器中。需要说明的是,一个配置寄存器对应一个图像的访问地址。
步骤S2、根据图像处理设备的写操作的访问地址和所述图像压缩配置信息,将图像数据进行压缩并将得到的压缩数据存储至外部存储器。
具体地,图像压缩模块基于图像处理设备的写操作的访问地址获取对应的图像压缩配置信息,并基于所述图像压缩配置信息对需要写入所述外部存储器的图像数据进行压缩,并将得到的压缩数据存储至外部存储器。
于本发明一实施例中,将图像数据进行压缩并将得到的压缩数据存储至外部存储器包括以下步骤:
21)根据所述写操作的访问地址获取对应的图像压缩配置信息。
具体地,基于第一地址解析控制器对访问地址进行解析,根据解析结果在配置寄存器中获取对应的图像压缩配置信息。
22)根据所述图像压缩配置信息对所述图像数据进行压缩,得到所述压缩数据。
具体地,基于图像压缩处理器根据所述图像压缩配置后信息进行流水线图像压缩,获取压缩数据。
23)将所述访问地址转换为映射地址,并将所述压缩数据写入所述外部存储器的所述映射地址处。
具体地,基于第一地址转换器将图像处理设备的访问地址转换为外部存储器的映射地址,然后将压缩数据写入外部存储器的映射地址,从而完成图像数据的压缩存储。
步骤S3、根据所述图像处理设备的读操作的访问地址和所述图像解压配置信息,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备。
具体地,图像解压模块基于图像处理设备的读操作的访问地址获取对应的图像解压配置信息,并基于所述图像解压配置信息对写入所述外部存储器的压缩数据进行解压,并将得到的解压数据发送至图像处理设备。
于本发明一实施例中,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备包括以下步骤:
31)根据所述读操作的访问地址获取对应的图像解压配置信息。
具体地,基于第二地址解析控制器对访问地址进行解析,根据解析结果在配置寄存器中获取对应的图像解压配置信息。
32)将所述访问地址转换为映射地址,并从所述外部存储器中读取所述映射地址对应的压缩数据。
具体地,基于第二地址转换器将图像处理设备的访问地址转换为外部存储器的映射地址,从外部存储器中读取映射地址上的压缩数据,并将压缩数据和图像解压配置信息发送至图像解压处理器。
33)根据所述图像解压配置信息对所述压缩数据进行解压,并将得到的解压数据发送至所述图像处理设备。
综上所述,本发明的外部存储器的协同访问方法及系统、协同访问架构基于协同访问架构对图像数据进行压缩处理后再存储至外部存储器,对压缩数据进行解压后再返回至图像处理设备,从而降低对外部存储器的空间需求;采用较低容量的外部存储器即可满足高性能系统要求,降低了整个系统成本,避免了扩展外部存储器的容量而带来的额外芯片面积;无需改变原有的系统结构,连接结构简单,具有很强的适用性;在节省了系统对外部存储器容量需求的同时,降低了系统对外部存储器带宽的需求,进一步提升系统性能。所以,本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。因此,举凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。

Claims (10)

  1. 一种外部存储器的协同访问架构,其特征在于:包括至少一个配置寄存器、图像压缩模块和图像解压模块;
    所述配置寄存器与所述图像处理设备的读写操作的访问地址一一对应,用于存储所述访问地址对应的图像压缩配置信息和图像解压配置信息;
    所述图像压缩模块与图像处理设备、所述配置寄存器和外部存储器相连,用于基于所述图像处理设备的写操作的访问地址和所述图像压缩配置信息,将图像数据进行压缩并将得到的压缩数据存储至所述外部存储器;
    所述图像解压模块与所述图像处理设备、所述配置寄存器和所述外部存储器相连,用于基于所述图像处理设备的读操作的访问地址和所述图像解压配置信息,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备。
  2. 根据权利要求1所述的外部存储器的协同访问架构,其特征在于:所述图像压缩模块包括第一地址解析控制器、图像压缩处理器和第一地址转换器;
    所述第一地址解析控制器用于根据所述写操作的访问地址从所述配置寄存器中获取对应的图像压缩配置信息;
    所述图像压缩处理器用于根据所述图像压缩配置信息对所述图像数据进行压缩,得到所述压缩数据;
    所述第一地址转换器用于将所述访问地址转换为映射地址,并将所述压缩数据写入所述外部存储器的所述映射地址处。
  3. 根据权利要求2所述的外部存储器的协同访问架构,其特征在于:所述图像压缩处理器首先采用无损压缩算法进行压缩;当压缩率小于目标压缩率时,再进行有损压缩。
  4. 根据权利要求1所述的外部存储器的协同访问架构,其特征在于:所述图像解压模块包括第二地址解析控制器、图像解压处理器和第二地址转换器;
    所述第二地址解析控制器用于根据所述读操作的访问地址从所述配置寄存器中获取对应的图像解压配置信息;
    所述第二地址转换器用于将所述访问地址转换为映射地址,并从所述外部存储器中读取所述映射地址对应的压缩数据;
    所述图像解压处理器用于根据所述图像解压配置信息对所述压缩数据进行解压,并将得到的解压数据发送至所述图像处理设备。
  5. 根据权利要求4所述的外部存储器的协同访问架构,其特征在于:所述图像解压处理器首先判断所述压缩数据是否经过有损压缩,再基于判断结果确定解压算法。
  6. 根据权利要求1所述的外部存储器的协同访问架构,其特征在于:所述图像压缩配置信息包括帧图像数据格式、压缩单元大小、帧图像存储空间大小和目标压缩率;所述图像解压配置信息包括帧图像数据格式、压缩单元大小、帧图像存储空间大小和目标压缩率。
  7. 一种外部存储器的协同访问系统,其特征在于:包括权利要求1-6之一所述的外部存储器的协同访问架构、图像处理设备和外部存储器;
    所述图像处理设备和所述外部存储器均与所述外部存储器的协同访问架构相连。
  8. 一种外部存储器的协同访问方法,其特征在于:包括以下步骤:
    预先存储图像处理设备的读写操作的访问地址对应的图像压缩配置信息和图像解压配置信息;
    根据图像处理设备的写操作的访问地址和所述图像压缩配置信息,将图像数据进行压缩并将得到的压缩数据存储至外部存储器;
    根据所述图像处理设备的读操作的访问地址和所述图像解压配置信息,将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备。
  9. 根据权利要求8所述的外部存储器的协同访问方法,其特征在于:将图像数据进行压缩并将得到的压缩数据存储至外部存储器包括以下步骤:
    根据所述写操作的访问地址获取对应的图像压缩配置信息;
    根据所述图像压缩配置信息对所述图像数据进行压缩,得到所述压缩数据;
    将所述访问地址转换为映射地址,并将所述压缩数据写入所述外部存储器的所述映射地址处。
  10. 根据权利要求8所述的外部存储器的协同访问方法,其特征在于:将所述压缩数据进行解压并将得到的解压数据发送至所述图像处理设备包括以下步骤:
    根据所述读操作的访问地址获取对应的图像解压配置信息;
    将所述访问地址转换为映射地址,并从所述外部存储器中读取所述映射地址对应的压 缩数据;
    根据所述图像解压配置信息对所述压缩数据进行解压,并将得到的解压数据发送至所述图像处理设备。
PCT/CN2019/122378 2019-03-18 2019-12-02 一种外部存储器的协同访问方法及系统、协同访问架构 WO2020186821A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020217031567A KR102642744B1 (ko) 2019-03-18 2019-12-02 외부 메모리의 협력 액세스 방법 및 시스템, 협력 액세스 아키텍처
US17/263,904 US11693820B2 (en) 2019-03-18 2019-12-02 Cooperative access method, system, and architecture of external storage
EP19920581.6A EP3816925B1 (en) 2019-03-18 2019-12-02 Cooperative access method, system, and architecture of external storage
JP2021556364A JP2022525911A (ja) 2019-03-18 2019-12-02 外部メモリの協調アクセス方法及びシステム、協調アクセスアーキテクチャ

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910201186.X 2019-03-18
CN201910201186.XA CN111724295B (zh) 2019-03-18 2019-03-18 一种外部存储器的协同访问方法及系统、协同访问架构

Publications (1)

Publication Number Publication Date
WO2020186821A1 true WO2020186821A1 (zh) 2020-09-24

Family

ID=72518990

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/122378 WO2020186821A1 (zh) 2019-03-18 2019-12-02 一种外部存储器的协同访问方法及系统、协同访问架构

Country Status (6)

Country Link
US (1) US11693820B2 (zh)
EP (1) EP3816925B1 (zh)
JP (1) JP2022525911A (zh)
KR (1) KR102642744B1 (zh)
CN (1) CN111724295B (zh)
WO (1) WO2020186821A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022217517A1 (zh) * 2021-04-14 2022-10-20 华为技术有限公司 一种存储控制装置和在存储控制装置中执行的方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110055441A1 (en) * 2009-08-26 2011-03-03 Kabushiki Kaisha Toshiba Data compression and decompression apparatus and data compression and decompression method
CN102929783A (zh) * 2012-10-25 2013-02-13 华为技术有限公司 一种数据存储的方法、装置和系统
CN105530402A (zh) * 2014-10-16 2016-04-27 佳能株式会社 与图像压缩有关的信息处理设备和方法及图像形成系统

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004166128A (ja) * 2002-11-15 2004-06-10 Pioneer Electronic Corp 画像情報の符号化方法、符号化装置及び符号化プログラム
US8249358B2 (en) * 2006-10-19 2012-08-21 Nec Corporation Image quality evaluation method, image quality evaluation system and image quality evaluation program
JP5074820B2 (ja) * 2007-05-22 2012-11-14 ルネサスエレクトロニクス株式会社 画像処理装置および画像処理方法
JP2009118226A (ja) * 2007-11-07 2009-05-28 Panasonic Corp メモリ制御装置および制御方法
JP5196239B2 (ja) * 2008-03-05 2013-05-15 日本電気株式会社 情報処理装置及び方法
WO2012160626A1 (ja) * 2011-05-20 2012-11-29 富士通株式会社 画像圧縮装置、画像復元装置、及びプログラム
JP5706759B2 (ja) * 2011-06-01 2015-04-22 ルネサスエレクトロニクス株式会社 画像符号化装置及び画像符号化方法
US9460525B2 (en) * 2013-04-03 2016-10-04 Vivante Corporation Tile-based compression and decompression for graphic applications
TWI609263B (zh) * 2013-08-16 2017-12-21 司固科技公司 可變大小快閃轉變層
CN103946828B (zh) * 2013-10-29 2017-02-22 华为技术有限公司 数据处理系统和数据处理的方法
JP6672020B2 (ja) * 2016-03-04 2020-03-25 キヤノン株式会社 画像形成装置及び画像形成装置の制御方法
CN109451317A (zh) * 2018-12-27 2019-03-08 郑州云海信息技术有限公司 一种基于fpga的图像压缩系统及方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110055441A1 (en) * 2009-08-26 2011-03-03 Kabushiki Kaisha Toshiba Data compression and decompression apparatus and data compression and decompression method
CN102929783A (zh) * 2012-10-25 2013-02-13 华为技术有限公司 一种数据存储的方法、装置和系统
CN105530402A (zh) * 2014-10-16 2016-04-27 佳能株式会社 与图像压缩有关的信息处理设备和方法及图像形成系统

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3816925A4 *

Also Published As

Publication number Publication date
US11693820B2 (en) 2023-07-04
EP3816925A4 (en) 2022-05-04
JP2022525911A (ja) 2022-05-20
KR102642744B1 (ko) 2024-03-05
CN111724295B (zh) 2024-05-14
US20220004522A1 (en) 2022-01-06
KR20210134947A (ko) 2021-11-11
EP3816925B1 (en) 2024-05-29
EP3816925A1 (en) 2021-05-05
CN111724295A (zh) 2020-09-29

Similar Documents

Publication Publication Date Title
US8866646B2 (en) Memory compression technique with low latency per pixel
US8989509B2 (en) Streaming wavelet transform
US8295361B2 (en) Video compression circuit and method thereof
WO2022161227A1 (zh) 图像处理方法、装置、图像处理芯片和电子设备
US20140086309A1 (en) Method and device for encoding and decoding an image
JP5196239B2 (ja) 情報処理装置及び方法
CN112235579B (zh) 视频处理方法、计算机可读存储介质及电子设备
WO2023197507A1 (zh) 视频数据处理方法、系统、装置及计算机可读存储介质
TWI564837B (zh) 圖形資料壓縮裝置與圖形資料壓縮方法
WO2020186821A1 (zh) 一种外部存储器的协同访问方法及系统、协同访问架构
US20120147023A1 (en) Caching apparatus and method for video motion estimation and compensation
US20220109738A1 (en) Transmission control circuit, data transmission system using different data formats, and operating method thereof
CN114286035A (zh) 图像采集卡、图像采集方法及图像采集系统
US10249269B2 (en) System on chip devices and operating methods thereof
CN110889880A (zh) 一种贴图处理方法、装置、设备及存储介质
CN115243047A (zh) 一种视频压缩方法、装置、设备及介质
US20060176959A1 (en) Method and system for encoding variable length code (VLC) in a microprocessor
US20240104032A1 (en) Address conversion system and address conversion method
CN112214174A (zh) 一种面向移动设备的基于闪存的高速缓存解压系统及方法
CN117666935A (zh) 数据处理装置、方法、人工智能处理器、芯片和电子设备
EP4352624A1 (en) Low-latency bridge to support out-of-order execution
CN111932433A (zh) 一种高效处理jpeg图片和显示的装置和方法
JPH09182072A (ja) 画像圧縮装置
EP2777015A1 (en) Memory controller for video analytics and encoding
CN117891755A (zh) 地址转换系统及地址转换方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19920581

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2019920581

Country of ref document: EP

Effective date: 20210201

ENP Entry into the national phase

Ref document number: 2021556364

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 20217031567

Country of ref document: KR

Kind code of ref document: A