WO2020177145A1

WO2020177145A1 - Display panel and manufacturing method therefor, and etching system

Info

Publication number: WO2020177145A1
Application number: PCT/CN2019/077965
Authority: WO
Inventors: 袁文豪
Original assignee: 深圳市华星光电半导体显示技术有限公司
Priority date: 2019-03-01
Filing date: 2019-03-13
Publication date: 2020-09-10
Also published as: CN109830461A

Abstract

The present application proposes a display panel and a manufacturing method therefor, and an etching system. In the present application, after patterned source drain metal layers are obtained, oxide impurities in the source drain metal layers are removed by using a gas having strong reducibility, improving the yield and the quality of products.

Description

Display panel and its manufacturing method and etching system

Technical field

This application relates to the display field, and in particular to a display panel, a manufacturing method thereof, and an etching system.

Background technique

LCD (Liquid Crystal Display, liquid crystal display) is currently the most widely used display product on the market. Its production process technology is very mature, product yield is high, production cost is relatively low, and market acceptance is high.

In the existing LCD manufacturing process, an active drain metal layer is provided on the active layer. Due to the dry etching process and the wet etching process, the copper metal in the source and drain metal layer has an oxidation reaction with strong oxidizing ions, and corrosion of the copper metal occurs, thereby generating compounds, which reduces the yield of the product.

Therefore, there is an urgent need for a display panel and a manufacturing method thereof to solve the above-mentioned problems.

technical problem

The present application provides a display panel, a manufacturing method thereof, and an etching system, so as to solve the problem that the copper metal in the source and drain metal layers of the existing display panel is easily corroded, resulting in a decrease in product yield.

Technical solutions

This application provides a method for manufacturing a display panel, which includes the steps:

S10. Providing a substrate, on which an amorphous silicon layer, a first metal layer and a photoresist layer are sequentially formed on the substrate;

S20, using a first photomask process to form a first photoresist pattern layer on the photoresist layer;

S30, using a first etching process to form a first metal pattern layer on the first metal layer;

S40. Perform ashing treatment on the first photoresist pattern layer to form a second photoresist pattern layer;

S50, using a second etching process to form an amorphous silicon pattern layer on the amorphous silicon layer;

S60, using a third etching process to form a source metal and a drain metal on the first metal pattern layer, and peel off the second photoresist pattern layer;

S70, performing chemical treatment on the oxide in the source metal and the drain metal.

In the manufacturing method of the present application, the first etching process and the third etching process are wet etching processes, and the second etching process is a dry etching process.

In the manufacturing method of the present application, the preparation material of the first metal layer includes copper.

In the production method of the present application, the step S70 includes:

In an ionic environment, a reducing gas is used to reduce the oxides in the source metal and the drain metal.

In the production method of the present application, the gas includes at least one of hydrogen and fluorine-containing gas.

In the production method of the present application, the flow rate of the hydrogen is 80 standard milliliters per minute to 120 standard milliliters per minute.

In the production method of this application, S80 is also included:

Using a fourth etching process, a channel region is formed in the amorphous silicon pattern layer to form an active layer.

In the manufacturing method of the present application, the fourth etching process is a dry etching process.

In the manufacturing method of the present application, the active layer includes source doped regions, drain doped regions at both ends, and a channel region in the middle;

Wherein, the source doped region is disposed opposite to the source metal, and the drain doped region is disposed opposite to the drain metal.

In the manufacturing method of the present application, before forming an amorphous silicon layer on the substrate, the method further includes:

Forming a gate on the substrate;

A gate insulating layer is formed on the gate.

This application also proposes a display panel, wherein the display panel is prepared by the following manufacturing method, and the manufacturing method includes:

In the display panel of the present application, the first etching process and the third etching process are wet etching processes, and the second etching process is a dry etching process.

In the display panel of the present application, the step S70 includes:

In the display panel of the present application, the gas includes at least one of hydrogen gas and fluorine-containing gas.

In the display panel of the present application, the flow rate of the hydrogen is 80 standard milliliters per minute to 120 standard milliliters per minute.

The display panel of this application also includes S80:

In the display panel of the present application, the active layer includes source doped regions, drain doped regions at both ends, and a channel region in the middle;

In the display panel of the present application, before forming an amorphous silicon layer on the substrate, the method further includes:

Forming a gate on the substrate;

A gate insulating layer is formed on the gate.

This application also proposes an etching system, which includes:

Dry etching mechanism for patterning the non-metal film layer;

Wet etching mechanism for patterning the metal film layer;

as well as

The chemical reaction mechanism is used to remove oxide impurities in the metal film layer.

In the etching system of the present application, the chemical reaction mechanism removes oxide impurities in the metal film layer by using a reducing gas.

Beneficial effect

In this application, after the patterned source and drain metal layers are obtained, the oxide impurities in the source and drain metal layers are removed by using a gas with strong reducing properties, thereby improving the yield and quality of the products.

Description of the drawings

In order to explain the embodiments or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are merely inventions For some embodiments, those of ordinary skill in the art can obtain other drawings based on these drawings without creative work.

FIG. 1 is a step diagram of a manufacturing method of a display panel of this application;

2A to 2H are process diagrams of the manufacturing method of the display panel of this application.

Embodiments of the invention

The description of the following embodiments refers to the attached drawings to illustrate specific embodiments that can be implemented in this application. The directional terms mentioned in this application, such as [Up], [Down], [Front], [Back], [Left], [Right], [Inner], [Outer], [Side], etc., are for reference only The direction of the additional schema. Therefore, the directional terms used are used to illustrate and understand the application, rather than to limit the application. In the figure, units with similar structures are indicated by the same reference numerals.

Please refer to FIG. 1. FIG. 1 is a step diagram of a method for manufacturing a display panel of this application.

According to an aspect of the present application, there is provided a manufacturing method of a display panel, including:

2A, S10, a substrate 101 is provided, and an amorphous silicon layer 104, a first metal layer 105 and a photoresist layer 106 are sequentially formed on the substrate 101;

Step S10 specifically includes:

S101. Provide a substrate 101;

In an embodiment, the raw material of the substrate 101 may be one of a glass substrate, a quartz substrate, and a resin substrate.

In an embodiment, the substrate 101 may also be a flexible substrate. The material of the flexible substrate may be PI (polyimide).

S102, forming a gate 102 on the substrate 101;

The metal material of the gate 102 may be one of molybdenum, aluminum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper, or a combination of the foregoing metal materials.

In an embodiment, the metal material of the gate 102 may be molybdenum.

In this step, by using a photomask process on a metal layer forming the gate 102, after a patterning process of exposure, development, and etching through a mask (not shown), the metal layer is formed as shown in FIG. 2A And peel off the photoresist layer 106.

S103, forming a gate insulating layer 103 on the gate 102;

The gate insulating layer 103 is formed on the gate 102. The gate insulating layer 103 is used to isolate the gate 102 from the active layer on the gate 102.

In an embodiment, the material of the gate insulating layer 103 is usually silicon nitride, and silicon oxide, silicon oxynitride, etc. may also be used.

S104, forming an amorphous silicon layer 104 on the gate insulating layer 103;

In this step, the amorphous silicon layer 104 is provided as a whole layer. The amorphous silicon layer 104 is used to prepare the active layer in the display panel.

S105, forming a first metal layer 105 on the amorphous silicon layer 104;

In an embodiment, the preparation material of the first metal layer 105 includes copper, and the first metal layer 105 is used to prepare the source metal 111 and the drain metal 112 in the display panel.

S106, forming a photoresist layer 106 on the first metal layer 105 to achieve patterning of the first metal layer 105.

Please refer to FIG. 2B, S20, using a first photomask process to form a first photoresist pattern layer 107 on the photoresist layer 106;

In an embodiment, the S20 specifically includes: exposing, developing, and etching the photoresist layer 106 to form the patterned first photoresist pattern layer 107.

In an embodiment, the photomask used in the first photomask process is a halftone photomask.

In this step, the photoresist layer 106 is exposed through a mask (not shown) and developed to form the first photoresist pattern layer 107 with a predetermined pattern. The thickness of the photoresist region corresponding to the channel region 115 is thinner than the photoresist thickness of other regions.

Please refer to FIG. 2C and S30. A first etching process is used to form a first metal pattern layer 108 on the first metal layer 105.

In one embodiment, the first etching process is a wet etching process, that is, an etching solution that has an etching effect on metal materials is used to remove the metal parts that are not shielded by the first photoresist pattern layer 107 to obtain the first photoresist pattern layer 107. A metal pattern layer 108.

In this step, the etching solution used in the wet etching process contains strong oxidizing ions such as chloride ions and sulfide ions, which will cause the copper in the first metal layer 105 to be oxidized to produce metal oxide impurities. This application is used in subsequent processes This part of the metal oxide will be removed to improve the yield of the product.

Please refer to FIG. 2D, S40, ashing is performed on the first photoresist pattern layer 107 to form a second photoresist pattern layer 109.

In this step, the photoresist region corresponding to the channel region 115 is removed, and the photoresist part above the source metal 111 and the drain metal 112 is retained, so that the next etching of the first metal pattern layer 108 eclipse.

Please refer to FIG. 2E, S50. A second etching process is used to form an amorphous silicon pattern layer 110 on the amorphous silicon layer 104.

In an embodiment, the second etching process is a dry etching process, and the dry etching process includes etching with plasma gas.

In an embodiment, the plasma gas may include one or a mixture of nitrogen tetrafluoride, sulfur hexafluoride, and oxygen.

In this step, the polycrystalline layer that is not blocked by the first metal pattern layer 108 is removed in the second etching process, so that the amorphous silicon layer 104 forms the amorphous silicon pattern layer 110.

Among them, the oxygen in the plasma gas will corrode the metal copper in the first metal pattern layer 108, and then produce oxide impurities, which will affect the quality of the product. Therefore, chemical reactions will be used to remove oxide impurities in subsequent steps to ensure The quality of the product.

2F, S60, using a third etching process to form the source metal 111 and the drain metal 112 on the first metal pattern layer 108, and peel off the second photoresist pattern layer 109.

In an embodiment, the third etching process is wet etching to etch away the first metal pattern layer 108 that is not shielded by the second photoresist pattern layer 109, thereby forming mutually insulated source metal 111 and Drain metal 112.

In order to remove the oxide impurities in the source metal 111 and the drain metal 112, the application adopts the following steps to remove the oxide impurities in the source metal 111 and the drain metal 112.

Please refer to FIG. 2G, S70, chemically treating the oxides in the source metal 111 and the drain metal 112.

In an embodiment, the S70 specifically includes: reducing the oxides in the source metal 111 and the drain metal 112 using a gas with strong reducibility in an ionic environment.

In an embodiment, the gas includes at least one of hydrogen and fluorine-containing gas. The oxide impurities are removed by the strong reducibility of hydrogen and fluorine-containing gas. Taking the gas as hydrogen as an example, the chemical reaction in this step is as follows in an ionic environment:

H ⁺ +CuO _x →Cu+H ₂ O;

H ⁺ +CuCl _x →Cu+HCl;

Among them, CuO _x is an oxide impurity generated during the dry etching process, and CuCl _x is an impurity generated during the wet etching process. The present application can effectively remove the compound in the source metal 111 and the drain metal 112 through this step. Impurities, thereby increasing the yield of the product.

In an embodiment, the flow rate of the hydrogen is 80 standard milliliters per minute to 120 standard milliliters per minute.

Referring to FIG. 2H, in one embodiment, it further includes: forming a channel region 115 in the amorphous silicon pattern layer 110 by a fourth etching process to form an active layer.

Compared with the existing process, the present application can effectively avoid the removal of the second photoresist pattern layer 109 and then the formation of the channel region 115 in the amorphous silicon pattern layer 110. Tailing phenomenon to improve the yield of products.

In an embodiment, the fourth etching process is a dry etching process.

In an embodiment, the active layer includes source doped regions 113, drain doped regions 114, and a channel region 115 at the two ends;

Wherein, the source doped region 113 is disposed opposite to the source metal 111, and the drain doped region 114 is disposed opposite to the drain metal 112.

According to another aspect of the present application, there is also provided a display panel, which is prepared by using the above-mentioned manufacturing method of the display panel, so as to remove compound impurities in the source metal 111 and the drain metal 112, thereby improving the product Yield rate.

According to another aspect of the present application, there is also provided an etching system, including;

Dry etching mechanism for patterning the non-metal film layer;

Wet etching mechanism for patterning the metal film layer;

as well as

Chemical reaction mechanism to remove oxide impurities in the metal film layer.

In an embodiment, the chemical reaction mechanism removes oxide impurities in the metal film layer by using a gas with strong reducing properties.

In an embodiment, the gas may be at least one of hydrogen and fluorine-containing gas.

In one embodiment, the chemical reaction mechanism is used to remove oxide impurities in the metal film layer after the wet etching mechanism pattern the metal film layer.

In an embodiment, the chemical reaction mechanism is used to remove oxide impurities in the metal film layer after the dry etching mechanism pattern the metal film layer.

In an embodiment, the material of the metal film layer may be copper.

During the manufacturing process of the display panel, the etching system can prevent the wet etching process and the dry etching process from oxidizing other metals such as copper metal in the source metal 111 and the drain metal 112 to generate oxide impurities. After the metal of the film is etched, a chemical reaction mechanism can be used to remove oxide impurities in the metal film, thereby improving the product quality of the display panel.

In an embodiment, the oxide impurities are removed by the strong reducibility of hydrogen and fluorine-containing gas. Taking the gas as hydrogen as an example, the chemical reaction is as follows:

H ⁺ +CuO _x →Cu+H ₂ O;

H ⁺ +CuCl _x →Cu+HCl;

Beneficial effects: After the patterned source and drain metal layers are obtained, this application uses a gas with strong reducing properties to remove oxide impurities in the source and drain metal layers, thereby improving the yield and quality of the product.

In summary, although the application has been disclosed as above in preferred embodiments, the above-mentioned preferred embodiments are not intended to limit the application, and those of ordinary skill in the art can make various decisions without departing from the spirit and scope of the application. Such changes and modifications, so the protection scope of this application is subject to the scope defined by the claims.

Claims

A manufacturing method of a display panel, which includes:

S10. Providing a substrate, on which an amorphous silicon layer, a first metal layer and a photoresist layer are sequentially formed on the substrate;

S20, using a first photomask process to form a first photoresist pattern layer on the photoresist layer;

S30, using a first etching process to form a first metal pattern layer on the first metal layer;

S40. Perform ashing treatment on the first photoresist pattern layer to form a second photoresist pattern layer;

S50, using a second etching process to form an amorphous silicon pattern layer on the amorphous silicon layer;

S60, using a third etching process to form a source metal and a drain metal on the first metal pattern layer, and peel off the second photoresist pattern layer;

S70, performing chemical treatment on the oxide in the source metal and the drain metal.
The manufacturing method according to claim 1, wherein the first etching process and the third etching process are wet etching processes, and the second etching process is a dry etching process.
The manufacturing method according to claim 1, wherein the material of the first metal layer includes copper.
The manufacturing method according to claim 3, wherein the step S70 comprises:

In an ionic environment, a reducing gas is used to reduce the oxides in the source metal and the drain metal.
The manufacturing method according to claim 4, wherein the gas includes at least one of hydrogen and fluorine-containing gas.
The manufacturing method according to claim 5, wherein the flow rate of the hydrogen is 80 standard milliliters per minute to 120 standard milliliters per minute.
The production method according to claim 1, further comprising S80:

Using a fourth etching process, a channel region is formed in the amorphous silicon pattern layer to form an active layer.
8. The manufacturing method according to claim 7, wherein the fourth etching process is a dry etching process.
8. The manufacturing method according to claim 8, wherein the active layer includes a source doped region, a drain doped region at both ends, and a channel region in the middle;

Wherein, the source doped region is disposed opposite to the source metal, and the drain doped region is disposed opposite to the drain metal.
The manufacturing method of claim 1, wherein before forming an amorphous silicon layer on the substrate, the method further comprises:

Forming a gate on the substrate;

A gate insulating layer is formed on the gate.
A display panel, wherein the display panel is prepared by the following manufacturing method, and the manufacturing method includes:

S10. Providing a substrate, on which an amorphous silicon layer, a first metal layer and a photoresist layer are sequentially formed on the substrate;

S20, using a first photomask process to form a first photoresist pattern layer on the photoresist layer;

S30, using a first etching process to form a first metal pattern layer on the first metal layer;

S40. Perform ashing treatment on the first photoresist pattern layer to form a second photoresist pattern layer;

S50, using a second etching process to form an amorphous silicon pattern layer on the amorphous silicon layer;

S60, using a third etching process to form a source metal and a drain metal on the first metal pattern layer, and peel off the second photoresist pattern layer;

S70, performing chemical treatment on the oxide in the source metal and the drain metal.
11. The display panel of claim 11, wherein the first etching process and the third etching process are wet etching processes, and the second etching process is a dry etching process.
The display panel according to claim 12, wherein the step S70 comprises:

In an ionic environment, a reducing gas is used to reduce the oxides in the source metal and the drain metal.
The display panel of claim 13, wherein the gas includes at least one of hydrogen gas and fluorine-containing gas.
14. The display panel of claim 14, wherein the flow rate of the hydrogen is 80 standard milliliters per minute to 120 standard milliliters per minute.
The display panel according to claim 11, further comprising S80:

Using a fourth etching process, a channel region is formed in the amorphous silicon pattern layer to form an active layer.
16. The display panel of claim 16, wherein the active layer includes a source doped region, a drain doped region at both ends, and a channel region in the middle;

Wherein, the source doped region is disposed opposite to the source metal, and the drain doped region is disposed opposite to the drain metal.
11. The display panel of claim 11, wherein before forming an amorphous silicon layer on the substrate, further comprising:

Forming a gate on the substrate;

A gate insulating layer is formed on the gate.
An etching system, which includes:

Dry etching mechanism for patterning the non-metal film layer;

Wet etching mechanism for patterning the metal film layer;

as well as

The chemical reaction mechanism is used to remove oxide impurities in the metal film layer.
19. The etching system of claim 19, wherein the chemical reaction mechanism removes oxide impurities in the metal film layer by using a reducing gas.