WO2020169026A1 - 在多显示驱动电路系统中显示图像的方法和电子设备 - Google Patents

在多显示驱动电路系统中显示图像的方法和电子设备 Download PDF

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Publication number
WO2020169026A1
WO2020169026A1 PCT/CN2020/075711 CN2020075711W WO2020169026A1 WO 2020169026 A1 WO2020169026 A1 WO 2020169026A1 CN 2020075711 W CN2020075711 W CN 2020075711W WO 2020169026 A1 WO2020169026 A1 WO 2020169026A1
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Prior art keywords
image
sub
display
spr
display driving
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PCT/CN2020/075711
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English (en)
French (fr)
Inventor
韦育伦
王琨
王安立
汪亮
朱家庆
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华为技术有限公司
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Priority claimed from CN201910837787.XA external-priority patent/CN111613165B/zh
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP20759315.3A priority Critical patent/EP3920169A4/en
Priority to US17/433,209 priority patent/US11749171B2/en
Publication of WO2020169026A1 publication Critical patent/WO2020169026A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2003—Display of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0443—Pixel structures with several sub-pixels for the same colour in a pixel, not specifically used to display gradations
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0221—Addressing of scan or signal lines with use of split matrices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0457—Improvement of perceived resolution by subpixel rendering
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/14—Solving problems related to the presentation of information to be displayed
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/06—Use of more than one graphics processor to process data before displaying to one or more screens
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2380/00—Specific applications
    • G09G2380/02—Flexible displays

Definitions

  • This application relates to the field of image display, and in particular to a method and electronic device for displaying images in a multi-display driving circuit system.
  • Digital images usually include several image pixels, and each image pixel contains a limited number of discrete color components.
  • a traditional image pixel is composed of three color components: red, green, and blue.
  • one screen pixel When displaying according to the traditional sub-pixel driving method, one screen pixel includes three sub-pixels of red, green, and blue, and each sub-pixel is used to display a color component of the image pixel.
  • each sub-pixel In order to increase the resolution of the display, it is necessary to increase the number of screen pixels.
  • the placement area of a single screen pixel in the active area of the panel is limited. After the number of screen pixels reaches a certain level, it is difficult to continue to increase, and the resolution of the display screen is difficult to continue to increase. For this reason, sub-pixel rendering (SPR) algorithms have been proposed.
  • SPR sub-pixel rendering
  • the three color components of an image pixel are displayed by one SPR pixel with fewer sub-pixels on the screen, but it can achieve the same visual effect as the three sub-pixels of a traditional screen pixel.
  • one SPR pixel includes two sub-pixels.
  • the basic principle of the SPR algorithm is to use the pixel data of the nearby SPR pixels, for example, the pixel data of the upper, lower, left, and right SPR pixels as a reference, to calculate the pixel data of the target SPR pixel.
  • the main controller divides the image into two and sends them to the two display drive circuits respectively.
  • the two display driving circuits must share pixel data to complete the rendering of the image according to the SPR algorithm.
  • an existing method is to build a data channel (that is, an interface) between the two display driving circuits, which is specifically used to exchange pixels between the two display driving circuits. data.
  • the area of the display driving circuit needs to be made larger, so that the area of the flexible printed circuit (FPC) increases.
  • FPC flexible printed circuit
  • building a data channel between the two display driving circuits will inevitably cause electromagnetic interference (EMI) and electrostatic discharge (ESD) between the two display driving circuits. And other issues.
  • EMI electromagnetic interference
  • ESD electrostatic discharge
  • the present application provides an electronic device and a method for displaying images in a system with multiple display driving circuits, which can avoid the problems of FPC area growth, EMI, and ESD when the system with multiple display driving circuits displays images.
  • the present application provides an electronic device including a main controller, a display screen, and at least two display drive circuits, the at least two display drive circuits drive the display screen to display images, wherein:
  • the main controller is configured to split the image to be displayed into at least two sub-images in a non-sub-pixel rendering SPR pixel format, and send the at least two sub-images to the at least two display driving circuits, wherein each sub-image
  • the image and adjacent sub-images include at least one row of overlapping image pixels;
  • Each of the at least two display driving circuits is configured to receive one of the at least two sub-images from the main controller, and according to the non-SPR pixels of the one sub-image Format pixel data, drive the display screen to display a part of the image to be displayed in SPR mode, wherein the at least two display driving circuits drive each part displayed on the display screen to jointly present the image to be displayed.
  • the system of multiple display drive circuits is a system that includes multiple display drive circuits.
  • the multiple display driving circuit system may include two or more display driving circuits.
  • the main controller in the electronic device splits the image to be displayed into at least two sub-images, and each sub-image contains the image at the junction with its adjacent sub-image and belongs to the adjacent sub-image. One or more columns of image pixels.
  • the main controller sends the at least two sub-images to at least two display driving circuits of the multi-display driving circuit system. Since the sub-images received by each display drive circuit include one or more columns of image pixels at the junction with its adjacent sub-images and belonging to the adjacent sub-images, each display drive circuit can be Based on the principle of SPR technology, the non-SPR pixels contained in the sub-image drive the display to display the sub-image in SPR mode.
  • Each display drive circuit of the at least two display drive circuits drives the display screen to display a part of the image to be displayed, so that the at least two display drive circuits drive each part of the display screen to jointly present the image to be displayed. It can be seen that the display driving circuits in the multi-display driving circuit system do not need to establish data channels to display images, thereby avoiding the growth of FPC area caused by the establishment of data channels, as well as EMI, ESD, etc. problem.
  • the electronic device specifically includes a first display driving circuit and a second display driving circuit, wherein the main controller is configured to transfer the image to be displayed Split into a first sub-image and a second sub-image in a non-SPR pixel format, and send the first sub-image to the first display drive circuit, and send the second sub-image to the second display drive circuit , wherein the first sub-image and the second sub-image include at least one row of overlapping image pixels;
  • the first display driving circuit is configured to drive the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image;
  • the second display driving circuit is configured to drive the display screen to display another part of the image to be displayed in the SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.
  • the first sub-image and the second sub-image include at least one row of overlapping image pixels, including:
  • the column range is [1,M+N 1 ], and the column range of image pixels included in the second sub-image is [MN 2 ,Z], where Z is the total number of columns of image pixels included in the image to be displayed , Z, M, N 1 and N 2 are all positive integers, 1 ⁇ M ⁇ Z,Z>1.
  • N 1 N 2 , which represents the number of columns of image pixels of the adjacent second sub-image contained in the first sub-image, and the adjacent first sub-image contained in the second sub-image The number of columns of image pixels is equal.
  • M Z/2, which means that two display drivers each drive the display screen to display half of the image to be displayed.
  • N 8 or 16.
  • another electronic device including a main controller, a display screen, and at least two display driving circuits, wherein the main controller is used to generate SPR pixels according to the non-SPR pixel format pixel data of the image to be displayed Format at least two sub-images, and sending the at least two sub-images to the at least two display driving circuits;
  • Each of the at least two display driving circuits is configured to receive one of the at least two sub-images from the main controller, and drive the display screen to display the pending image in SPR mode. A part of an image is displayed, wherein the at least two display driving circuits drive each part displayed on the display screen to jointly present the image to be displayed.
  • the main controller in the electronic device outputs the rendered sub-image (that is, the sub-image in the SPR pixel format) to each display drive circuit in the multi-display drive circuit system, so that each The display driving circuit can directly drive the display screen to display the received sub-image in SPR mode according to the pixel data in the SPR pixel format of the received sub-image.
  • Each display drive circuit in the multi-display drive circuit system drives the display screen to display one sub-image, so that the at least two display drive circuits drive the respective sub-images displayed on the display screen to jointly present the image to be displayed. It can be seen that the display driving circuits in the multi-display driving circuit system do not need to establish data channels to display images, thereby avoiding the growth of FPC area caused by the establishment of data channels, as well as EMI, ESD, etc. problem.
  • the electronic device includes a first display driving circuit and a second display driving circuit, wherein the main controller is configured to respond according to the non-SPR of the image to be displayed Pixel data in the pixel format, generate the third sub-image and the fourth sub-image in the SPR pixel format, and send the third sub-image to the first display drive circuit, and send the first sub-image to the second display drive circuit Four sub-images;
  • the first display driving circuit is configured to drive the display screen to display the third sub-image in SPR mode
  • the second display driving circuit is used to drive the display screen to display the fourth sub-image in SPR mode.
  • the present application provides a method for displaying images in a multi-display driving circuit system.
  • the multi-display driving circuit system includes a main controller, a display screen, and at least two display driving circuits, and the method includes:
  • the main controller splits the image to be displayed into at least two sub-images in the non-sub-pixel rendering SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits, where each sub-image and adjacent sub-images
  • the image includes at least one column of overlapping image pixels; each of the at least two display driving circuits receives one of the at least two sub-images from the main controller, and according to the one sub-image
  • the pixel data in the non-SPR pixel format of the image drives the display screen to display a part of the image to be displayed in SPR mode, wherein the at least two display drive circuits drive the various parts of the display screen to display the Describe the image to be displayed.
  • the multiple display drive circuit system includes a first display drive circuit and a second display drive circuit, wherein the main controller splits the image to be displayed into At least two sub-images in a non-SPR pixel format, and sending the at least two sub-images to the at least two display driving circuits includes:
  • the main controller splits the image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, and sends the first sub-image to the first display driving circuit, and sends the first sub-image to the first display driving circuit.
  • a display driving circuit sends the second sub-image, wherein the first sub-image and the second sub-image include at least one row of overlapping image pixels;
  • Each of the at least two display driving circuits receives one of the at least two sub-images from the main controller, and performs the processing according to the non-SPR pixel format of the one sub-image
  • the pixel data which drives the display screen to display a part of the image to be displayed in SPR mode, includes:
  • the first display driving circuit drives the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image;
  • the second display driving circuit drives the display screen to display another part of the image to be displayed in the SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.
  • the first sub-image and the second sub-image include at least one row of overlapping image pixels, including:
  • the column range is [1,M+N 1 ], and the column range of image pixels included in the second sub-image is [MN 2 ,Z], where Z is the total number of columns of image pixels included in the image to be displayed , Z, M, N 1 and N 2 are all positive integers, 1 ⁇ M ⁇ Z,Z>1.
  • N 1 N 2 .
  • the present application provides a method for displaying images in a multi-display driving circuit system.
  • the multi-display driving circuit system includes a main controller, a display screen, and at least two display driving circuits, and the method includes:
  • the main controller generates at least two sub-images in the SPR pixel format according to the non-SPR pixel format pixel data of the image to be displayed, and sends the at least two sub-images to the at least two display driving circuits; the at least two display drivers
  • Each display driving circuit in the circuit receives one of the at least two sub-images from the main controller, and drives the display screen to display a part of the image to be displayed in SPR mode, wherein the at least two The display driving circuit drives each part displayed on the display screen to jointly present the image to be displayed.
  • the method for displaying images in a multi-display driving circuit system in the fourth aspect is based on the same inventive concept as the electronic device in the second aspect. Therefore, for the beneficial technical effects that the technical solution of the fourth aspect can achieve, refer to the second aspect. The description of this aspect will not be repeated here.
  • the multi-display driving circuit system includes a first display driving circuit and a second display driving circuit, wherein the main controller is based on the image to be displayed
  • the pixel data in the non-SPR pixel format is generated, the third sub-image and the fourth sub-image in the SPR pixel format are generated, and the third sub-image is sent to the first display driving circuit, and the second sub-image is sent to the second display driving circuit.
  • the fourth sub-image; the first display drive circuit drives the display screen to display the third sub-image in SPR mode according to the pixel data of the SPR pixel format of the third sub-image; the second display drive circuit according to the fourth The pixel data of the SPR pixel format of the sub-image drives the display screen to display the fourth sub-image in the SPR mode.
  • the present application provides a circuit system including one or more processors.
  • the one or more processors are used to read and execute the computer program stored in the memory to execute the method in the third aspect or any possible implementation manner thereof, or to execute the fourth aspect or any possible implementation manner thereof Methods.
  • the memory may be located outside the circuit system or integrated in the circuit system.
  • the memory may be one or more.
  • the circuit system further includes one or more communication interfaces.
  • the present application provides a computer-readable storage medium having computer instructions stored in the computer-readable storage medium, and when the computer instructions run on a computer, the computer executes the third aspect or any possible implementation manner thereof Or execute the method in the fourth aspect or any possible implementation manner thereof.
  • the present application provides a computer program product.
  • the computer program product includes computer program code.
  • the computer program code runs on a computer, the computer executes the third aspect or any of its possible implementations. Method, or execute the method in the fourth aspect or any possible implementation manner thereof.
  • Figure 1 is a schematic diagram of RGB pixels.
  • Fig. 2 is an example of the arrangement of SPR pixels.
  • FIG. 3 is a schematic block diagram of a system 100 of dual display driving circuits.
  • Figure 4 is a schematic diagram of the need to share pixel data between the first image and the second image.
  • FIG. 5 is a schematic diagram of sharing pixel data between two display driving circuits.
  • FIG. 6 is a schematic structural diagram of an electronic device 7000 provided by this application.
  • FIG. 7 is an example of a method for displaying images in a multi-display driving system provided by this application.
  • FIG. 8 is a schematic diagram of a method of displaying an image in a dual display driving circuit system.
  • Fig. 9 is an example of a method for displaying images provided by the present application.
  • FIG. 10 is another schematic diagram of the method for displaying images provided by the present application.
  • FIG. 11 is a schematic structural block diagram of the main controller provided by this application.
  • FIG. 12 is a schematic structural block diagram of the display driving circuit 2000.
  • FIG. 13 is a schematic structural block diagram of the display driving circuit 3000.
  • FIG. 14 is a schematic structural diagram of an electronic device 5000 provided by this application.
  • image pixel refers to a pixel in the image to be displayed, that is, a point on the image expressed by a certain value.
  • the "screen pixel” refers to the physical display unit used to display an image pixel on the display screen. Traditionally, one image pixel corresponds to one screen pixel. Traditionally, an image pixel includes three color components, red, green, and blue, and each color component uses a numerical value to represent the color scale or gray value of the color. In a common 24-bit color display, each color component is represented by 8 bits, which corresponds to a decimal number of 0 to 255.
  • the image pixels may also include other components, for example, gamma components. An image pixel may also include more than three color components, for example, using two green components, or two blue components, or introducing a yellow component.
  • the main controller sends the image to be displayed to the display drive circuit.
  • the display drive circuit converts the pixel data in the image to be displayed into a voltage or current signal that regulates the brightness of the screen pixels and sends it to the display screen.
  • the control display shows the image.
  • the main controller may be one or more processors, and specifically may be a main chip of a mobile phone, that is, a system on chip (SoC).
  • SoC system on chip
  • the display driving circuit may specifically be a display driver integrated circuit (DDIC), for example, CD40110BE of Texas Instruments, MM5450YV of Microchip, etc.
  • DDIC display driver integrated circuit
  • Fig. 1 is a schematic diagram of traditional screen pixels on a display screen.
  • Traditional screen pixels generally consist of three sub-pixels of red, green and blue, which are called red green blue (RGB) pixels.
  • RGB red green blue
  • each sub-pixel displays a color component of the corresponding image pixel, and the three sub-pixels jointly present the color of the image pixel.
  • a screen pixel may also include more sub-pixels.
  • a screen pixel also adds white sub-pixels.
  • RGBW pixels are equipped with special white sub-pixels, so they can display purer white.
  • a screen pixel includes a red sub-pixel, a grass green sub-pixel, an emerald sub-pixel, and a blue sub-pixel. This is called a red green blue (RGGB) pixel. . Since human eyes are most sensitive to green light, setting two green sub-pixels can express richer colors.
  • the color components of the image pixels are converted into the light transmittance (for the liquid crystal screen) or the luminous brightness (for the light emitting diode (LED) screen) of the corresponding sub-pixels on the screen through the main chip and/or the display drive circuit to achieve display.
  • each pixel usually consists of two sub-pixels, usually in the form of "red+green”, “green+blue” or “blue+red ”Is arranged periodically.
  • Such a pixel composed of two sub-pixels is called an SPR pixel.
  • the arrangement of SPR pixels can be different.
  • FIG. 2 is an example of the arrangement of SPR pixels.
  • Figure 2 shows SPR pixels in 3 rows and 4 columns, and each SPR pixel consists of two sub-pixels. Among them, the arrangement of the SPR pixels in the second and fourth columns is the same. The arrangement of the sub-pixels in the first sub-pixel column of the SPR pixels in the first and third columns is the same, and the arrangement of the sub-pixels in the second sub-pixel column is different.
  • the basic principle of SPR technology is to use the pixel data of nearby pixels as a reference to calculate the pixel data of the target pixel.
  • the value of each sub-pixel of a target pixel is calculated based on the value of the sub-pixels of pixels nearby.
  • the value of each sub-pixel of a pixel is also called the pixel data of the pixel. This is because in SPR technology, each screen pixel has missing colors, so it is necessary to use nearby screen pixels to achieve color display.
  • the pixel data of this target pixel can be calculated by referring to the pixel data of its neighboring pixels. For example, using the top, bottom, left, right, and four diagonal pixels as references, the pixel data of this target pixel is calculated. For another example, the pixel data of the target pixel is calculated using the pixels above, below, left, and right as references. Specifically, one color component among multiple adjacent image pixels of the target pixel may be averaged to obtain pixel data of the corresponding sub-pixel on the display screen. For example, in the screen pixels m and n in Figure 2, 1, 2, and 3 in the figure represent three sub-pixels of red, green, and blue, respectively.
  • the number of sub-pixels on the display screen is less than the number of color components of image pixels of the image to be displayed in a non-SPR pixel format (for example, RGB format).
  • a non-SPR pixel format for example, RGB format
  • an RGB image with a resolution of 1920 ⁇ 1080 where the number of color components of the image pixels is 1920 ⁇ 1080 ⁇ 3, and the corresponding sub-pixels on a display screen with a resolution of 1920 ⁇ 1080 may only be 1920 ⁇ 1080 ⁇ 2.
  • the display screen is displayed at a resolution less than its maximum resolution, it can be displayed by combining several actual sub-pixels into one virtual sub-pixel.
  • the number of virtual sub-pixels is less than the number of image pixel color components. For example, if an image with a resolution of 1024 ⁇ 768 is displayed on a display with a maximum resolution of 1920 ⁇ 1080, the number of virtual sub-pixels may only be 1024 ⁇ 768 ⁇ 2, which is less than the number of color components of the image pixel 1024 ⁇ 768 ⁇ 3.
  • a multi-display drive circuit system When the foldable terminal device performs image display, due to the flexible folding characteristics of the flexible display screen, a multi-display drive circuit system is generally considered.
  • a multi-display drive circuit system usually includes a main controller, at least two display drive circuits, and a display screen. The at least two display driving circuits jointly drive the display screen for image display.
  • FIG. 3 is a schematic diagram of a system 100 of dual driving display circuits.
  • the system 100 includes a main controller 101, a display drive circuit 102 and a display drive circuit 103, and a display screen 104.
  • the main controller divides the image to be displayed into two to obtain the first image and the second image. Then, the main controller sends the first image and the second image to the display drive circuit 102 and the display drive circuit 103 respectively, and the display drive circuit 102 and the display drive circuit 103 drive the display screen to display the first image and the second image.
  • the image to be displayed is presented on the display screen.
  • the display driving circuit 102 and the display driving circuit 103 need to share pixel data to meet the requirements of the SPR algorithm. The reason will be explained below in conjunction with Figure 4.
  • each display driving circuit drives the display screen to display a part of the image to be displayed.
  • the display drive circuit 102 in FIG. 3 is used to drive the display screen to display a part of the image to be displayed (hereinafter referred to as the first image), and the display drive circuit 103 is used to drive the display screen. Display another part of the image to be displayed (hereinafter referred to as the second image).
  • the display driving circuit 102 wants to display the first image, it needs to calculate the pixel data of all SPR pixels of the first image, or in other words, it needs to calculate the sub-pixel value of each SPR pixel contained in the first image.
  • all the SPR pixels of the first image obviously include the SPR pixels in the rightmost column of the first image (the pixels in the filling part in Figure 4), and the calculation of the pixel data of the SPR pixels in the rightmost column, except that it needs to be referred to.
  • the values of the sub-pixels of the upper, lower, and left SPR pixels also need to refer to the values of the sub-pixels of the SPR pixel on the right.
  • the pixel on the right is located in the second image, which is sent to the display driving circuit 103 by the main controller 101.
  • the display driving circuit 103 wants to display the second image, it needs to calculate the pixel data of all SPR pixels included in the second image, including the pixel data of the leftmost column of SPR pixels in the second image.
  • the pixel data of the SPR pixels in the leftmost column of the second image is calculated with reference to the pixel data of the upper, lower, and right SPR pixels, and the pixel data of the SPR pixels on the left.
  • the SPR pixels in the leftmost column are located in the first image and are sent to the display driving circuit 102 by the main controller 101.
  • the display driving circuit 102 and the display driving circuit 103 share the pixel data required by each other to complete the pixel rendering using SPR technology, display the first image and the second image separately, and realize the display of the image to be displayed. .
  • an existing technical solution proposes to build an interface (or data channel) for pixel data transmission between the two display driving circuits of the system 100 to realize pixel data sharing, as shown in FIG. 5.
  • FIG. 5 is a schematic diagram of sharing pixel data between two display driving circuits.
  • An interface for sharing pixel data is established between two display drive circuits (shown in Figure 5, display drive circuit 1 and display drive circuit 2). Each display drive circuit can connect the other through this interface.
  • the pixel data required by the display drive circuit is shared with the other party.
  • the structure shown in FIG. 5 solves the problem of pixel data sharing, it brings other problems.
  • the area of the display drive circuit needs to be made larger to leave an area for establishing an interface on each display drive circuit, which will make the flexible circuit board of the display drive (flexible printed circuit, FPC) regional growth.
  • FPC flexible printed circuit
  • the present application provides an electronic device with a multi-display driving circuit system and a method for displaying images through the multi-display driving circuit system, aiming to avoid the increase of the FPC area of the display screen , EMI and EMD.
  • FIG. 6 is a schematic structural diagram of an electronic device 7000 provided in this application.
  • the electronic device 7000 includes one or more processors 7001 and one or more transceivers 7002.
  • the electronic device 7000 further includes one or more memories 7003.
  • the processor 7001, the transceiver 7002, and the memory 7003 can communicate with each other through an internal connection path to transfer control and/or data signals.
  • the memory 7003 is used to store a computer program
  • the processor 7001 is used to call and run the computer program from the memory 7003, so that the electronic device executes the method for displaying images provided in this application.
  • the processor 7001 may include a baseband processor 70071 and an application processor 70072.
  • the processor 7001 may also include a graphics processing unit (GPU), an image signal processor (ISP), a display subsystem (DSS), and a neural network processing unit (neural network processing unit).
  • GPU graphics processing unit
  • ISP image signal processor
  • DSS display subsystem
  • NPU neural network processing unit
  • processing unit, NPU may also include a graphics processing unit (GPU), an image signal processor (ISP), a display subsystem (DSS), and a neural network processing unit (neural network processing unit).
  • NPU neural network processing unit
  • the various processing units described above may be integrated on a chip to form a system on chip (system on chip, SoC).
  • the electronic device 7000 may further include an antenna 7004.
  • the transceiver 7002 transmits or receives signals through the antenna 7004.
  • the processor 7001 and the memory 7003 may be combined into one processing device, and the processor 7001 is configured to execute program codes stored in the memory 7003 to implement corresponding functions.
  • the memory 7003 may also be integrated in the processor 7001, that is, an on-chip memory.
  • the memory 7003 is independent of the processor 7001 and located outside the processor 7001, that is, off-chip memory.
  • the terminal device 7000 may further include one or more of an input unit 7006, a display unit 7007, an audio circuit 7008, a camera 7009, a sensor 7010, and so on.
  • the audio circuit may also include a speaker 70082, a microphone 70084, and so on.
  • the input unit 7006 is a signal input interface
  • the display unit 7007 is a signal output interface, such as a display screen.
  • the signal output by the display unit 7007 may include audio, video, image, and so on.
  • the display unit 7007 may be an AMOLED, and the AMOLED includes a module 70072.
  • the module 70072 may be provided with multiple display driving circuits, such as display driving circuits 1,..., display driving circuits n as shown in FIG. 6. n ⁇ 2.
  • the module 70072 also includes OLED 70074.
  • AMOLED can be a flexible display screen. That is, the electronic device 7000 may be a foldable electronic device.
  • the technical solution of the present application can be applied to the foldable electronic device shown in FIG. 6 to display images through a multi-display driving circuit system.
  • the following is a detailed introduction.
  • the main controller may refer to one or more processors, and specifically may be a system on chip (system on chip, SoC).
  • SoC system on chip
  • the main controller of the electronic device generates at least two sub-images in a non-SPR pixel format (for example, RGB format), and sends the at least two sub-images to the display driving circuit, and then the display
  • the driving circuit uses the SPR algorithm to drive the display screen to display images.
  • the main controller splits the image to be displayed into at least two sub-images in a non-SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits.
  • each sub-image and adjacent sub-images include at least one row of overlapping image pixels.
  • the at least one row of overlapping image pixels refers to one or more rows of image pixels at the junction of each sub-image and its adjacent sub-images.
  • each sub-image contains at least the rightmost column of image pixels of the adjacent sub-image on the left and the adjacent sub-image on the right The leftmost column of image pixels.
  • the sub-image at the left edge contains at least the image pixels in the leftmost column of the adjacent sub-image on the right.
  • the sub-image at the right edge includes at least the image pixels in the rightmost column of the adjacent sub-image to the left.
  • rows and columns are relative concepts. Those skilled in the art should understand that the “columns” of the pixel array can also be described as “rows” instead, and this change should not limit the technical solutions of the present application. The following are described in terms of "columns”.
  • Each of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller, and according to the pixel data of the non-SPR pixel format of the one sub-image , Driving the display screen to display a part of the image to be displayed in SPR mode. Wherein, the at least two display driving circuits drive each part displayed on the display screen to present the image to be displayed.
  • each display driving circuit drives the part displayed on the display screen, which corresponds to the sub-image received by the display driving circuit from the main controller.
  • each display driving circuit receives a sub-image from the main controller, and drives the display screen to display the sub-image in SPR mode according to the pixel data of the image pixels contained in the sub-image, thereby presenting a part of the image to be displayed .
  • the at least two display driving circuits each drive the display screen to display (or present) a part of the image to be displayed, and these multiple parts jointly present the image to be displayed.
  • the display screen displays the sub-images in SPR mode, that is, the display screen uses SPR technology to display the sub-images.
  • the main controller may split the image to be displayed into at least two sub-images according to the number of display drive circuits, and send one of the at least two sub-images to each display drive circuit. image.
  • each display driving circuit receives a sub-image from the main controller and controls the display screen to display a part of the image to be displayed.
  • the main controller splits the image to be displayed into at least two sub-images, and sends more than one sub-image to some of the at least two display driving circuits, and to other sub-images.
  • Each display driving circuit in the display driving circuit sends a sub-image.
  • the display driving circuit that receives more than one sub-image can drive the display screen to display multiple parts of the image to be displayed.
  • Each of the display driving circuits in the display driving circuit that receives a sub-image can drive the display screen to display a part of the image to be displayed.
  • the various parts displayed on the display screen collectively present the image to be displayed.
  • FIG. 7 is an example of a method for displaying images in a system with multiple display driving circuits provided by the application.
  • a system with multiple display driving circuits including three display driving circuits is taken as an example for description.
  • the multiple display driving circuit system may include other numbers of display driving circuits.
  • the main controller splits the image to be displayed into three sub-images, which are respectively a first sub-image, a second sub-image and a third sub-image, which are respectively sent to three display driving circuits.
  • the first sub-image and the adjacent second sub-image have overlapping image pixels.
  • the second sub-image and the adjacent first sub-image and the adjacent third sub-image all have overlapping image pixels.
  • every two adjacent sub-images includes at least one column of overlapping image pixels.
  • the at least one row of overlapping image pixels contained in every two adjacent sub-images should be one or more rows of image pixels in the junction of the two adjacent sub-images.
  • the first sub-image should include at least the leftmost column of image pixels of the second sub-pixel.
  • the second sub-image should contain at least the image pixels in the rightmost column of the first sub-image.
  • the second sub-pixel should at least include the image pixels in the leftmost column of the third sub-image.
  • the third sub-image should contain at least the image pixels in the rightmost column of the second sub-image.
  • the display driving circuit 1 receives the first sub image from the main controller. According to the pixel data of the non-SPR pixel format of the first sub-image, the display driving circuit 1 calculates the pixel data of the SPR pixel format required to display the first part of the image to be displayed on the display screen, and drives the display screen to display the first part.
  • the principle of calculating the pixel data of the SPR pixel by the display driving circuit 1 can refer to the basic principle of the SPR algorithm described above, as shown in FIG. 2, and will not be repeated here.
  • the display driving circuit 2 receives the second sub image from the main controller. According to the pixel data in the non-SPR pixel format of the second sub-image, the display driving circuit 2 calculates the pixel data in the SPR pixel format required to display the second part of the image to be displayed on the display screen, and drives the display screen to display the second section.
  • the display driving circuit 3 receives the third sub image from the main controller. According to the pixel data of the non-SPR pixel format of the third sub-image, the display driving circuit 3 calculates the pixel data of the SPR pixel format required for displaying the third part of the image to be displayed on the display screen, and drives the display screen to display the third section.
  • the display drive circuit 1, the display drive circuit 2 and the display drive circuit 3 respectively drive the display screen to display a part of the image to be displayed, thereby presenting a complete image to be displayed on the display screen.
  • each display driving circuit since the main controller splits the image to be displayed into a plurality of sub-images with overlapping image pixels, so that after each sub-image is sent to the display driving circuit, each display driving circuit obtains more than the required display.
  • the number of columns of pixels included in the first sub-image is greater than the number of columns of pixels included in the first part.
  • the number of columns of pixels included in the second sub-image is greater than the number of columns of pixels included in the second part.
  • the number of columns of pixels included in the third sub-image is greater than the number of columns of pixels included in the third part.
  • the image pixels of the sub-image obtained by each display driving circuit are the "overlapping image pixels" referred to in this application, as compared to the part displayed on the display screen driven by the display driving circuit.
  • FIG. 8 is a schematic diagram of a method of displaying an image in a dual display driving circuit system.
  • the main controller splits the image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, wherein the first sub-image and the second sub-image include at least one row of overlapping images Pixels.
  • the main controller sends the first sub-image to the first display drive circuit in the dual display drive circuit system, and sends the second sub-image to the second display drive circuit.
  • the first display driving circuit receives the first sub-image from the main controller, and drives the display screen to display a part of the image to be displayed in SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image.
  • the second display driving circuit receives the second sub-image from the main controller, and drives the display screen to display another part of the image to be displayed in SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.
  • the part that the first display drive circuit drives the display screen to display is called the first image
  • the second display drive circuit drives the other part that is displayed on the display screen, which is called the second image.
  • the non-SPR pixel format may be an RGB pixel format.
  • the main controller splits the image to be displayed into multiple sub-images and sends them to multiple display driving circuits respectively.
  • the multiple display driving circuits drive the display screen to display multiple parts of the image to be displayed
  • the range of columns of pixels included in the multiple parts is as follows:
  • the column range of the pixels included in the multiple sub-images may be as follows:
  • the column range of the image pixels contained in the first sub image and the second sub image can be calculated as follows:
  • the column range of image pixels included in the first sub-image is [1, M+N 1 ], and the column range of image pixels included in the second sub-image is [MN 2 , Z].
  • Z is the total number of columns of image pixels contained in the image to be displayed, Z, M, N 1 and N 2 are all positive integers, 1 ⁇ M ⁇ Z,Z>1.
  • M can be any column between the 1st column and the Zth column.
  • the image pixels of the column that is, the column range of the image pixels included in the first sub-image is [1,51].
  • the second sub-image contains image pixels from the 49th column to the 100th column, that is, the column range of the image pixels contained in the second sub-image is [49,100].
  • the first display driving circuit drives the display screen to display a part of the image to be displayed in SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image. Specifically, the first display driving circuit drives the display screen to display image parts corresponding to the image pixels in the first to 50th columns of the image to be displayed according to the image pixels in the first to 51st columns received from the main controller.
  • the second display driving circuit drives the display screen to display another part of the image to be displayed in SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.
  • the second display driving circuit drives the display screen to display image parts corresponding to the image pixels from the 51st column to the 100th column of the image to be displayed according to the image pixels from the 49th column to the 100th column received from the main controller.
  • the image parts corresponding to the image pixels in the first to 50th columns of the image to be displayed on the display screen, and the image parts corresponding to the image pixels in the 51st to 100th columns of the image to be displayed are displayed.
  • the image to be displayed is displayed.
  • the first display driving circuit and the second display driving circuit each drive the display screen to display half of the image to be displayed.
  • adjacent sub-images are displayed staggered. In fact, one or more columns in the boundary portion of two adjacent sub-images are completely overlapped.
  • the dotted line shown on the image to be displayed represents the dividing line of the parts that need to be displayed by the two display driving circuits driving the display screen.
  • the first display drive circuit drives the display screen to display the image on the left side of the dotted line
  • the second display drive circuit drives the display screen to display the image on the right side of the dotted line.
  • the main controller 101 splits the image to be displayed, and outputs a first sub-image and a second sub-image with overlapping image pixels.
  • the overlapping image pixels are one or more columns of image pixels in the boundary portion of the first sub-image and the second sub-image.
  • the main controller 101 sends the first sub-image to the display driving circuit 102 and sends the second sub-image to the display driving circuit 103.
  • the display driving circuit 102 not only obtains all the image pixels of the left image on the left of the dotted line, but also obtains the image pixels near the dividing line, where the image pixels near the dividing line mainly refer to one or more columns on the right of the dividing line. Image pixels.
  • the display driving circuit 103 also simultaneously obtains all the image pixels of the right image on the right of the dotted line, and also obtains one or more columns of image pixels on the left of the dividing line.
  • the display driving circuit 102 can calculate the pixel data of all pixels in the SPR pixel format of the left image according to all the image pixels of the obtained first sub-image, so as to drive the display screen 104 to display the left image in the SPR mode.
  • the display driving circuit 103 can calculate the pixel data of all pixels in the SPR pixel format of the right image according to all the image pixels of the obtained second sub-image, so as to drive the display screen 104 to display the right image in the SPR mode.
  • the dividing line shown in FIG. 9 may be a central position or a non-central position of the image to be displayed.
  • the main controller and the display drive circuit can interact through a display serial interface (DSI), or other communication interfaces other than DSI can also be used, which is not limited in this application .
  • DSI display serial interface
  • the main controller renders SPR pixel format pixel data according to the non-sub-pixels of the image to be displayed, generates at least two sub-images in the SPR pixel format, and sends them to the at least two display driving circuits.
  • the at least two sub-images are the at least two sub-images.
  • Each of the at least two display driving circuits receives one of the at least two sub-images from the main controller, and drives the display screen to display the received sub-images.
  • the sub-image is in a non-SPR pixel format (for example, RGB format).
  • the main controller splits the image to be displayed into multiple sub-images in the SPR pixel format according to the SPR algorithm. That is, the main controller completes the mapping of the original non-SPR pixel format (such as RGB format) to the SPR pixel format image.
  • the image in the SPR pixel format directly gives the display data of each sub-pixel on the display screen, for example, the color scale or gray value of each sub-pixel. Therefore, the display driving circuit can directly drive the display screen to display the sub-images received from the main controller.
  • AP application processor
  • GPU graphics processing unit
  • DSS display subsystem
  • the number of sub-pixels on the display screen is less than the number of color components of pixels in the non-SPR pixel format in the image to be displayed.
  • the number of sub-pixels on the display screen is less than the number of color components of image pixels of an image to be displayed in a non-SPR pixel format (for example, RGB format).
  • a non-SPR pixel format for example, RGB format
  • an RGB image with a resolution of 1920 ⁇ 1080 where the number of color components of the image pixels is 1920 ⁇ 1080 ⁇ 3
  • the corresponding sub-pixels on a display screen with a resolution of 1920 ⁇ 1080 may only be 1920 ⁇ 1080 ⁇ 2 pieces.
  • the number of sub-pixels indicated by the union of the sub-images of the above-mentioned SPR pixel format is also less than the number of color components of the image pixels of the image to be displayed.
  • the number of sub-pixels indicated by the union of the sub-images of the aforementioned SPR pixel format is equal to the number of sub-pixels on the display screen.
  • the display screen is displayed at a resolution smaller than its maximum resolution, it is usually displayed by combining several actual sub-pixels into one virtual sub-pixel. For example, several actual sub-pixels of the same color in the same column or on the same diagonal line as a whole (may be referred to as a virtual sub-pixel) are displayed.
  • the number of virtual sub-pixels is less than the number of image pixel color components.
  • the number of virtual sub-pixels may only be 1024 ⁇ 768 ⁇ 2, which is less than the number of color components of the image pixel 1024 ⁇ 768 ⁇ 3.
  • the number of sub-pixels indicated by the union of the sub-images of the above-mentioned SPR pixel format may generally be equal to the number of virtual sub-pixels.
  • the main controller when the main controller generates sub-images in SPR pixel format, the main controller usually needs to know the arrangement of the sub-pixels on the display screen, and the information of the arrangement can be written into the setting parameters of the main controller. For example, the information of the arrangement is written into the memory of the main controller or an external memory.
  • the main controller generates the third sub-image and the fourth sub-image in the SPR pixel format according to the pixel data of the non-SPR pixel format of the image to be displayed and the SPR algorithm.
  • the main controller sends the third sub-image to the first display drive circuit, and sends the fourth sub-image to the second display drive circuit.
  • the first display driving circuit drives the display screen to display the third sub-image in SPR mode according to the pixel data of the SPR pixel format of the third sub-image.
  • the second display driving circuit drives the display screen to display the fourth sub-image in SPR mode according to the pixel data of the SPR pixel format of the fourth sub-image.
  • the main controller renders the image to be displayed according to the SPR algorithm, and directly outputs the rendered image to the display driving circuit. Therefore, each display driving circuit can directly drive the display screen to display the rendered sub-image.
  • the rendered image is also an image in SPR pixel format.
  • the SPR algorithm module, splitter and MIPI interface can be integrated on the main controller.
  • the SPR algorithm module renders the image to be displayed according to the SPR algorithm to obtain the rendered image.
  • the SPR algorithm module outputs the rendered image to the splitter.
  • the splitter splits the rendered image into two sub-images, and then outputs the two sub-images to two mobile industry processor interfaces (MIPI) transmission interfaces (denoted as MIPI Tx) respectively.
  • MIPI mobile industry processor interfaces
  • a display drive circuit Each display driving circuit drives the display screen to display the sub-images received by the display driving circuit, and then presents the image to be displayed on the display screen.
  • FIG. 10 is another schematic diagram of the method for displaying images provided by the present application.
  • the main controller 101 outputs the rendered third sub-image and the fourth sub-image to the display driving circuit 102 and the display driving circuit 103, respectively.
  • the display drive circuit 102 drives the display screen 104 to display the first SPR image in the SPR mode
  • the display drive circuit 103 drives the display screen 104 to display the second SPR image in the SPR mode.
  • the SPR image means an image in the SPR pixel format.
  • the multi-display driving circuit system of the present application avoids the problems of FPC area growth, EMI and ESD caused by the establishment of a data channel between two display driving circuits for pixel data sharing. Improve the performance of multiple display drive circuit systems.
  • the main controller and display drive circuit provided by this application are described below.
  • the main controller provided in the embodiments of the present application may specifically be one or more processors, and these processors may be integrated on a chip to form a system on chip (SoC), and by processing the one or more processors
  • SoC system on chip
  • the circuit structure of the processor is designed, or appropriate code is configured, so that the one or more processors can execute the function of splitting the image to be displayed and sending it to the display driving circuit described in the foregoing embodiments.
  • FIG. 11 is a schematic structural block diagram of a main controller provided by some embodiments of the application.
  • the main controller 1000 includes a split unit 1100 and a communication interface 1200.
  • each unit of the main controller 1000 has the following functions:
  • the splitting unit 1100 is configured to split the image to be displayed into at least two sub-images in a non-sub-pixel rendering SPR pixel format, and each sub-image and adjacent sub-images include at least one column of overlapping image pixels;
  • the communication interface 1200 is configured to send the at least two sub-images to at least two display driving circuits.
  • each communication interface 1200 is used to send one of the at least two sub-images to one of the at least two display drive circuits.
  • the splitting unit 1100 may be a splitter implemented by hardware.
  • the communication interface 1200 may be a DSI interface.
  • the multiple display driving circuit system includes a first display driving circuit and a second display driving circuit, wherein the splitting unit 1100 is configured to split the image to be displayed Are the first sub-image and the second sub-image in a non-SPR pixel format, and the first sub-image and the second sub-image include at least one row of overlapping image pixels in the non-SPR pixel format;
  • the communication interface 1200 is configured to send the first sub-image to the first display drive circuit, and send the second sub-image to the second display drive circuit.
  • the column range of image pixels included in the first sub-image is [1,M+N 1 ]
  • the column range of image pixels included in the second sub-image is [MN 2 , Z]
  • Z is the total number of columns of image pixels included in the image to be displayed
  • Z, M, N 1 and N 2 are all positive integers, 1 ⁇ M ⁇ Z,Z>1.
  • N 1 N 2 .
  • FIG. 12 is a schematic structural diagram of the display driving circuit 2000. As shown in FIG. 12, the display driving circuit 2000 includes a communication interface 2100 and a processing unit 2200.
  • the communication interface 2100 is configured to receive the first sub-image in the non-SPR pixel format from the communication interface 1200 of the main controller 1000, and input the first sub-image in the non-SPR pixel format to the processing unit 2200;
  • the processing unit 2200 is configured to drive the display screen to display a part of the image to be displayed in SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image.
  • the processing unit 2000 may include a rendering unit 2202.
  • the rendering unit 2202 is configured to render the first sub-image in the non-SPR pixel format according to the SPR algorithm to obtain a part of the image to be displayed in the SPR pixel format.
  • the communication interface 2100 may be a DSI interface.
  • the functions of the processing unit 2200 can be implemented by hardware, or can be implemented by a combination of software and hardware.
  • the processing unit 2200 may be a logic circuit, an integrated circuit, or the like.
  • the processing unit 2200 may be a display driver integrated circuit (DDIC).
  • the processing unit 2200 may be a processor.
  • the processor implements the aforementioned functions of the processing unit 2200 by reading computer program codes or instructions stored in the storage unit.
  • the storage unit may be integrated in the processor, or may exist independently outside the processor.
  • FIG. 13 is a schematic structural block diagram of the display driving circuit 3000. As shown in FIG. 13, the display driving circuit 3000 includes a communication interface 3100 and a processing unit 3200.
  • the communication interface 3100 is configured to receive a second sub-image in a non-SPR pixel format from the main controller 1000, and input the second sub-image in a non-SPR pixel format to the processing unit 3200;
  • the processing unit 3200 is configured to drive the display screen to display another part of the image to be displayed in SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.
  • the communication interface 3100 may be a DSI interface
  • the processing unit 3200 may be a processor.
  • the functions of the processing unit 3200 can be implemented by hardware, or can be implemented by a combination of software and hardware.
  • the processing unit 3200 may be a logic circuit, an integrated circuit, etc., for example, the processor unit 3200 may be a DDIC.
  • the processing unit 3200 may be a processor.
  • the processor implements the functions of the processing unit 3200 by reading computer program codes or instructions stored in the storage unit.
  • the storage unit may be integrated in the processor, or may exist independently outside the processor.
  • the main controller 1000 further includes a processing unit 1300.
  • each unit of the main controller 1000 has the following functions:
  • the processing unit 1300 is configured to render the image to be displayed according to the SPR algorithm, and output the rendered image in the SPR pixel format;
  • the splitting unit 1100 is configured to split the rendered image in the SPR pixel format into at least two sub-images in the SPR pixel format;
  • the communication interface 1200 is configured to send at least two sub-images in the SPR pixel format to at least two display driving circuits, respectively.
  • the multi-display driving circuit system includes a first display driving circuit and a second display driving circuit, wherein the processing unit 1300 is configured to perform according to the non-SPR pixel format of the image to be displayed Pixel data of, generate the third sub-image and the fourth sub-image in SPR pixel format;
  • the communication interface 1200 is configured to send the third sub-image to the first display drive circuit, and send the fourth sub-image to the second display drive circuit.
  • the processing unit 1300 may include a rendering unit 1302, configured to render the image to be displayed according to the SPR algorithm, and output the rendered image in the SPR pixel format.
  • a rendering unit 1302 configured to render the image to be displayed according to the SPR algorithm, and output the rendered image in the SPR pixel format.
  • the functions of the processing unit 1300 may be implemented by hardware, or may be implemented by a combination of software and hardware.
  • the processing unit 1300 may be a logic circuit, an integrated circuit, etc., such as a DDIC.
  • the processing unit 1300 may be a processor.
  • the processor is realized by reading the computer program code stored in the storage unit.
  • the storage unit may be integrated in the processor, or may exist independently outside the processor.
  • each unit of the display driving circuit 2000 is as follows:
  • the communication interface 2100 is used to receive the third sub-image in the SPR pixel format from the communication interface 1200 of the main controller;
  • the processing unit 2200 is configured to drive the display screen to display the third sub-image in SPR mode according to the pixel data in the SPR pixel format of the third sub-image.
  • each unit of the display drive circuit 3000 is as follows:
  • the communication interface 3100 is used to receive the fourth sub-image in the SPR pixel format from the communication interface 1200 of the main controller;
  • the processing unit 3200 is configured to drive the display screen to display the fourth sub-image in SPR mode according to the pixel data in the SPR pixel format of the fourth sub-image.
  • the main controller and display driving circuit provided by the present application are described in detail above.
  • each display drive circuit uses two display drive circuits for description.
  • the function of each display drive circuit is similar to the function of the display drive circuit 2000 or the display drive circuit 3000 described above. No longer.
  • this application also provides an electronic device 5000, see FIG. 14.
  • FIG. 14 is a schematic structural diagram of an electronic device 5000 provided by this application.
  • the electronic device 5000 may include a flexible display screen 510, one or more processors (not shown), one or more memories (not shown), and one or more radio frequency circuits (not shown) .
  • the processor is used to process data, and specifically may be a central processing unit (CPU), or other general-purpose processors, application processors (AP), baseband processors, and digital signal processors (digital signal processors). signal processor, DSP), application specific integrated circuit (ASIC), field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • the general-purpose processor may be a microprocessor or any conventional processor. Specifically, each processor can be integrated on a chip, called a system-on-chip.
  • the memory is used to store data, which can be random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (programmable ROM, PROM), and erasable Programmable read only memory (erasable PROM, EPROM), electrically erasable programmable read only memory (EPROM, EEPROM), registers, hard disks, etc.
  • RAM random access memory
  • ROM read-only memory
  • PROM programmable read-only memory
  • EPROM erasable Programmable read only memory
  • EPROM electrically erasable programmable read only memory
  • registers hard disks, etc.
  • the radio frequency circuit is used to receive or transmit signals to interact with other devices.
  • the flexible display screen 510 may be the display screen described in each embodiment of the application, for example, the display screen 104. At least one application icon 511 and a virtual button 512 can be displayed on the flexible display screen.
  • the flexible display screen 510 has strong rigidity and can be bent in a certain arc when the display screen is folded or rolled, avoiding wrinkles, arches or creases caused by folding or curling, and can improve the user's visual experience.
  • FIG. 14 mainly shows a flexible display screen 510 of a foldable electronic device, and the processor, memory, and radio frequency circuit included in the flexible display screen 510 can be seen in FIG. 6.
  • the electronic device 5000 may also include other devices shown in FIG. 6, which are not limited in this application.
  • this application also provides a circuit system, which includes one or more processors.
  • the one or more processors are used to execute the processing executed by the main controller in the method for displaying images provided in the present application. For details, please refer to the method embodiments.
  • the present application also provides a circuit system, the circuit system includes one or more processors, and the one or more processors are used to read and execute a computer program stored in the memory to execute the The processing performed by the controller in the method of displaying images.
  • the memory may be located outside the circuit system or integrated in the circuit system, and the processor is connected to the memory through a circuit or a wire.
  • the memory may be one or more.
  • the circuit system further includes a communication interface.
  • the present application provides a computer-readable storage medium, which stores computer instructions.
  • the computer instructions run on the computer, the computer executes the display of images in the system with multiple display drive circuits provided in the present application. Methods.
  • the computer program product includes computer program code.
  • the computer program code runs on a computer, the computer executes the method for displaying images in a system with multiple display drive circuits provided in this application. .
  • the functional units in the various embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the technical solutions in the embodiments of the present application.
  • the functional units in the various embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer readable storage medium.
  • the technical solution of this application essentially or the part that contributes to the existing technology or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including Several instructions are used to make a computer device (which may be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the method described in each embodiment of the present application.

Abstract

一种电子设备和在多显示驱动电路系统中显示图像的方法。主控制器(101)将待显示图像拆分为至少两个子图像，每个子图像和其相邻子图像包含至少一列重叠的图像像素。主控制器(101)向至少两个显示驱动电路(102,103)发送该至少两个子图像，使得该至少两个显示驱动电路(102,103)可以共同驱动显示屏(104)以SPR方式显示待显示图像。或者，主控制器(101)向至少两个显示驱动电路(102,103)输出渲染后的SPR像素格式的至少两个子图像，使得该至少两个显示驱动电路(102,103)可以共同驱动显示屏(104)以SPR方式显示待显示图像。多个显示驱动电路(102,103)之间不需要建立数据通道共享像素数据，从而可以避免EPC区域增长、EMI、ESD等问题。

Description

在多显示驱动电路系统中显示图像的方法和电子设备
本申请要求于2019年02月23日提交国家知识产权局、申请号为PCT/CN2019/075982、申请名称为“Method for Cascade Driving System with Sub Pixel Rendering and Electronic Device”的PCT国际专利申请的优先权，在2019年9月5日提交中国国家知识产权局、申请号为201910837787.X、发明名称为“在多显示驱动电路系统中显示图像的方法和电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及图像显示领域，尤其涉及一种在多显示驱动电路系统中显示图像的方法和电子设备。
背景技术
数字图像通常包括若干个图像像素，每个图像像素包含有限个离散的颜色分量。传统的一个图像像素由红(red)、绿(green)、蓝(blue)三个颜色分量组成。根据数字图像对显示屏上呈阵列排布的多个屏幕像素进行驱动，可以将数字图像显示在显示屏上。
按照传统的子像素驱动方法进行显示时，一个屏幕像素包括红、绿、蓝三个子像素，每个子像素用于显示图像像素的一个颜色分量。为了提高显示屏的分辨率，就需要增加屏幕像素的数量。但是，在屏幕像素电路设计中，面板活动区域内单个屏幕像素的放置区域有限，屏幕像素的数量达到一定程度之后，很难再继续增加，显示屏的分辨率难以继续提升。为此，子像素渲染(sub pixel rendering,SPR)算法被提出。在SPR算法中，一个图像像素的三个颜色分量通过屏幕上具有更少子像素的一个SPR像素进行显示，却可以达到和传统屏幕像素的三个子像素一样的视觉效果。目前，一个SPR像素包括两个子像素。
SPR算法的基本原理是通过近旁的SPR像素的像素数据，例如，上、下、左、右的SPR像素的像素数据作为参照，计算出目标SPR像素的像素数据。但是，在包含两个显示驱动电路的系统(以下简称为双显示驱动电路系统)中，主控制器将图像一分为二再分别发送至两个显示驱动电路。而这两个显示驱动电路必须共享像素数据，才能根据SPR算法完成对图像的渲染。为了实现两个显示驱动电路之间共享像素数据，现有一种方法是在两个显示驱动电路之间搭建了一条数据通道(也即，接口)，专门用于两个显示驱动电路之间交互像素数据。
但是，为了便于搭建数据通道，就需要将显示驱动电路的面积做的更大，使得柔性线路板(flexible printed circuit,FPC)区域增加。此外，在这两个显示驱动电路之间搭建数据通道，不可避免地会带来两个显示驱动电路之间的电磁干扰(electro-magnetic interference,EMI)、静电放电(electro-static discharge,ESD)等问题。
发明内容
本申请提供一种电子设备和在多显示驱动电路的系统中显示图像的方法，可以避免多显示驱动电路的系统显示图像时的FPC区域增长、EMI、ESD的问题。
第一方面，本申请提供一种电子设备，包括主控制器、显示屏和至少两个显示驱动电路，所述至少两个显示驱动电路驱动所述显示屏显示图像，其中，
所述主控制器，用于将待显示图像拆分为非子像素渲染SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像，其中，每个子图像和相邻子图像包括至少一列重叠的图像像素；
所述至少两个显示驱动电路中的每个显示驱动电路，用于从所述主控制器接收所述至少两个子图像中的一个子图像，并根据所述一个子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动所述显示屏显示的各个部分共同呈现所述待显示图像。
应理解，所述多显示驱动电路的系统即是包含了多个显示驱动电路的系统。其中，多显示驱动电路系统中可以包括两个或两个以上的显示驱动电路。
在本申请的技术方案中，电子设备中的主控制器将待显示图像拆分为至少两个子图像，每个子图像包含了和其相邻子图像交界处的且属于所述相邻子图像的一列或多列图像像素。主控制器将所述至少两个子图像发送给多显示驱动电路系统的至少两个显示驱动电路。由于每个显示驱动电路接收到的子图像都包含和其相邻子图像的交界处的且属于所述相邻子图像的一列或多列图像像素，从而，每个显示驱动电路可以根据接收到的子图像所包含的非SPR像素，基于SPR技术的原理，驱动显示屏以SPR方式显示该子图像。该至少两个显示驱动电路的每个显示驱动电路驱动显示屏显示待显示图像的一部分，从而该至少两个显示驱动电路驱动显示屏所显示的各个部分共同呈现出待显示图像。可见，多显示驱动电路系统中的显示驱动电路之间不需要通过建立数据通道，就可以实现对图像的显示，从而也避免了由于建立数据通道所带来的FPC区域增长，以及EMI、ESD等问题。
结合第一方面，在第一方面的某些实现方式中，所述电子设备具体包括第一显示驱动电路和第二显示驱动电路，其中，所述主控制器，用于将所述待显示图像拆分为非SPR像素格式的第一子图像和第二子图像，并向所述第一显示驱动电路发送所述第一子图像，向所述第二显示驱动电路发送所述第二子图像，其中，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素；
所述第一显示驱动电路，用于根据所述第一子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分；
所述第二显示驱动电路，用于根据所述第二子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述待显示图像的另一部分。
结合第一方面，在第一方面的某些实现方式中，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素，包括：所述第一子图像包含的图像像素的列范围为[1,M+N 1]，所述第二子图像包含的图像像素的列范围为[M-N 2,Z]，其中，Z为所述待显示图像包括的图像像素的总列数，Z,M,N 1和N 2均为正整数,1<M<Z,Z>1。
在一种实现方式中，N 1＝N 2，表示第一子图像包含的其相邻的第二子图像的图像像素的列数，和第二子图像包含的其相邻的第一子图像的图像像素的列数相等。
可选地，M＝Z/2,表示两个显示驱动各自驱动显示屏显示待显示图像的一半。
在第一方面的某些实现方式中，N＝8或16。
第二方面，提供了另一种电子设备，包括主控制器、显示屏和至少两个显示驱动电路，其中，所述主控制器用于根据待显示图像的非SPR像素格式像素数据，生成SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像；
所述至少两个显示驱动电路中的每个显示驱动电路，用于从所述主控制器接收所述至少两个子图像中的一个子图像，并驱动所述显示屏以SPR方式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动所述显示屏显示的各个部分共同呈现所述待显示图像。
在本申请的技术方案中，电子设备中的主控制器通过向多显示驱动电路系统中的每个显示驱动电路输出渲染后的子图像(也即，SPR像素格式的子图像)，从而每个显示驱动电路可以根据接收到的子图像的SPR像素格式的像素数据，直接驱动显示屏以SPR方式显示所接收到的子图像。多显示驱动电路系统中的每个显示驱动电路驱动显示屏显示一个子图像，从而该至少两个显示驱动电路驱动显示屏所显示的各个子图像共同呈现出待显示图像。可见，多显示驱动电路系统中的显示驱动电路之间不需要通过建立数据通道，就可以实现对图像的显示，从而也避免了由于建立数据通道所带来的FPC区域增长，以及EMI、ESD等问题。
结合第二方面，在第二方面的某些实现方式中，所述电子设备包括第一显示驱动电路和第二显示驱动电路，其中，所述主控制器，用于根据待显示图像的非SPR像素格式的像素数据，生成SPR像素格式的第三子图像和第四子图像，并向所述第一显示驱动电路发送所述第三子图像，向所述第二显示驱动电路发送所述第四子图像；
所述第一显示驱动电路，用于驱动所述显示屏以SPR方式显示所述第三子图像；
所述第二显示驱动电路，用于驱动所述显示屏以SPR方式显示所述第四子图像。
第三方面，本申请提供一种在多显示驱动电路系统中显示图像的方法，所述多显示驱动电路系统包括主控制器、显示屏和至少两个显示驱动电路，所述方法包括：所述主控制器将待显示图像拆分为非子像素渲染SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像，其中，每个子图像和相邻子图像包括至少一列重叠的图像像素；所述至少两个显示驱动电路中的每个显示驱动电路，从所述主控制器接收所述至少两个子图像中的一个子图像，并根据所述一个子图像的非SPR像素格式的像素数据，驱动所述显示屏以SPR方式式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动所述显示屏显示的各个部分共同呈现所述待显示图像。
应理解，第三方面的在多显示驱动电路系统中显示图像的方法，和第一方面的电子设备基于相同的发明构思，因此第三方面的技术方案能够取得的有益技术效果，可以参考第一方面的说明，不再赘述。
结合第三方面，在第三方面的某些实现方式中，所述多显示驱动电路系统包括第一显示驱动电路和第二显示驱动电路，其中，所述主控制器将待显示图像拆分为非SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像，包括：
所述主控制器将所述待显示图像拆分为非SPR像素格式的第一子图像和第二子图像，并向所述第一显示驱动电路发送所述第一子图像，向所述第二显示驱动电路发送所述第二子图像，其中，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素；
所述至少两个显示驱动电路中的每个显示驱动电路，从所述主控制器接收所述至少两个子图像中的一个子图像，并根据所述一个子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分，包括：
所述第一显示驱动电路根据所述第一子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分；
所述第二显示驱动电路根据所述第二子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述待显示图像的另一部分。
结合第三方面，在第三方面的某些实现方式中，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素，包括：所述第一子图像包含的图像像素的列范围为[1,M+N 1]，所述第二子图像包含的图像像素的列范围为[M-N 2,Z]，其中，Z为所述待显示图像包括的图像像素的总列数，Z,M，N 1和N 2均为正整数，1<M<Z,Z>1。
结合第三方面，在第三方面的某些实现方式中，N 1＝N 2。
第四方面，本申请提供一种在多显示驱动电路系统中显示图像的方法，所述多显示驱动电路系统包括主控制器、显示屏和至少两个显示驱动电路，所述方法包括：所述主控制器根据待显示图像的非SPR像素格式像素数据，生成SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像；所述至少两个显示驱动电路中的每个显示驱动电路从所述主控制器接收所述至少两个子图像中的一个子图像，并驱动显示屏以SPR方式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动显示屏显示的各个部分共同呈现所述待显示图像。
应理解，第四方面的在多显示驱动电路系统中显示图像的方法，和第二方面的电子设备基于相同的发明构思，因此第四方面的技术方案能够取得的有益技术效果，可以参考第二方面的说明，不再赘述。
结合第四方面，在第四方面的某些实现方式中，所述多显示驱动电路系统包括第一显示驱动电路和第二显示驱动电路，其中，所述主控制器根据所述待显示图像的非SPR像素格式的像素数据，生成SPR像素格式的第三子图像和第四子图像，并向所述第一显示驱动电路发送所述第三子图像，向所述第二显示驱动电路发送所述第四子图像；所述第一显示驱动电路根据第三子图像的SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示第三子图像；所述第二显示驱动电路根据第四子图像的SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示第四子图像。
第五方面，本申请提供一种电路系统，包括一个或多个处理器。所述一个或多个处理器用于读取并执行存储器中存储的计算机程序，以执行第三方面或其任意可能的实现方式中的方法，或者，执行第四方面或其任意可能的实现方式中的方法。
可选地，所述存储器可以位于所述电路系统之外，或者集成在所述电路系统中。
可选地，所述存储器可以为一个或多个。
进一步可选地，所述电路系统还包括一个或多个通信接口。
第六方面，本申请提供一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机指令，当计算机指令在计算机上运行时，使得计算机执行第三方面或其任意可能的实现方式中的方法，或者，执行第四方面或其任意可能的实现方式中的方法。
第七方面，本申请提供一种计算机程序产品，所述计算机程序产品包括计算机程序代 码，当所述计算机程序代码在计算机上运行时，使得计算机执行第三方面或其任意可能的实现方式中的方法，或者，执行第四方面或其任意可能的实现方式中的方法。
附图说明
图1是RGB像素的示意图。
图2为SPR像素的排列方式的一个示例。
图3是双显示驱动电路的系统100的示意性框图。
图4是第一图像和第二图像之间需要共享像素数据的示意图。
图5是两个显示驱动电路之间共享像素数据的示意图。
图6为本申请提供的电子设备7000的示意性结构图。
图7为本申请提供的在多显示驱动系统中显示图像的方法的示例。
图8为在双显示驱动电路系统中显示图像的方法的示意图。
图9是本申请提供的显示图像的方法的一个示例。
图10是本申请提供的显示图像的方法另一个示意图。
图11为本申请提供的主控制器的示意性结构框图。
图12为显示驱动电路2000的示意性结构框图。
图13为显示驱动电路3000的示意性结构框图。
图14为本申请提供的电子设备5000的示意性结构图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
为了便于理解技术方案，首先对本申请涉及到的一些概念和技术进行简单介绍。
在本申请中，“图像像素”是指待显示图像中的像素，即以一定的数值表达的图像上的一个点。而“屏幕像素”是指显示屏上用于显示一个图像像素的物理显示单元。传统上，一个图像像素对应一个屏幕像素。传统上，一个图像像素包括红、绿、蓝三个颜色分量，每个颜色分量用一个数值表示该颜色的色阶或者灰度值。在常见的24位颜色显示中，每一个颜色分量用8比特表示，对应为十进制数的0～255。图像像素也可以包括其它的分量，例如，伽马分量。图像像素还可以包括多于三个颜色分量，例如，使用2种绿色分量、或者2种蓝色分量、或者引入黄色分量等。
在显示屏显示图像时，待显示图像由主控制器发送到显示驱动电路，由显示驱动电路将待显示图像中的像素数据转化为调控屏幕像素亮度的电压或电流信号，发送到显示屏，从而控制显示屏显示该图像。这里，主控制器可以为一个或多个处理器，具体可以是手机的主芯片，即片上系统(system on chip,SoC)。例如，高通公司的骁龙系列芯片，或者华为海思半导体公司的麒麟系列芯片。显示驱动电路具体可以为显示驱动集成电路(display driver integrated circuit,DDIC)，例如，德州仪器公司的CD40110BE、微芯片(Microchip)公司的MM5450YV等。
参见图1，图1是显示屏上传统的屏幕像素的示意图。传统的屏幕像素一般情况下由红色、绿色和蓝色三个子像素组成，称为红绿蓝(red green blue,RGB)像素。在传统技术中，每个子像素显示对应图像像素的一个颜色分量，三个子像素共同呈现图像像素的颜 色。在传统技术中，一个屏幕像素也可能包括更多的子像素，例如，某些显示屏上，一个屏幕像素除了红绿蓝之外，还加入了白色子像素，这种形式的屏幕像素被称为红绿蓝白(red green blue white,RGBW)像素。RGBW像素由于设置了专门的白色子像素，所以可以显示更为纯净的白色。在另一些显示屏上，一个屏幕像素包括一个红色子像素、一个草绿色子像素、一个祖母绿子像素和一个蓝色子像素，这被称为红绿绿蓝(red green green blue,RGGB)像素。由于人眼对于绿光最为敏感，所以设置两个绿色子像素能表现更为丰富的颜色。
图像像素的颜色分量，通过主芯片和/或显示驱动电路转化为屏幕上对应子像素的透光率(针对液晶屏)或者发光亮度(针对发光二极管(light emitting diode,LED)屏)实现显示。
相比于传统的显示技术，在子像素渲染(sub pixel rendering,SPR)技术中，通常每个像素由两个子像素组成，通常以“红+绿”、“绿+蓝”或者“蓝+红”的顺序周期排列而成。这种由两个子像素组成的像素称为SPR像素。基于不同的设计，SPR像素的排列方式可以不同。
参见图2，图2为SPR像素的排列方式的一个示例。图2示出了3行4列的SPR像素，每个SPR像素由两个子像素组成。其中，第2列和第4列的SPR像素的排列方式相同。第1列和第3列的SPR像素的第一个子像素列中的子像素的排列方式相同，第二个子像素列的子像素的排列方式不同。
SPR技术的基本原理是通过近旁像素的像素数据作为参照，计算出目标像素的像素数据。换句话说，一个目标像素的各子像素的数值，是根据其近旁的像素的子像素的数值计算得到的。其中，一个像素的各子像素的数值，也称为该像素的像素数据。这是因为在SPR技术中，每个屏幕像素都有缺失的颜色，因此需要借助近旁的屏幕像素实现颜色的显示。
以图2中所示的灰色填充的SPR像素为目标像素为例，这个目标像素的像素数据可以参照其邻近像素的像素数据计算得到。例如，以其上、下、左、右以及四个对角的像素作为参照，计算出这个目标像素的像素数据。又例如，以其上、下、左、右的像素作为参照，计算该目标像素的像素数据等。具体来说，可以对目标像素的多个相邻图像像素中的一个颜色分量求平均，得到相应显示屏上的子像素的像素数据。例如，图2中的屏幕像素m和n，图中1、2、3分别代表红、绿、蓝三种子像素。可以看出m缺失红色子像素，于是旁边的n像素中的红色子像素的显示数据，可以通过m和n对应的图像像素的红色分量求平均得出。通过这种方式，可以实现原始的RGB图像和屏幕实际显示的SPR图像的映射。当然，这只是一个简单的示例，现在的SPR算法远比这种方式复杂，但是基本原理是一样的。SPR算法有很多种，本申请各实施例对此不作限定。
本领域技术人员可以理解，在SPR技术中，显示屏上的子像素数量少于非SPR像素格式(例如，RGB格式)的待显示图像的图像像素的颜色分量的数量。例如，一幅分辨率为1920×1080的RGB图像，其中，图像像素的颜色分量的数量为1920×1080×3，而对应的分辨率为1920×1080的显示屏上的子像素，可能只有1920×1080×2个。当显示屏以小于其最大分辨率的分辨率显示时，可以以若干实际子像素合并为一个虚拟子像素进行显示。例如，会将同一列或者同一对角线上若干相同颜色的实际子像素当作一个整体(可 以称为一个虚拟子像素)进行显示。此时，应理解，虚拟子像素的数量少于图像像素颜色分量的数量。例如在一个最大分辨率1920×1080的显示屏上显示一幅分辨率为1024×768的图像，则虚拟子像素的数量可能只有1024×768×2个，少于图像像素的颜色分量的数量1024×768×3。
近年来，柔性显示屏由于其轻薄、不易碎、可折叠以及可卷曲等优点，被广泛应用手机等终端产品中。然而，现有的柔性显示屏较少地使用于可折叠和可卷曲的终端产品中，称为可折叠终端设备。
可折叠终端设备在进行图像显示时，由于柔性显示屏可灵活折叠的特点，一般考虑采用多显示驱动电路系统。一个多显示驱动电路系统，通常包括主控制器、至少两个显示驱动电路以及显示屏。所述至少两个显示驱动电路共同驱动显示屏进行图像显示。
但是，基于SPR技术的基本原理，通过多显示驱动电路进行图像显示时，显示驱动电路之间需要共享像素数据。下面结合图3和图4，以双驱动显示电路系统为例进行说明。
参见图3，图3为双驱动显示电路的系统100的示意图。如图3所示，系统100包括主控制器101、显示驱动电路102和显示驱动电路103以及显示屏104。主控制器将待显示图像一分为二，得到第一图像和第二图像。然后，主控制器分别将第一图像和第二图像发送给显示驱动电路102和显示驱动电路103，由显示驱动电路102和显示驱动电路103驱动显示屏对第一图像和第二图像进行显示，从而在显示屏上呈现出所述待显示图像。
根据上文介绍的SPR技术的基本原理，显示驱动电路102和显示驱动电路103之间需要共享像素数据，才能满足SPR算法的需求。下面结合图4说明原因。
参见图4，图4是第一图像和第二图像之间需要共享像素数据的示意图。应理解，在多显式驱动电路系统中，每个显示驱动电路驱动显示屏显示待显示图像的一部分。在图3所示的系统100的基础上，假设图3中的显示驱动电路102用于驱动显示屏显示待显示图像的一部分(以下称为第一图像)，显示驱动电路103用于驱动显示屏显示待显示图像的另外一部分(以下称为第二图像)。
如图4所示，显示驱动电路102若要显示第一图像，需要计算第一图像的全部SPR像素的像素数据，或者说，需要计算第一图像包含的每个SPR像素的子像素的数值。其中，第一图像的全部SPR像素显然包括第一图像的最右边一列的SPR像素(如图4中的填充部分的像素)，而最右边一列的SPR像素的像素数据的计算，除了需要参照其上边、下边、左边的SPR像素的子像素的取值，还需要参照其右边的SPR像素的子像素的取值。但是，其右边的像素位于第二图像，被主控制器101发送到了显示驱动电路103。
同样地，显示驱动电路103若要显示第二图像，需要计算第二图像包含的全部SPR像素的像素数据，其中包括第二图像的最左边一列SPR像素的像素数据。而第二图像的最左边一列的SPR像素的像素数据，是参照其上边、下边、右边的SPR像素的像素数据，及其左边的SPR像素的像素数据计算得到的。类似地，最左边一列的SPR像素位于第一图像，被主控制器101发送到了显示驱动电路102。
由此可见，显示驱动电路102和显示驱动电路103之间共享对方所需的像素数据，才能采用SPR技术完成像素渲染，对第一图像和第二图像分别进行显示，进而实现对待显示图像的显示。
为此，现有一种技术方案提出，在系统100的两个显示驱动电路之间搭建用于像素数 据传输的接口(或者，数据通道)，以实现像素数据的共享，如图5所示。
参见图5，图5是两个显示驱动电路之间共享像素数据的示意图。在两个显示驱动电路(如图5中所示的显示驱动电路1和显示驱动电路2)之间建立用于共享像素数据的接口(interface)，每个显示驱动电路可以通过这个接口将另一个显示驱动电路需要的像素数据共享给对方。
但是，图5所示的结构虽然解决了像素数据共享的问题，但是带来另一些问题。例如，在两个显示驱动电路之间搭建接口，需要将显示驱动电路的区域做的更大一些，以在每个显示驱动电路上留出建立接口的区域，这将使得显示驱动的柔性线路板(flexible printed circuit，FPC)区域增长。同时，由于显示驱动电路1和显示驱动电路2之间物理距离较近，每个显示驱动电路上的信号传输将会通过接口给对方带来干扰，从而将不可避免地带来EMI、ESD的问题。
基于多显示驱动电路系统在显示图像时的上述现状，本申请提供一种具有多显示驱动电路系统的电子设备，以及通过多显示驱动电路系统显示图像的方法，旨在避免显示屏的FPC区域增长、EMI以及EMD等问题。
下面对本申请的技术方案进行详细说明。
参见图6，图6为本申请提供的电子设备7000的示意性结构图。如图6所示，电子设备7000包括一个或多个处理器7001和一个或多个收发器7002。
可选地，电子设备7000还包括一个或多个存储器7003。其中，处理器7001、收发器7002和存储器7003之间可以通过内部连接通路互相通信，传递控制和/或数据信号。存储器7003用于存储计算机程序，处理器7001用于从存储器7003中调用并运行计算机程序，以使电子设备执行本申请提供的显示图像的方法。
其中，处理器7001可以包括基带处理器70071和应用处理器70072。
可选地，处理器7001还可以包括图形处理单元(graphics processing unit,GPU)、图像信号处理器(image signal processor,ISP)、显示子系统(display subsystem,DSS)、神经网络处理单元(neural network processing unit,NPU)等。可选地，上述各种处理单元可以集成在一块芯片上，构成一个片上系统(system on chip,SoC)。
可选地，电子设备7000还可以包括天线7004。其中，收发器7002通过天线7004发送或接收信号。
可选地，处理器7001和存储器7003可以合成一个处理装置，处理器7001用于执行存储器7003中存储的程序代码实现相应功能。具体实现时，存储器7003也可以集成在处理器7001中，也即片内存储器。或者，存储器7003独立于处理器7001，位于处理器7001之外，也即片外存储器。
除此之外，为了使得终端设备的功能更加完善，终端设备7000还可以包括输入单元7006、显示单元7007、音频电路7008、摄像头7009和传感器7010等中的一个或多个。音频电路还可以包括扬声器70082、麦克风70084等。
其中，输入单元7006为信号输入接口，显示单元7007为信号输出接口，例如显示屏。所述显示单元7007输出的信号可以包括音频、视频、图像等。
在本申请中，显示单元7007可以为AMOLED，AMOLED包括模组70072。其中，模组70072上可以设置有多个显示驱动电路，如图6中所示的显示驱动电路1，….，显 示驱动电路n。n≥2。此外，模组70072上还包括OLED 70074。
另外，AMOLED可以为柔性显示屏。也即，电子设备7000可以为可折叠电子设备。
本申请的技术方案可以应用于图6所示的可折叠电子设备中，通过多显示驱动电路系统显示图像。下面做详细介绍。
在以下各实施例中，主控制器可以指一个或者多个处理器，具体可以为片上系统(system on chip,SoC)。
在本申请提供的一些实施例中，由电子设备的主控制器生成非SPR像素格式(例如RGB格式)的至少两个子图像，并将所述至少两个子图像发给显示驱动电路，然后由显示驱动电路来运用SPR算法驱动显示屏显示图像。
具体来说，主控制器将待显示图像拆分为非SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像。其中，每个子图像和相邻子图像包括至少一列重叠的图像像素。
应理解，所述至少一列重叠的图像像素，是指每个子图像和其相邻子图像交界处的一列或多列图像像素。
例如，假设将待显示图像横向拆分为多个子图像，除了位于边缘位置的两个子图像，每个子图像至少包含了其左边相邻子图像的最右边一列的图像像素，以及右边相邻子图像的最左边一列的图像像素。
位于左边缘位置的子图像，至少包含了右边相邻子图像最左边一列的图像像素。位于右边缘位置的子图像，至少包含了其左边相邻子图像最右边一列的图像像素。
另外，对于像素阵列而言，行和列是相对的概念。本领域技术人员应当理解，像素阵列的“列”也可以替换描述为“行”，这种变化不应当对本申请的技术方案造成限定。下文均按照“列”进行描述。
所述至少两个显示驱动电路中的每个显示驱动电路，从主控制器接收所述至少两个子图像中的一个子图像，并根据所述一个子图像的所述非SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述待显示图像的一部分。其中，所述至少两个显示驱动电路驱动显示屏显示的各个部分呈现所述待显示图像。
其中，每个显示驱动电路驱动显示屏所显示的部分，和该显示驱动电路从主控制器接收到的子图像对应。换句话说，每个显示驱动电路从主控制器接收到一个子图像，并根据该子图像包含的图像像素的像素数据，驱动显示屏以SPR方式显示该子图像，从而呈现待显示图像的一部分。所述至少两个显示驱动电路各自驱动显示屏显示(或者说，呈现)待显示图像的一部分，这多个部分共同呈现出所述待显示图像。
应理解，显示屏以SPR方式显示子图像，也即显示屏采用SPR技术显示子图像。
可选地，在一种实现中，主控制器可以根据显示驱动电路的数量将待显示图像拆分为至少两个子图像，并向每个显示驱动电路发送所述至少两个子图像中的一个子图像。相应地，每个显示驱动电路从主控制器接收一个子图像，并控制显示屏显示待显示图像的一部分。
或者，在另一种实现中，主控制器将待显示图像拆分为至少两个子图像，并向所述至少两个显示驱动电路中的部分显示驱动电路发送一个以上的子图像，向另外一些显示驱动电路中的每个显示驱动电路发送一个子图像。相应地，接收到一个以上的子图像的显示驱 动电路可以驱动显示屏显示待显示图像的多个部分。接收到一个子图像的显示驱动电路中的每个显示驱动电路可以驱动显示屏显示待显示图像的一个部分。从而，显示屏显示的各个部分共同呈现出所述待显示图像。
结合图7进行说明。
参见图7，图7为本申请提供的在多显示驱动电路的系统中显示图像的方法的示例。图7中以多显示驱动电路的系统包括3个显示驱动电路为例进行说明。当然，所述多显示驱动电路系统可以包括其它数量的显示驱动电路。
如图7所示，主控制器将待显示图像拆分为3个子图像，分别为第一子图像、第二子图像和第三子图像，并分别发送给3个显示驱动电路。其中，第一子图像和相邻的第二子图像具有重叠的图像像素。第二子图像和相邻的第一子图像以及相邻的第三子图像均具有重叠的图像像素。具体地，每两个相邻子图像包括至少一列重叠的图像像素。
如上文所述，每两个相邻的子图像所包含的所述至少一列重叠的图像像素，应当为这两个相邻子图像交界部分的一列或多列图像像素。
如图7所示，第一子图像至少应当包含第二子像素的最左边一列的图像像素。第二子图像至少应当包含第一子图像的最右边一列的图像像素。同时，第二子像素至少应当包含第三子图像的最左边一列的图像像素。第三子图像至少应当包含第二子图像的最右边一列的图像像素。
显示驱动电路1从主控制器接收第一子图像。根据第一子图像的非SPR像素格式的像素数据，显示驱动电路1计算在显示屏上显示待显示图像的第一部分所需的SPR像素格式的像素数据，并驱动显示屏显示所述第一部分。
应理解，显示驱动电路1计算SPR像素的像素数据的原理可以参考上文描述的SPR算法的基本原理，如图2的说明，这里不再赘述。
类似地，显示驱动电路2从主控制器接收第二子图像。根据第二子图像的非SPR像素格式的像素数据，显示驱动电路2计算在显示屏上显示待显示图像的第二部分所需的SPR像素格式的像素数据，并驱动显示屏显示所述第二部分。
显示驱动电路3从主控制器接收第三子图像。根据第三子图像的非SPR像素格式的像素数据，显示驱动电路3计算在显示屏上显示待显示图像的第三部分所需的SPR像素格式的像素数据，并驱动显示屏显示所述第三部分。
需要理解的是，显示驱动电路1，显示驱动电路2和显示驱动电路3分别驱动显示屏显示待显示图像的一部分，从而在显示屏上呈现完整的待显示图像。
在这些实施例中，由于主控制器将待显示图像拆分为具有重叠图像像素的多个子图像，从而将每个子图像发送给显示驱动电路后，每个显示驱动电路获得了多于需要显示的图像部分的图像像素。因此，需要显示的图像部分的边缘的图像像素对于每个显示驱动电路是已知的，从而显示驱动电路之间不再需要共享像素数据，也能计算出待显示图像的每个部分的SPR像素数据，从而驱动显示屏进行显示。
另外，应理解，第一子图像包含的像素的列数大于第一部分包含的像素的列数。第二子图像包含的像素的列数大于第二部分包含的像素的列数。第三子图像包含的像素的列数大于第三部分包含的像素的列数。
换句话说，每个显示驱动电路获得的子图像的图像像素，相对于该显示驱动电路驱动 显示屏所显示的部分多出的图像像素，即是本申请所说的“重叠的图像像素”。
下面再结合图8，说明本申请提供的显示图像的方法在双显示驱动电路系统中的应用。
参见图8，图8为在双显示驱动电路系统中显示图像的方法的示意图。
在双显示驱动电路系统中，主控制器将待显示图像拆分为非SPR像素格式的第一子图像和第二子图像，其中，第一子图像和第二子图像包括至少一列重叠的图像像素。
主控制器向双显示驱动电路系统中的第一显示驱动电路发送第一子图像，向第二显示驱动电路发送第二子图像。
第一显示驱动电路从主控制器接收第一子图像，根据第一子图像的所述非SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述待显示图像的一部分。
同时，第二显示驱动电路从主控制器接收第二子图像，根据第二子图像的所述非SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述待显示图像的另一部分。
其中，在图8中，第一显示驱动电路驱动显示屏显示的部分称为第一图像，第二显示驱动电路驱动显示屏显示的另一部分，称之为第二图像。
可选地，非SPR像素格式可以为RGB像素格式。
具体地，主控制器将待显示图像拆分为多个子图像，并分别发送给多个显示驱动电路。假设所述多个显示驱动电路驱动显示屏显示所述待显示图像的多个部分，所述多个部分包含的像素的列范围如下：
[1,L 1],[L 1+1,L 2],…,[L n,Z],其中，L 1,L 2,…,Ln均为正整数。
则，所述多个子图像包含的像素的列范围可以如下：
[1,L 1+P 1],[L 1+1-P 2,L 2+P 3],…,[L n-P n,Z]，其中，P 1，P 2，P 3,P n均为正整数。
以第一子图像和第二子图像为例，第一子图像和第二子图像包含的图像像素的列范围可以通过如下方式计算：
第一子图像的包含的图像像素的列范围为[1,M+N 1]，第二子图像包含的图像像素的列范围为[M-N 2,Z]。
其中，Z为所述待显示图像包含的图像像素的总列数，Z,M,N 1和N 2均为正整数，1<M<Z,Z>1。
应理解，M可以为第1列和第Z列之间的任意一列。
例如，假设待显示图像共包括100列图像像素(也即，Z＝100)，N 1＝N 2＝1，M＝50，主控制器输出的第一子图像包含了第1列至第51列的图像像素，也即，第一子图像包含的图像像素的列范围为[1,51]。第二子图像包含了第49列至第100列的图像像素，也即，第二子图像包含的图像像素的列范围为[49,100]。
第一显示驱动电路根据第一子图像的非SPR像素格式的像素数据，驱动显示屏以SPR方式显示待显示图像的一部分。具体地，第一显示驱动电路根据从主控制器接收到的第1列至第51列的图像像素，驱动显示屏显示待显示图像的第1列至第50列的图像像素对应的图像部分。
此外，第二显示驱动电路根据第二子图像的非SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述待显示图像的另一部分。具体地，第二显示驱动电路根据从主控制器接收到的第49列至第100列的图像像素，驱动显示屏显示待显示图像的第51列至第100列的图像像素对应的图像部分。
可见，显示屏上显示待显示图像的第1列至第50列的图像像素对应的图像部分，以及待显示图像的第51列至第100列的图像像素对应的图像部分，则呈现出所述待显示图像。
应理解，在这个示例中，M＝Z/2，因此，第一显示驱动电路和第二显示驱动电路各自驱动显示屏显示了待显示图像的一半。
需要说明的是，在图7和图8中，为了便于示出重叠部分，相邻子图像之间错开显示。实际上，相邻两个子图像的边界部分的一个或多个列是完全重叠的。
参见图9，图9是本申请提供的显示图像的方法的一个示例。如图9所示，待显示图像上所示的虚线表示两个显示驱动电路驱动显示屏分别需要显示的部分的分界线。例如，第一显示驱动电路驱动显示屏显示虚线左边的图像，第二显示驱动电路驱动显示屏显示虚线右边的图像。
以图8中所示架构为例，主控制器101将待显示图像进行拆分，输出具有重叠图像像素的第一子图像和第二子图像。其中，所述重叠的图像像素为第一子图像和第二子图像的分界部分的一列或多列图像像素。主控制器101将第一子图像发送给显示驱动电路102，并将第二子图像发送给显示驱动电路103。
可见，显示驱动电路102不仅获得了虚线左边的左图像的全部图像像素，还获得了分界线近旁的图像像素，其中，所述分界线近旁的图像像素主要是指分界线右边的一列或多列图像像素。同样地，显示驱动电路103也同时获得了虚线右边的右图像的全部图像像素，同时还获得了分界线左边的一列或多列图像像素。
因此，显示驱动电路102根据获得的第一子图像的全部图像像素，可以计算出左图像的SPR像素格式的全部像素的像素数据，从而驱动显示屏104以SPR方式显示所述左图像。显示驱动电路103根据获得的第二子图像的全部图像像素，可以计算出右图像的SPR像素格式的全部像素的像素数据，从而驱动显示屏104以SPR方式显示所述右图像。
应理解，图9中所示的分界线可以为待显示图像的中心位置或非中心位置。
可选地，在具体实现时，主控制器和显示驱动电路之间可以通过显示器串行接口(display serial interface,DSI)进行交互，或者也可以采用DSI之外的其它通信接口，本申请不作限定。
在本申请提供的另一些实施例中，主控制器根据待显示图像的非子像素渲染SPR像素格式像素数据，生成SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像。
所述至少两个显示驱动电路中的每个显示驱动电路，从主控制器接收所述至少两个子图像中的一个子图像，并驱动显示屏显示所述接收到的子图像。
应理解，在之前叙述的实施例中，子图像为非SPR像素格式(例如，RGB格式)的。而在本实施例中，主控制器根据SPR算法，将待显示图像拆分为SPR像素格式的多个子图像。即由主控制器完成原始的非SPR像素格式(例如RGB格式)到SPR像素格式图像的映射。SPR像素格式的图像直接给出显示屏上各个子像素的显示数据，例如，各个子像素的色阶或者灰度值等。从而，显示驱动电路可以直接驱动显示屏显示从主控制器接收到的子图像。上述操作可以通过应用处理器(application processor,AP)实现，也可以通过图形处理单元(graphics processing unit,GPU)实现，还可以通过显示子系统(display subsystem, DSS)实现，本申请对此不作限定。本领域技术人员可以理解，上述各电路单元可以是分立的器件，也可以集成在一块芯片，例如手机的片上系统(system on chip,SoC)。
如之前所述，显示屏上的子像素数量，少于所述待显示图像中非SPR像素格式的像素的颜色分量的数量。本领域技术人员可以理解，在SPR技术中，显示屏上的子像素数量少于非SPR像素格式(例如RGB格式)的待显示图像的图像像素的颜色分量的数量。例如，一幅分辨率为1920×1080的RGB图像，其中图像像素的颜色分量的数量为1920×1080×3，而对应的分辨率为1920×1080的显示屏上的子像素，可能只有1920×1080×2个。相应的，上述SPR像素格式的子图像的并集所指示的子像素的数量，也少于待显示图像的图像像素的颜色分量的数量。
通常来说，上述SPR像素格式的子图像的并集所指示的子像素的数量，等于显示屏上子像素的数量。当显示屏以小于其最大分辨率的分辨率显示时，通常以若干实际子像素合并为一个虚拟子像素进行显示。例如，会将同一列或者同一对角线上若干相同颜色的实际子像素当作一个整体(可以称为一个虚拟子像素)进行显示。此时应理解，虚拟子像素的数量少于图像像素颜色分量的数量。例如在一个最大分辨率1920×1080的显示屏上显示一幅分辨率为1024×768的图像，则虚拟子像素的数量可能只有1024×768×2个，少于图像像素的颜色分量的数量1024×768×3。此时，上述SPR像素格式的子图像的并集所指示的子像素的数量，通常可以等于虚拟子像素的数量。
本领域技术人员可以理解，主控制器生成SPR像素格式的子图像，通常需要主控制器知道显示屏上子像素的排列方式，该排列方式的信息可以写入到主控制器的设置参数中，例如，将该排列方式的信息写入主控制器自带的存储器或者外置的存储器中。
下面继续以双显示驱动电路为例进行说明。
主控制器根据待显示图像的非SPR像素格式的像素数据和SPR算法，生成SPR像素格式的第三子图像和第四子图像。
主控制器向第一显示驱动电路发送所述第三子图像，向第二显示驱动电路发送第四子图像。
第一显示驱动电路根据第三子图像的SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述第三子图像。
第二显示驱动电路根据第四子图像的SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述第四子图像。
也即，在本实施例中，主控制器根据SPR算法对待显示图像进行渲染，并直接向显示驱动电路输出渲染后的图像。从而，每个显示驱动电路可以直接驱动显示屏显示渲染后的子图像即可。
这里，渲染后的图像，也即SPR像素格式的图像。
例如，可以在主控制器上集成SPR算法模块、拆分器以及MIPI接口。其中，SPR算法模块根据SPR算法对待显示图像进行渲染，得到渲染后的图像。SPR算法模块将渲染后的图像输出至拆分器(splitter)。拆分器将渲染后的图像拆分为两个子图像，再通过两个移动行业处理器接口(mobile industry processor interface,MIPI)发送接口(记作MIPI Tx)将所述两个子图像分别输出到两个显示驱动电路。每个显示驱动电路分别驱动显示屏显示该显示驱动电路接收到的子图像，进而在显示屏上呈现出所述待显示图像。
参见图10，图10是本申请提供的显示图像的方法另一个示意图。如图10所示，主控制器101分别向显示驱动电路102和显示驱动电路103输出渲染后的第三子图像和第四子图像。显示驱动电路102驱动显示屏104以SPR方式显示第一SPR图像，显示驱动电路103驱动显示屏104以SPR方式显示第二SPR图像。
这里，SPR图像表示SPR像素格式的图像。
以上对本申请提供的多显示驱动电路系统显示图像的方法进行了详细说明。和传统的多显示驱动电路系统相比，本申请的多显示驱动电路系统避免在两个显示驱动电路之间建立数据通道进行像素数据共享而带来的FPC区域增长、EMI以及ESD等问题，可以提升多显示驱动电路系统的性能。
下面介绍本申请提供的主控制器和显示驱动电路。
本申请实施例提供的主控制器，具体可以为一个或多个处理器，这些处理器可以集成在一个芯片上构成一个片上系统(system on chip,SoC)，通过对所述一个或多个处理器的电路结构进行设计，或者配置适当的代码，可以使所述一个或多个处理器执行上述各实施例描述的拆分待显示图像并发送给显示驱动电路的功能。
参见图11，图11为本申请一些实施例提供的主控制器的示意性结构框图。如图11所示，主控制器1000包括拆分单元1100和通信接口1200。
在一种实现方式中，主控制器1000的各单元具有如下功能：
拆分单元1100，用于将待显示图像拆分为非子像素渲染SPR像素格式的至少两个子图像，每个子图像和相邻子图像包括至少一列重叠的图像像素；
通信接口1200，用于向至少两个显示驱动电路发送所述至少两个子图像。
可选地，通信接口1200可以为一个或多个。当有多个通信接口1200时，其中，每个通信接口1200用于向所述至少两个显示驱动电路中的一个显示驱动电路发送所述至少两个子图像中的一个子图像。
在一种实现中，拆分单元1100可以为硬件实现的拆分器。通信接口1200可以为DSI接口。
可选地，在一种实现方式中，所述多显示驱动电路系统包括第一显示驱动电路和第二显示驱动电路，其中，所述拆分单元1100，用于将所述待显示图像拆分为非SPR像素格式的第一子图像和第二子图像，第一子图像和第二子图像包含至少一列重叠的非SPR像素格式的图像像素；
所述通信接口1200，用于向所述第一显示驱动电路发送所述第一子图像，向所述第二显示驱动电路发送所述第二子图像。
可选地，在一种实现方式中，所述第一子图像包含的图像像素的列范围为[1,M+N 1]，所述第二子图像包含的图像像素的列范围为[M-N 2,Z]，其中，Z为所述待显示图像包含的图像像素的总列数，Z,M,N 1和N 2均为正整数,1<M<Z,Z>1。
可选地，N 1＝N 2。
下面对本申请中涉及到的两个显示驱动电路进行说明。
参见图12，图12为显示驱动电路2000的示意性结构图。如图12所示，显示驱动电路2000包括通信接口2100和处理单元2200。
通信接口2100，用于从主控制器1000的通信接口1200接收非SPR像素格式的第一 子图像，并将所述非SPR像素格式的第一子图像输入给处理单元2200；
处理单元2200，用于根据第一子图像的非SPR像素格式的像素数据，驱动显示屏以SPR方式显示待显示图像的一部分。
在一种实现中，处理单元2000可以包括渲染单元2202。其中，渲染单元2202用于根据SPR算法对非SPR像素格式的第一子图像进行渲染，得到SPR像素格式的所述待显示图像的一部分。
可选地，作为一个实施例，通信接口2100可以为DSI接口。
另外，处理单元2200的功能可以通过硬件来实现，也可以通过软件和硬件结合的方式来实现。当处理单元2200的功能通过硬件实现时，处理单元2200可以是逻辑电路、集成电路等。例如，处理单元2200可以为显示驱动集成电路(display driver integrated circuit,DDIC)。当通过软件和硬件的结合来实现时，处理单元2200可以是一个处理器。处理器通过读取存储单元中存储的计算机程序代码或指令来实现处理单元2200的上述功能。
可选地，所述存储单元可以集成在所述处理器中，也可以位于处理器之外独立存在。
参见图13，图13为显示驱动电路3000的示意性结构框图。如图13所示，显示驱动电路3000包括通信接口3100和处理单元3200。
通信接口3100，用于从主控制器1000接收非SPR像素格式的第二子图像，并将所述非SPR像素格式的第二子图像输入给处理单元3200；
处理单元3200，用于根据第二子图像的非SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述待显示图像的另一部分。
可选地，通信接口3100可以为DSI接口，处理单元3200可以为处理器。
另外，处理单元3200的功能可以通过硬件来实现，也可以通过软件和硬件结合的方式来实现。当通过硬件实现时，处理单元3200可以是逻辑电路、集成电路等，例如，处理器单元3200可以为DDIC。当通过软件和硬件结合的方式来实现时，处理单元3200可以是一个处理器。处理器通过读取存储单元中存储的计算机程序代码或指令来实现处理单元3200的功能。可选地，存储单元可以集成在处理器中，也可以位于处理器之外独立存在。
在另一种实现方式中，主控制器1000还包括处理单元1300。
可选地，主控制器1000的各单元具有如下功能：
处理单元1300，用于根据SPR算法对待显示图像进行渲染，输出渲染后的SPR像素格式的图像；
所述拆分单元1100，用于将所述渲染后的SPR像素格式的图像拆分为SPR像素格式的至少两个子图像；
以及，所述通信接口1200，用于将所述SPR像素格式的至少两个子图像分别发送给至少两个显示驱动电路。
可选地，在一种实现方式中，所述多显示驱动电路系统包括第一显示驱动电路和第二显示驱动电路，其中，所述处理单元1300，用于根据待显示图像的非SPR像素格式的像素数据，生成SPR像素格式的第三子图像和第四子图像；
通信接口1200，用于向所述第一显示驱动电路发送所述第三子图像，向所述第二显示驱动电路发送所述第四子图像。
可选地，在本实施例中，处理单元1300可以包括渲染单元1302，用于对根据SPR算法对待显示图像进行渲染，输出渲染后的SPR像素格式的图像。
可选地，处理单元1300的功能可以通过硬件来实现，也可以通过软件和硬件结合的方式来实现。当通过硬件实现时，处理单元1300可以是逻辑电路、集成电路等，例如DDIC。当通过软件和硬件结合的方式来实现时，处理单元1300可以是一个处理器。处理器通过读取存储单元中存储的计算机程序代码来实现。可选地，存储单元可以集成在处理器中，也可以位于处理器之外独立存在。
在本实施例中，显示驱动电路2000的各单元的功能如下：
通信接口2100，用于从主控制器的通信接口1200接收SPR像素格式的第三子图像；
处理单元2200，用于根据第三子图像的SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述第三子图像。
其中，显示驱动电路3000的各单元的功能如下：
通信接口3100，用于从主控制器的通信接口1200接收SPR像素格式的第四子图像；
处理单元3200，用于根据第四子图像的SPR像素格式的像素数据，驱动显示屏以SPR方式显示所述第四子图像。
以上对本申请提供的主控制器和显示驱动电路进行了详细说明。
应理解，上述实施例以两个显示驱动电路进行说明，当有两个以上的显示驱动电路时，每个显示驱动电路的功能和上述显示驱动电路2000或者显示驱动电路3000的功能是类似的，不再赘述。
此外，本申请还提供一种电子设备5000，参见图14。
图14为本申请提供的电子设备5000的示意性结构图。如图14所示，电子设备5000可以包括柔性显示屏510、一个或多个处理器(未示出)、一个或多个存储器(未示出)以及一个或多个射频电路(未示出)。
其中，处理器用于处理数据，具体可以是中央处理单元(central processing unit，CPU)，还可以是其它通用处理器、应用处理器(application processor，AP)、基带处理器、数字信号处理器(digital signal processor,DSP)、专用集成电路(application specific integrated circuit,ASIC)、现场可编程门阵列(field programmable gate array,FPGA)或其它可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。通用处理器可以是微处理器或者任何常规的处理器等。具体来说，各个处理器可以集成在一个芯片上，称为片上系统。
存储器用于存储数据，具体可以是随机存取存储器(random access memory,RAM)、闪存、只读存储器(read-only memory,ROM)、可编程只读存储器(programmable ROM,PROM)、可擦除可编程只读存储器(erasable PROM,EPROM)、电可擦除可编程只读存储器(electrically EPROM,EEPROM)、寄存器、硬盘等。
射频电路用于接收或发射信号，以和其它设备进行交互。
柔性显示屏510可以为本申请各实施例中所描述的显示屏，例如，显示屏104。柔性显示屏上可显示有至少一个应用图标511以及虚拟按钮512。柔性显示屏510具有较强的刚度，并且在折叠或卷曲显示屏时，可呈一定弧度的弯曲，避免了折叠或卷曲导致的褶皱、拱起或者折痕，可以提高用户的视觉体验。
应理解，图14中主要示出了可折叠电子设备的柔性显示屏510，其内部包括的处理 器、存储器以及射频电路等可以参见图6所示。此外，电子设备5000还可以包括图6中所示的其它器件，本申请不作限定。
此外，本申请还提供一种电路系统，所述电路系统包括一个或多个处理器。所述一个或多个处理器用于执行本申请提供的显示图像的方法中由主控制器执行的处理，具体可以参见方法实施例。
可选地，本申请还提供一种电路系统，所述电路系统包括一个或多个处理器，所述一个或多个处理器用于读取并执行存储器中存储的计算机程序，以执行本申请提供的显示图像的方法中由控制器执行的处理。
可选地，所述存储器可以位于所述电路系统之外或者集成在所述电路系统中，处理器通过电路或电线与所述存储器连接。所述存储器可以为一个或多个。
进一步可选地，所述电路系统还包括通信接口。
本申请提供一种计算机可读存储介质，所述计算机可读存储介质中存储有计算机指令，当计算机指令在计算机上运行时，使得计算机执行本申请提供的在多显示驱动电路的系统中显示图像的方法。
本申请提供一种计算机程序产品，所述计算机程序产品包括计算机程序代码，当所述计算机程序代码在计算机上运行时，使得计算机执行本申请提供的在多显示驱动电路的系统中显示图像的方法。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本申请实施例的技术方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内。本申请的保护范围应以权利要求书的保护范围为准。

Claims (19)

  1. 一种电子设备，其特征在于，包括主控制器、显示屏和至少两个显示驱动电路，所述至少两个显示驱动电路驱动所述显示屏显示图像，其中，
    所述主控制器，用于将待显示图像拆分为非子像素渲染SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像，其中，每个子图像和相邻子图像包含至少一列重叠的图像像素；
    所述至少两个显示驱动电路中的每个显示驱动电路，用于从所述主控制器接收所述至少两个子图像中的一个子图像，并根据所述一个子图像的图像像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动所述显示屏显示的各个部分共同呈现所述待显示图像。
  2. 根据权利要求1所述的电子设备，其特征在于，所述电子设备包括第一显示驱动电路和第二显示驱动电路，其中，
    所述主控制器，用于将所述待显示图像拆分为非SPR像素格式的第一子图像和第二子图像，并向所述第一显示驱动电路发送所述第一子图像，向所述第二显示驱动电路发送所述第二子图像，其中，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素；
    所述第一显示驱动电路，用于根据所述第一子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分；
    所述第二显示驱动电路，用于根据所述第二子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述待显示图像的另一部分。
  3. 根据权利要求2所述的电子设备，其特征在于，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素，包括：
    所述第一子图像包含的图像像素的列范围为[1,M+N 1]，所述第二子图像包含的图像像素的列范围为[M-N 2,Z]，
    其中，Z为所述待显示图像所包含的图像像素的总列数，Z,M，N 1和N 2均为正整数,1<M<Z,Z>1。
  4. 根据权利要求3所述的电子设备，其特征在于，N 1＝N 2。
  5. 一种电子设备，其特征在于，包括主控制器、显示屏和至少两个显示驱动电路，所述至少两个显示驱动电路驱动所述显示屏显示图像，其中，
    所述主控制器，用于根据待显示图像的非子像素渲染SPR像素格式的像素数据，生成SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像；
    所述至少两个显示驱动电路中的每个显示驱动电路，用于从所述主控制器接收所述至少两个子图像中的一个子图像，并驱动所述显示屏以SPR方式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动所述显示屏显示的各个部分呈现所述待显示图像。
  6. 根据权利要求5所述的电子设备，其特征在于，所述电子设备包括两个显示驱动 电路，其中，
    所述主控制器，用于根据待显示图像的非子像素渲染SPR像素格式的像素数据，生成SPR像素格式的第三子图像和第四子图像，并向所述两个显示驱动电路中的第一显示驱动电路发送所述第三子图像，向所述两个显示驱动电路中的第二显示驱动电路发送所述第四子图像；
    所述第一显示驱动电路，用于驱动所述显示屏以所述SPR方式显示所述第三子图像；
    所述第二显示驱动电路，用于驱动所述显示屏以所述SPR方式显示所述第四子图像。
  7. 一种在多显示驱动电路系统中显示图像的方法，其特征在于，所述多显示驱动电路系统包括主控制器、显示屏和至少两个显示驱动电路，所述方法包括：
    所述主控制器将待显示图像拆分为非子像素渲染SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像，其中，每个子图像和相邻子图像包括至少一列重叠的图像像素；
    所述至少两个显示驱动电路中的每个显示驱动电路，从所述主控制器接收所述至少两个子图像中的一个子图像，并根据所述一个子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动所述显示屏显示的各个部分共同呈现所述待显示图像。
  8. 根据权利要求7所述的方法，其特征在于，所述系统包括第一显示驱动电路和第二显示驱动电路，其中，
    所述主控制器将待显示图像拆分为非SPR像素格式的多个子图像，并向所述两个显示驱动电路发送所述多个子图像，包括：
    所述主控制器将所述待显示图像拆分为非SPR像素格式的第一子图像和第二子图像，并向所述第一显示驱动电路发送所述第一子图像，向所述第二显示驱动电路发送所述第二子图像，其中，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素；
    所述多个显示驱动电路中的每个显示驱动电路，从所述主控制器接收所述至少两个子图像中的一个子图像，并根据所述一个子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分，包括：
    所述第一显示驱动电路根据所述第一子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以SPR方式显示所述待显示图像的一部分；
    所述第二显示驱动电路根据所述第二子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述待显示图像的另一部分。
  9. 根据权利要求8所述的方法，其特征在于，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素，包括：
    所述第一子图像包含的图像像素的列范围为[1,M+N 1]，所述第二子图像包含的图像像素的列范围为[M-N 2,Z]，
    其中，Z为所述待显示图像包含的图像像素的总列数，Z,M，N 1和N 2均为正整数，1<M<Z,Z>1。
  10. 根据权利要求9所述的方法，其特征在于，N 1＝N 2。
  11. 一种在多显示驱动电路系统中显示图像的方法，其特征在于，所述多显示驱动电路系统包括主控制器、显示屏和至少两个显示驱动电路，所述方法包括：
    所述主控制器根据待显示图像的非子像素渲染SPR像素格式的像素数据，生成SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像；
    所述至少两个显示驱动电路中的每个显示驱动电路，从所述主控制器接收所述至少两个子图像中的一个子图像，并驱动所述显示屏以SPR方式显示所述待显示图像的一部分，其中，所述至少两个显示驱动电路驱动所述显示屏显示的各个部分呈现所述待显示图像。
  12. 根据权利要求11所述的方法，其特征在于，所述多显示驱动电路系统包括第一显示驱动电路和第二显示驱动电路，其中，
    所述主控制器根据待显示图像的非子像素渲染SPR像素格式像素数据，生成SPR像素格式的至少两个子图像，并向所述至少两个显示驱动电路发送所述至少两个子图像，包括：
    所述主控制器根据所述待显示图像的非子像素渲染SPR像素格式的像素数据，生成SPR像素格式的第三子图像和第四子图像，并向所述第一显示驱动电路发送所述第三子图像，向所述第二显示驱动电路发送所述第四子图像；
    所述至少两个显示驱动电路中的每个显示驱动电路从所述主控制器接收所述至少两个子图像中的一个子图像，并驱动所述显示屏以SPR方式显示所述待显示图像的一部分，包括：
    所述第一显示驱动电路，驱动所述显示屏以所述SPR方式显示所述第三子图像；
    所述第二显示驱动电路，驱动所述显示屏以所述SPR方式显示所述第四子图像。
  13. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质中存储有计算机程序，当所述计算机程序在计算机上执行时，使得计算机执行如权利要求7-12中任一项所述的方法。
  14. 一种电路系统，其特征在于，包括至少一个处理器，所述至少一个处理器用于：
    将待显示图像拆分为非SPR像素格式的至少两个子图像，其中，每个子图像和其相邻子图像包含至少一列重叠的图像像素；
    将所述至少两个子图像发送给至少两个显示驱动电路，以使得所述至少两个显示驱动电路根据所述非SPR像素格式的至少两个子图像，驱动显示屏以SPR方式显示所述待显示图像。
  15. 根据权利要求14所述的电路系统，其特征在于，所述处理器具体用于：
    将所述待显示图像拆分为非SPR像素格式的第一子图像和第二子图像，所述第一子图像和所述第二子图像包括至少一列重叠的图像像素；
    将所述第一子图像发送给第一显示驱动电路，以使得所述第一显示驱动电路根据所述第一子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述待显示图像的一部分；
    将所述第二子图像发送给第二显示驱动电路，以使得所述第二显示驱动电路根据所述第二子图像的所述非SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述待显示图像的另一部分。
  16. 根据权利要求15所述的电路系统，其特征在于，所述第一子图像包含的图像像素的列范围为[1,M+N 1]，所述第二子图像包含的图像像素的列范围为[M-N 2,Z]，
    其中，Z为所述待显示图像包含的图像像素的总列数，Z,M，N 1和N 2均为正整数，1<M<Z,Z>1。
  17. 根据权利要求16所述的电路系统，其特征在于，N 1＝N 2。
  18. 一种电路系统，其特征在于，包括至少一个处理器，所述至少一个处理器用于：
    根据待显示图像的非SPR像素格式的像素数据，生成SPR像素格式的至少两个子图像；
    将所述至少两个子图像发送给至少两个显示驱动电路，以使得所述至少两个显示驱动电路根据所述至少两个子图像中的每个子图像的SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述待显示图像的一部分。
  19. 根据权利要求18所述的电路系统，其特征在于，所述处理器具体用于：
    根据所述待显示图像的非SPR像素格式的像素数据，生成SPR像素格式的第三子图像和第四子图像；
    将所述第三子图像发送给第一显示驱动电路，以使得所述第一显示驱动电路根据所述第三子图像的SPR像素格式的像素数据，驱动所述显示屏以所述SPR方式显示所述第三子图像；
    将所述第四子图像发送给第二显示驱动电路，以使得所述第二显示驱动电路根据所述第四子图像的SPR像素格式的像素数据，驱动所述显示屏显示以所述SPR方式显示所述第四子图像。
PCT/CN2020/075711 2019-02-23 2020-02-18 在多显示驱动电路系统中显示图像的方法和电子设备 WO2020169026A1 (zh)

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