WO2020149531A1 - 심자외선 발광 다이오드 - Google Patents
심자외선 발광 다이오드 Download PDFInfo
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- WO2020149531A1 WO2020149531A1 PCT/KR2019/017224 KR2019017224W WO2020149531A1 WO 2020149531 A1 WO2020149531 A1 WO 2020149531A1 KR 2019017224 W KR2019017224 W KR 2019017224W WO 2020149531 A1 WO2020149531 A1 WO 2020149531A1
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- 239000004065 semiconductor Substances 0.000 claims abstract description 97
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 229910052751 metal Inorganic materials 0.000 claims description 80
- 239000002184 metal Substances 0.000 claims description 80
- 238000000034 method Methods 0.000 claims description 29
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 13
- 229910002601 GaN Inorganic materials 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical group [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
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- 238000005516 engineering process Methods 0.000 description 2
- 238000002248 hydride vapour-phase epitaxy Methods 0.000 description 2
- 239000012071 phase Substances 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000443 aerosol Substances 0.000 description 1
- 238000004887 air purification Methods 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000001917 fluorescence detection Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
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- 238000005215 recombination Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052596 spinel Inorganic materials 0.000 description 1
- 239000011029 spinel Substances 0.000 description 1
- 230000001954 sterilising effect Effects 0.000 description 1
- 238000004659 sterilization and disinfection Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/0004—Devices characterised by their operation
- H01L33/0008—Devices characterised by their operation having p-n or hi-lo junctions
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Definitions
- the present invention relates to an inorganic semiconductor light emitting diode, and more particularly, to a light emitting diode that emits deep ultraviolet rays of 300 nm or less.
- light emitting diodes that emit ultraviolet light in the 200 to 300 nm range can be used in a variety of applications, including sterilization devices, water or air purification devices, high density optical recording devices, and excitation sources for bio aerosol fluorescence detection systems.
- light emitting diodes that emit relatively deep ultraviolet light include a well layer containing Al, such as AlGaN. Due to the composition of the gallium nitride-based semiconductor layer, the deep ultraviolet light emitting diode has a significantly different structure from the blue light emitting diode or the near ultraviolet light emitting diode.
- the deep ultraviolet light emitting diode according to the prior art has a structure different from that of a blue light emitting diode or near ultraviolet light emitting diode in which the shape and position of the mesa disposed on the n-type semiconductor layer is general. That is, the mesa is formed to be biased toward one side from the center of the n-type semiconductor layer, and the p bump is disposed on the mesa, and the n bumps are spaced apart from the mesa near the other side facing the one side.
- the problem to be solved by the present invention is to provide a deep ultraviolet light emitting diode having a new structure capable of improving electrical characteristics and/or light output.
- Another problem to be solved by the present invention is to provide a deep ultraviolet light emitting diode capable of improving the current dispersion performance.
- An ultraviolet light emitting diode the substrate; An n-type semiconductor layer located on the substrate; A mesa disposed on the n-type semiconductor layer and including an active layer and a p-type semiconductor layer; N ohmic contact layers contacting the n-type semiconductor layer; A p ohmic contact layer contacting the p-type semiconductor layer; N bumps electrically connected to the n ohmic contact layer; And a p bump electrically connected to the p ohmic contact layer, wherein the mesa includes a plurality of vias exposing the first conductivity type semiconductor layer, wherein the mesa has an elongated rectangular shape along the longitudinal direction, the Vias are arranged parallel to each other in a direction perpendicular to the longitudinal direction of the mesa, and the n ohmic contact layers are a first conductivity type semiconductor layer exposed around the mesa and a first conductivity type semiconductor layer exposed to the vias Phases, respectively.
- a light emitting diode the substrate; An n-type semiconductor layer located on the substrate; A mesa disposed on the n-type semiconductor layer and including an active layer and a p-type semiconductor layer; N ohmic contact layers contacting the n-type semiconductor layer; And a p ohmic contact layer contacting the p-type semiconductor layer, wherein the mesa includes a plurality of vias exposing the first conductivity-type semiconductor layer, wherein the mesa has an elongated rectangular shape along the longitudinal direction, and the The mesa has a mirror-symmetrical structure with respect to a surface passing through the center of the mesa along the longitudinal direction of the mesa. Also, the mesa is mirror-symmetrical with respect to a surface passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa. It has a structure.
- the mesa it is possible to secure a large area of light emission through a mesa having a plurality of vias parallel to each other in a direction perpendicular to the longitudinal direction of the mesa, and by adopting a mesa having a symmetrical structure, the mesa It is possible to provide a deep ultraviolet light emitting diode capable of distributing the current evenly.
- FIG. 1 is a plan view illustrating a deep ultraviolet light emitting diode according to an embodiment of the present invention.
- FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1.
- FIG. 3 is a schematic plan view for explaining a mesa according to an embodiment of the present invention.
- FIG. 4 is a schematic cross-sectional view for explaining that a deep ultraviolet light emitting diode is mounted on a submount according to an embodiment of the present invention.
- the nitride-based semiconductor layers described below may be grown using various generally known methods, such as Metal Organic Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), or Hydride Vapor Phase Epitaxy (HVPE). It can be grown using technology. However, in the embodiments described below, it is described that the semiconductor layers are grown in the growth chamber using MOCVD.
- sources introduced into the growth chamber may use a generally known source, for example, TMGa, TEGa, etc. may be used as the Ga source, and TMAl, TEAl, etc. may be used as the Al source.
- TMIn, TEIn, etc. can be used as the In source, and NH 3 can be used as the N source.
- the present invention is not limited to this.
- An ultraviolet light emitting diode the substrate; An n-type semiconductor layer located on the substrate; A mesa disposed on the n-type semiconductor layer and including an active layer and a p-type semiconductor layer; N ohmic contact layers contacting the n-type semiconductor layer; A p ohmic contact layer contacting the p-type semiconductor layer; N bumps electrically connected to the n ohmic contact layer; And a p bump electrically connected to the p ohmic contact layer, wherein the mesa includes a plurality of vias exposing the first conductivity type semiconductor layer, wherein the mesa has an elongated rectangular shape along the longitudinal direction, the Vias are arranged parallel to each other in a direction perpendicular to the longitudinal direction of the mesa, and the n ohmic contact layers are a first conductivity type semiconductor layer exposed around the mesa and a first conductivity type semiconductor layer exposed to the vias Phases, respectively.
- a plurality of vias are disposed inside the mesa, and an n ohmic contact layer is formed in the vias to uniformly distribute the current inside the mesa.
- the plurality of vias may be spaced apart from each other. This spacing can be adjusted so that no non-luminescent region is formed inside the mesa between the vias.
- the mesa has a mirror symmetrical structure with respect to a surface passing through the center of the mesa along the longitudinal direction of the mesa, and also with respect to a surface passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa. It can have a mirror-like symmetry structure.
- the mesa Since the mesa has a symmetrical structure as described above, it is possible to prevent the current from being concentrated through a specific location of the mesa.
- a gap between the vias may be equal to or greater than a gap between one end of the via and one edge of the mesa.
- the distance between the short side edge of the mesa and the via may be equal to or greater than the distance between the vias.
- the n ohmic contact layer disposed on the first conductive semiconductor layer exposed around the mesa may surround the mesa. Accordingly, the current can be evenly distributed over the entire region of the mesa.
- the deep ultraviolet light emitting diode may further include an n capping layer and a p capping layer covering the n ohmic contact layer and the p ohmic contact layer, respectively, and the capping layers may cover the top and side surfaces of the ohmic contact layers.
- the deep ultraviolet light emitting diode may include a lower insulating layer covering the mesa, the n ohmic contact layer, and the p ohmic contact layer, but having openings on the n ohmic contact layer and the p ohmic contact layer; An n-pad metal layer and a p-pad metal layer disposed on the lower insulating layer and electrically connected to the n ohmic contact layer and the p ohmic contact layer through openings of the lower insulating layer, respectively; And an upper insulating layer covering the n-pad metal layer and the p-pad metal layer, wherein the n-bump and p-bump are disposed on the upper insulating layer, and through the openings of the upper insulating layer, the n-pad metal layer and p can be in electrical contact with the pad metal layer.
- the n-pad metal layer may include a reflective metal layer, for example, an Al layer.
- the n-pad metal layer may reflect light emitted through the side surface of the mesa. Accordingly, light emitted through the side surface of the mesa can be reduced and the light efficiency of the deep ultraviolet light emitting diode can be improved.
- the deep ultraviolet light emitting diode further includes an n capping layer and a p capping layer that respectively cover the n ohmic contact layer and the p ohmic contact layer, and the n pad metal layer is connected to the n cap layer and electrically connected to the n ohmic contact layer.
- the n capping layer may include a reflective metal layer, for example, an Al layer. Accordingly, light emitted from the n-type semiconductor layer can be reflected using the n capping layer, thereby improving light efficiency of the deep ultraviolet light emitting diode.
- the n-pad metal layer may surround the p-pad metal layer.
- the present invention is not necessarily limited thereto.
- a deep ultraviolet light emitting diode the substrate; An n-type semiconductor layer located on the substrate; A mesa disposed on the n-type semiconductor layer and including an active layer and a p-type semiconductor layer; N ohmic contact layers contacting the n-type semiconductor layer; And a p ohmic contact layer contacting the p-type semiconductor layer, wherein the mesa includes a plurality of vias exposing the first conductivity-type semiconductor layer, wherein the mesa has an elongated rectangular shape along the longitudinal direction, and the The mesa has a mirror-symmetrical structure with respect to a surface passing through the center of the mesa along the longitudinal direction of the mesa. Also, the mesa is mirror-symmetrical with respect to a surface passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa. It has a structure.
- the mesa Since the mesa has a symmetrical structure, it is possible to prevent the current from being concentrated through a specific location of the mesa, and thus it is possible to provide a deep ultraviolet light emitting diode that can evenly distribute the current inside the mesa.
- the vias may have an elongated shape along a direction perpendicular to the longitudinal direction of the mesa, and may be arranged parallel to each other. By forming the vias in an elongated shape, current can be evenly distributed not only in the region between the vias but also in the region between the via and the edge of the mesa.
- the n ohmic contact layers may include an n ohmic contact layer surrounding the mesa around the mesa and n ohmic contact layers disposed in the vias.
- the deep ultraviolet light emitting diode includes an n-pad metal layer electrically connected to the n ohmic contact layers; And p pad metal layers electrically connected to the p ohmic contact layer, and the n pad metal layer may surround the p pad metal layers.
- the n-pad metal layer and the p-pad metal layer may be formed in the same process and positioned at the same level.
- the deep ultraviolet light emitting diode may further include a lower insulating layer covering the mesa, the n ohmic contact layer, and the p ohmic contact layer, wherein the n pad metal layer and the p pad metal layers are disposed on the lower insulating layer. , May be electrically connected to the n ohmic contact layer and the p ohmic contact layer through openings formed in the lower insulating layer, respectively.
- the deep ultraviolet light emitting diode may include an upper insulating layer covering the n-pad metal layer and the p-pad metal layer; Further, n bumps and p bumps disposed on the upper insulating layer may be further included, and the n bumps may be electrically connected to the n-pad metal layer, and the p bumps may be electrically connected to the p-pad metal layers. .
- FIG. 1 is a schematic plan view for explaining a deep ultraviolet light emitting diode according to an embodiment of the present invention
- FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1.
- Figure 3 is a schematic plan view for explaining a mesa according to an embodiment of the present invention.
- the ultraviolet light emitting diode according to the present embodiment, the substrate 121, n-type semiconductor layer 123, the active layer 125, p-type semiconductor layer 127, n ohmic Contact layer 129a, p ohmic contact layer 129b, n capping layer 131a, p capping layer 131b, lower insulating layer 132, n pad metal layer 133a, p pad metal layer 133b, top An insulating layer 135, n bumps 137a and p bumps 137b, and an anti-reflection layer 139 may be included.
- the substrate 121 is not limited as long as it is a substrate capable of growing a nitride-based semiconductor, and may include, for example, a heterogeneous substrate such as a sapphire substrate, a silicon substrate, a silicon carbide substrate, or a spinel substrate, and also gallium nitride. It may include a substrate of the same type, such as a substrate, an aluminum nitride substrate.
- the n-type semiconductor layer 123 is positioned on the substrate 121.
- the n-type semiconductor layer 123 may include, for example, an AlN buffer layer (about 3.79 ⁇ m) and an n-type AlGaN layer.
- the n-type AlGaN layer may include a lower n-type AlGaN layer having an Al molar ratio of 0.8 or more (about 2.15 ⁇ m), an intermediate AlGaN layer having an Al molar ratio of 0.7 to 0.8 (1.7 nm), and an upper n-type AlGaN layer having a thickness of about 66.5 nm. have.
- the n-type semiconductor layer 123 is formed of a nitride-based semiconductor having a higher band gap than the active layer so that light generated in the active layer can transmit.
- the n-type semiconductor layer 123 may usually include a plurality of layers to improve crystal quality.
- the mesa M is disposed on a portion of the n-type semiconductor layer 123.
- the mesa (M) includes an active layer 125 and a p-type semiconductor layer 127.
- the p-type semiconductor layer 127 and the active layer 125 are patterned through a mesa etching process to measure mesa ( M) is formed.
- the active layer 125 may be a single quantum well structure or a multi-quantum well structure including a well layer and a barrier layer.
- the well layer may be formed of AlGaN or AlInGaN
- the barrier layer may be formed of AlGaN or AlInGaN having a wider band gap than the well layer.
- each well layer may be formed of AlGaN having an Al molar ratio of about 0.5 and a thickness of about 3.1 nm
- each barrier layer may be formed of AlGaN having a molar ratio of Al of 0.7 or more and a thickness of about 9 nm or more.
- the first barrier layer may be formed thicker than other barrier layers with a thickness of 12 nm or more.
- AlGaN layers having an Al molar ratio of 0.7 to 0.8 in contact with the top and bottom of each well layer may be disposed to have a thickness of about 1 nm, respectively.
- the Al molar ratio of the AlGaN layer in contact with the last well layer may be 0.8 or more in consideration of contact with the electron block layer.
- the p-type semiconductor layer 127 may include an electron block layer and a p-type GaN contact layer.
- the electron block layer prevents electrons from overflowing from the active layer to the p-type semiconductor layer, thereby improving the recombination rate of electrons and holes.
- the electron block layer may be formed of p-type AlGaN having an Al molar ratio of about 0.8, for example, and may be formed to a thickness of 55 nm.
- the p-type GaN contact layer may be formed to a thickness of about 300 nm.
- the mesa M may have an elongated rectangular shape in one direction, and include a plurality of vias 127a exposing the n-type semiconductor layer 123.
- the vias 127a may each have an elongated shape, and may be disposed in a direction perpendicular to the longitudinal direction of the mesa M.
- the vias 127a may be spaced apart from each other and arranged in parallel, and further, the vias 127a may be spaced apart from each other at the same distance s1.
- the spacing s2 between one end in the longitudinal direction of the via 127a and the edge of the mesa M adjacent thereto may be equal to or smaller than the spacing s1 between the vias 127a.
- the spacing s3 between the short edge of the mesa M and the via 127a adjacent thereto may be equal to or greater than the spacing s1 between the vias 127a.
- the mesa (M) has a mirror-symmetrical structure with respect to a surface transverse to the center of the mesa along the longitudinal direction of the mesa, and also a surface crossing the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa. It can have a mirror-like symmetry structure. With this shape, the current can be evenly distributed in the mesa (M).
- the n ohmic contact layer 129a is disposed on the n-type semiconductor layer 123 exposed around the mesa M and vias 127a.
- the ohmic contact layer 129a may be formed by depositing a plurality of metal layers and then alloying the metal layers through a rapid thermal alloy (RTA).
- RTA rapid thermal alloy
- the n ohmic contact layer 129a may be sequentially alloyed by an RTA process after depositing Cr/Ti/Al/Ti/Au sequentially. Therefore, the n ohmic contact layer 129a becomes an alloy layer containing Cr, Ti, Al, and Au.
- the n ohmic contact layer 129a surrounds the mesa M along the periphery of the mesa M. Also, the n ohmic contact layer 129a is disposed in the vias 127a.
- the width w1 of the n ohmic contact layer 129a surrounding the mesa M along the periphery of the mesa M may be smaller than the width w2 of the n ohmic contact layer 129a disposed in the vias 127a. have.
- the width w1 may be in the range of 5 to 30 um, for example, and the width w2 may be in the range of 10 to 40 um.
- the ohmic contact layer 129a is spaced a certain distance from the mesa M. Accordingly, an area without the n ohmic contact layer 129a is formed between the mesa M and the n ohmic contact layer 129a.
- the separation distance between the ohmic contact layer 129a and the mesa M may be constant along the perimeter of the mesa M, but is not limited thereto.
- the p ohmic contact layer 129b is formed on the mesa M.
- the p ohmic contact layer 129b may be formed through an RTA process after depositing Ni/Au, for example.
- the p-ohmic contact layer 129b makes ohmic contact to the p-type semiconductor layer 127, and covers most of the upper region of the mesa (M), for example, 80% or more.
- n capping layers 131a and p capping layers 131b may be formed on the n ohmic contact layers 129a and p ohmic contact layers 129b, respectively.
- the n and p capping layers 131a and 131b may cover the top and side surfaces of the n ohmic contact layer 129a and the p ohmic contact layer 129b.
- These capping layers 131a and 131b may include a reflective metal layer, for example, an Al layer, and may be specifically formed of Cr/Al/Ti/Ni/Ti/Ni/Ti/Ni/Au/Ti.
- the n capping layer 131a has a greater width than the n ohmic contact layer 129a, and thus can function as a reflective layer (first reflective layer) reflecting light emitted through the n-type semiconductor layer 123. have. Furthermore, the n capping layer 131a may have a lower height than the mesa M, and thus, the top surface of the n capping layer 131a may be positioned below the top surface of the mesa M.
- the lower insulating layer 132 covers the mesa M, and also covers the n capping layer 131a and the p capping layer 131b.
- the lower insulating layer 132 also covers the n-type semiconductor layer 123 exposed around the mesa M and in the vias 127a.
- the lower insulating layer 132 has openings 132a for allowing electrical connection to the n ohmic contact layer 129a and openings 132b for allowing electrical connection to the p-ohmic contact layer 129b.
- the openings 132a and 132b exposing the capping layers 131a and 131b may be formed by etching the lower insulating layer 132. At this time, the Ti layer on the upper surfaces of the exposed capping layers 131a and 131b may be removed by an etching process.
- the lower insulating layer 132 may be formed of SiO 2 , for example, but is not limited thereto, and may be formed of a distributed Bragg reflector.
- the n-pad metal layer 133a and the p-pad metal layer 133b are disposed on the lower insulating layer 132.
- the n-pad metal layer 133a and the p-pad metal layer 133b are formed of the same metal layer together in the same process, and may be disposed on the same level, that is, the lower insulating layer 132.
- the n and p pad metal layers 133a and 133b may include a reflective metal layer, for example, an Al layer in order to have a high reflectance.
- the n and p pad metal layers 133a and 133b may be formed in the same layer structure as the capping layers 131a and 131b.
- the n-pad metal layer 133a is electrically connected to the n ohmic contact layers 129a through the openings 132a of the lower insulating layer 132.
- the n ohmic contact layers 129a are electrically connected to each other by an n-pad metal layer 133a.
- the n-pad metal layer 133a may extend from the n ohmic contact layers 129a positioned under the mesa M to the top of the mesa M.
- the p pad metal layers 133b may be electrically connected to the p ohmic contact layers 129b through openings 132b of the lower insulating layer 132, respectively.
- the p-pad metal layers 133b are spaced apart from each other, and may be surrounded by n-pad metal layers 133a, respectively.
- the n-pad metal layer 133a may function as a reflective layer (second reflective layer) that reflects light emitted through the side surface of the mesa M, thereby improving the light efficiency of the light emitting diode. Further, the n-capping layer 131a and the n-pad metal layer 133a may reflect light emitted from the n-type semiconductor layer 123 exposed in the region between the mesa M and the n ohmic contact layer 129a. .
- the upper insulating layer 135 covers the n-pad metal layer 133a and the p-pad metal layer 133b. However, the upper insulating layer 135 has openings 135a exposing the n-pad metal layer 133a and openings 135b exposing the p-pad metal layer 133b on the mesa M.
- the opening 135a may be formed to have an elongated shape along the via 127a. As illustrated, the openings 135a may be disposed above the line passing through the center of the mesa along the minor axis direction of the mesa M. Meanwhile, the openings 135b may be disposed below the line passing through the center of the mesa along the short axis direction of the mesa M.
- the upper insulating layer 135 may be formed of, for example, silicon nitride or silicon oxide.
- the n bumps 137a and p bumps 137b are positioned on the upper insulating layer 135.
- the n bump 137a covers the opening 135a and connects to the n-pad metal layer 133a through the opening 135a.
- the n bump 137a is electrically connected to the n-type semiconductor layer 123 through the n-pad metal layer 133a and the n ohmic contact layer 129a.
- the outer edges of the n bumps 137a and p bumps 137b may be located on the n ohmic contact layer 129a surrounding the mesa M.
- the p bump 137b covers the openings 135b and connects to the p pad metal layers 133b through the openings 135b.
- the p bump 137b is electrically connected to the p-type semiconductor layer 127 through the p-pad metal layer 133b and the p-ohmic contact layer 129b.
- the p pad metal layers 133b may be electrically connected to each other through the p bump 137b.
- the n bumps 137a and p bumps 137b may be formed of, for example, Ti/Au/Cr/Au. As illustrated in FIG. 1, the n bumps 137a and p bumps 137b may be disposed along the mesa (M) length direction. The n bumps 137a and p bumps 137b may be spaced about 90um apart. By narrowing the distance between the n bumps 137a and p bumps 137b, the areas of the n bumps 137a and p bumps 137b can be made relatively wide. Accordingly, heat generated by the light emitting diode can be easily emitted, thereby improving the performance of the light emitting diode.
- the openings 135a and 135b are covered by n bumps 137a and p bumps 137b, so that moisture or solder from the outside can be prevented from penetrating through the openings 135a and 135b. Reliability is improved.
- the upper surfaces of the n bumps 137a and p bumps 137b may not be flat due to differences in height between the mesa M and the n-pad metal layer 133a.
- the antireflection layer 139 is disposed on the light emitting surface side of the substrate 121.
- the anti-reflection layer 139 may be formed of a transparent insulating layer such as SiO2, for example, with an integer multiple of 1/4 of the wavelength of ultraviolet rays.
- a band pass filter in which layers having different refractive indices are repeatedly stacked as the anti-reflection layer 139 may be used.
- FIG. 4 is a schematic cross-sectional view for explaining that a deep ultraviolet light emitting diode is mounted on a submount according to an embodiment of the present invention.
- the deep ultraviolet light emitting diode is flip-bonded on the sub-mount substrate 200.
- the sub-mount substrate 200 may have electrode pads 201a and 201b on an insulating substrate such as AlN.
- n bumps 137a and p bumps 137b may be bonded to the electrode pads 201a and 201b of the sub-mount substrate 200 through solder pastes 203a and 203b.
- the present invention is not limited thereto, and the deep ultraviolet light emitting diode may be bonded to the submount substrate 200 using thermal ultrasonic bonding technology or solder bonding using AuSN.
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Abstract
Description
Claims (23)
- 기판;상기 기판 상에 위치하는 n형 반도체층;상기 n형 반도체층 상에 배치되고, 활성층 및 p형 반도체층을 포함하는 메사;상기 n형 반도체층에 콘택하는 n 오믹 콘택층들;상기 p형 반도체층에 콘택하는 p 오믹 콘택층;상기 n 오믹 콘택층에 전기적으로 접속된 n 범프; 및상기 p 오믹 콘택층에 전기적으로 접속된 p 범프를 포함하고,상기 메사는 제1 도전형 반도체층을 노출시키는 복수의 비아들을 포함하되,상기 메사는 길이 방향을 따라 기다란 직사각형 형상을 가지며,상기 비아들은 상기 메사의 길이 방향에 수직한 방향으로 서로 평행하게 배열되고,상기 n 오믹 콘택층들은 상기 메사의 주위에 노출된 제1 도전형 반도체층 및 상기 비아들에 노출된 제1 도전형 반도체층 상에 각각 형성된 심자외선 발광 다이오드.
- 청구항 1에 있어서,상기 복수의 비아들은 서로 동일한 간격으로 이격된 심자외선 발광 다이오드.
- 청구항 2에 있어서,상기 메사는 상기 메사의 길이 방향을 따라 상기 메사의 중심을 지나는 면에 대해 거울면 대칭 구조를 가지며, 또한, 상기 메사의 길이 방향에 수직한 방향을 따라 상기 메사의 중심을 지나는 면에 대해 거울면 대칭 구조를 갖는 심자외선 발광 다이오드.
- 청구항 3에 있어서,상기 비아들 사이의 간격은 상기 비아의 일측 단부와 상기 메사의 일측 가장자리 사이의 간격과 동일하거나 그보다 큰 심자외선 발광 다이오드.
- 청구항 4에 있어서,상기 메사의 짧은 측 가장자리와 상기 비아 사이의 간격은 상기 비아들 사이의 간격과 동일하거나 그보다 큰 심자외선 발광 다이오드.
- 청구항 1에 있어서,상기 메사 주위에 노출된 제1 도전형 반도체층 상에 배치된 n 오믹 콘택층은 상기 메사를 둘러싸는 심자외선 발광 다이오드.
- 청구항 1에 있어서,상기 n 오믹 콘택층 및 p 오믹 콘택층을 각각 덮는 n 캐핑층 및 p 캐핑층을 더 포함하되, 상기 캐핑층들은 오믹 콘택층들의 상면 및 측면을 덮는 심자외선 발광 다이오드.
- 청구항 1에 있어서,상기 메사, 상기 n 오믹 콘택층 및 p 오믹 콘택층을 덮되, 상기 n 오믹 콘택층 및 p 오믹 콘택층 상부에 개구부들을 갖는 하부 절연층;상기 하부 절연층 상에 배치되며, 상기 하부 절연층의 개구부들을 통해 상기 n 오믹 콘택층 및 p 오믹 콘택층에 각각 전기적으로 접속하는 n 패드 금속층 및 p 패드 금속층; 및상기 n 패드 금속층 및 p 패드 금속층을 덮는 상부 절연층을 더 포함하되,상기 n 범프 및 p 범프는 상기 상부 절연층 상에 배치되며, 상기 상부 절연층의 개구부들을 통해 상기 n 패드 금속층 및 p 패드 금속층에 전기적으로 접속하는 심자외선 발광 다이오드.
- 청구항 8에 있어서,상기 n 패드 금속층은 Al층을 포함하는 심자외선 발광 다이오드.
- 청구항 9에 있어서,상기 n 패드 금속층은 상기 메사의 측면을 통해 방출되는 광을 반사시키는 심자외선 발광 다이오드.
- 청구항 8에 있어서,상기 n 오믹 콘택층 및 p 오믹 콘택층을 각각 덮는 n 캐핑층 및 p 캐핑층을 더 포함하고,상기 n 패드 금속층은 상기 n 캐피층에 접속되어 상기 n 오믹 콘택층에 전기적으로 접속하는 심자외선 발광 다이오드.
- 청구항 11에 있어서,상기 n 캐핑층은 Al층을 포함하는 심자외선 발광 다이오드.
- 청구항 8에 있어서,상기 n 패드 금속층은 상기 p 패드 금속층을 둘러싸는 심자외선 발광 다이오드.
- 기판;상기 기판 상에 위치하는 n형 반도체층;상기 n형 반도체층 상에 배치되고, 활성층 및 p형 반도체층을 포함하는 메사;상기 n형 반도체층에 콘택하는 n 오믹 콘택층들; 및상기 p형 반도체층에 콘택하는 p 오믹 콘택층을 포함하고,상기 메사는 제1 도전형 반도체층을 노출시키는 복수의 비아들을 포함하되,상기 메사는 길이 방향을 따라 기다란 직사각형 형상을 가지며,상기 메사는 상기 메사의 길이 방향을 따라 상기 메사의 중심을 지나는 면에 대해 거울면 대칭 구조를 가지며, 또한, 상기 메사의 길이 방향에 수직한 방향을 따라 상기 메사의 중심을 지나는 면에 대해 거울면 대칭 구조를 갖는 심자외선 발광 다이오드.
- 청구항 14에 있어서,상기 비아들은 상기 메사의 길이 방향에 수직한 방향을 따라 기다란 형상을 가지며, 서로 평행하게 배열된 심자외선 발광 다이오드.
- 청구항 15에 있어서,상기 n 오믹 콘택층들은 상기 메사 주위에서 상기 메사를 둘러싸는 n 오믹 콘택층 및 상기 비아들 내에 배치된 n 오믹 콘택층들을 포함하는 심자외선 발광 다이오드.
- 청구항 16에 있어서,상기 n 오믹 콘택층들에 전기적으로 접속된 n 패드 금속층; 및상기 p 오믹 콘택층에 전기적으로 접속된 p 패드 금속층들을 더 포함하되,상기 n 패드 금속층은 상기 p 패드 금속층들을 둘러싸는 심자외선 발광 다이오드.
- 청구항 17에 있어서,상기 n 패드 금속층과 p 패드 금속층은 동일 공정에서 형성되어 동일 레벨에 위치하는 심자외선 발광 다이오드.
- 청구항 18에 있어서,상기 메사, 상기 n 오믹 콘택층 및 p 오믹 콘택층을 덮는 하부 절연층을 더 포함하고,상기 n 패드 금속층 및 p 패드 금속층들은 상기 하부 절연층 상에 배치되며, 상기 하부 절연층에 형성된 개구부들을 통해 상기 n 오믹 콘택층 및 p 오믹 콘택층에 각각 전기적으로 접속하는 심자외선 발광 다이오드.
- 청구항 19에 있어서,상기 n 패드 금속층 및 p 패드 금속층들을 덮는 상부 절연층;상기 상부 절연층 상에 배치된 n 범프 및 p 범프를 더 포함하되,상기 n 범프는 상기 n 패드 금속층에 전기적으로 접속되고, 상기 p 범프는 상기 p 패드 금속층들에 전기적으로 접속된 심자외선 발광 다이오드.
- 기판;상기 기판 상에 위치하는 n형 반도체층;상기 n형 반도체층 상에 배치되고, 활성층 및 p형 반도체층을 포함하고,상기 n형 반도체층을 노출시키는 복수의 비아를 포함하는 메사;상기 메사 주위에 노출된 n형 반도체층 및 상기 복수의 비아에 노출된 n형 반도체층에 각각 콘택하는 n 오믹 콘택층들;상기 n 오믹 콘택층들의 상면 및 측면을 덮는 제1 반사층들;상기 제1 반사층들에 접속된 제2 반사층;상기 제2 반사층에 접속된 n 범프; 및상기 p형 반도체층에 전기적으로 접속된 p 범프를 포함하고,상기 n 오믹 콘택층, 상기 제1 반사층들 및 상기 제2 반사층은 Al을 포함하는 심자외선 발광 다이오드.
- 청구항 21에 있어서,상기 메사 주위에서 상기 n형 반도체층에 콘택하는 n 오믹 콘택층의 폭은 상기 비아 내에서 상기 n형 반도체층에 콘택하는 n 오믹 콘택층의 폭보다 좁은 심자외선 발광 다이오드.
- 청구항 21에 있어서,상기 제1 반사층들은 상기 메사보다 낮게 위치하며,상기 제2 반사층은 상기 제1 반사층들로부터 상기 메사 상부로 연장하는 심자외선 발광 다이오드.
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CA3126688A CA3126688A1 (en) | 2019-01-14 | 2019-12-06 | Deep ultraviolet light-emitting diode |
BR112021013831-5A BR112021013831A2 (pt) | 2019-01-14 | 2019-12-06 | Diodo emissor de luz uv profunda |
EP19910067.8A EP3913693A4 (en) | 2019-01-14 | 2019-12-06 | DEEP ULTRAVIOLET LIGHTING DIODE |
US17/344,691 US11942573B2 (en) | 2019-01-14 | 2021-06-10 | Deep UV light emitting diode |
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CN111129248B (zh) * | 2016-01-13 | 2024-03-08 | 首尔伟傲世有限公司 | 紫外线发光元件 |
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BR112021013831A2 (pt) | 2021-09-21 |
KR20200088042A (ko) | 2020-07-22 |
US20210305459A1 (en) | 2021-09-30 |
US11942573B2 (en) | 2024-03-26 |
MX2021008254A (es) | 2021-10-13 |
CA3126688A1 (en) | 2020-07-23 |
EP3913693A4 (en) | 2022-10-26 |
CN111509096A (zh) | 2020-08-07 |
ZA202212530B (en) | 2023-04-26 |
ZA202105784B (en) | 2023-12-20 |
EP3913693A1 (en) | 2021-11-24 |
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