WO2020135217A1 - 反激变换器及其输出电压获取方法、装置 - Google Patents

反激变换器及其输出电压获取方法、装置 Download PDF

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Publication number
WO2020135217A1
WO2020135217A1 PCT/CN2019/126597 CN2019126597W WO2020135217A1 WO 2020135217 A1 WO2020135217 A1 WO 2020135217A1 CN 2019126597 W CN2019126597 W CN 2019126597W WO 2020135217 A1 WO2020135217 A1 WO 2020135217A1
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Prior art keywords
output voltage
voltage
flyback converter
digital
current
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English (en)
French (fr)
Inventor
孙伟锋
张华鑫
张琥
余梦霖
赵思宇
徐申
时龙兴
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Southeast University
CSMC Technologies Fab2 Co Ltd
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Southeast University
CSMC Technologies Fab2 Co Ltd
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Priority to US17/418,606 priority Critical patent/US11777416B2/en
Publication of WO2020135217A1 publication Critical patent/WO2020135217A1/zh
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33515—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with digital control
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present application relates to the technical field of power converters, in particular to a flyback converter and its output voltage acquisition method and device.
  • flyback converters have occupied the main position in the power adapter and charger markets due to their advantages of high efficiency, simple structure, and low cost. .
  • the traditional PSR (Primary Side Regulation) flyback converter obtains the output voltage of the flyback converter by sampling the voltage on the auxiliary winding, but due to the presence of the on-voltage drop and on-resistance of the secondary diode , Will cause a large output voltage error, and when the output voltage is large, the slope of the voltage on the auxiliary winding before the inflection point will be very small, after the voltage division can be approximated as DC, so it is difficult to use two lines for inflection sampling .
  • PSR flyback converters based on synchronous rectification are widely used, in which secondary diodes are replaced with synchronous rectifiers, which greatly reduces the on-voltage drop and on-resistance of the original secondary side. Thereby reducing the output voltage error.
  • the PSR flyback converter based on synchronous rectification also has the above-mentioned problem, that is, when the output voltage is large, two-wire sampling cannot be used.
  • a flyback converter and a method and device for obtaining an output voltage thereof are provided.
  • a method for obtaining the output voltage of a flyback converter includes the following steps:
  • the current output voltage is successively approximated by a dichotomy until the end of the M switching cycles to obtain the output voltage of the flyback converter.
  • An output voltage acquisition device for a flyback converter including:
  • the reference voltage obtaining module is set to obtain the reference output voltage of the flyback converter
  • a voltage sampling module configured to sample the current output voltage of the flyback converter during the reset time of each switching cycle of the continuous M switching cycles of the flyback converter, where M is a positive integer
  • the output voltage acquisition module is configured to successively approximate the current output voltage using a dichotomy according to the reference output voltage and the current output voltage until the end of the M switching cycles to obtain the output voltage of the flyback converter .
  • a flyback converter includes an output voltage acquisition device.
  • the output voltage acquisition device includes:
  • the reference voltage obtaining module is set to obtain the reference output voltage of the flyback converter
  • a voltage sampling module configured to sample the current output voltage of the flyback converter during the reset time of each switching cycle of the continuous M switching cycles of the flyback converter, where M is a positive integer
  • the output voltage acquisition module is configured to successively approximate the current output voltage using a dichotomy according to the reference output voltage and the current output voltage until the end of the M switching cycles to obtain the output voltage of the flyback converter .
  • Figure 1 is a circuit topology diagram of a conventional PSR flyback converter.
  • Figure 2 is a circuit topology diagram of a PSR flyback converter based on synchronous rectification.
  • FIG. 3 is a working waveform diagram of the PSR flyback converter shown in FIG. 2 based on synchronous rectification.
  • FIG. 4 is a flowchart of a method for obtaining the output voltage of a flyback converter in an embodiment.
  • FIG. 5 is a flowchart of obtaining the reference output voltage of the flyback converter in an embodiment.
  • FIG. 6 is a flowchart of obtaining the output voltage of the flyback converter using the dichotomy method in an embodiment.
  • FIG. 7 is a schematic diagram of obtaining an output voltage of a flyback converter in an embodiment.
  • FIG. 8 is an operation waveform diagram of the flyback converter in the reset time of the first switching cycle in an embodiment.
  • FIG. 9 is a block diagram of an output voltage acquisition device of a flyback converter in an embodiment.
  • the conventional PSR flyback converter is obtained by a flyback voltage on the secondary winding N A sampled output voltage V o, but due to the presence of a secondary diode conduction voltage drop D and The on-resistance will cause a large output voltage error, and when the output voltage V o is large, the slope of the voltage on the auxiliary winding N A before the inflection point will be very small, and it can be approximated as DC after voltage division, so it is very It is difficult to use two lines for inflection sampling.
  • the PSR flyback converter based on synchronous rectification is widely used. As shown in FIG.
  • the secondary diode D 1 is replaced with a synchronous rectifier Q 2 , so that the original secondary
  • the on-voltage drop and on-resistance are greatly reduced, thereby reducing the output voltage error.
  • the PSR flyback converter based on synchronous rectification also has the above-mentioned problem, that is, when the output voltage V o is large, two-line sampling cannot be used.
  • FIG. 3 is a working waveform diagram of the PSR flyback converter based on synchronous rectification shown in FIG. 2, wherein duty is the switching signal of the primary side main switching tube Q 1 , and SR_duty is the switching signal of the secondary side synchronous rectifying tube Q 2 , I p is the primary current, I s for the secondary current, V sense is the voltage across the auxiliary winding N a.
  • the operating modes of the PSR flyback converter based on synchronous rectification can include three types, namely DCM (Discontinuous Conduction Mode, discontinuous conduction mode), BCM (Boundary Conduction Mode, critical conduction mode) and CCM (Continuous Conduction Mode, continuous conduction mode). The following mainly discusses the DCM working mode.
  • a switching period T may be divided into three sections, respectively t on, reset time and the dead time t r t dead time is turned on.
  • the primary side main switch Q 1 is in a conducting state.
  • the primary side of the transformer T b acts as an inductor for storing energy, and the primary current I p will rise linearly from zero Until the main switch Q 1 is turned off, the primary current I p rises to the maximum value I peak .
  • the secondary-side current when current flows in from the same-named terminal on the primary side, the secondary-side current will flow out from the same-named terminal on the secondary side, but due to the on-time t on , the secondary-side synchronous rectifier Q 2 is in the off state, so in this case the secondary current I s is zero, the sampled voltage V sense auxiliary winding N a is a negative value.
  • the main switching tube Q 1 After the main switching tube Q 1 has passed an on-time t on , the main switching tube Q 1 will be in the off state for the remaining time of the same switching cycle T, because the flyback converter works in the DCM operating mode in, it is possible to put the main switch Q 1 is turned off during this time into two sections, respectively, the reset time and the dead time t r t dead.
  • V sense auxiliary winding N A will produce a shorter duration and smaller voltage oscillations , disappears after shaking the voltage, V sense the sampled voltage will be the auxiliary winding N a t r is approximately linear decay in the reset time.
  • a switching cycle T does not end at the reset time, the remaining time is dead time t dead.
  • the dead time t dead since a part of the energy still exists in the parasitic capacitance of the main switch Q 1 , the parasitic capacitance of the main switch Q 1 will resonate with the excitation inductance of the primary winding N p until The next switching cycle T is turned on.
  • the secondary current I s is zero, and the parasitic capacitance of the main switch Q 1 will resonate with the excitation inductance of the primary winding N p , so the sampling voltage V sense of the auxiliary winding N A Will be in a state of shock.
  • the present application proposes a voltage acquisition method for a flyback converter, which uses the principle of dichotomy to obtain the output voltage of the flyback converter during the reset time of the switching cycle.
  • FIG. 4 is a flowchart of a method for obtaining an output voltage of a flyback converter in an embodiment. As shown in FIG. 4, the method for obtaining an output voltage of a flyback converter includes the following steps:
  • Step 402 Obtain the reference output voltage of the flyback converter.
  • a comparison reference value that is, the reference output voltage is needed, and the initial value of the reference output voltage can be obtained in advance.
  • obtaining the reference output voltage of the flyback converter includes:
  • Step 502 Calculate the voltage difference between the upper limit of the preset digital output voltage and the lower limit of the preset digital output voltage.
  • the preset upper limit of the digital output voltage V ref_max may be a digital value corresponding to the maximum output voltage of the flyback converter plus a certain threshold
  • the preset lower limit of the digital output voltage V ref_min may be the minimum output voltage of the flyback converter
  • the corresponding digital value plus a certain threshold can be set according to the actual situation.
  • the upper limit of the digital output voltage V ref_max is preset to 512
  • Step 506 Perform digital-to-analog conversion on the first digital value to obtain an initial value of the reference output voltage.
  • the first digital value V ref_digital can be digital-to-analog converted by the processor's built-in analog-to-digital converter (DAC) to obtain the initial value of the reference output voltage V ref_analog , or an external analog-to-digital converter can also be used Digital-to-analog conversion is performed on the first digital value V ref_digital .
  • DAC analog-to-digital converter
  • the built-in analog-to-digital converter is optionally used for analog-to-digital conversion.
  • step 404 the current output voltage of the flyback converter is sampled during the reset time of each switching cycle of the continuous M switching cycles of the flyback converter, where M is a positive integer.
  • the auxiliary winding N by sampling the voltage V sense as the current A flyback converter output voltage.
  • step 306 according to the reference output voltage and the current output voltage, the current output voltage is successively approximated using the dichotomy method until the end of M switching cycles to obtain the output voltage of the flyback converter.
  • the output voltage can be successively approximated by the principle of dichotomy according to the reference output voltage and the current output voltage during the reset time of each switching cycle. After several switching cycles of approximation , You can accurately sample the output voltage of the current cycle.
  • the current output voltage is successively approximated by a dichotomy method, including:
  • Step 602 Compare the reference output voltage with the current output voltage.
  • step 604 if the reference output voltage is greater than the current output voltage, the first digital value is reduced by the voltage difference/ 2i+1 , where i is the number of comparisons between the current reference output voltage and the current output voltage, and i is a positive integer.
  • step 606 if the reference output voltage is less than the current output voltage, the first digital value is increased by the voltage difference/ 2i+1 .
  • Step 608 Perform digital-to-analog conversion on the first digital value after the decrease or increase to obtain the reference output voltage, and continue to compare the reference output voltage with the current output voltage until the end of the M switching cycles.
  • the first digital value is used as the flyback The output voltage of the converter.
  • V sense the voltage on the auxiliary winding N
  • V sense the current output voltage of the excitation converter
  • the reference output voltage V ref_analog and the current output voltage V sense are compared for the first time.
  • a first digital value V ref_digital decreased or increased after the 'digital-analog conversion to obtain a new reference output voltage V ref_analog', and re-sampling the voltage on the auxiliary winding N A flyback converter in order to obtain the current output voltage V sense '.
  • a second comparison is made between the new reference output voltage V ref_analog 'and the resampled current output voltage V sense '. If the reference output voltage V ref_analog ' is greater than the current output voltage V sense ', the A digital value V ref_digital 'decreases by ⁇ V/2 3 , and conversely, increases ⁇ V/2 3 based on the first digital value V ref_digital ' obtained last time.
  • the output voltage is continued to be successively used in the above manner Approximation, and so on, until the end of M switching cycles T, the output voltage of the flyback converter is obtained, and the final output voltage V ref_final of the flyback converter is the first digital value obtained after the last comparison.
  • the reference output voltages follow the reference output voltage obtained at the end of the previous switching period to ensure the continuity of the successive approximation of the output voltage Sex.
  • M satisfies the following relationship: 2 N+M ⁇ voltage difference, where N is the total number of comparisons between the reference output voltage and the current output voltage in one switching cycle.
  • the output voltage of the reference voltage and the output current can be N times a successful comparison
  • the range of the output voltage can be reduced Up to 1/2 N of the previous cycle, if 2 N+M ⁇ voltage difference ⁇ V, it means that after M switching cycles T, each switching cycle T after N times of comparison, you can accurately sample the flyback transformation
  • the current cycle output voltage V ref_final of the converter if the first switching cycle T 1 t of the reset time r, the output voltage of the reference voltage and the output current can be N times a successful comparison, then after every switching cycle T, the range of the output voltage can be reduced Up to 1/2 N of the previous cycle, if 2 N+M ⁇ voltage difference ⁇ V, it means that after M switching cycles T, each switching cycle T after N times of comparison, you can accurately sample the flyback transformation The current cycle output voltage V ref_final of the converter .
  • the current output voltage of the flyback converter is sampled, and the current output voltage is successively approximated by the dichotomy method according to the reference output voltage and the current output voltage Until the end of M switching cycles, the output voltage of the current cycle of the flyback converter can be accurately obtained.
  • the upper limit of the output voltage input to the waveform judgment module may be V ref_max
  • the lower limit of the output voltage may be V ref_min
  • the reset sampling time t r, V sense the voltage on the auxiliary winding N A, and is determined by the waveform digital to analog converter module to the first output voltage V ref_digital analog-digital converts the analog V ref_analog .
  • the voltage V sense on the auxiliary winding N A is compared with the analog quantity V ref_analog output from the digital-to-analog converter for the first time to obtain the comparison signal V ref_comp , and according to the high and low levels of the comparison signal V ref_comp and the principle of dichotomy The voltage digital quantity V ref_digital that the judgment waveform judgment module outputs to the analog-to-digital converter for the second time.
  • V sense is greater than V ref_analog
  • the comparison signal V ref_comp is 1, and the corresponding waveform judgment module outputs the digital voltage V ref_digital to the analog-to-digital converter for the second time V ref_min + ⁇ V/2+ ⁇ V/4 ;
  • the comparison signal V ref_comp is 0, and the corresponding waveform judgment module outputs the digital voltage V ref_digital to the analog-to-digital converter for the second time as V ref_min + ⁇ V/2- ⁇ V/4.
  • FIG. 8 is a waveform diagram of the embodiment of a flyback converter for the reset time of the first switching cycle of the embodiment, wherein, V sense is the sampled voltage on the auxiliary winding N A, V ref_comp is the comparison signal output by the comparator, V ref_max is the upper limit of the output voltage, and V ref_min is the lower limit of the output voltage.
  • the analog-to-digital converter within T can be converted ten times, while the reset time within one switching cycle T can be converted four times.
  • the voltage analog quantity V ref_analog is greater than the sampling voltage V sense on the auxiliary winding N A.
  • the comparison signal output by the comparator is 0, and the voltage digital quantity V ref_digital needs to be further reduced .
  • the voltage analog quantity V ref_analog output by the comparator for the second time is smaller than the sampling voltage V sense on the auxiliary winding NA.
  • the comparison signal output by the comparator is 1, and the voltage digital quantity V ref_digital needs to be further increased.
  • the current output voltage of the flyback converter is sampled during the reset time of each switching cycle of the continuous M switching cycles of the flyback converter, and the dichotomy is used according to the reference output voltage and the current output voltage The current output voltage is successively approached until the end of M switching cycles to obtain an accurate output voltage of the flyback converter, thereby effectively solving the problem that the two-wire output voltage cannot be accurately sampled when the output voltage is large.
  • analog-to-digital converter and the comparator shown in FIG. 7 can be external analog-to-digital converters and external comparators, and the waveform judgment module can be a processor.
  • the analog-to-digital converter can be a built-in analog-to-digital converter and a built-in comparator, both of which are integrated in the processor.
  • a single-chip microcomputer with an analog-to-digital conversion function can be used.
  • the flyback converter includes a main switch tube and a synchronous rectifier tube. After the output voltage of the flyback converter is obtained, the method further includes:
  • Step 902 a duty cycle signal is generated according to the output voltage.
  • Step 904 Generate a first control signal and a second control signal according to the duty cycle signal.
  • Step 906 Control the main switch tube according to the first control signal, and control the synchronous rectifier tube according to the second control signal, so that the flyback converter outputs a constant voltage.
  • PI Proportional Integral, proportional integral
  • the duty ratio signal d adopts a PWM (Pulse Width Modulation, pulse width modulation) control method to generate a first control signal duty and a second control signal SR_duty, and controls the main switching tube Q 1 in FIG. 2 according to the first control signal duty.
  • the synchronous rectifier Q 2 in FIG. 2 is controlled according to the second control signal SR_duty, so that the flyback converter outputs a constant voltage.
  • steps in the flowcharts of FIGS. 4-6 are displayed in order according to the arrows, the steps are not necessarily executed in the order indicated by the arrows. Unless clearly stated in this article, the execution of these steps is not strictly limited in order, and these steps may be executed in other orders. Moreover, at least some of the steps in FIGS. 4-6 may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but may be executed at different times. These sub-steps or stages The execution order of is not necessarily sequential, but may be executed in turn or alternately with at least a part of other steps or sub-steps or stages of other steps.
  • a device for obtaining an output voltage of a flyback converter includes: a reference voltage obtaining module 110, a voltage sampling module 120, and an output Voltage acquisition module 130.
  • the reference voltage obtaining module 110 is configured to obtain the reference output voltage of the flyback converter; the voltage sampling module 120 is configured to sample the flyback during the reset time of each switching cycle of the continuous M switching cycles of the flyback converter The current output voltage of the converter, where M is a positive integer; the output voltage acquisition module 130 is set to approximate the current output voltage one by one using the dichotomy according to the reference output voltage and the current output voltage until the end of M switching cycles to obtain a flyback transformation The output voltage of the device.
  • the reference voltage acquisition module 110 is specifically configured to calculate the voltage difference between the upper limit of the preset digital output voltage and the lower limit of the preset digital output voltage; the half of the voltage difference is superimposed on the preset digital output voltage The lower limit to obtain the first digital value; perform digital-to-analog conversion on the first digital value to obtain the initial value of the reference output voltage.
  • the output voltage acquisition module 130 is specifically configured to compare the reference output voltage with the current output voltage; if the reference output voltage is greater than the current output voltage, the first digital value is reduced by the voltage difference/2 i+1 , Where i is the number of comparisons between the current reference output voltage and the current output voltage, and i is a positive integer; if the reference output voltage is less than the current output voltage, the first digital value is increased by the voltage difference/2 i+1 ; for decreasing or increasing The first digital value after the digital to analog conversion to obtain the reference output voltage, and continue to compare the reference output voltage and the current output voltage, until the end of M switching cycles, the first digital value as the output voltage of the flyback converter.
  • M satisfies the following relationship: 2 N+M ⁇ voltage difference, where N is the total number of comparisons between the reference output voltage and the current output voltage in one switching cycle.
  • a flyback converter including the above-mentioned output voltage obtaining device.
  • Each module in the above-mentioned output voltage acquisition device 100 may be implemented in whole or in part by software, hardware, or a combination thereof.
  • the above modules may be embedded in the hardware form or independent of the processor in the computer device, or may be stored in the memory in the computer device in the form of software so that the processor can call and execute the operations corresponding to the above modules.

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  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

一种反激变换器及其输出电压获取方法、装置，其中输出电压获取方法包括以下步骤：获取反激变换器的参考输出电压（S402）；在反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样反激变换器的当前输出电压（S404），其中，M为正整数；根据参考输出电压和当前输出电压，采样二分法逐次逼近当前输出电压，直至M个开关周期结束，获得反激变换器的输出电压（S406）。

Description

反激变换器及其输出电压获取方法、装置 技术领域
本申请涉及电源变换器技术领域，特别是涉及一种反激变换器及其输出电压获取方法、装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成示例性技术。
随着电子设备的发展趋于便携化，隔离式电源变换器得到了快速发展，其中反激变换器由于具有效率高、结构简单、成本低等优点，在电源适配器、充电器市场占据了主要地位。
传统的PSR(Primary Side Regulation，初级侧调节)反激变换器是通过对辅助绕组上的电压进行采样来获得反激变换器的输出电压，但由于副边二极管存在导通压降和导通电阻，会造成较大的输出电压误差，并且在输出电压较大时，拐点前辅助绕组上的电压的斜率会很小，分压后可近似认为是直流，所以就很难采用双线进行拐点采样。
为了有效解决副边二极管的问题，基于同步整流的PSR反激变换器被广泛应用，其中副边二极管被替换为同步整流管，使得原来副边的导通压降和导通电阻大幅减小，从而减小输出电压误差。但是，基于同步整流的PSR反激变换器同样存在上述问题，即输出电压较大时，无法采用双线进行采样。
发明内容
根据本申请的各种实施例，提供一种反激变换器及其输出电压获取方法、装置。
一种反激变换器的输出电压获取方法，包括以下步骤：
获取反激变换器的参考输出电压；
在所述反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样所述反激变换器的当前输出电压，其中，M为正整数；以及
根据所述参考输出电压和所述当前输出电压，采用二分法逐次逼近所述当前输出电压，直至所述M个开关周期结束，获得所述反激变换器的输出电压。
一种反激变换器的输出电压获取装置，包括：
参考电压获取模块，设置为获取反激变换器的参考输出电压；
电压采样模块，设置为在所述反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样所述反激变换器的当前输出电压，其中，M为正整数；以及
输出电压获取模块，设置为根据所述参考输出电压和所述当前输出电压，采用二分法逐次逼近所述当前输出电压，直至所述M个开关周期结束，获得所述反激变换器的输出电压。
一种反激变换器，包括输出电压获取装置，所述输出电压获取装置包括：
参考电压获取模块，设置为获取反激变换器的参考输出电压；
电压采样模块，设置为在所述反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样所述反激变换器的当前输出电压，其中，M为正整数；以及
输出电压获取模块，设置为根据所述参考输出电压和所述当前输出电压，采用二分法逐次逼近所述当前输出电压，直至所述M个开关周期结束，获得所述反激变换器的输出电压。
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其他特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更清楚地说明本申请实施例或示例性技术中的技术方案，下面将对实施例或示例性技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他实施例的附图。
图1为传统的PSR反激变换器的电路拓扑图。
图2为基于同步整流的PSR反激变换器的电路拓扑图。
图3为图2所示基于同步整流的PSR反激变换器的工作波形图。
图4为一个实施例中反激变换器的输出电压获取方法的流程图。
图5为一个实施例中反激变换器的参考输出电压的获取流程图。
图6为一个实施例中采用二分法获取反激变换器的输出电压的流程图。
图7为一个实施例中反激变换器的输出电压的获取示意图。
图8为一个实施例中反激变换器在第一个开关周期的复位时间内的工作波形图。
图9为一个实施例中反激变换器的输出电压获取装置的方框图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不用于限定本申请。
在本申请的描述中，需要理解的是，术语“中心”、“横向”、“上”、“下”“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”以及“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，需要说明的是，当元件被称为“形成在另一元件上”时，它可以直接连接到另一元件上或者可能同时存在居中元件。当一个元件被认为是“连接”另一个元件，它可以直接连接到另一元件或者同时存在居中元件。相反，当元件被称作“直接在”另一元件“上”时，不存在中间元件。
如图1所示，传统的PSR反激变换器是通过对辅助绕组N A上的电压进行采样来获得反激变换器的输出电压V o，但由于副边二极管D 1存在导通压降和导通电阻，会造成较大的输出电压误差，并且在输出电压V o较大时，拐点前辅助绕组N A上的电压的斜率会很小，分压后可近似认为是直流，所以就很难采用双线进行拐点采样。为了有效解决副边二极管D 1的问题，基于同步整流的PSR反激变换器被广泛应用，如图2所示，副边二极管D 1被替换为同步整流管Q 2，使得原来副边的导通压降和导通电阻大幅减小，从而减小输出电压误差。但是，基于同步整流的PSR反激变换器同样存在上述问题，即输出电压V o较大时，无法采用双线进行采样。
本申请是发明人对以下问题的认识和研究做出的：
图3为图2所示基于同步整流的PSR反激变换器的工作波形图，其中，duty为原边主开关管Q 1的开关信号，SR_duty为副边同步整流管Q 2的开关信号，I p为原边电流，I s为副边电流，V sense为辅助绕组N A上的电压。并且，通常情况下，基于同步整流的PSR反激变换器的工作模式可包括三种，分别为DCM(Discontinuous Conduction Mode，断续导通模式)、BCM(Boundary Conduction Mode，临界导通模式)和CCM(Continuous Conduction Mode，连续导通模式)。下面主要对DCM工作模式进行讨论。
参考图3所示，在DCM工作模式中，可将一个开关周期T分成三段，分别为导通时间t on、复位 时间t r和死区时间t dead。
在导通时间t on内，原边主开关管Q 1处于导通状态，此时变压器T b的原边充当一个电感的作用，用于储存能量，原边电流I p将从零开始线性上升，直至主开关管Q 1断开，原边电流I p上升至最大值I peak。根据变压器T b的同异名端特性可知，当电流从原边的同名端流入时，副边电流就会从副边的同名端流出，但由于导通时间t on内，副边同步整流管Q 2处于断开状态，所以此时副边电流I s为零，辅助绕组N A的采样电压V sense为一个负数值。
在主开关管Q 1经过了一个导通时间t on后，在同一个开关周期T的剩余时间内，该主开关管Q 1都将处于断开状态，由于反激变换器工作在DCM工作模式中，所以可以把主开关管Q 1断开的这段时间分成两段，分别为复位时间t r和死区时间t dead。在复位时间t r内，由于主开关管Q 1从导通状态变成断开状态，所以根据变压器T b的电感特性，副边电压会反向，同时由于副边同步整流管Q 2处于导通状态，所以存储在变压器T b内的能量可以通过副边释放出来，从而产生副边电流I s，并且该电流将从峰值I peak_s线性下降至零。其中，在主开关管Q 1断开的瞬间，由于漏感和主开关管Q 1的寄生电容的作用，辅助绕组N A的采样电压V sense会产生一个较小且持续时间较短的电压振荡，在该电压振荡消失后，辅助绕组N A的采样电压V sense会在复位时间t r内近似线性衰减。
在复位时间t r结束后，在DCM工作模式中，一个开关周期T并未结束，剩下的时间为死区时间t dead。在死区时间t dead内，由于主开关管Q 1的寄生电容中仍存在一部分的能量未释放出来，所以主开关管Q 1的寄生电容会与原边绕组N p的励磁电感发生谐振，直至下一个开关周期T导通。同时，由于死区时间t dead内，副边电流I s为零，且主开关管Q 1的寄生电容会与原边绕组N p的励磁电感发生谐振，所以辅助绕组N A的采样电压V sense将处于震荡状态。
因此上述分析可知，辅助绕组N A上的电压V sense在导通时间t on、复位时间t r和死区时间t dead均呈现出不同的特点，但由于副边同步整流管Q 2的存在，辅助绕组N A上的电压V sense的斜率在复位时间t r内近似不变，可以认为是直流，并且在复位时间t r结束时，辅助绕组N A上的电压V sense等于输出电压V o，所以基于该特点，本申请提出了一种反激变换器的电压获取方法，在开关周期的复位时间内，采用二分法原理来获取反激变换器的输出电压。
图4为一个实施例中反激变换器的输出电压获取方法的流程图，如图4所示，反激变换器的输出电压获取方法包括以下步骤：
步骤402，获取反激变换器的参考输出电压。
具体而言，在采用二分法原理来获取反激变换器的输出电压时，需要一个比较基准值即参考输出电压，其中参考输出电压的初始值可预先获取。
在一个实施例中，如图5所示，获取反激变换器的参考输出电压，包括：
步骤502，计算预设数字输出电压上限与预设数字输出电压下限之间的电压差值。
具体而言，预设数字输出电压上限V ref_max可以为反激变换器的最大输出电压对应的数字值加上一定的阈值，预设数字输出电压下限V ref_min可以为反激变换器的最小输出电压对应的数字值加上一定的阈值，具体可根据实际情况进行设定。例如，在一个示例中，预设数字输出电压上限V ref_max为512，预设数字输出电压下限V ref_min为256，此时两者之间的电压差值△V＝V ref_max-V ref_min＝256。
步骤504，将电压差值的二分之一叠加至预设数字输出电压下限，以获得第一数字值，即，第一数字值V ref_digital＝V ref_min+△V/2。
步骤506，对第一数字值进行数模转换以获得参考输出电压的初始值。
在实际应用中，可通过处理器的内置模数转换器(DAC)对第一数字值V ref_digital进行数模转换，以获得参考输出电压V ref_analog的初始值，也可以采用外置模数转换器对第一数字值V ref_digital进行数模转换。其中，由于外置模数转换器会占用一定的空间且成本高、功耗大，所以可选地采用内置模数转换器进行模数转换。
步骤404，在反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样反激变换器的当前输出电压，其中，M为正整数。
具体地，参考图2所示，可通过采样辅助绕组N A上的电压V sense以作为反激变换器的当前输出电 压。
步骤306，根据参考输出电压和当前输出电压，采用二分法逐次逼近当前输出电压，直至M个开关周期结束，获得反激变换器的输出电压。
也就是说，根据反激变换器的开关周期波形，可在每个开关周期的复位时间内，根据参考输出电压和当前输出电压采用二分法原理逐次逼近输出电压，经过数个开关周期的逼近后，可以准确采样当前周期的输出电压。
在一个实施例中，如图6所示，根据参考输出电压和当前输出电压，采用二分法逐次逼近当前输出电压，包括：
步骤602，比较参考输出电压和当前输出电压的大小。
步骤604，如果参考输出电压大于当前输出电压，则将第一数字值降低电压差值/2 i+1，其中，i为当前参考输出电压和当前输出电压的比较次数，i为正整数。
步骤606，如果参考输出电压小于当前输出电压，则将第一数字值增加电压差值/2 i+1。
步骤608，对降低或增加后的第一数字值进行数模转换以获得参考输出电压，并继续比较参考输出电压和当前输出电压的大小，直至M个开关周期结束，第一数字值作为反激变换器的输出电压。
具体地，可先在连续M个开关周期T的第一个开关周期T 1的复位时间t r内，采样辅助绕组N A上的电压V sense以作为反激变换器的当前输出电压，即反激变换器的当前输出电压为V sense，同时，获取参考输出电压V ref_analog的初始值，例如，参考输出电压V ref_analog的初始值为对第一数字值V ref_digital＝V ref_min+△V/2进行数模转换后获得的模拟值。然后，对参考输出电压V ref_analog和当前输出电压V sense进行第一次比较，如果参考输出电压V ref_analog大于当前输出电压V sense，则将第一数字值V ref_digital降低△V/2 2，即降低后的第一数字值V ref_digital’＝V ref_min+△V/2-△V/2 2，反之，将第一数字值V ref_digital增加△V/2 2，即增加后的第一数字值V ref_digital’＝V ref_min+△V/2+△V/2 2。
接着，对降低或增加后的第一数字值V ref_digital’进行数模转换以获得新的参考输出电压V ref_analog’，并重新采样辅助绕组N A上的电压以获得反激变换器的当前输出电压V sense’。然后，对新的参考输出电压V ref_analog’和重新采样获得的当前输出电压V sense’进行第二次比较，如果参考输出电压V ref_analog’大于当前输出电压V sense’，则在前次获得的第一数字值V ref_digital’的基础上降低△V/2 3，反之，在前次获得的第一数字值V ref_digital’的基础上增加△V/2 3。
依次类推，直至第一个开关周期T 1的复位时间t r结束，暂停对输出电压的逐次逼近，然后在第二开关周期T 2的复位时间t r内，继续采用上述方式对输出电压进行逐次逼近，依次类推，直至M个开关周期T结束，完成对反激变换器的输出电压的获取，最终获得的反激变换器的输出电压V ref_final为最后一次比较后获得的第一数字值。其中，需要说明的是，在第二个开关周期T 2至第M个开关周期T M内，参考输出电压均沿用前一开关周期结束时获得的参考输出电压，以保证输出电压逐次逼近的连续性。
在一个实施例中，M满足以下关系：2 N+M≥电压差值，其中，N为一个开关周期内参考输出电压和当前输出电压的总比较次数。
具体而言，如果在第一个开关周期T 1的复位时间t r内，参考输出电压和当前输出电压可以成功比较N次，那么每经过一个开关周期T，就可以把输出电压的范围减小至上一个周期的1/2 N，如果2 N+M≥电压差值△V，则说明可以在经过M个开关周期T，每个开关周期T经过N次的比较后，可以准确采样反激变换器的当前周期的输出电压V ref_final。因此，在反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样反激变换器的当前输出电压，根据参考输出电压和当前输出电压，采用二分法逐次逼近当前输出电压，直至M个开关周期结束，可以准确获得反激变换器的当前周期的输出电压。
为使本领域技人员更清楚的了解本申请，参考图7所示，可规定输入至波形判断模块的输出电压上限为V ref_max，输出电压下限为V ref_min，两者之间的电压差值△V＝V ref_max-V ref_min，波形判断模块第一次输出给数模转换器的电压数字量V ref_digital＝V ref_min+△V/2。
然后，采样复位时间t r内，辅助绕组N A上的电压V sense，并通过数模转换器将波形判断模块第一次输出给模数转换器的电压数字量V ref_digital转换成模拟量V ref_analog。接着，对辅助绕组N A上的电压V sense和数模转换器第一次输出的模拟量V ref_analog进行比较，以获得比较信号V ref_comp，并根据比较信 号V ref_comp的高低电平和二分法原理来判断波形判断模块第二次输出给模数转换器的电压数字量V ref_digital。其中，如果V sense大于V ref_analog，那么比较信号V ref_comp为1，相应的波形判断模块第二次输出给模数转换器的电压数字量V ref_digital为V ref_min+△V/2+△V/4；反之，比较信号V ref_comp为0，相应的波形判断模块第二次输出给模数转换器的电压数字量V ref_digital为V ref_min+△V/2-△V/4。
依次类推，如果在第一个开关周期T 1的复位时间t r内成功比较N次，那么每经过一个开关周期T，就可以把输出电压的范围减小至上一个开关周期T的1/2 N，如果2 N+M≥电压差值△V，则说明可以在经过M个开关周期T，每个开关周期T经过N次的比较后，可以准确采样反激变换器的当前周期的输出电压V ref_final，所获得的输出电压V ref_final为最后一次计算获得的波形判断模块输出给模数转换器的电压数字量V ref_digital。
可选地，作为一个具体示例，图8为一个实施例中反激变换器在第一个开关周期的复位时间内的工作波形图，其中，V sense为辅助绕组N A上的采样电压，V ref_comp为比较器输出的比较信号，V ref_max为输出电压上限，V ref_min为输出电压下限。假设，反激变换器的开关频率为100kHz，模数转换器的转换速率为1MHz，V ref_max＝512，V ref_min＝256，那么电压差值△V＝V ref_max-V ref_min＝256，一个开关周期T内模数转换器可以转换十次，而一个开关周期T的复位时间内可转换四次。
根据二分法原理，波形判断模块第一次输出给模数转换器的电压数字量V ref_digital为384，即V ref_min+△V/2＝384，由图8可知，模数转换器第一次输出的电压模拟量V ref_analog大于辅助绕组N A上的采样电压V sense，此时比较器输出的比较信号为0，需要进一步调小电压数字量V ref_digital。根据二分法原理，波形判断模块第二次输出给模数转换器的电压数字量V ref_digital为320，即V ref_min+△V/2-△V/4＝320，由图8可知，模数转换器第二次输出的电压模拟量V ref_analog小于辅助绕组NA上的采样电压V sense，此时比较器输出的比较信号为1，需要进一步增大电压数字量V ref_digital。根据二分法原理，波形判断模块第三次输出给模数转换器的电压数字量V ref_digital为352，即V ref_min+△V/2-△V/4+△V/8＝352，由图8可知，模数转换器第三次输出的电压模拟量V ref_analog小于辅助绕组N A上的采样电压V sense，此时比较器输出的比较信号为0，需要进一步调小电压数字量V ref_digital。根据二分法原理，波形判断模块第四次输出给模数转换器的电压数字量V ref_digital为336，即V ref_min+△V/2-△V/4+△V/8-△V/16＝336，由图8可知，模数转换器第四次输出的电压模拟量V ref_analog大于辅助绕组N A上的采样电压V sense，此时比较器输出的比较信号为0，需要进一步调小电压数字量V ref_digital。根据二分法原理，波形判断模块第五次输出给模数转换器的电压数字量V ref_digital为328，即V ref_min+△V/2-△V/4+△V/8-△V/16-△V/32＝328，但由于在一个开关周期T的复位时间t r内只允许经过四次比较，所以第四次比较所产生的结果328并没有办法作用在该开关周期T内，但可以将其作为下一个开关周期T的复位时间tr内的初始值进行比较。
通过对上述分析可以发现，在一个开关周期T的复位时间t r内，电压数字量V ref_digital的变化范围从最初的△V＝256，缩小到了△V/2 4＝16，说明在一个开关周期T的复位时间t r内，四次成功比较可将输出电压的范围缩小16倍，那么再经过一个开关周期T的四次成功比较之后，输出电压的范围将会再次缩小16倍，即△V/2^8＝1，因而在复位时间内采用二分法原理可以准确采样输出电压。
本实施例中，通过在反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样反激变换器的当前输出电压，并根据参考输出电压和当前输出电压，采用二分法逐次逼近当前输出电压，直至M个开关周期结束，可获得准确的反激变换器的输出电压，从而有效解决了在输出电压较大的情况下无法采用双线进行输出电压准确采样的问题。在实际应用中，还可以增加对输出电压的判断，并在输出电压较大的情况下采用本申请的电压获取方法，而在输出电压较小时仍采用传统方法，例如，当辅助绕组N A上的电压V sense大于预设电压阈值时，采用上述二分法原理获得输出电压；当辅助绕组N A上的电压V sense小于等于预设电压阈值时，直接采用传统电压获取方法，以减少计算量。
需要说明的是，图7所示的模数转换器和比较器可以为外置模数转换器和外置比较器，波形判断模块可以为处理器，考虑到成本问题，可选地，模数转换器和比较器可以为内置模数转换器和内置比较器，均集成在处理器中，例如，可以采用具有模数转换功能的单片机来实现。
可选地，在一个实施例中，如图9所示，反激变换器包括主开关管和同步整流管，在获得反激变 换器的输出电压之后，还包括：
步骤902，根据输出电压生成占空比信号。
步骤904，根据占空比信号生成第一控制信号和第二控制信号。
步骤906，根据第一控制信号对主开关管进行控制，并根据第二控制信号对同步整流管进行控制，以使反激变换器恒压输出。
具体而言，在获得反激变换器的输出电压之后，可对输出电压与目标电压之间的电压差值进行PI(Proportional Integral，比例积分)调节，以生成占空比信号d，然后根据占空比信号d采用PWM(Pulse Width Modulation，脉冲宽度调制)控制方式生成第一控制信号duty和第二控制信号SR_duty，并根据第一控制信号duty对图2中的主开关管Q 1进行控制，以及根据第二控制信号SR_duty对图2中的同步整流管Q 2进行控制，从而使得反激变换器恒压输出。
本实施例中，通过根据获得的输出电压对反激变换器进行控制，可以保证反激变换器在整个过程中能够保持恒压输出，保证了系统运行的可靠性。
应该理解的是，虽然图4-6的流程图中的各个步骤按照箭头的指示依次显示，但是这些步骤并不是必然按照箭头指示的顺序依次执行。除非本文中有明确的说明，这些步骤的执行并没有严格的顺序限制，这些步骤可以以其它的顺序执行。而且，图4-6中的至少一部分步骤可以包括多个子步骤或者多个阶段，这些子步骤或者阶段并不必然是在同一时刻执行完成，而是可以在不同的时刻执行，这些子步骤或者阶段的执行顺序也不必然是依次进行，而是可以与其它步骤或者其它步骤的子步骤或者阶段的至少一部分轮流或者交替地执行。
在一个实施例中，提出了一种反激变换器的输出电压获取装置，如图9所示，反激变换器的输出电压获取装置100包括：参考电压获取模块110、电压采样模块120和输出电压获取模块130。
具体地，参考电压获取模块110设置为获取反激变换器的参考输出电压；电压采样模块120设置为在反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样反激变换器的当前输出电压，其中，M为正整数；输出电压获取模块130设置为根据参考输出电压和当前输出电压，采用二分法逐次逼近当前输出电压，直至M个开关周期结束，获得反激变换器的输出电压。
在一个实施例中，参考电压获取模块110具体设置为计算预设数字输出电压上限与预设数字输出电压下限之间的电压差值；电压差值的二分之一叠加至预设数字输出电压下限，以获得第一数字值；对第一数字值进行数模转换以获得参考输出电压的初始值。
在一个实施例中，输出电压获取模块130具体设置为比较参考输出电压和当前输出电压的大小；如果参考输出电压大于当前输出电压，则将第一数字值降低电压差值/2 i+1，其中，i为当前参考输出电压和当前输出电压的比较次数，i为正整数；如果参考输出电压小于当前输出电压，则将第一数字值增加电压差值/2 i+1；对降低或增加后的第一数字值进行数模转换以获得参考输出电压，并继续比较参考输出电压和当前输出电压的大小，直至M个开关周期结束，第一数字值作为反激变换器的输出电压。
在一个实施例中，M满足以下关系：2 N+M≥电压差值，其中，N为一个开关周期内参考输出电压和当前输出电压的总比较次数。
在一个实施例中，提出了一种反激变换器，包括上述的输出电压获取装置。
关于输出电压获取装置100和反激变换器的具体限定可以参见上文中对于输出电压获取方法的限定，在此不再赘述。上述输出电压获取装置100中的各个模块可全部或部分通过软件、硬件及其组合来实现。上述各模块可以硬件形式内嵌于或独立于计算机设备中的处理器中，也可以以软件形式存储于计算机设备中的存储器中，以便于处理器调用执行以上各个模块对应的操作。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围 应以所附权利要求为准。

Claims (16)

  1. 一种反激变换器的输出电压获取方法，包括以下步骤：
    获取反激变换器的参考输出电压；
    在所述反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样所述反激变换器的当前输出电压，其中，M为正整数；以及
    根据所述参考输出电压和所述当前输出电压，采用二分法逐次逼近所述当前输出电压，直至所述M个开关周期结束，获得所述反激变换器的输出电压。
  2. 根据权利要求1所述的方法，其特征在于，所述获取反激变换器的参考输出电压，包括：
    计算预设数字输出电压上限与预设数字输出电压下限之间的电压差值；
    将所述电压差值的二分之一叠加至所述预设数字输出电压下限，以获得第一数字值；以及
    对所述第一数字值进行数模转换以获得所述参考输出电压的初始值。
  3. 根据权利要求2所述的方法，其特征在于，所述根据所述参考输出电压和所述当前输出电压，采用二分法逐次逼近所述当前输出电压，包括：
    比较所述参考输出电压和所述当前输出电压的大小；
    如果所述参考输出电压大于所述当前输出电压，则将所述第一数字值降低所述电压差值/2 i+1，其中，i为当前所述参考输出电压和所述当前输出电压的比较次数，所述i为正整数；
    如果所述参考输出电压小于所述当前输出电压，则将所述第一数字值增加所述电压差值/2 i+1；以及
    对降低或增加后的第一数字值进行数模转换以获得所述参考输出电压，并继续比较所述参考输出电压和所述当前输出电压的大小，直至所述M个开关周期结束，所述第一数字值作为所述反激变换器的输出电压。
  4. 根据权利要求3所述的方法，其特征在于，所述M满足以下关系：
    2 N+M≥所述电压差值，其中，N为一个所述开关周期内所述参考输出电压和所述当前输出电压的总比较次数。
  5. 根据权利要求1-4中任一项所述的方法，其特征在于，所述反激变换器包括主开关管和同步整流管，在获得所述反激变换器的输出电压之后，还包括：
    根据所述输出电压生成占空比信号；
    根据所述占空比信号生成第一控制信号和第二控制信号；以及
    根据所述第一控制信号对所述主开关管进行控制，并根据所述第二控制信号对所述同步整流管进行控制，以使所述反激变换器恒压输出。
  6. 一种反激变换器的输出电压获取装置，包括：
    参考电压获取模块，设置为获取反激变换器的参考输出电压；
    电压采样模块，设置为在所述反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样所述反激变换器的当前输出电压，其中，M为正整数；以及
    输出电压获取模块，设置为根据所述参考输出电压和所述当前输出电压，采用二分法逐次逼近所述当前输出电压，直至所述M个开关周期结束，获得所述反激变换器的输出电压。
  7. 根据权利要求6所述的装置，其特征在于，所述参考电压获取模块具体设置为，
    计算预设数字输出电压上限与预设数字输出电压下限之间的电压差值；
    所述电压差值的二分之一叠加至所述预设数字输出电压下限，以获得第一数字值；以及
    对所述第一数字值进行数模转换以获得所述参考输出电压的初始值。
  8. 根据权利要求7所述的装置，其特征在于，所述输出电压获取模块具体设置为，
    比较所述参考输出电压和所述当前输出电压的大小；
    如果所述参考输出电压大于所述当前输出电压，则将所述第一数字值降低所述电压差值/2 i+1，其中，i为当前所述参考输出电压和所述当前输出电压的比较次数，所述i为正整数；
    如果所述参考输出电压小于所述当前输出电压，则将所述第一数字值增加所述电压差值/2 i+1；以及
    对降低或增加后的第一数字值进行数模转换以获得所述参考输出电压，并继续比较所述参考输出 电压和所述当前输出电压的大小，直至所述M个开关周期结束，所述第一数字值作为所述反激变换器的输出电压。
  9. 根据权利要求8所述的装置，其特征在于，所述M满足以下关系：
    2 N+M≥所述电压差值，其中，N为一个所述开关周期内所述参考输出电压和所述当前输出电压的总比较次数。
  10. 根据权利要求6-9中任一项所述的装置，其特征在于，所述反激变换器包括主开关管和同步整流管，所述参考电压获取模块在获得所述反激变换器的输出电压之后，还：
    根据所述输出电压生成占空比信号；
    根据所述占空比信号生成第一控制信号和第二控制信号；以及
    根据所述第一控制信号对所述主开关管进行控制，并根据所述第二控制信号对所述同步整流管进行控制，以使所述反激变换器恒压输出。
  11. 一种反激变换器，包括输出电压获取装置，所述输出电压获取装置包括：
    参考电压获取模块，设置为获取反激变换器的参考输出电压；
    电压采样模块，设置为在所述反激变换器的连续M个开关周期的每个开关周期的复位时间内，采样所述反激变换器的当前输出电压，其中，M为正整数；以及
    输出电压获取模块，设置为根据所述参考输出电压和所述当前输出电压，采用二分法逐次逼近所述当前输出电压，直至所述M个开关周期结束，获得所述反激变换器的输出电压。
  12. 根据权利要求11所述的反激变换器，其特征在于，所述参考电压获取模块具体设置为，
    计算预设数字输出电压上限与预设数字输出电压下限之间的电压差值；
    所述电压差值的二分之一叠加至所述预设数字输出电压下限，以获得第一数字值；以及
    对所述第一数字值进行数模转换以获得所述参考输出电压的初始值。
  13. 根据权利要求12所述的反激变换器，其特征在于，采用所述反激变换器的内置模数转换器对所述第一数字值进行数模转换以获得所述参考输出电压的初始值。
  14. 根据权利要求12所述的反激变换器，其特征在于，所述输出电压获取模块具体设置为，
    比较所述参考输出电压和所述当前输出电压的大小；
    如果所述参考输出电压大于所述当前输出电压，则将所述第一数字值降低所述电压差值/2 i+1，其中，i为当前所述参考输出电压和所述当前输出电压的比较次数，所述i为正整数；
    如果所述参考输出电压小于所述当前输出电压，则将所述第一数字值增加所述电压差值/2 i+1；以及
    对降低或增加后的第一数字值进行数模转换以获得所述参考输出电压，并继续比较所述参考输出电压和所述当前输出电压的大小，直至所述M个开关周期结束，所述第一数字值作为所述反激变换器的输出电压。
  15. 根据权利要求14所述的反激变换器，其特征在于，所述M满足以下关系：
    2 N+M≥所述电压差值，其中，N为一个所述开关周期内所述参考输出电压和所述当前输出电压的总比较次数。
  16. 根据权利要求11-15中任一项所述的反激变换器，其特征在于，所述反激变换器还包括主开关管和同步整流管，所述参考电压获取模块在获得所述反激变换器的输出电压之后，还：
    根据所述输出电压生成占空比信号；
    根据所述占空比信号生成第一控制信号和第二控制信号；以及
    根据所述第一控制信号对所述主开关管进行控制，并根据所述第二控制信号对所述同步整流管进行控制，以使所述反激变换器恒压输出。
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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI758924B (zh) * 2020-10-28 2022-03-21 產晶積體電路股份有限公司 調適性導通時間控制的電源控制系統
CN113156922B (zh) * 2021-05-25 2022-07-08 三门核电有限公司 一种ap1000核级电磁阀动作参数诊断装置和方法
CN113972839B (zh) * 2021-12-27 2022-03-11 广东希荻微电子股份有限公司 升压转换器的控制方法、控制器及功率转换装置
CN116092403B (zh) * 2023-01-16 2023-06-09 海的电子科技(苏州)有限公司 图像信号发生器的电压波形检测方法和装置、存储介质

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070236193A1 (en) * 2006-04-10 2007-10-11 Vo Hai H Adaptive DC to DC converter system
CN105262340A (zh) * 2014-07-18 2016-01-20 绿达光电股份有限公司 电源控制器以及相关的控制方法
CN105305830A (zh) * 2015-10-12 2016-02-03 矽力杰半导体技术(杭州)有限公司 基于原边反馈的反激式变换器的控制方法及控制电路
CN105680697A (zh) * 2014-12-08 2016-06-15 戴洛格半导体公司 开关电源转换器的自适应参考电压
CN107342689A (zh) * 2017-07-07 2017-11-10 成都启臣微电子股份有限公司 一种反激式开关电源的变压器防饱和控制系统
CN107579670A (zh) * 2017-09-19 2018-01-12 东南大学 一种同步整流原边反馈反激式电源的恒压输出控制系统

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6434021B1 (en) * 2000-06-05 2002-08-13 Iwatt Switching power supply packages
US6385059B1 (en) * 2000-11-14 2002-05-07 Iwatt, Inc. Transformer-coupled switching power converter having primary feedback control
EP2156563B1 (en) * 2007-06-06 2011-09-07 Nxp B.V. Circuit with a successive approximation analog to digital converter
CN201993416U (zh) * 2011-03-30 2011-09-28 四川和芯微电子股份有限公司 中间电压检测电路
US9042075B2 (en) * 2013-03-04 2015-05-26 Nokia Technologies Oy Apparatus and method for water protection of an electronic device
CN104660261B (zh) * 2013-11-19 2019-01-29 山东共达电声股份有限公司 一种自适应量化的模拟数字转换装置
EP2905900A1 (en) * 2014-02-11 2015-08-12 Dialog Semiconductor (UK) Limited Switching control of a bipolar transistor for DCDC power converters
US9647532B2 (en) * 2015-02-05 2017-05-09 Stmicroelectronics S.R.L. Control device for a PFC converter and corresponding control method
US9763289B2 (en) * 2015-03-31 2017-09-12 Infineon Technologies Austria Ag System and method for a switched-mode power supply
CN107147301B (zh) * 2017-06-22 2019-04-23 南京航空航天大学 一种crm反激pfc变换器的变导通时间控制方法
CN108549039B (zh) * 2018-04-13 2020-11-27 同济大学 一种开关电源纹波测量电路

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070236193A1 (en) * 2006-04-10 2007-10-11 Vo Hai H Adaptive DC to DC converter system
CN105262340A (zh) * 2014-07-18 2016-01-20 绿达光电股份有限公司 电源控制器以及相关的控制方法
CN105680697A (zh) * 2014-12-08 2016-06-15 戴洛格半导体公司 开关电源转换器的自适应参考电压
CN105305830A (zh) * 2015-10-12 2016-02-03 矽力杰半导体技术(杭州)有限公司 基于原边反馈的反激式变换器的控制方法及控制电路
CN107342689A (zh) * 2017-07-07 2017-11-10 成都启臣微电子股份有限公司 一种反激式开关电源的变压器防饱和控制系统
CN107579670A (zh) * 2017-09-19 2018-01-12 东南大学 一种同步整流原边反馈反激式电源的恒压输出控制系统

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