WO2020133801A1 - 显示面板和智能终端 - Google Patents
显示面板和智能终端 Download PDFInfo
- Publication number
- WO2020133801A1 WO2020133801A1 PCT/CN2019/082221 CN2019082221W WO2020133801A1 WO 2020133801 A1 WO2020133801 A1 WO 2020133801A1 CN 2019082221 W CN2019082221 W CN 2019082221W WO 2020133801 A1 WO2020133801 A1 WO 2020133801A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- light
- layer
- area
- display panel
- emitting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
- H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
- H10H29/14—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
- H10H29/142—Two-dimensional arrangements, e.g. asymmetric LED layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
- H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors
- G09G2360/144—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light being ambient light
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/126—Shielding, e.g. light-blocking means over the TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
- H10K59/65—OLEDs integrated with inorganic image sensors
Definitions
- the invention relates to the field of electronic display, in particular to a display panel and an intelligent terminal.
- the existing technical solution is usually to design the camera of the mobile device on the outside of the display screen. Therefore, the size of the display screen needs to be avoided to accommodate the front-facing camera. As a result, the content cannot be displayed normally in this part of the area, and only the special-shaped cutting design can be performed.
- the invention provides a display panel and an intelligent terminal.
- the light-emitting area of the display panel has a light-shielding layer, which can prevent light inside the display panel from entering the light-transmitting area and causing interference to the light sensor.
- the present invention provides a display panel including a plurality of light emitting regions and a plurality of light transmitting regions, the light emitting regions including a substrate, a thin film transistor layer located above the substrate, A pixel definition layer above the thin film transistor layer and a light emitting layer above the pixel definition layer; wherein,
- the light-emitting area further includes a light-shielding layer, and the light-shielding layer is located in the substrate and/or between the substrate and the light-emitting layer;
- the projected area of the light-shielding layer in the horizontal direction is greater than or equal to the projected area of the light-emitting region in the horizontal direction;
- the plurality of light-emitting areas and the plurality of light-transmitting areas are arranged at intervals.
- the projection of the light shielding layer in the horizontal direction covers all opaque areas of the display panel, and the opaque areas are areas other than the opaque areas on the display panel.
- the light-shielding layer is located in the substrate; the substrate includes a first buffer layer, a light-shielding layer above the first buffer layer, and a second The buffer layer.
- the material forming the light-shielding layer is a light-shielding metal.
- the present invention provides a display panel including a plurality of light-emitting regions and a plurality of light-transmitting regions, the light-emitting regions including a substrate, a thin film transistor layer above the substrate, and a thin film transistor layer A pixel definition layer above and a light emitting layer above the pixel definition layer; wherein,
- the light-emitting area further includes a light-shielding layer that is located in the substrate and/or between the substrate and the light-emitting layer.
- the projected area of the light-shielding layer in the horizontal direction is greater than or equal to the projected area of the light-emitting region in the horizontal direction.
- the projection of the light shielding layer in the horizontal direction covers all opaque areas of the display panel, and the opaque areas are areas other than the opaque areas on the display panel.
- the plurality of light-emitting areas and the plurality of light-transmitting areas are spaced apart.
- the light-shielding layer is located in the substrate; the substrate includes a first buffer layer, a light-shielding layer above the first buffer layer, and a second The buffer layer.
- the material forming the light-shielding layer is a light-shielding metal.
- the thin film transistor layer includes:
- An active region includes a channel region and source and drain regions located on both sides of the channel region;
- a gate metal layer above the gate dielectric layer, a projection of the gate metal layer in the vertical direction covers the channel region;
- the light shielding layer is any one of the planarization layer, the gate dielectric layer, and the interlayer dielectric layer, and the material forming the light shielding layer is a light shielding insulating material.
- the light shielding layer is the pixel definition layer
- the material forming the pixel definition layer is a light shielding insulating material
- the light emitting region further includes an electrode layer between the pixel defining layer and the light emitting layer, the electrode layer and the pixel defining layer together constitute the light shielding layer, forming
- the material of the electrode layer is a light-shielding metal
- the material forming the pixel definition layer is a light-shielding insulating material.
- the light-transmitting area includes:
- a light-transmitting substrate, the light-transmitting substrate is formed by the extension of the substrate in the adjacent light-emitting area;
- Insulation stack the insulation stack is formed by the extension of the insulation layer in the thin-film crystal layer in the adjacent light-emitting region.
- the plurality of light-transmitting areas and the light-emitting areas adjacent to the plurality of light-transmitting areas constitute a first functional area, and the first functional area is located by the The light-emitting area realizes the display function, and the light transmission function is realized through the light-transmitting area;
- the light-emitting area not adjacent to the light-transmitting area constitutes a second functional area, and the second functional area realizes a display function through the light-emitting area located in the second functional area.
- the area of the first functional area is equal to or smaller than the area of the display panel, and the area of the second functional area is smaller than the area of the display panel.
- the present invention also provides an intelligent terminal, the intelligent terminal includes a display panel and a light sensor located below the display panel, the display panel includes a plurality of light emitting areas and a plurality of light transmitting areas, the light emitting The region includes a substrate, a thin film transistor layer above the substrate, a pixel definition layer above the thin film transistor layer, and a light emitting layer above the pixel definition layer; wherein,
- the light emitting region further includes a light shielding layer, the light shielding layer is located in the substrate and/or between the substrate and the light emitting layer; wherein,
- the plurality of light-transmitting areas and the light-emitting areas adjacent to the plurality of light-transmitting areas constitute a first functional area, and the first functional area is located by the The light emitting area realizes the display function, and the light transmitting function is realized through the light transmitting area;
- the light-emitting area not adjacent to the light-transmitting area constitutes a second functional area, and the second functional area realizes a display function through the light-emitting area located in the second functional area;
- the light sensor is located below the first functional area.
- the number of the light sensors is greater than or equal to two, and the plurality of light sensors constitute a camera.
- the number of the optical sensors is greater than or equal to two, and the optical sensors constitute a fingerprint recognition unit.
- the display panel provided by the present invention includes a plurality of light-emitting areas and a plurality of light-transmitting areas, which can allow the light outside the display panel to enter the interior of the display panel without affecting the display function of the display panel and reach the light located below the display panel sensor.
- the light-emitting area has a light-shielding layer to prevent light inside the display panel from entering the light-transmitting area and causing interference to the light sensor.
- FIG. 1 is a schematic diagram of a partial structure of a display panel in the prior art
- FIGS. 2 to 6 are partial structural schematic diagrams of display panels in different embodiments of the present invention.
- FIG. 7 is a first top view of the display panel in the embodiment of the present invention.
- FIG. 8 is a second top view of the display panel in the embodiment of the present invention.
- FIG. 1 is a schematic diagram of a partial structure of a display panel in the prior art.
- the thin film transistor layer includes a plurality of thin film transistor units 10 having the same structure and a plurality of the same light transmitting units 20, and the thin film transistor units 10 and the light transmitting units 20 are arranged at intervals.
- the thin-film transistor unit 10 is close to the light-transmitting unit 20, so the light emitted by the light-emitting material above the thin-film transistor unit 10 easily enters the light-transmitting region 20, so that it is a camera located below the region A lot of interference light is introduced, which seriously affects the imaging effect of the camera.
- the present invention provides a display panel and an intelligent terminal.
- the light-emitting area of the display panel has a light-shielding layer, which can prevent light inside the display panel from entering the light-transmitting area and causing interference to the light sensor.
- FIG. 2 is a schematic diagram of a partial structure of a display panel in an embodiment of the present invention.
- the display panel includes a plurality of light-emitting regions 10 and a plurality of light-transmitting regions 20.
- the light-emitting regions 10 include a substrate, a thin film transistor layer above the substrate, a pixel definition layer above the thin film transistor layer, and A light emitting layer located above the pixel definition layer; wherein the light emitting region 10 further includes a light shielding layer, the light shielding layer is located in the substrate and/or between the substrate and the light emitting layer.
- the plurality of light-emitting regions 10 and the plurality of light-transmitting regions 20 are arranged at intervals.
- the substrate includes a first isolation layer 210, a first buffer layer 220 above the first isolation layer, a second isolation layer 230 above the first buffer layer 220 and The second buffer layer 240 above the second isolation layer.
- the material of the first isolation layer 210 and the second isolation layer 230 may be polyimide.
- the thin film transistor layer includes: an active region 110 located above the substrate, the active region 110 including a channel region and source and drain regions located on both sides of the channel region; covering the active region 110 Gate dielectric layer 120; a gate metal layer 130 above the gate dielectric layer 120, a projection of the gate metal layer 130 in the vertical direction covering the channel region; covering the gate dielectric layer 120 and an interlayer dielectric layer 160 of the gate metal; a source-drain metal layer 170 penetrating the interlayer dielectric layer 160 and electrically connected to the source-drain region; covering the interlayer dielectric layer 160 and the source-drain metal The planarization layer 180 of layer 170.
- the pixel definition layer includes an electrode layer 190 that penetrates the planarization layer 180 and is electrically connected to the source-drain metal layer 170; and is located above the planarization layer 180 and exposes the electrode The insulating layer of layer 190.
- the thin film transistor layer further includes a second gate insulating layer 140 above the gate metal layer 130, and a second gate insulating layer 140 above the second gate insulating layer 140
- the gate metal layer 150 and the interlayer dielectric layer 160 cover the second gate insulating layer 140 and the second gate metal layer 150.
- the light transmitting unit 20 includes: a first substrate including a first buffer layer 220 and a second buffer layer 240 located above the first buffer layer; and a first medium covering the substrate Layer, the first dielectric layer is formed by the extension of the gate dielectric layer 120 in the adjacent thin film transistor unit 10; the second dielectric layer covering the gate dielectric layer 120, the second dielectric layer is composed of adjacent The extended structure of the interlayer dielectric layer 160 in the thin film transistor unit 10 of FIG.
- the plurality of light-transmitting areas 20 and the light-emitting area 10 adjacent to the plurality of light-transmitting areas 20 constitute a first functional area, and the first functional area is located in the first functional area Of the light-emitting area 10 realizes the display function, and the light-transmitting area 20 realizes the light-conducting function; the light-emitting area 10 not adjacent to the light-transmitting area 20 constitutes a second functional area, and the second functional area is located at the The light-emitting area 10 of the second functional area realizes the display function.
- the area of the first functional area is equal to or smaller than the area of the display panel, and the area of the second functional area is smaller than the area of the display panel.
- the light shielding layer is located in the substrate. Specifically, it is located in the second buffer layer 240.
- the second buffer layer 240 includes a first portion 240, a light shielding layer 250 located above the first portion 240 and a second portion 260 located above the light shielding layer 250 shown.
- the light shielding layer 250 may be located in any laminated structure of the substrate, including but not limited to any one of a plurality of buffer layers or any one of a plurality of isolation layers.
- the material forming the light-shielding layer 250 is a light-shielding metal.
- the projected area of the light shielding layer 250 in the horizontal direction is greater than or equal to the projected area of the light emitting region 10 in the horizontal direction.
- the thin film transistor unit 10 further includes a light shielding layer, the light shielding layer is located on the substrate, the gate dielectric layer 120, the interlayer dielectric layer 160, the planarization layer 180, and the pixel definition layer In any one of the layers or between any two adjacent layers.
- the light shielding layer is located in the substrate, specifically, in the second buffer layer 240.
- the second buffer layer 240 includes a first portion 240, a light shielding layer 250 located above the first portion 240 and a second portion 260 located above the light shielding layer 250 shown.
- the light shielding layer 250 may be located in any laminated structure of the substrate, including but not limited to any one of a plurality of buffer layers or any one of a plurality of isolation layers.
- the material forming the light-shielding layer 250 is a light-shielding metal; the horizontal projection area of the light-shielding layer is greater than or equal to the horizontal projection area of the thin film transistor unit 10.
- FIG. 3 is a partial structural schematic diagram of a display panel in another embodiment of the present invention.
- the light-shielding layer is the planarization layer 180
- the material forming the planarization layer 180 is a light-shielding insulating material.
- FIG. 4 is a partial structural schematic diagram of a display panel in another embodiment of the present invention.
- the thin film transistor layer further includes a pixel definition layer located above the electrode layer 190, and the pixel definition layer has a through hole exposing the electrode layer 190;
- the material is light-shielding insulating material.
- the light-shielding insulating material is black resin.
- FIG. 5 is a partial structural diagram of a display panel in Embodiment 4 of the present invention.
- the light shielding layer is the electrode layer 190
- the material forming the electrode layer 190 is a light shielding metal.
- FIG. 6 is a partial structural schematic diagram of a display panel in Embodiment 5 of the present invention.
- the thin film transistor layer further includes an insulating layer above the electrode layer 190, the insulating layer has a through hole exposing the electrode layer 190; wherein,
- the material constituting the insulating layer is a light-shielding insulating material, and the light-shielding insulating material is black resin.
- FIG. 7 is a first top view of the display panel in the embodiment of the present invention. It can be seen that, in order to better block the light inside the display panel, the horizontal projection of the light-shielding layer covers all the opaque areas of the display panel, and the opaque areas are transparent on the display panel Area outside the area.
- FIG. 8 is a second top view of the display panel in the embodiment of the present invention.
- the display panel includes a light emitting area composed of a metal trace 310, a plurality of thin film transistor units 320, and a light-shielding layer 330.
- the area not covered by the metal trace 310, the plurality of thin film transistor units 320, and the light-shielding layer 330 constitutes a light-transmitting area.
- the light shielding layer 330 covers all areas except the light-transmitting area to ensure that the light entering the display panel is not disturbed by the light inside the display panel.
- the present invention also provides an intelligent terminal.
- the intelligent terminal includes a display panel and a light sensor located below the display panel.
- the display panel includes a plurality of light-emitting regions 10 and a plurality of light-transmitting regions 20.
- the light emitting region 10 includes a substrate, a thin film transistor layer located above the substrate, a pixel definition layer located above the thin film transistor layer, and a light emitting layer located above the pixel definition layer.
- the light-emitting region 10 further includes a light-shielding layer, and the light-shielding layer is located in the substrate and/or between the substrate and the light-emitting layer; wherein, at least one light-transmitting region 20 is above the light sensor.
- the plurality of light-transmitting areas 20 and the light-emitting area 10 adjacent to the plurality of light-transmitting areas 20 constitute a first functional area, and the first functional area is located in the first functional area Of the light-emitting area 10 realizes the display function, and the light-transmitting area 20 realizes the light-conducting function; the light-emitting area 10 not adjacent to the light-transmitting area 20 constitutes a second functional area, and the second functional area is located at the The light-emitting area 10 of the second functional area realizes the display function; wherein, the light sensor is located below the first functional area.
- the number of the optical sensors is greater than or equal to two, and the multiple optical sensors constitute a camera.
- the number of the optical sensors is greater than or equal to two, and the optical sensors constitute a fingerprint identification unit.
- the plurality of light-emitting regions 10 and the plurality of light-transmitting regions 20 are arranged at intervals.
- the substrate includes a first isolation layer 210, a first buffer layer 220 above the first isolation layer, a second isolation layer 230 above the first buffer layer 220 and The second buffer layer 240 above the second isolation layer.
- the material of the first isolation layer 210 and the second isolation layer 230 may be polyimide.
- the thin film transistor layer includes: an active region 110 located above the substrate, the active region 110 including a channel region and source and drain regions located on both sides of the channel region; covering the active region 110 Gate dielectric layer 120; a gate metal layer 130 above the gate dielectric layer 120, a projection of the gate metal layer 130 in the vertical direction covering the channel region; covering the gate dielectric layer 120 and an interlayer dielectric layer 160 of the gate metal; a source-drain metal layer 170 penetrating the interlayer dielectric layer 160 and electrically connected to the source-drain region; covering the interlayer dielectric layer 160 and the source-drain metal The planarization layer 180 of layer 170.
- the pixel definition layer includes an electrode layer 190 that penetrates the planarization layer 180 and is electrically connected to the source-drain metal layer 170; and is located above the planarization layer 180 and exposes the electrode The insulating layer of layer 190.
- the thin film transistor layer further includes a second gate insulating layer 140 above the gate metal layer 130, and a second gate insulating layer 140 above the second gate insulating layer 140
- the gate metal layer 150 and the interlayer dielectric layer 160 cover the second gate insulating layer 140 and the second gate metal layer 150.
- the light transmitting unit 20 includes: a first substrate including a first buffer layer 220 and a second buffer layer 240 located above the first buffer layer; and a first medium covering the substrate Layer, the first dielectric layer is formed by the extension of the gate dielectric layer 120 in the adjacent thin film transistor unit 10; the second dielectric layer covering the gate dielectric layer 120, the second dielectric layer is composed of adjacent The extended structure of the interlayer dielectric layer 160 in the thin film transistor unit 10 of FIG.
- the plurality of light-transmitting areas 20 and the light-emitting area 10 adjacent to the plurality of light-transmitting areas 20 constitute a first functional area, and the first functional area is located in the first functional area Of the light-emitting area 10 realizes the display function, and the light-transmitting area 20 realizes the light-conducting function; the light-emitting area 10 not adjacent to the light-transmitting area 20 constitutes a second functional area, and the second functional area is located at the The light-emitting area 10 of the second functional area realizes the display function.
- the area of the first functional area is equal to or smaller than the area of the display panel, and the area of the second functional area is smaller than the area of the display panel.
- the light shielding layer is located in the substrate. Specifically, it is located in the second buffer layer 240.
- the second buffer layer 240 includes a first portion 240, a light shielding layer 250 located above the first portion 240 and a second portion 260 located above the light shielding layer 250 shown.
- the light shielding layer 250 may be located in any laminated structure of the substrate, including but not limited to any one of a plurality of buffer layers or any one of a plurality of isolation layers.
- the material forming the light-shielding layer 250 is a light-shielding metal.
- the projected area of the light shielding layer 250 in the horizontal direction is greater than or equal to the projected area of the light emitting region 10 in the horizontal direction.
- the projection of the light-shielding layer 250 in the horizontal direction covers all opaque areas of the display panel, and the opaque areas are areas other than the opaque areas on the display panel.
- the thin film transistor unit 10 further includes a light shielding layer, the light shielding layer is located in any one of the substrate, the gate dielectric layer 120, the interlayer dielectric layer 160, the planarization layer 180 and the pixel definition layer or Between any two adjacent layers.
- the light shielding layer is located in the substrate, specifically, in the second buffer layer 240.
- the second buffer layer 240 includes a first portion 240, a light shielding layer 250 located above the first portion 240, and a second portion 260 located above the light shielding layer 250 shown.
- the light shielding layer 250 may be located in any stacked structure of the substrate, including but not limited to any one of a plurality of buffer layers or any one of a plurality of isolation layers.
- the material forming the light-shielding layer 250 is a light-shielding metal; the horizontal projection area of the light-shielding layer is greater than or equal to the horizontal projection area of the thin film transistor unit 10.
- FIG. 3 is a partial structural diagram of a display panel in Embodiment 2 of the present invention.
- the light-shielding layer is the planarization layer 180
- the material forming the planarization layer 180 is a light-shielding insulating material.
- FIG. 4 is a partial structural schematic diagram of a display panel in Embodiment 3 of the present invention.
- the thin film transistor layer further includes a pixel definition layer located above the electrode layer 190, and the pixel definition layer has a through hole exposing the electrode layer 190;
- the material is light-shielding insulating material.
- the light-shielding insulating material is black resin.
- FIG. 5 is a partial structural diagram of a display panel in Embodiment 4 of the present invention.
- the light shielding layer is the electrode layer 190
- the material forming the electrode layer 190 is a light shielding metal.
- FIG. 6 is a partial structural schematic diagram of a display panel in Embodiment 5 of the present invention.
- the thin film transistor layer further includes an insulating layer above the electrode layer 190, the insulating layer has a through hole exposing the electrode layer 190; wherein,
- the material constituting the insulating layer is a light-shielding insulating material, and the light-shielding insulating material is black resin.
- FIG. 7 is a first top view of the display panel in the embodiment of the present invention. It can be seen that, in order to better block the light inside the display panel, the horizontal projection of the light-shielding layer covers all the opaque areas of the display panel, and the opaque areas are transparent on the display panel Area outside the area.
- FIG. 8 is a second top view of the display panel in the embodiment of the present invention.
- the display panel includes a light emitting area composed of a metal trace 310, a plurality of thin film transistor units 320, and a light-shielding layer 330.
- the area not covered by the metal trace 310, the plurality of thin film transistor units 320, and the light-shielding layer 330 constitutes a light-transmitting area.
- the light shielding layer 330 covers all areas except the light-transmitting area to ensure that the light entering the display panel is not disturbed by the light inside the display panel.
- the display panel provided by the present invention includes a plurality of light-emitting areas and a plurality of light-transmitting areas, which can allow the light outside the display panel to enter the interior of the display panel without affecting the display function of the display panel and reach the light located below the display panel sensor.
- the light-emitting area has a light-shielding layer to prevent light inside the display panel from entering the light-transmitting area and causing interference to the light sensor.
Landscapes
- Engineering & Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electroluminescent Light Sources (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本发明提供一种显示面板和智能终端。所述显示面板包括多个发光区域和多个透光区域,所述发光区域包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,所述发光区域还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间。
Description
本发明涉及电子显示领域,尤其涉及一种显示面板和智能终端。
随着智能设备的普及和显示屏技术的不断发展,显示屏的功能也随之增多。现有的移动设备显示屏上均设置有显示屏隔离的摄像头,占据了移动设备显示区的面积,导致移动设备的屏占比无法进一步提高。作为如今移动设备上中不可或缺的一部分,如何将摄像头与显示屏集成,使得屏占比最大化,是急需解决的问题。
现有技术方案通常是将移动设备的摄像头设计在显示屏外侧,显示屏因此需避让尺寸用来容纳前置摄像头,从而导致该部分区域无法正常显示内容,只能进行异形切割设计。
本发明提供一种显示面板和智能终端,所述显示面板的发光区域中具有遮光层,能够避免显示面板内部的光线进入透光区域,对光传感器造成干扰。
为解决上述问题,本发明提供了一种显示面板,所述显示面板包括多个发光区域和多个透光区域,所述发光区域包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,
所述发光区域还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间;
所述遮光层在水平方向的投影面积大于或等于所述发光区域在水平方向的投影面积;
所述多个发光区域和多个透光区域间隔设置。
根据本发明的其中一个方面,所述遮光层在水平方向的投影覆盖所述显示面板的全部不透光区域,所述不透光区域为所述显示面板上透光区域之外的区域。
根据本发明的其中一个方面,所述遮光层位于所述衬底中;所述衬底包括第一缓冲层、位于所述第一缓冲层上方的遮光层以及位于所示遮光层上方的第二缓冲层。
根据本发明的其中一个方面,形成所述遮光层的材料为遮光金属。本发明提供了一种显示面板,所述显示面板包括多个发光区域和多个透光区域,所述发光区域包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,
所述发光区域还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间。
根据本发明的其中一个方面,所述遮光层在水平方向的投影面积大于或等于所述发光区域在水平方向的投影面积。
根据本发明的其中一个方面,所述遮光层在水平方向的投影覆盖所述显示面板的全部不透光区域,所述不透光区域为所述显示面板上透光区域之外的区域。
根据本发明的其中一个方面,所述多个发光区域和多个透光区域间隔设置。
根据本发明的其中一个方面,所述遮光层位于所述衬底中;所述衬底包括第一缓冲层、位于所述第一缓冲层上方的遮光层以及位于所示遮光层上方的第二缓冲层。
根据本发明的其中一个方面,形成所述遮光层的材料为遮光金属。
根据本发明的其中一个方面,所述薄膜晶体管层包括:
有源区,所述有源区包括沟道区和位于所述沟道区两侧的源漏区;
覆盖所述有源区的栅极介质层;
位于所述栅极介质层上方的栅极金属层,所述栅极金属层的在垂直方向的投影覆盖所述沟道区;
覆盖所述有源区的层间介质层;
贯穿所述层间介质层并与所述源漏区电连接的源漏金属层;
覆盖所述层间介质层和所述源漏金属层的平坦化层;
贯穿所述平坦化层并与所述源漏金属层电连接的电极层;其中,所述遮光层位于所述衬底、栅极介质层、层间介质层、平坦化层以及电极层中的任意一层中或任意相邻的两层之间。
根据本发明的其中一个方面,所述遮光层为所述平坦化层、栅极介质层和层间介质层中的任意一个,形成所述遮光层的材料为遮光绝缘材料。
根据本发明的其中一个方面,所述遮光层为所述像素定义层,形成所述像素定义层的材料为遮光绝缘材料。
根据本发明的其中一个方面,所述发光区域还包括位于所述像素定义层和所述发光层之间的电极层,所述电极层和所述像素定义层共同构成所述遮光层,形成所述电极层的材料为遮光金属,形成所述像素定义层的材料为遮光绝缘材料。
根据本发明的其中一个方面,所述透光区域包括:
透光衬底,所述透光衬底由相邻的发光区域中的衬底延伸构成;
绝缘叠层,所述绝缘的叠层由相邻的发光区域中的薄膜晶体层中的绝缘层延伸构成。
根据本发明的其中一个方面,所述多个透光区域和与所述多个透光区域相邻的发光区域构成第一功能区,所述第一功能区通过位于所述第一功能区的发光区域实现显示功能,通过所述透光区域实现光线传导功能;
不与所述透光区域相邻的发光区域构成第二功能区,所述第二功能区通过位于所述第二功能区的发光区域实现显示功能。
根据本发明的其中一个方面,所述第一功能区的面积等于或小于所述显示面板的面积,所述第二功能区的面积小于所述显示面板的面积。
相应的,本发明还提供了一种智能终端,所述智能终端包括显示面板和位于所述显示面板下方的光传感器,所述显示面板包括多个发光区域和多个透光区域,所述发光区域包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,
所述发光区域还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间;其中,
所述光传感器上方至少有一个透光区域。
根据本发明的其中一个方面,所述多个透光区域和与所述多个透光区域相邻的发光区域构成第一功能区,所述第一功能区通过位于所述第一功能区的发光区域实现显示功能,通过所述透光区域实现光线传导功能;
不与所述透光区域相邻的发光区域构成第二功能区,所述第二功能区通过位于所述第二功能区的发光区域实现显示功能;其中,
所述光传感器位于所述第一功能区下方。
根据本发明的其中一个方面,所述光传感器的数目大于等于两个,所述多个光传感器构成摄像头。
根据本发明的其中一个方面,所述光传感器的数目大于等于两个,所述光传感器构成指纹识别单元。
本发明提供的显示面板包括多个发光区域和多个透光区域,能够在不影响显示面板的显示功能的同时使显示面板外侧的光线进入显示面板内部,并到达位于所述显示面板下方的光传感器。所述发光区域中具有遮光层,能够避免显示面板内部的光线进入透光区域,对光传感器造成干扰。
图1为现有技术中的显示面板的局部结构示意图;
图2至图6为本发明的不同实施例中的显示面板的局部结构示意图;
图7为本发明的实施例中的显示面板的第一俯视图;
图8为本发明的实施例中的显示面板的第二俯视图。
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。
首先对现有技术进行简要说明,参见图1,图1为现有技术中的显示面板的局部结构示意图。所述薄膜晶体管层包括多个具有相同结构的薄膜晶体管单元10和多个相同的透光单元20,所述薄膜晶体管单元10和透光单元20间隔排列。
在现有技术中,如图1所示,薄膜晶体管单元10紧邻透光单元20,因此薄膜晶体管单元10上方的发光材料发出的光线很容易进入透光区20,从而为位于该区域下方的摄像头引入了大量干扰光线,严重影响了摄像头的成像效果。
因此,本发明提供一种显示面板和智能终端,所述显示面板的发光区域中具有遮光层,能够避免显示面板内部的光线进入透光区域,对光传感器造成干扰。
具体的,参见图2,图2为本发明的一个实施例中的显示面板的局部结构示意图。所述显示面板包括多个发光区域10和多个透光区域20,所述发光区域10包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,所述发光区域10还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间。
在本实施例中,所述多个发光区域10和多个透光区域20间隔设置。
在本实施例中,所述衬底包括第一隔离层210,位于所述第一隔离层上方的第一缓冲层220,位于所述第一缓冲层220上方的第二隔离层230以及位于所述第二隔离层上方的第二缓冲层240。所述第一隔离层210和第二隔离层230的材料可以为聚酰亚胺。
所述薄膜晶体管层包括:位于所述衬底上方的有源区110,所述有源区110包括沟道区和位于所述沟道区两侧的源漏区;覆盖所述有源区110的栅极介质层120;位于所述栅极介质层120上方的栅极金属层130,所述栅极金属层130的在垂直方向的投影覆盖所述沟道区;覆盖所述栅极介质层120和栅极金属的层间介质层160;贯穿所述层间介质层160并与所述源漏区电连接的源漏金属层170;覆盖所述层间介质层160和所述源漏金属层170的平坦化层180。
在本实施例中,所述像素定义层包括贯穿所述平坦化层180并与所述源漏金属层170电连接的电极层190;以及位于所述平坦化层180上方并暴露出所述电极层190的绝缘层。
在本实施例中,为了增强栅控效果,所述薄膜晶体管层还包括位于栅极金属层130上方的第二栅极绝缘层140,以及位于所述第二栅极绝缘层140上方的第二栅极金属层150,层间介质层160覆盖所述第二栅极绝缘层140和第二栅极金属层150。
所述透光单元20包括:第一衬底,所述第一衬底包括第一缓冲层220和位于所述第一缓冲层上方的第二缓冲层240;覆盖所述衬底的第一介质层,所述第一介质层由相邻的薄膜晶体管单元10中的栅极介质层120的延伸构成;覆盖所述栅极介质层120的第二介质层,所述第二介质层由相邻的薄膜晶体管单元10中的层间介质层160的延伸构成。
在本实施例中,所述多个透光区域20和与所述多个透光区域20相邻的发光区域10构成第一功能区,所述第一功能区通过位于所述第一功能区的发光区域10实现显示功能,通过所述透光区域20实现光线传导功能;不与所述透光区域20相邻的发光区域10构成第二功能区,所述第二功能区通过位于所述第二功能区的发光区域10实现显示功能。所述第一功能区的面积等于或小于所述显示面板的面积,所述第二功能区的面积小于所述显示面板的面积。
在本实施例中,所述遮光层位于所述衬底中。具体的,位于所述第二缓冲层240中。参见图2,所述第二缓冲层240包括第一部分240、位于所述第一部分240上方的遮光层250以及位于所示遮光层250上方的第二部分260。遮光层250可以位于所述衬底的任意一个层叠结构中,包括但不限于多个缓冲层中的任意一个或多个隔离层中的任意一个。
在本实施例中,形成所述遮光层250的材料为遮光金属。所述遮光层250在水平方向的投影面积大于或等于所述发光区域10在水平方向的投影面积。
本发明的另一个实施例中,所述薄膜晶体管单元10还包括遮光层,所述遮光层位于所述衬底、栅极介质层120、层间介质层160、平坦化层180以及像素定义层中的任意一层中或任意相邻的两层之间。在实施例二中,所述遮光层位于所述衬底中,具体的,位于所述第二缓冲层240中。参见图2,所述第二缓冲层240包括第一部分240、位于所述第一部分240上方的遮光层250以及位于所示遮光层250上方的第二部分260。遮光层250可以位于所述衬底的任意一个层叠结构中,包括但不限于多个缓冲层中的任意一个或多个隔离层中的任意一个。
本发明的另一个实施例中,形成所述遮光层250的材料为遮光金属;所述遮光层在水平方向的投影面积大于或等于所述薄膜晶体管单元10在水平方向的投影面积。
参见图3,图3为本发明的另一个实施例中的显示面板的局部结构示意图。本实施例中,所述遮光层为所述平坦化层180,形成所述平坦化层180的材料为遮光绝缘材料。
参见图4,图4为本发明的另一个实施例中的显示面板的局部结构示意图。本实施例中,所述薄膜晶体管层还包括位于所述电极层190上方的像素定义层,所述像素定义层具有暴露出所述电极层190的通孔;其中,构成所述像素定义层的材料为遮光绝缘材料。优选的,所述遮光绝缘材料为黑色树脂。
参见图5,图5为本发明的实施例四中的显示面板的局部结构示意图。在本实施例中,所述遮光层为所述电极层190,形成所述电极层190的材料为遮光金属。
参见图6,图6为本发明的实施例五中的显示面板的局部结构示意图。在本实施例中,根据本发明的其中一个方面,所述薄膜晶体管层还包括位于所述电极层190上方的绝缘层,所述绝缘层具有暴露出所述电极层190的通孔;其中,构成所述绝缘层的材料为遮光绝缘材料,所述遮光绝缘材料为黑色树脂。
优选的,参见图7,图7为本发明的实施例中的显示面板的第一俯视图。可以看出,为了更好的阻挡显示面板内部的光线,所述遮光层在水平方向的投影覆盖所述显示面板的全部不透光区域,所述不透光区域为所述显示面板上透光区域之外的区域。
具体的,参见图8,图8为本发明的实施例中的显示面板的第二俯视图。所述显示面板包括由金属走线310、多个薄膜晶体管单元320和遮光层330构成的发光区域。未被所述金属走线310、多个薄膜晶体管单元320和遮光层330覆盖的区域构成透光区域。遮光层330覆盖所述透光区域之外的全部区域,以确保进入显示面板的光线不会被显示面板内部的光线所干扰。
相应的,本发明还提供了一种智能终端,所述智能终端包括显示面板和位于所述显示面板下方的光传感器,所述显示面板包括多个发光区域10和多个透光区域20,所述发光区域10包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层。所述发光区域10还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间;其中,所述光传感器上方至少有一个透光区域20。
在本实施例中,所述多个透光区域20和与所述多个透光区域20相邻的发光区域10构成第一功能区,所述第一功能区通过位于所述第一功能区的发光区域10实现显示功能,通过所述透光区域20实现光线传导功能;不与所述透光区域20相邻的发光区域10构成第二功能区,所述第二功能区通过位于所述第二功能区的发光区域10实现显示功能;其中,所述光传感器位于所述第一功能区下方。
优选的,所述光传感器的数目大于等于两个,所述多个光传感器构成摄像头。
优选的,所述光传感器的数目大于等于两个,所述光传感器构成指纹识别单元。
在本实施例中,所述多个发光区域10和多个透光区域20间隔设置。
在本实施例中,所述衬底包括第一隔离层210,位于所述第一隔离层上方的第一缓冲层220,位于所述第一缓冲层220上方的第二隔离层230以及位于所述第二隔离层上方的第二缓冲层240。所述第一隔离层210和第二隔离层230的材料可以为聚酰亚胺。
所述薄膜晶体管层包括:位于所述衬底上方的有源区110,所述有源区110包括沟道区和位于所述沟道区两侧的源漏区;覆盖所述有源区110的栅极介质层120;位于所述栅极介质层120上方的栅极金属层130,所述栅极金属层130的在垂直方向的投影覆盖所述沟道区;覆盖所述栅极介质层120和栅极金属的层间介质层160;贯穿所述层间介质层160并与所述源漏区电连接的源漏金属层170;覆盖所述层间介质层160和所述源漏金属层170的平坦化层180。
在本实施例中,所述像素定义层包括贯穿所述平坦化层180并与所述源漏金属层170电连接的电极层190;以及位于所述平坦化层180上方并暴露出所述电极层190的绝缘层。
在本实施例中,为了增强栅控效果,所述薄膜晶体管层还包括位于栅极金属层130上方的第二栅极绝缘层140,以及位于所述第二栅极绝缘层140上方的第二栅极金属层150,层间介质层160覆盖所述第二栅极绝缘层140和第二栅极金属层150。
所述透光单元20包括:第一衬底,所述第一衬底包括第一缓冲层220和位于所述第一缓冲层上方的第二缓冲层240;覆盖所述衬底的第一介质层,所述第一介质层由相邻的薄膜晶体管单元10中的栅极介质层120的延伸构成;覆盖所述栅极介质层120的第二介质层,所述第二介质层由相邻的薄膜晶体管单元10中的层间介质层160的延伸构成。
在本实施例中,所述多个透光区域20和与所述多个透光区域20相邻的发光区域10构成第一功能区,所述第一功能区通过位于所述第一功能区的发光区域10实现显示功能,通过所述透光区域20实现光线传导功能;不与所述透光区域20相邻的发光区域10构成第二功能区,所述第二功能区通过位于所述第二功能区的发光区域10实现显示功能。所述第一功能区的面积等于或小于所述显示面板的面积,所述第二功能区的面积小于所述显示面板的面积。
在本实施例中,所述遮光层位于所述衬底中。具体的,位于所述第二缓冲层240中。参见图2,所述第二缓冲层240包括第一部分240、位于所述第一部分240上方的遮光层250以及位于所示遮光层250上方的第二部分260。遮光层250可以位于所述衬底的任意一个层叠结构中,包括但不限于多个缓冲层中的任意一个或多个隔离层中的任意一个。
在本实施例中,形成所述遮光层250的材料为遮光金属。所述遮光层250在水平方向的投影面积大于或等于所述发光区域10在水平方向的投影面积。优选的,所述遮光层250在水平方向的投影覆盖所述显示面板的全部不透光区域,所述不透光区域为所述显示面板上透光区域之外的区域。
其中,所述薄膜晶体管单元10还包括遮光层,所述遮光层位于所述衬底、栅极介质层120、层间介质层160、平坦化层180以及像素定义层中的任意一层中或任意相邻的两层之间。在实施例二中,所述遮光层位于所述衬底中,具体的,位于所述第二缓冲层240中。参见图2,所述第二缓冲层240包括第一部分240、位于所述第一部分240上方的遮光层250以及位于所示遮光层250上方的第二部分260。遮光层250可以位于所述衬底的任意一个层叠结构中,包括但不限于多个缓冲层中的任意一个或多个隔离层中的任意一个。
本实施例中,形成所述遮光层250的材料为遮光金属;所述遮光层在水平方向的投影面积大于或等于所述薄膜晶体管单元10在水平方向的投影面积。
参见图3,图3为本发明的实施例二中的显示面板的局部结构示意图。本实施例中,所述遮光层为所述平坦化层180,形成所述平坦化层180的材料为遮光绝缘材料。
参见图4,图4为本发明的实施例三中的显示面板的局部结构示意图。本实施例中,所述薄膜晶体管层还包括位于所述电极层190上方的像素定义层,所述像素定义层具有暴露出所述电极层190的通孔;其中,构成所述像素定义层的材料为遮光绝缘材料。
在实施例二和实施例三中,所述遮光绝缘材料为黑色树脂。
参见图5,图5为本发明的实施例四中的显示面板的局部结构示意图。在本实施例中,所述遮光层为所述电极层190,形成所述电极层190的材料为遮光金属。
参见图6,图6为本发明的实施例五中的显示面板的局部结构示意图。在本实施例中,根据本发明的其中一个方面,所述薄膜晶体管层还包括位于所述电极层190上方的绝缘层,所述绝缘层具有暴露出所述电极层190的通孔;其中,构成所述绝缘层的材料为遮光绝缘材料,所述遮光绝缘材料为黑色树脂。
优选的,参见图7,图7为本发明的实施例中的显示面板的第一俯视图。可以看出,为了更好的阻挡显示面板内部的光线,所述遮光层在水平方向的投影覆盖所述显示面板的全部不透光区域,所述不透光区域为所述显示面板上透光区域之外的区域。
具体的,参见图8,图8为本发明的实施例中的显示面板的第二俯视图。所述显示面板包括由金属走线310、多个薄膜晶体管单元320和遮光层330构成的发光区域。未被所述金属走线310、多个薄膜晶体管单元320和遮光层330覆盖的区域构成透光区域。遮光层330覆盖所述透光区域之外的全部区域,以确保进入显示面板的光线不会被显示面板内部的光线所干扰。
本发明提供的显示面板包括多个发光区域和多个透光区域,能够在不影响显示面板的显示功能的同时使显示面板外侧的光线进入显示面板内部,并到达位于所述显示面板下方的光传感器。所述发光区域中具有遮光层,能够避免显示面板内部的光线进入透光区域,对光传感器造成干扰。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。
Claims (20)
- 一种显示面板,其中,所述显示面板包括多个发光区域和多个透光区域,所述发光区域包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,所述发光区域还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间;所述遮光层在水平方向的投影面积大于或等于所述发光区域在水平方向的投影面积;所述多个发光区域和多个透光区域间隔设置。
- 根据权利要求1所述的显示面板,其中,所述遮光层在水平方向的投影覆盖所述显示面板的全部不透光区域,所述不透光区域为所述显示面板上透光区域之外的区域。
- 根据权利要求1所述的显示面板,其中,所述遮光层位于所述衬底中;所述衬底包括第一缓冲层、位于所述第一缓冲层上方的遮光层以及位于所示遮光层上方的第二缓冲层,形成所述遮光层的材料为遮光金属。
- 一种显示面板,其中,所述显示面板包括多个发光区域和多个透光区域,所述发光区域包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,所述发光区域还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间。
- 根据权利要求4所述的显示面板,其中,所述遮光层在水平方向的投影面积大于或等于所述发光区域在水平方向的投影面积。
- 根据权利要求4所述的显示面板,其中,所述遮光层在水平方向的投影覆盖所述显示面板的全部不透光区域,所述不透光区域为所述显示面板上透光区域之外的区域。
- 根据权利要求4所述的显示面板,其中,所述多个发光区域和多个透光区域间隔设置。
- 根据权利要求4所述的显示面板,其中,所述遮光层位于所述衬底中;所述衬底包括第一缓冲层、位于所述第一缓冲层上方的遮光层以及位于所示遮光层上方的第二缓冲层。
- 根据权利要求8所述的显示面板,其中,形成所述遮光层的材料为遮光金属。
- 根据权利要求4所述的显示面板,其中,所述薄膜晶体管层包括:有源区,所述有源区包括沟道区和位于所述沟道区两侧的源漏区;覆盖所述有源区的栅极介质层;位于所述栅极介质层上方的栅极金属层,所述栅极金属层的在垂直方向的投影覆盖所述沟道区;覆盖所述有源区的层间介质层;贯穿所述层间介质层并与所述源漏区电连接的源漏金属层;覆盖所述层间介质层和所述源漏金属层的平坦化层;贯穿所述平坦化层并与所述源漏金属层电连接的电极层;其中,所述遮光层位于所述衬底、栅极介质层、层间介质层、平坦化层以及电极层中的任意一层中或任意相邻的两层之间。
- 根据权利要求10所述的显示面板,其中,所述遮光层为所述平坦化层、栅极介质层和层间介质层中的任意一个,形成所述遮光层的材料为遮光绝缘材料。
- 根据权利要求4所述的显示面板,其中,所述遮光层为所述像素定义层,形成所述像素定义层的材料为遮光绝缘材料。
- 根据权利要求4所述的显示面板,其中,所述发光区域还包括位于所述像素定义层和所述发光层之间的电极层,所述电极层和所述像素定义层共同构成所述遮光层,形成所述电极层的材料为遮光金属,形成所述像素定义层的材料为遮光绝缘材料。
- 根据权利要求4所述的显示面板,其中,所述透光区域包括:透光衬底,所述透光衬底由相邻的发光区域中的衬底延伸构成;绝缘叠层,所述绝缘的叠层由相邻的发光区域中的薄膜晶体层中的绝缘层延伸构成。
- 根据权利要求4所述的显示面板,其中,所述多个透光区域和与所述多个透光区域相邻的发光区域构成第一功能区,所述第一功能区通过位于所述第一功能区的发光区域实现显示功能,通过所述透光区域实现光线传导功能;不与所述透光区域相邻的发光区域构成第二功能区,所述第二功能区通过位于所述第二功能区的发光区域实现显示功能。
- 根据权利要求15所述的显示面板,其中,所述第一功能区的面积等于或小于所述显示面板的面积,所述第二功能区的面积小于所述显示面板的面积。
- 一种智能终端,其中,所述智能终端包括显示面板和位于所述显示面板下方的光传感器,所述显示面板包括多个发光区域和多个透光区域,所述发光区域包括衬底、位于所述衬底上方的薄膜晶体管层、位于所述薄膜晶体管层上方的像素定义层以及位于所述像素定义层上方的发光层;其中,所述发光区域还包括遮光层,所述遮光层位于所述衬底中和/或位于衬底和所述发光层之间;其中,所述光传感器上方至少有一个透光区域。
- 根据权利要求17所述的智能终端,其中,所述多个透光区域和与所述多个透光区域相邻的发光区域构成第一功能区,所述第一功能区通过位于所述第一功能区的发光区域实现显示功能,通过所述透光区域实现光线传导功能;不与所述透光区域相邻的发光区域构成第二功能区,所述第二功能区通过位于所述第二功能区的发光区域实现显示功能;其中,所述光传感器位于所述第一功能区下方。
- 根据权利要求17所述的智能终端,其中,所述光传感器的数目大于等于两个,所述多个光传感器构成摄像头。
- 根据权利要求17所述的智能终端,其中,所述光传感器的数目大于等于两个,所述光传感器构成指纹识别单元。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/492,134 US11049915B2 (en) | 2018-12-27 | 2019-04-11 | Display panel and intelligent terminal |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811614379.XA CN111384084B (zh) | 2018-12-27 | 2018-12-27 | 显示面板和智能终端 |
| CN201811614379.X | 2018-12-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2020133801A1 true WO2020133801A1 (zh) | 2020-07-02 |
Family
ID=71126735
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2019/082221 Ceased WO2020133801A1 (zh) | 2018-12-27 | 2019-04-11 | 显示面板和智能终端 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US11049915B2 (zh) |
| CN (1) | CN111384084B (zh) |
| WO (1) | WO2020133801A1 (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4193388A1 (en) * | 2020-08-10 | 2023-06-14 | Apple Inc. | Displays having transparent openings |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111106259B (zh) * | 2019-12-04 | 2021-01-15 | 武汉华星光电半导体显示技术有限公司 | 可弯折有机发光二极管显示面板及有机发光二极管显示屏 |
| EP4206980B1 (en) * | 2021-05-26 | 2025-09-10 | BOE Technology Group Co., Ltd. | Ridge recognition substrate and ridge recognition apparatus |
| US12505694B2 (en) * | 2021-07-23 | 2025-12-23 | AUO Corporation | Biometric identification device |
| CN114823824B (zh) * | 2022-04-12 | 2023-12-01 | 武汉华星光电半导体显示技术有限公司 | 透明显示面板及透明显示装置 |
| CN114883365B (zh) * | 2022-04-28 | 2024-01-19 | 武汉华星光电半导体显示技术有限公司 | 一种显示面板 |
| KR20240053096A (ko) * | 2022-10-14 | 2024-04-24 | 삼성디스플레이 주식회사 | 표시 패널 |
| CN115915847B (zh) * | 2022-11-16 | 2025-07-29 | 武汉天马微电子有限公司 | 一种显示面板和显示装置 |
| CN116744734B (zh) * | 2023-07-31 | 2024-09-06 | 惠科股份有限公司 | 显示面板和显示装置 |
| CN119091753B (zh) * | 2024-08-28 | 2026-02-24 | 京东方科技集团股份有限公司 | 透明显示面板、透明显示装置和透明显示面板的制作方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104393024A (zh) * | 2014-12-03 | 2015-03-04 | 京东方科技集团股份有限公司 | Oled像素结构及其制备方法、紫外光检测方法和装置 |
| US9245936B2 (en) * | 2012-11-19 | 2016-01-26 | Samsung Display Co., Ltd. | Multi-display apparatus |
| CN108428729A (zh) * | 2018-05-14 | 2018-08-21 | 云谷(固安)科技有限公司 | 显示面板及其制备方法 |
| CN108717244A (zh) * | 2018-05-18 | 2018-10-30 | 京东方科技集团股份有限公司 | 显示装置及其控制方法、存储介质 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SG126714A1 (en) * | 2002-01-24 | 2006-11-29 | Semiconductor Energy Lab | Light emitting device and method of manufacturing the same |
| WO2005115062A1 (en) * | 2004-05-20 | 2005-12-01 | Semiconductor Energy Laboratory Co., Ltd. | Light-emitting element and display device |
| JP2007188653A (ja) * | 2006-01-11 | 2007-07-26 | Seiko Epson Corp | 発光装置および電子機器 |
| JP6135062B2 (ja) * | 2012-08-07 | 2017-05-31 | セイコーエプソン株式会社 | 発光装置、発光装置の製造方法、電子機器 |
| KR102465382B1 (ko) * | 2015-08-31 | 2022-11-10 | 삼성디스플레이 주식회사 | 표시장치 및 표시장치의 제조방법 |
| JP6807223B2 (ja) * | 2016-11-28 | 2021-01-06 | 株式会社ジャパンディスプレイ | 表示装置 |
| KR102952898B1 (ko) * | 2016-11-30 | 2026-04-15 | 엘지디스플레이 주식회사 | 유기전계발광 표시장치 |
| CN107025451B (zh) * | 2017-04-27 | 2019-11-08 | 上海天马微电子有限公司 | 一种显示面板及显示装置 |
| CN107275376B (zh) * | 2017-06-27 | 2019-12-20 | 上海天马微电子有限公司 | 一种显示面板及显示装置 |
-
2018
- 2018-12-27 CN CN201811614379.XA patent/CN111384084B/zh active Active
-
2019
- 2019-04-11 WO PCT/CN2019/082221 patent/WO2020133801A1/zh not_active Ceased
- 2019-04-11 US US16/492,134 patent/US11049915B2/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9245936B2 (en) * | 2012-11-19 | 2016-01-26 | Samsung Display Co., Ltd. | Multi-display apparatus |
| CN104393024A (zh) * | 2014-12-03 | 2015-03-04 | 京东方科技集团股份有限公司 | Oled像素结构及其制备方法、紫外光检测方法和装置 |
| CN108428729A (zh) * | 2018-05-14 | 2018-08-21 | 云谷(固安)科技有限公司 | 显示面板及其制备方法 |
| CN108717244A (zh) * | 2018-05-18 | 2018-10-30 | 京东方科技集团股份有限公司 | 显示装置及其控制方法、存储介质 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4193388A1 (en) * | 2020-08-10 | 2023-06-14 | Apple Inc. | Displays having transparent openings |
| EP4193388B1 (en) * | 2020-08-10 | 2025-12-10 | Apple Inc. | Displays having transparent openings |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111384084A (zh) | 2020-07-07 |
| US11049915B2 (en) | 2021-06-29 |
| US20200258915A1 (en) | 2020-08-13 |
| CN111384084B (zh) | 2022-11-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2020133801A1 (zh) | 显示面板和智能终端 | |
| US11863853B2 (en) | Display panel and display device | |
| US10825881B2 (en) | Array substrate, display device and pattern recognition method thereof | |
| US11348356B2 (en) | Display substrate, fingerprint recognition method, and touch display device | |
| CN110047846B (zh) | 显示面板、显示面板的制作方法和智能设备 | |
| CN110265470B (zh) | 显示装置、显示面板及其制造方法 | |
| US20200312925A1 (en) | Display panel, display device and a method for manufacturing a display panel | |
| WO2020140343A1 (zh) | 显示面板和智能终端 | |
| WO2021238490A1 (zh) | 显示基板和显示装置 | |
| US20240155875A1 (en) | Display apparatus, and display panel and manufacturing method therefor | |
| CN110112184B (zh) | 显示面板和电子设备 | |
| US20190286869A1 (en) | Display Module | |
| CN111834375A (zh) | 显示基板、显示面板及显示装置 | |
| CN112993001B (zh) | 显示面板及显示装置 | |
| WO2020206825A1 (zh) | 显示面板和电子设备 | |
| WO2020232949A1 (zh) | 显示面板和电子设备 | |
| US20250089457A1 (en) | Display device | |
| WO2021007945A1 (zh) | 显示面板、显示装置及显示面板的制造方法 | |
| CN116548086B (zh) | 终端设备、显示装置、显示面板及其制造方法 | |
| CN111834465A (zh) | 阵列基板、显示面板及显示装置 | |
| CN110570770A (zh) | 显示面板及显示装置 | |
| CN118099169A (zh) | 显示基板及其制造方法、显示面板和显示装置 | |
| CN115633520A (zh) | 显示面板和显示装置 | |
| US20250169339A1 (en) | Display panel, display module and display device | |
| CN114373782B (zh) | 电子设备 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 19903229 Country of ref document: EP Kind code of ref document: A1 |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 19903229 Country of ref document: EP Kind code of ref document: A1 |