WO2020133672A1

WO2020133672A1 - Array substrate and manufacturing method therefor and display panel

Info

Publication number: WO2020133672A1
Application number: PCT/CN2019/076232
Authority: WO
Inventors: 陈书志; 陈俊吉
Original assignee: 深圳市华星光电半导体显示技术有限公司
Priority date: 2018-12-26
Filing date: 2019-02-27
Publication date: 2020-07-02
Also published as: CN109755261A

Abstract

The present application provides an array substrate and a manufacturing method therefor, and a display panel. The array substrate comprises: a substrate. An active layer is disposed on the substrate. A gate insulating layer is disposed on the active layer. A metal layer is disposed on the gate insulating layer. The active layer comprises a source and a drain at two ends thereof, and a channel region disposed between the source and the drain.

Description

Array substrate, manufacturing method thereof, and display panel

Technical field

The present application relates to the field of display, in particular to an array substrate, a manufacturing method thereof, and a display panel.

Background technique

In recent years, metal oxide-based thin film transistors have received more and more attention because of their advantages of high mobility, good light transmittance, stable thin film structure, low manufacturing temperature, and low cost. In particular, metal oxide TFTs represented by indium gallium zinc oxide (In-Ga-Zn-O, IGZO) are highly compatible with current a-Si TFTs, and are thus obtained in the production of large-size display panels Has been widely used.

The method for preparing a thin film transistor in the prior art includes four photomask steps, respectively:

Use the first photomask to make an active layer pattern on the substrate;

Use the second photomask to make the first insulating layer pattern;

Use the third mask to make the metal layer pattern;

Use the fourth photomask to make the second insulating layer pattern;

Use the fifth mask to make the drain and source patterns.

Therefore, how to save the cost of the reticle and simplify the process is the subject of continuous research in the industry.

technical problem

The array substrate manufacturing process adopts a photomask process, which is used many times, and the production process is complicated and the cost is high.

Technical solution

In order to solve the above problems, the technical solutions provided by this application are as follows:

According to an aspect of the present application, an array substrate is provided, including:

Substrate

An active layer provided on the substrate;

A gate insulating layer provided on the active layer;

A metal layer provided on the gate insulating layer;

Wherein, the active layer includes source and drain at both ends, and a channel region between the source and the drain.

According to an embodiment of the present application, the material for manufacturing the active layer includes one of polysilicon and indium gallium zinc oxide.

According to an embodiment of the present application, the preparation material of the active layer includes indium gallium zinc oxide.

According to an embodiment of the present application, the active layer further includes a pixel electrode, and the pixel electrode is located on a side of the channel region away from the source electrode.

According to an embodiment of the present application, the position and pattern of the gate insulating layer correspond to the position and pattern of the channel region.

According to an embodiment of the present application, the array substrate further includes:

A passivation layer disposed above the metal layer and covering the active layer;

A transparent electrode provided on the passivation layer.

According to an embodiment of the present application, the pixel electrode, the source electrode and the drain electrode are arranged in the same layer.

According to another invention of the present application, a method for manufacturing an array substrate is also provided, including:

Step S10: Provide a substrate;

Step S20, forming a layer patterned channel layer on the substrate through a first photomask process;

Step S30, forming a stacked patterned gate insulating layer and a patterned metal layer on the substrate through a second photomask process, the gate insulating layer being in contact with the channel layer;

Step S40, the metal layer is used as a photomask, and ion implantation is performed on both ends of the channel layer to form an active layer, the active layer includes a channel region in the middle, and Source and drain.

According to an embodiment of the present application, the preparation material of the active layer includes indium gallium zinc oxide, the active layer further includes a pixel electrode, and the pixel electrode is located on a side of the channel region away from the source electrode , The pixel electrode, the source electrode and the drain electrode are formed in the same ion implantation.

According to an embodiment of the present application, a plasma process is used to ion implant the channel layer.

According to an embodiment of the present application, the manufacturing method of the array substrate further includes:

Step S50, forming a non-metal layer on the metal layer, and patterning the non-metal layer using a third photomask process to form a passivation layer;

Step S60, forming a transparent electrode on the passivation layer.

According to yet another aspect of the present application, there is also provided a display panel, which includes an array substrate and a color filter substrate disposed oppositely, the array substrate including:

Substrate

An active layer provided on the substrate;

A gate insulating layer provided on the active layer;

A metal layer provided on the gate insulating layer;

A transparent electrode provided on the passivation layer.

Beneficial effect

Beneficial effect: In this application, the two ends of the active layer are directly used as the source and drain, so that on the basis of eliminating an insulating layer, two mask processes can be reduced, and the manufacturing process of the array substrate is effectively simplified , Reducing the cost of the product.

BRIEF DESCRIPTION

In order to more clearly explain the embodiments or the technical solutions in the prior art, the following will briefly introduce the drawings required in the embodiments or the description of the prior art. Obviously, the drawings in the following description are only inventions. For some embodiments, those of ordinary skill in the art can obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic structural diagram of an array substrate provided by a first embodiment of this application;

2 is a schematic structural diagram of an array substrate provided by a second embodiment of this application;

3 is a schematic structural diagram of an array substrate provided by a third embodiment of the present application;

4 is a schematic structural diagram of an array substrate provided by a fourth embodiment of the present application;

5 is a schematic flow chart of a method for manufacturing an array substrate provided by a fifth embodiment of the present application;

6a-6c are schematic structural diagrams of a method for manufacturing an array substrate provided in a fifth embodiment of the present application;

7 is a schematic structural diagram of an array substrate in a method for manufacturing an array substrate provided in a sixth embodiment of the present application.

Embodiments of the invention

The descriptions of the following embodiments refer to additional drawings to illustrate specific embodiments that can be implemented by the present invention. Directional terms mentioned in the present invention, such as [upper], [lower], [front], [back], [left], [right], [inner], [outer], [side], etc., are for reference only Attach the direction of the schema. Therefore, the directional terminology is used to illustrate and understand the present invention, not to limit the present invention. In the figure, units with similar structures are indicated by the same reference numerals.

The present application provides an array substrate, a manufacturing method thereof, and a display panel, to solve the problems that the existing array substrate manufacturing process uses a photomask process more times, the production process is complicated, and the cost is higher.

Please refer to FIG. 1, which is a schematic structural diagram of an array substrate according to a first embodiment of the present application.

The present application provides an array substrate 100 including a substrate 11, an active layer 12, a gate insulating layer 13, and a metal layer 14.

In one embodiment, the substrate 11 is one of a flexible substrate and a rigid substrate.

In one embodiment, the flexible substrate is made of polyimide.

In one embodiment, the rigid substrate is made of a glass substrate.

In one embodiment, the material for preparing the active layer 12 includes but is not limited to one of polysilicon and indium gallium zinc oxide (IGZO). The indium gallium zinc oxide is a transparent material.

The active layer 12 includes a source 121 and a drain 122 at both ends, and a channel region 123 between the source 121 and the drain 122.

Compared with the existing array substrate, the source electrode 121 and the drain electrode 122 in this application are directly disposed on both sides of the channel region 123, thereby avoiding the increase in the number of film layers caused by separately setting the source electrode 121 and the drain electrode 122. The problem of the increase in the mask process further saves the manufacturing cost of the array substrate 100.

Please refer to FIG. 2, which is a schematic structural diagram of an array substrate provided by a second embodiment of the present application.

In one embodiment, the active layer 12 is made of indium gallium zinc oxide. Since the indium gallium zinc oxide is a transparent material, the pixel electrode 124 of the array substrate 100 can also be provided in the same layer as the channel region 123 and the source 121 and the drain 122.

The active layer 12 further includes a pixel electrode 124, which is located on the side of the channel region 123 away from the source electrode 121, that is, the source electrode 121 is located on the side of the channel region 123, The drain 122 and the pixel electrode 124 are located on the other side of the channel region 123, thereby avoiding separate preparation of the pixel electrode 124 and simplifying the film layer structure of the array substrate 100.

In one embodiment, the material for preparing the gate insulating layer 13 includes at least one of silicon nitride and silicon oxide, and the gate insulating layer 13 is used to protect the metal layer 14.

In one embodiment, the position and pattern of the gate insulating layer 13 correspond to the position and pattern of the channel region 123.

In one embodiment, the metal layer 14 is a gate metal layer.

In an embodiment, the material for preparing the metal layer 14 includes one of aluminum, copper, and aluminum neodymium alloy.

Please refer to FIG. 3, which is a schematic structural diagram of an array substrate according to a third embodiment of the present application.

Please refer to FIG. 4, which is a schematic structural diagram of an array substrate according to a fourth embodiment of the present application.

The difference between the third embodiment and the fourth embodiment of the present application lies in whether the pixel electrode 124 in the array substrate 100 is arranged in the same layer as the source 121, the drain 122, and the channel region 123. Specific applications can be set according to actual conditions. Here No limitation.

In one embodiment, the array substrate 100 further includes a passivation layer 15 and a transparent electrode 16 disposed on the metal layer 14;

Wherein, the passivation layer 15 is disposed above the metal layer 14 and covers the active layer 12;

The transparent electrode 16 is provided on the passivation layer 15.

Please refer to FIG. 5, which is a schematic flowchart of a method for manufacturing an array substrate according to a fifth embodiment of the present application.

According to another aspect of the present application, a method for manufacturing an array substrate is also provided, including the following steps.

Referring to FIG. 6a, step S10, a substrate 11 is provided.

In one embodiment, the flexible substrate is made of polyimide.

In one embodiment, the rigid substrate is made of a glass substrate.

Step S20, forming a layer patterned channel layer 17 on the substrate through a first photomask process.

The channel layer 17 is ion-implanted to form the active layer 12, and the material for preparing the channel layer 17 includes but is not limited to one of polysilicon and indium gallium zinc oxide.

Referring to FIG. 6b, in step S30, a stacked patterned gate insulating layer 13 and a patterned metal layer 14 are formed on the substrate by a second photomask process, and the gate insulating layer 13 is in contact with the channel layer 17.

The step S30 specifically includes: sequentially depositing a non-metallic film layer and a metal film layer on the channel layer 17, and patterning the non-metallic film layer and the metal film layer using a second photomask process to form a pattern Gate insulation layer 13 and patterned metal layer 14.

Referring to FIG. 6c, step S40, using the metal layer 14 as a photomask, ion implanting the two ends of the channel layer 17 to form an active layer 12, the active layer 12 includes a channel region 123 in the middle And the source 121 and the drain 122 located at both ends of the channel region 123 respectively.

Since the position of the channel region 123 is blocked by the metal layer 14, the channel region 123 is an undoped region, which is a semiconductor; the source 121 and the drain 122 at both ends are ion-doped and are conductors .

Please refer to FIG. 7, which is a schematic structural diagram of an array substrate in a method for manufacturing an array substrate according to a sixth embodiment of the present application.

In an embodiment, the preparation material of the active layer 12 includes indium gallium zinc oxide, the active layer 12 further includes a pixel electrode 124, and the pixel electrode 124 is located in the channel region 123 away from the source On one side of the electrode 121, the pixel electrode 124, the source electrode 121 and the drain electrode 122 are formed in the same ion implantation, thereby avoiding the separate preparation of the pixel electrode 124 and simplifying the film layer structure of the array substrate 100 .

In one embodiment, a plasma process is used to ion implant the channel layer 17.

In an embodiment, the manufacturing method of the array substrate 100 further includes:

Step S50, forming a non-metal layer on the metal layer 14, and patterning the non-metal layer using a third photomask process to form a passivation layer 15.

Step S60, forming a transparent electrode 16 on the passivation layer 15.

In one embodiment, the step S60 specifically includes: coating a photoresist layer on the passivation layer 15 outside the coverage area of the transparent electrode 16, depositing the transparent electrode 16 on the passivation layer 15, and peeling off The photoresist layer forms a transparent electrode 16.

In summary, although the present application has been disclosed as preferred embodiments above, the above preferred embodiments are not intended to limit the present application. Those of ordinary skill in the art can make various changes without departing from the spirit and scope of the present application Such changes and retouching, so the scope of protection of this application shall be subject to the scope defined by the claims.

Claims

An array substrate, including:

Substrate

An active layer provided on the substrate;

A gate insulating layer provided on the active layer;

A metal layer provided on the gate insulating layer;

Wherein, the active layer includes source and drain at both ends, and a channel region between the source and the drain.
The array substrate according to claim 1, wherein the active layer is made of polysilicon and indium gallium zinc oxide.
The array substrate according to claim 1, wherein the preparation material of the active layer comprises indium gallium zinc oxide.
The array substrate according to claim 3, wherein the active layer further includes a pixel electrode, the pixel electrode being located on a side of the channel region away from the source electrode.
The array substrate according to claim 1, wherein the position and pattern of the gate insulating layer correspond to the position and pattern of the channel region.
The array substrate according to claim 1, wherein the array substrate further comprises:

A passivation layer disposed above the metal layer and covering the active layer;

A transparent electrode provided on the passivation layer.
The array substrate according to claim 1, wherein the pixel electrode, the source electrode and the drain electrode are provided in the same layer.
An array substrate manufacturing method includes:

Step S10: Provide a substrate;

Step S20, forming a layer patterned channel layer on the substrate through a first photomask process;

Step S30: forming a stacked patterned gate insulating layer and a patterned metal layer on the channel layer through a second photomask process, the gate insulating layer being in contact with the channel layer;

Step S40, the metal layer is used as a photomask, and ion implantation is performed on both ends of the channel layer to form an active layer, the active layer includes a channel region in the middle, and Source and drain.
The method for manufacturing an array substrate according to claim 8, wherein the material for manufacturing the active layer includes one of polysilicon and indium gallium zinc oxide.
The method for manufacturing an array substrate according to claim 8, wherein the preparation material of the active layer includes indium gallium zinc oxide, the active layer further includes a pixel electrode, and the pixel electrode is located in the channel region On the side far from the source electrode, the pixel electrode, the source electrode and the drain electrode are formed in the same ion implantation.
The method for manufacturing an array substrate according to claim 8, wherein the channel layer is ion implanted using a plasma process.
The method for manufacturing an array substrate according to claim 8, further comprising:

Step S50, forming a non-metal layer on the metal layer, and patterning the non-metal layer using a third photomask process to form a passivation layer;

Step S60, forming a transparent electrode on the passivation layer.
A display panel includes an array substrate and a color filter substrate disposed oppositely. The array substrate includes:

Substrate

An active layer provided on the substrate;

A gate insulating layer provided on the active layer;

A metal layer provided on the gate insulating layer;

Wherein, the active layer includes source and drain at both ends, and a channel region between the source and the drain.
The display panel according to claim 13, wherein the active layer is made of polysilicon and indium gallium zinc oxide.
The display panel according to claim 13, wherein the preparation material of the active layer comprises indium gallium zinc oxide.
The display panel according to claim 15, wherein the active layer further includes a pixel electrode, the pixel electrode being located on a side of the channel region away from the source electrode.
The display panel according to claim 13, wherein the position and pattern of the gate insulating layer correspond to the position and pattern of the channel region.
The display panel of claim 13, wherein the array substrate further comprises:

A passivation layer disposed above the metal layer and covering the active layer;

A transparent electrode provided on the passivation layer.
The display panel according to claim 13, wherein the pixel electrode, the source electrode and the drain electrode are provided in the same layer.