WO2020118945A1 - Uart main control system for automatically switching outgoing data source in multi-core scenario - Google Patents

Uart main control system for automatically switching outgoing data source in multi-core scenario Download PDF

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WO2020118945A1
WO2020118945A1 PCT/CN2019/078270 CN2019078270W WO2020118945A1 WO 2020118945 A1 WO2020118945 A1 WO 2020118945A1 CN 2019078270 W CN2019078270 W CN 2019078270W WO 2020118945 A1 WO2020118945 A1 WO 2020118945A1
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uart
main control
control system
data source
transmission
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PCT/CN2019/078270
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Chinese (zh)
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林海锋
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江苏华存电子科技有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/545—Interprogram communication where tasks reside in different layers, e.g. user- and kernel-space
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/06—Protocols specially adapted for file transfer, e.g. file transfer protocol [FTP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/50—Network services
    • H04L67/56—Provisioning of proxy services
    • H04L67/568—Storing data temporarily at an intermediate stage, e.g. caching

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  • the invention relates to the technical field of a UART main control system, in particular to a UART main control system that can automatically switch outgoing data sources in a multi-core scenario.
  • the existing UART master control system requires the processor to observe the output status and configure the control register to switch the send data source when switching the send data source, which not only consumes a lot of processor resources but also greatly reduces the efficiency of the sender to transmit data. If If the sending module of multiple sending sources does not deal with output monitoring and switching, it will cause the situation that the output data is interleaved and chaotic.
  • An object of the present invention is to provide a UART main control system that can automatically switch outgoing data sources in a multi-core scenario to solve the problems raised in the background art mentioned above.
  • a UART main control system that can automatically switch outgoing data sources in a multi-core scenario includes a UART main control system, and a transmission module is provided in the UART main control system.
  • a buffer unit is provided in the transmission module, a transmission port TX is provided on the transmission unit, and the buffer unit is connected to the transmission port TX.
  • the UART main control system is provided with a UART transmission module
  • the UART transmission module is provided with a plurality of buffer units and an automatic switching transmission data source control unit
  • the UART transmission module is provided with a transmission port TX
  • a plurality of buffer units are respectively connected to the automatic switching transmission data source control unit
  • the automatic switching transmission data source control unit is connected to the transmission port TX.
  • the multiple cache units include cache A and cache B.
  • the transmission data source will be automatically switched, so that the data sent by multiple CPUs will not be confused in a cache, and the precise automatic switching of the transmission data source is achieved. And can reduce CPU resource consumption.
  • the beneficial effects of the present invention are: the present invention configures multiple sending cache control units for use scenarios that require multiple data sources, reads through the hardware control module and recognizes multiple consecutive writes in the cache Feature data is automatically switched to different transmission data sources, which has high operation efficiency and can automatically switch transmission data sources accurately.
  • Application in a UART system with multiple transmission data sources can improve data transmission efficiency and save processing. The effect of resource consumption.
  • FIG. 1 is a block diagram of the control principle of the present invention
  • FIG. 2 is a block diagram of another control principle of the present invention.
  • FIG. 3 is a schematic diagram of a situation in which the automatic switching unit of the present invention switches from reading data in cache A to reading data in cache B;
  • FIG. 4 is a schematic diagram of a situation in which the automatic switching unit of the present invention switches from reading data in cache B to reading data in cache A;
  • FIG. 5 is a schematic diagram of the automatic switching unit of the present invention switching from reading data in cache A to reading data in cache B;
  • FIG. 6 is a schematic diagram of the automatic switching unit of the present invention switching from reading data in cache A to reading data in cache B, and then switching to reading data in cache A;
  • FIG. 7 is a schematic diagram of the automatic switching unit of the present invention switching from reading data in cache B to reading data in cache A, and then switching to reading data in cache B.
  • the present invention provides a technical solution: a UART main control system that can automatically switch outgoing data sources in a multi-core scenario, including a UART main control system 1, the UART main control system 1 is provided with There is a sending module 2, a buffer unit 3 is provided in the sending module 2, a sending port TX4 is provided on the sending module 2, and the buffer unit 3 is connected to the sending port TX4.
  • a UART transmission module 5 is provided in the UART main control system 1, the UART transmission module 5 is provided with a plurality of buffer units and an automatic switching transmission data source control unit 6, and the UART transmission module 5 is provided with There is a transmission port TX4, and a plurality of buffer units are respectively connected to the automatic switching transmission data source control unit 6, and the automatic switching transmission data source control unit 6 is connected to the transmission port TX4; the plurality of buffer units include a buffer A7 and a buffer B8.
  • a method for using a UART main control system that can automatically switch outgoing data sources in a multi-core scenario includes the following steps:
  • the transmission data source will be automatically switched, so that the data sent by multiple CPUs will not be confused in a cache, and the precise automatic switching of the transmission data source is achieved. And can reduce CPU resource consumption.
  • the present invention configures multiple sending cache control units for use scenarios that require multiple data sources, and automatically switches to different sending data sources by reading and identifying multiple consecutive feature data written in the cache through the hardware control module. High efficiency, and can accurately switch the transmission data source automatically. Application in UART system with multiple transmission data sources can improve data transmission efficiency and achieve the effect of saving processor resource consumption.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Transfer Between Computers (AREA)

Abstract

Disclosed by the present invention is a UART main control system for automatically switching an outgoing data source in a multi-core scenario; a plurality of cache sending control units are configured for a usage scenario requiring multiple data sources; a plurality of continuous feature data that has been written into a cache is read and identified by means of a hardware control module so as to automatically switch to a different sending data source; thus, operating efficiency is high, and the automatic switching of a sending data source may be precisely implemented; applying the foregoing in a UART system having a plurality of sending data sources may increase the efficiency of data transmission, and attain the effect of reducing the consumption of processor resources.

Description

一种在多核场景中可自动切换外送数据源的UART主控系统A UART main control system capable of automatically switching outgoing data sources in a multi-core scenario 技术领域Technical field
本发明涉及UART主控系统技术领域，具体为一种在多核场景中可自动切换外送数据源的UART主控系统。The invention relates to the technical field of a UART main control system, in particular to a UART main control system that can automatically switch outgoing data sources in a multi-core scenario.
背景技术Background technique
现有UART主控系统在切换发送数据源时需要处理器时实观测输出状态并配置控制寄存器来切换发送数据源，这样不仅大量消耗处理器资源且会使发送端传输数据的效率大幅下降.如果多发送源的发送模块不处理输出监控与切换的话,则会造成输出数据交错混乱的情况。The existing UART master control system requires the processor to observe the output status and configure the control register to switch the send data source when switching the send data source, which not only consumes a lot of processor resources but also greatly reduces the efficiency of the sender to transmit data. If If the sending module of multiple sending sources does not deal with output monitoring and switching, it will cause the situation that the output data is interleaved and chaotic.
发明内容Summary of the invention
本发明的目的在于提供一种在多核场景中可自动切换外送数据源的UART主控系统，以解决上述背景技术中提出的问题。An object of the present invention is to provide a UART main control system that can automatically switch outgoing data sources in a multi-core scenario to solve the problems raised in the background art mentioned above.
为实现上述目的，本发明提供如下技术方案：一种在多核场景中可自动切换外送数据源的UART主控系统,包括UART主控系统，所述UART主控系统内设有发送模块，所述发送模块内设有缓存单元，所述发送单元上设有发送端口TX，所述缓存单元连接发送端口TX。To achieve the above object, the present invention provides the following technical solution: A UART main control system that can automatically switch outgoing data sources in a multi-core scenario includes a UART main control system, and a transmission module is provided in the UART main control system. A buffer unit is provided in the transmission module, a transmission port TX is provided on the transmission unit, and the buffer unit is connected to the transmission port TX.
优选的，所述UART主控系统内设置UART发送模组，所述UART发送模组内设有多个缓存单元和自动切换发送数据源控制单元，所述UART发送模组上设有发送端口TX，多个缓存单元分别连接自动切换发送数据源控制单元，所述自动切换发送数据源控制单元连接发送端口TX。Preferably, the UART main control system is provided with a UART transmission module, the UART transmission module is provided with a plurality of buffer units and an automatic switching transmission data source control unit, and the UART transmission module is provided with a transmission port TX A plurality of buffer units are respectively connected to the automatic switching transmission data source control unit, and the automatic switching transmission data source control unit is connected to the transmission port TX.
优选的，多个缓存单元包括缓存A、缓存B。Preferably, the multiple cache units include cache A and cache B.
优选的，包括以下步骤：Preferably, it includes the following steps:
A、在具有多个CPU的系统中，需要多数据源的使用场景配置多个发送缓存控制单元；A. In a system with multiple CPUs, multiple send buffer control units are required for use scenarios with multiple data sources;
B、并使用自动切换发送数据源单元来识别特征数据，当识别成功时将自动切换发送数据源，这样不会使得多个CPU发送的数据混淆在一个缓存中，实现精准自动切换发送数据源，并且可以减少CPU资源消耗。B, and use the automatic switching of the transmission data source unit to identify the characteristic data. When the recognition is successful, the transmission data source will be automatically switched, so that the data sent by multiple CPUs will not be confused in a cache, and the precise automatic switching of the transmission data source is achieved. And can reduce CPU resource consumption.
与现有技术相比，本发明的有益效果是：本发明对于需要多数据源的使用场景配置多个发送缓存控制单元,通过硬件控制模块读取并且识别缓存里已写入的多个连续的特征数据来自动切换到不同的发送数据源，这样操作效率高，并且可以精准得实现自动切换发送数据源，应用在有多个发送数据源的UART系统中可以提高数据传输效率，并且达到节省处理器资源消耗之功效。Compared with the prior art, the beneficial effects of the present invention are: the present invention configures multiple sending cache control units for use scenarios that require multiple data sources, reads through the hardware control module and recognizes multiple consecutive writes in the cache Feature data is automatically switched to different transmission data sources, which has high operation efficiency and can automatically switch transmission data sources accurately. Application in a UART system with multiple transmission data sources can improve data transmission efficiency and save processing. The effect of resource consumption.
附图说明BRIEF DESCRIPTION
图1为本发明控制原理框图；Figure 1 is a block diagram of the control principle of the present invention;
图2为本发明另一控制原理框图；2 is a block diagram of another control principle of the present invention;
图3为本发明自动切换单元从缓存A读取数据切换到缓存B读取数据的状况示意图；FIG. 3 is a schematic diagram of a situation in which the automatic switching unit of the present invention switches from reading data in cache A to reading data in cache B;
图4为本发明自动切换单元从缓存B读取数据切换到缓存A读取数据的状况示意图；FIG. 4 is a schematic diagram of a situation in which the automatic switching unit of the present invention switches from reading data in cache B to reading data in cache A;
图5为本发明自动切换单元从缓存A读取数据切换到缓存B读 取数据状况示意图；5 is a schematic diagram of the automatic switching unit of the present invention switching from reading data in cache A to reading data in cache B;
图6为本发明自动切换单元从缓存A读取数据切换到缓存B读取数据，再切换到缓存A读取数据的状况示意图；6 is a schematic diagram of the automatic switching unit of the present invention switching from reading data in cache A to reading data in cache B, and then switching to reading data in cache A;
图7为本发明自动切换单元从缓存B读取数据切换到缓存A读取数据，再切换到缓存B读取数据的状况示意图。7 is a schematic diagram of the automatic switching unit of the present invention switching from reading data in cache B to reading data in cache A, and then switching to reading data in cache B.
具体实施方式detailed description
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be described clearly and completely in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, but not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without making creative efforts fall within the protection scope of the present invention.
请参阅图1-7，本发明提供一种技术方案：一种在多核场景中可自动切换外送数据源的UART主控系统,包括UART主控系统1，所述UART主控系统1内设有发送模块2，所述发送模块2内设有缓存单元3，所述发送模块2上设有发送端口TX4，所述缓存单元3连接发送端口TX4。1-7, the present invention provides a technical solution: a UART main control system that can automatically switch outgoing data sources in a multi-core scenario, including a UART main control system 1, the UART main control system 1 is provided with There is a sending module 2, a buffer unit 3 is provided in the sending module 2, a sending port TX4 is provided on the sending module 2, and the buffer unit 3 is connected to the sending port TX4.
本发明中，UART主控系统1内设置UART发送模组5，所述UART发送模组5内设有多个缓存单元和自动切换发送数据源控制单元6，所述UART发送模组5上设有发送端口TX4，多个缓存单元分别连接自动切换发送数据源控制单元6，所述自动切换发送数据源控制单元6连接发送端口TX4；多个缓存单元包括缓存A7、缓存B8。In the present invention, a UART transmission module 5 is provided in the UART main control system 1, the UART transmission module 5 is provided with a plurality of buffer units and an automatic switching transmission data source control unit 6, and the UART transmission module 5 is provided with There is a transmission port TX4, and a plurality of buffer units are respectively connected to the automatic switching transmission data source control unit 6, and the automatic switching transmission data source control unit 6 is connected to the transmission port TX4; the plurality of buffer units include a buffer A7 and a buffer B8.
本发明中，一种在多核场景中可自动切换外送数据源的UART主控系统的使用方法，包括以下步骤：In the present invention, a method for using a UART main control system that can automatically switch outgoing data sources in a multi-core scenario includes the following steps:
A、在具有多个CPU的系统中，需要多数据源的使用场景配置多个发送缓存控制单元；A. In a system with multiple CPUs, multiple send buffer control units are required for use scenarios with multiple data sources;
B、并使用自动切换发送数据源单元来识别特征数据，当识别成功时将自动切换发送数据源，这样不会使得多个CPU发送的数据混淆在一个缓存中，实现精准自动切换发送数据源，并且可以减少CPU资源消耗。B, and use the automatic switching of the transmission data source unit to identify the characteristic data. When the recognition is successful, the transmission data source will be automatically switched, so that the data sent by multiple CPUs will not be confused in a cache, and the precise automatic switching of the transmission data source is achieved. And can reduce CPU resource consumption.
本发明对于需要多数据源的使用场景配置多个发送缓存控制单元,通过硬件控制模块读取并且识别缓存里已写入的多个连续的特征数据来自动切换到不同的发送数据源，这样操作效率高，并且可以精准得实现自动切换发送数据源，应用在有多个发送数据源的UART系统中可以提高数据传输效率，并且达到节省处理器资源消耗之功效。The present invention configures multiple sending cache control units for use scenarios that require multiple data sources, and automatically switches to different sending data sources by reading and identifying multiple consecutive feature data written in the cache through the hardware control module. High efficiency, and can accurately switch the transmission data source automatically. Application in UART system with multiple transmission data sources can improve data transmission efficiency and achieve the effect of saving processor resource consumption.
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, and substitutions can be made to these embodiments without departing from the principles and spirit of the present invention And variations, the scope of the invention is defined by the appended claims and their equivalents.

Claims (4)

  1. 一种在多核场景中可自动切换外送数据源的UART主控系统,其特征在于：包括UART主控系统(1)，所述UART主控系统(1)内设有发送模块(2)，所述发送模块(2)内设有缓存单元(3)，所述发送模块(2)上设有发送端口TX(4)，所述缓存单元(3)连接发送端口TX(4)。A UART main control system capable of automatically switching outgoing data sources in a multi-core scenario, characterized in that it includes a UART main control system (1), and the UART main control system (1) is provided with a sending module (2), A buffer unit (3) is provided in the sending module (2), a sending port TX (4) is provided on the sending module (2), and the buffer unit (3) is connected to the sending port TX (4).
  2. 根据权利要求1所述的一种在多核场景中可自动切换外送数据源的UART主控系统，其特征在于：所述UART主控系统(1)内设置UART发送模组(5)，所述UART发送模组(5)内设有多个缓存单元和自动切换发送数据源控制单元(6)，所述UART发送模组(5)上设有发送端口TX(4)，多个缓存单元分别连接自动切换发送数据源控制单元(6)，所述自动切换发送数据源控制单元(6)连接发送端口TX(4)。A UART main control system capable of automatically switching outgoing data sources in a multi-core scenario according to claim 1, wherein the UART main control system (1) is provided with a UART sending module (5), so The UART transmission module (5) is provided with multiple buffer units and an automatic switching transmission data source control unit (6), the UART transmission module (5) is provided with a transmission port TX (4), and multiple buffer units The automatic switching transmission data source control unit (6) is connected respectively, and the automatic switching transmission data source control unit (6) is connected to the transmission port TX (4).
  3. 根据权利要求2所述的一种在多核场景中可自动切换外送数据源的UART主控系统，其特征在于：多个缓存单元包括缓存A(7)、缓存B(8)。A UART main control system capable of automatically switching outgoing data sources in a multi-core scenario according to claim 2, wherein the plurality of cache units include cache A (7) and cache B (8).
  4. 实现权利要求1所述的一种在多核场景中可自动切换外送数据源的UART主控系统的使用方法，其特征在于：包括以下步骤：The method for implementing a UART main control system capable of automatically switching outgoing data sources in a multi-core scenario according to claim 1, characterized in that it includes the following steps:
    A、在具有多个CPU的系统中，需要多数据源的使用场景配置多个发送缓存控制单元；A. In a system with multiple CPUs, multiple send buffer control units are required for use scenarios with multiple data sources;
    B、并使用自动切换发送数据源单元来识别特征数据，当识别成功时将自动切换发送数据源，这样不会使得多个CPU发送的数据混淆在一个缓存中，实现精准自动切换发送数据源，并且可以减少 CPU资源消耗。B, and use the automatic switching of the transmission data source unit to identify the characteristic data. When the recognition is successful, the transmission data source will be automatically switched, so that the data sent by multiple CPUs will not be confused in a cache, and the precise automatic switching of the transmission data source is achieved. And can reduce CPU resource consumption.
PCT/CN2019/078270 2018-12-09 2019-03-15 Uart main control system for automatically switching outgoing data source in multi-core scenario WO2020118945A1 (en)

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US20070028015A1 (en) * 2005-07-28 2007-02-01 Wickham Mark H System and method for processing data streams
CN101446988A (en) * 2007-11-27 2009-06-03 上海摩波彼克半导体有限公司 Device for automated testing universal asynchronous receiver-transmit based on software and method thereof
CN103268301A (en) * 2013-05-30 2013-08-28 华南理工大学广州学院 Automatic-flowing half-duplex UART interface circuit

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Publication number Priority date Publication date Assignee Title
US20070028015A1 (en) * 2005-07-28 2007-02-01 Wickham Mark H System and method for processing data streams
CN101446988A (en) * 2007-11-27 2009-06-03 上海摩波彼克半导体有限公司 Device for automated testing universal asynchronous receiver-transmit based on software and method thereof
CN103268301A (en) * 2013-05-30 2013-08-28 华南理工大学广州学院 Automatic-flowing half-duplex UART interface circuit

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