WO2020118940A1 - 一种内存多重型态配置管理方法 - Google Patents

一种内存多重型态配置管理方法 Download PDF

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WO2020118940A1
WO2020118940A1 PCT/CN2019/078223 CN2019078223W WO2020118940A1 WO 2020118940 A1 WO2020118940 A1 WO 2020118940A1 CN 2019078223 W CN2019078223 W CN 2019078223W WO 2020118940 A1 WO2020118940 A1 WO 2020118940A1
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data
type
controller
read
memory
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谢享奇
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江苏华存电子科技有限公司
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0626Reducing size or complexity of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling

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  • the invention relates to the technical field of memory, in particular to a memory multi-type configuration management method.
  • the related controllers must also support many different attributes of data for many different functions.
  • the unit is also stored in the internal memory block.
  • the memory type of this block is not only a simple readable, read-only (read only) and write-only (write only) data type, but also must support more and more complex states, such as only Write once but cannot read (Read Only), write only once and can read (Write Only), can write and read multiple times and still retain data when power is restarted (R/W/E), Can write and read multiple times and clear the data when the power is restarted (R/W/E_P), can write multiple times and can still retain the data when the power is restarted but cannot read (W/E), can be multiple times Write and read, but when the controller is restarted internally, it should be able to retain data (R/W/E), write multiple times and clear the data when the power is restarted, and cannot read (R/W/E_P)
  • the type of data the type of data also increases with the more applications.
  • the internal program generally plans different blocks of buffers (Buffer) for storing data according to different applications, and separates different types of data. Or integrated storage.
  • Buffer buffer
  • the program will classify them into different attributes according to the type of the data and store them in the block they belong to or reply to write Error.
  • the program will also correspond to the block it belongs to according to the type of data, and judge whether the updated data or fixed value (such as 0) or reply should be sent at this time. Reading error.
  • An object of the present invention is to provide a memory multi-type configuration management method to solve the above-mentioned problems in the background art.
  • a memory multi-type configuration management method includes a controller unit, a memory block is provided in the controller unit, and the memory block includes a header field for setting Set the data type corresponding to the memory location.
  • the program After the power is turned on, the program performs an initialization action, corresponding to the defined data type and filling in the data type in sequence;
  • the controller waits for the main device to send a command to read data
  • the controller receives the command to write data from the host device and starts processing
  • the controller judges the type in the header field according to the position corresponding to the data and decides the writing mechanism
  • the controller fills in the data and changes the asset type in the header field to a state where it cannot be written, and prohibits subsequent writing operations.
  • Other types are based on similar methods deal with;
  • the controller receives the command to read data from the host device and starts processing
  • the controller judges the type in the read head field according to the position corresponding to the data, and decides whether to read the data normally;
  • the controller replies with the correct value of the data, and changes the resource type in the header field to the unreadable state, and prohibits subsequent reading.
  • Other types are based on similar Way to deal with.
  • the purpose of the present invention is to propose a hardware control management mechanism for a memory block supported by a controller that supports multiple configurations.
  • This memory can be programmed by the program based on different data types During initialization, the corresponding address is defined first and the controller takes over to manage the memory block.
  • the program does not need to increase the processing complexity and affect the performance because it has to manage many data types. For example, when the program receives an external device's data setting for the block for the block data, the program directly writes to the corresponding memory location. If the location is read-only, the controller will automatically block when the program is written.
  • the controller will automatically set and block the second write at the location after the program is written, otherwise if the external device responds to the controller for this block of data During the next reading, if the position data is forbidden to read, when it is read, the controller automatically shields the data when sending and fixes the value of 0 or 1, and other types are deduced by analogy.
  • Figure 1 is a schematic diagram of the structure of the present invention
  • FIG. 2 is a flowchart of the present invention.
  • a memory multi-type configuration management method including a controller unit 1, a memory block 2 is provided in the controller unit 1, and the memory block 2 Contains a header field 3 used to set the data type of the corresponding memory location.
  • a memory multi-type configuration management method includes the following steps:
  • the program After the power is turned on, the program performs an initialization action, corresponding to the defined data type and filling in the data type in sequence;
  • the controller waits for the main device to send a command to read data
  • the controller receives the command to write data from the host device and starts processing
  • the controller judges the type in the header field according to the position corresponding to the data and decides the writing mechanism
  • the controller fills in the data and changes the asset type in the header field to a state where it cannot be written, and prohibits subsequent writing operations.
  • Other types are based on similar methods deal with;
  • the controller receives the command to read data from the host device and starts processing
  • the controller judges the type in the read head field according to the position corresponding to the data, and decides whether to read the data normally;
  • the controller replies with the correct value of the data, and changes the resource type in the header field to the unreadable state, and prohibits subsequent reading.
  • Other types are based on similar Way to deal with.
  • the object of the present invention is to propose a hardware control management mechanism for a memory block that supports multiple configurations by the controller.
  • This memory can be used by the program from the beginning to initialize the corresponding address during initialization according to different data types.
  • the memory block is defined and handed over by the controller.
  • the program does not need to increase the complexity of processing and affect the performance because it has to manage numerous data types. For example, when the program receives an external device's data setting for the block for the block data, the program directly writes to the corresponding memory location. If the location is read-only, the controller will automatically block when the program is written.
  • the controller will automatically set and block the second write at the location after the program is written, otherwise if the external device responds to the controller for this block of data During the next reading, if the position data is forbidden to read, when it is read, the controller automatically shields the data when sending and fixes the value of 0 or 1, and other types are deduced by analogy.

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  • Theoretical Computer Science (AREA)
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Abstract

一种内存多重型态配置管理方法,包括控制器单元(1),控制器单元(1)内设置内存区块(2),该内存区块(2)包含一个头字段(3)用来设定对应内存位置的数据型态。上述方法的目的是提出一个由控制器实现支持多重配置的内存区块硬件控制管理机制,此内存可由程序在一开始就依据不同的数据型态在初始化时将对应的地址先行定义好并交由控制器接手管理该内存区块,程序不需因为要管理众多的数据型态而一直增加处理的复杂度并影响效能。

Description

一种内存多重型态配置管理方法 技术领域
本发明涉及内存技术领域,具体为一种内存多重型态配置管理方法。
背景技术
在广泛的工业与消费性储存装置应用中,因为支持的应用背景与场合非常多元(如服务器、手机或储存卡等)因此相关控制器也须针对许多不同的功能去支持多种不同属性的数据单元并同时存放在内部存储器区块中。此区块的内存型态不单是简单的可读取、只读(只能读取)及唯写(只能写入)的数据型态,还须支持更多更复杂的状态,如只能写入一次但不能读取(Read Only)、只能写入一次可以读取(Write Only)、可多次写入与读取并在重启电源时仍能保留数据(R/W/E)、可多次写入与读取并在重启电源时清除数据(R/W/E_P)、可多次写入并在重启电源时仍能保留数据但不能读取(W/E)、可多次写入与读取但当控制器内部重启要能保留数据(R/W/E)、可多次写入并在重启电源时清除数据且不能读取(R/W/E_P)等多样性的数据型态,数据的型态也伴随应用的场合越多而不断的新增。
目前在控制器单元内,一般是由内部程序(Firmware)依据不同应用,针对各种数据的型态自行规划出不同区块的缓冲区(Buffer) 存放数据,将各种不同型态的数据分开或整合存放。在实际应用上,当外部主装置对控制器下达设置数据时,程序会依据数据所搭配的型态将其个别归类到不同的属性并存放在其所属的区块(Block)中或回复写入错误。当外部装置下达读取命令时,程序也会依据数据所搭配的型态对应到其所属的区块(Block)中,判读此时该送出更新的数据或是固定值(如0)或是回复读取错误。由于需透过程序来处理控制,程序会因为数据形态越多需要更多的缓冲区(Buffer)做切割与判读而变得越来越复杂,导致处理的效能低下并占用许多程序的空间,而新增的内存需求也会进一步造成控制器单元的成本升高。
发明内容
本发明的目的在于提供一种内存多重型态配置管理方法,以解决上述背景技术中提出的问题。
为实现上述目的,本发明提供如下技术方案:一种内存多重型态配置管理方法,包括控制器单元,所述控制器单元内设置内存区块,所述内存区块包含一个头字段用来设定对应内存位置的数据型态。
优选的,包括以下步骤:
A、电源开启后,程序进行初始化动作,依据定义的数据型态对应并依序填入各数据的型态;
B、控制器等待主装置送出读取数据的命令;
C、控制器接收到主装置写入数据的命令并开始处理;
D、控制器依据数据对应的位置判断头字段内的型态,决定写入的机制;
E、假如该位置型态为允许写入一次,则控制器将该数据填入并将头字段内的资型态改为无法写入状态,禁止后续写入的动作,其它型态依据类似方式处理;
F、控制器接收到主装置读取数据的命令并开始处理;
G、控制器依据数据对应的位置判读头字段内的型态,决定是否正常读出数据;
H、假如该位置型态为允许读取一次,则控制器回复数据正确的值,并将头字段内的资型态改为无法读取状态,禁止后续的读取,其它型态也依据类似方式处理。
与现有技术相比,本发明的有益效果是:本发明的目的是提出一个由控制器实现支持多重配置的内存区块硬件控制管理机制,此内存可由程序在一开始就依据不同的数据型态在初始化时将对应的地址先行定义好并交由控制器接手管理该内存区块,程序不需因为要管理众多的数据型态而一直增加处理的复杂度并影响效能。例如当程序接收到外部装置针对此区块数据对控制器下达数据设定时,由程序直接写入到对应的内存位置,如果该位置为只读,当程序写 入时则控制器会自动阻断写入,如该位置只能写入一次,则程序写入后控制器会自动在该位置设定并阻断第二次的写入,反之如果当外部装置针对此区块数据对控制器下读取时,如该位置数据为禁止读取,当成是读取时,控制器在送出时自动屏蔽掉该数据并固定送出0或1的值,其它型态依此类推。
附图说明
图1为本发明结构示意图;
图2为本发明流程图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
请参阅图1-2,本发明提供一种技术方案:一种内存多重型态配置管理方法,包括控制器单元1,所述控制器单元1内设置内存区块2,所述内存区块2包含一个头字段3用来设定对应内存位置的数据型态。
本发明中,一种内存多重型态配置管理方法包括以下步骤:
A、电源开启后,程序进行初始化动作,依据定义的数据型态对应并依序填入各数据的型态;
B、控制器等待主装置送出读取数据的命令;
C、控制器接收到主装置写入数据的命令并开始处理;
D、控制器依据数据对应的位置判断头字段内的型态,决定写入的机制;
E、假如该位置型态为允许写入一次,则控制器将该数据填入并将头字段内的资型态改为无法写入状态,禁止后续写入的动作,其它型态依据类似方式处理;
F、控制器接收到主装置读取数据的命令并开始处理;
G、控制器依据数据对应的位置判读头字段内的型态,决定是否正常读出数据;
H、假如该位置型态为允许读取一次,则控制器回复数据正确的值,并将头字段内的资型态改为无法读取状态,禁止后续的读取,其它型态也依据类似方式处理。
综上所述,本发明的目的是提出一个由控制器实现支持多重配置的内存区块硬件控制管理机制,此内存可由程序在一开始就依据不同的数据型态在初始化时将对应的地址先行定义好并交由控制器接手管理该内存区块,程序不需因为要管理众多的数据型态而一直 增加处理的复杂度并影响效能。例如当程序接收到外部装置针对此区块数据对控制器下达数据设定时,由程序直接写入到对应的内存位置,如果该位置为只读,当程序写入时则控制器会自动阻断写入,如该位置只能写入一次,则程序写入后控制器会自动在该位置设定并阻断第二次的写入,反之如果当外部装置针对此区块数据对控制器下读取时,如该位置数据为禁止读取,当成是读取时,控制器在送出时自动屏蔽掉该数据并固定送出0或1的值,其它型态依此类推。
尽管已经示出和描述了本发明的实施例,对于本领域的普通技术人员而言,可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型,本发明的范围由所附权利要求及其等同物限定。

Claims (2)

  1. 一种内存多重型态配置管理方法,包括控制器单元(1),其特征在于:所述控制器单元(1)内设置内存区块(2),所述内存区块(2)包含一个头字段(3)用来设定对应内存位置的数据型态。
  2. 根据权利要求1所述的一种内存多重型态配置管理方法,其特征在于:包括以下步骤:
    A、电源开启后,程序进行初始化动作,依据定义的数据型态对应并依序填入各数据的型态;
    B、控制器等待主装置送出读取数据的命令;
    C、控制器接收到主装置写入数据的命令并开始处理;
    D、控制器依据数据对应的位置判断头字段内的型态,决定写入的机制;
    E、假如该位置型态为允许写入一次,则控制器将该数据填入并将头字段内的资型态改为无法写入状态,禁止后续写入的动作,其它型态依据类似方式处理;
    F、控制器接收到主装置读取数据的命令并开始处理;
    G、控制器依据数据对应的位置判读头字段内的型态,决定是否正常读出数据;
    H、假如该位置型态为允许读取一次,则控制器回复数据正确的值,并将头字段内的资型态改为无法读取状态,禁止后续的读取,其它 型态也依据类似方式处理。
PCT/CN2019/078223 2018-12-09 2019-03-15 一种内存多重型态配置管理方法 WO2020118940A1 (zh)

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CN1289968A (zh) * 2000-11-17 2001-04-04 后健慈 控制内存记忆页存取属性的方法及其架构
US20100017558A1 (en) * 2008-04-11 2010-01-21 Richard Matthew Fruin Memory device operable in read-only and re-writable modes of operation
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JP4209820B2 (ja) * 2004-07-15 2009-01-14 株式会社ハギワラシスコム メモリカードシステム及び該メモリカードシステムで使用されるライトワンス型メモリカード、ホストシステムと半導体記憶デバイスとからなるシステム
CN101295281A (zh) * 2008-06-05 2008-10-29 北京中星微电子有限公司 一种对存储设备进行访问权限限制的方法及存储设备

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Publication number Priority date Publication date Assignee Title
CN1289968A (zh) * 2000-11-17 2001-04-04 后健慈 控制内存记忆页存取属性的方法及其架构
US20100017558A1 (en) * 2008-04-11 2010-01-21 Richard Matthew Fruin Memory device operable in read-only and re-writable modes of operation
CN105283921A (zh) * 2013-06-13 2016-01-27 谷歌公司 非易失性存储器的操作
CN103617404A (zh) * 2013-12-17 2014-03-05 天津赢达信科技有限公司 一种安全分区的存储装置

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